ARM: at91: pm: fix DDR recalibration when resuming from backup and self-refresh

[linux-stable] / include / soc / at91 / sama7-ddr.h

diff --git a/include/soc/at91/sama7-ddr.h b/include/soc/at91/sama7-ddr.h
index f47a933df82eac895351323bb188aec7c8e269d1..72d19887ab810a923759c56fdfc6148d439cff7d 100644 (file)
--- a/include/soc/at91/sama7-ddr.h
+++ b/include/soc/at91/sama7-ddr.h
@@ -40,6 +40,10 @@
 #define                DDR3PHY_DSGCR_ODTPDD_ODT0       (1 << 20)       /* ODT[0] Power Down Driver */
 
 #define DDR3PHY_ZQ0SR0                         (0x188)         /* ZQ status register 0 */
+#define DDR3PHY_ZQ0SR0_PDO_OFF                 (0)             /* Pull-down output impedance select offset */
+#define DDR3PHY_ZQ0SR0_PUO_OFF                 (5)             /* Pull-up output impedance select offset */
+#define DDR3PHY_ZQ0SR0_PDODT_OFF               (10)            /* Pull-down on-die termination impedance select offset */
+#define DDR3PHY_ZQ0SRO_PUODT_OFF               (15)            /* Pull-up on-die termination impedance select offset */
 
 #define        DDR3PHY_DX0DLLCR                        (0x1CC)         /* DDR3PHY DATX8 DLL Control Register */
 #define        DDR3PHY_DX1DLLCR                        (0x20C)         /* DDR3PHY DATX8 DLL Control Register */