]> git.itanic.dy.fi Git - linux-stable/commit
riscv,mmio: Fix readX()-to-delay() ordering
authorAndrea Parri <parri.andrea@gmail.com>
Thu, 3 Aug 2023 04:27:38 +0000 (06:27 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 16 Aug 2023 16:20:59 +0000 (18:20 +0200)
commit002cde0b78d3b59020711477930f1bd98ac39884
treeb3e10c6003bf7205ce6b65a10a685b602bba6fc1
parent8362ad5367dc4337e1019583c89b49071567df97
riscv,mmio: Fix readX()-to-delay() ordering

commit 4eb2eb1b4c0eb07793c240744843498564a67b83 upstream.

Section 2.1 of the Platform Specification [1] states:

  Unless otherwise specified by a given I/O device, I/O devices are on
  ordering channel 0 (i.e., they are point-to-point strongly ordered).

which is not sufficient to guarantee that a readX() by a hart completes
before a subsequent delay() on the same hart (cf. memory-barriers.txt,
"Kernel I/O barrier effects").

Set the I(nput) bit in __io_ar() to restore the ordering, align inline
comments.

[1] https://github.com/riscv/riscv-platform-specs

Signed-off-by: Andrea Parri <parri.andrea@gmail.com>
Link: https://lore.kernel.org/r/20230803042738.5937-1-parri.andrea@gmail.com
Fixes: fab957c11efe ("RISC-V: Atomic and Locking Code")
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/riscv/include/asm/mmio.h