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(merge: d2f9fe6 5d2ffbe)
Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxl
authorDan Williams <dan.j.williams@intel.com>
Mon, 26 Jun 2023 01:56:13 +0000 (18:56 -0700)
committerDan Williams <dan.j.williams@intel.com>
Mon, 26 Jun 2023 01:56:13 +0000 (18:56 -0700)
commit0c0df63177e37ae826d803280eb2c5b6b6a7a9a4
tree5b158934251cb6537491371d3dd09fcf349a3102tree | snapshot
parentd2f9fe695313b1e50028c1ec4cd09bea67152a60commit | diff
parent5d2ffbe4b81a3b6353bf888a523e7e5d4fec47adcommit | diff
Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxl

Pick up the first half of the RCH error handling series. The back half
needs some fixups for test regressions. Small conflicts with the PMU
work around register enumeration and setup helpers.
15 files changed:
drivers/cxl/acpi.c diff1 | diff2 | blob | history
drivers/cxl/core/core.h diff1 | diff2 | blob | history
drivers/cxl/core/hdm.c diff1 | diff2 | blob | history
drivers/cxl/core/pci.c diff1 | diff2 | blob | history
drivers/cxl/core/port.c diff1 | diff2 | blob | history
drivers/cxl/core/region.c diff1 | diff2 | blob | history
drivers/cxl/core/regs.c diff1 | diff2 | blob | history
drivers/cxl/cxl.h diff1 | diff2 | blob | history
drivers/cxl/cxlmem.h diff1 | diff2 | blob | history
drivers/cxl/mem.c diff1 | diff2 | blob | history
drivers/cxl/pci.c diff1 | diff2 | blob | history
drivers/cxl/port.c diff1 | diff2 | blob | history
tools/testing/cxl/Kbuild diff1 | diff2 | blob | history
tools/testing/cxl/test/cxl.c diff1 | diff2 | blob | history
tools/testing/cxl/test/mock.c diff1 | diff2 | blob | history
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