]> git.itanic.dy.fi Git - linux-stable/commit
cxl/hdm: Extend DVSEC range register emulation for region enumeration
authorDan Williams <dan.j.williams@intel.com>
Mon, 3 Apr 2023 23:01:32 +0000 (16:01 -0700)
committerDan Williams <dan.j.williams@intel.com>
Tue, 4 Apr 2023 22:34:34 +0000 (15:34 -0700)
commit24b18197184ac39bb8566fb82c0bf788bcd0d45b
tree6cd1946fc5af84f051cbb44d10bd7ef82c6f7fac
parent52cc48ad2a76a5fe82d239044d67944bbb928de6
cxl/hdm: Extend DVSEC range register emulation for region enumeration

One motivation for mapping range registers to decoder objects is
to use those settings for region autodiscovery.

The need to map a region for devices programmed to use range registers
is especially urgent now that the kernel no longer routes "Soft
Reserved" ranges in the memory map to device-dax by default. The CXL
memory range loses all access mechanisms.

Complete the implementation by marking the DPA reservation and setting
the endpoint-decoder state to signal autodiscovery. Note that the
default settings of ways=1 and granularity=4096 set in cxl_decode_init()
do not need to be updated.

Fixes: 09d09e04d2fc ("cxl/dax: Create dax devices for CXL RAM regions")
Tested-by: Dave Jiang <dave.jiang@intel.com>
Tested-by: Gregory Price <gregory.price@memverge.com>
Link: https://lore.kernel.org/r/168012575521.221280.14177293493678527326.stgit@dwillia2-xfh.jf.intel.com
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/core/hdm.c