]> git.itanic.dy.fi Git - linux-stable/commit
riscv: split cache ops out of dma-noncoherent.c
authorChristoph Hellwig <hch@lst.de>
Sat, 28 Oct 2023 15:51:01 +0000 (17:51 +0200)
committerPalmer Dabbelt <palmer@rivosinc.com>
Tue, 7 Nov 2023 17:37:42 +0000 (09:37 -0800)
commit946bb33d330251966223f770f64885c79448b1a1
tree67ac511133dd5b26ed1a8f2a03f77db42b6ca3ab
parentf367db71d5755d6476dd6f3d84b53c098c111255
riscv: split cache ops out of dma-noncoherent.c

The cache ops are also used by the pmem code which is unconditionally
built into the kernel.  Move them into a separate file that is built
based on the correct config option.

Fixes: fd962781270e ("riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> #
Link: https://lore.kernel.org/r/20231028155101.1039049-1-hch@lst.de
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/mm/Makefile
arch/riscv/mm/cache-ops.c [new file with mode: 0644]
arch/riscv/mm/dma-noncoherent.c