]> git.itanic.dy.fi Git - linux-stable/commit
drm/i915/display/tgl+: Implement new PLL programming step
authorJosé Roberto de Souza <jose.souza@intel.com>
Wed, 16 Feb 2022 13:40:59 +0000 (05:40 -0800)
committerJosé Roberto de Souza <jose.souza@intel.com>
Fri, 18 Feb 2022 14:35:44 +0000 (06:35 -0800)
commitb70ad01a22176b6d903e9cb2f2184c2aa67ecee0
tree13fb4f32bfb37490a6ab01f6fac8b858c266ff56
parented0ccf349ffd9c80e7376d4d8c608643de990e86
drm/i915/display/tgl+: Implement new PLL programming step

A new programming step was added to combo and TC PLL sequences.
If override_AFC_startup is set in VBT, driver should overwrite
AFC_startup value to 0x0 or 0x7 in PLL's div0 register.

The current understating is that only TGL needs this and all other
display 12 and newer platforms will have a older VBT or a newer VBT
with override_AFC_startup set to 0 but in any case there is a
drm_warn_on_once() to let us know if this is not true.

v2:
- specification updated, now AFC can be override to 0x0 or 0x7
- not using a union for div0 (Imre)
- following previous wrong vbt naming: bits instead of bytes (Imre)

BSpec: 49204
BSpec: 20122
BSpec: 49968
BSpec: 71360
Cc: Imre Deak <imre.deak@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220216134059.25348-1-jose.souza@intel.com
drivers/gpu/drm/i915/display/intel_bios.c
drivers/gpu/drm/i915/display/intel_display.c
drivers/gpu/drm/i915/display/intel_display_debugfs.c
drivers/gpu/drm/i915/display/intel_dpll_mgr.c
drivers/gpu/drm/i915/display/intel_dpll_mgr.h
drivers/gpu/drm/i915/display/intel_vbt_defs.h
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_reg.h