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drm/amd/display: Feed SR and Z8 watermarks into DML2 for DCN35
authorNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tue, 7 Nov 2023 16:15:16 +0000 (11:15 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 29 Nov 2023 22:58:18 +0000 (17:58 -0500)
commitcab667a87133d409ff18913fd53c2324803ea8d2
tree131131e118308a0d97c1214e18a5c2b5ad8c9bectree | snapshot
parent4b27a33c3b173bef1d19ba89e0b9b812b4fddd25commit | diff
drm/amd/display: Feed SR and Z8 watermarks into DML2 for DCN35

[Why]
We've updated the table but the values aren't being reflected in DML2
calculation.

[How]
Pass them into the bbox overrides.

Reviewed-by: Jun Lei <jun.lei@amd.com>
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c diff | blob | history
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