]> git.itanic.dy.fi Git - linux-stable/commit
cxl/port: Enable the HDM decoder capability for switch ports
authorDan Williams <dan.j.williams@intel.com>
Thu, 18 May 2023 03:19:43 +0000 (20:19 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Tue, 30 May 2023 13:17:22 +0000 (14:17 +0100)
commitf7420c84f2974e6a41ea10c2345555f1f5d99a54
tree7a5aafbd7a8a9a41a6b40f95ee38f55281495819
parent74475bc78dd993f17492844f404da41932d8b4eb
cxl/port: Enable the HDM decoder capability for switch ports

commit eb0764b822b9b26880b28ccb9100b2983e01bc17 upstream.

Derick noticed, when testing hot plug, that hot-add behaves nominally
after a removal. However, if the hot-add is done without a prior
removal, CXL.mem accesses fail. It turns out that the original
implementation of the port driver and region programming wrongly assumed
that platform-firmware always enables the host-bridge HDM decoder
capability. Add support turning on switch-level HDM decoders in the case
where platform-firmware has not.

The implementation is careful to only arrange for the enable to be
undone if the current instance of the driver was the one that did the
enable. This is to interoperate with platform-firmware that may expect
CXL.mem to remain active after the driver is shutdown. This comes at the
cost of potentially not shutting down the enable on kexec flows, but it
is mitigated by the fact that the related HDM decoders still need to be
enabled on an individual basis.

Cc: <stable@vger.kernel.org>
Reported-by: Derick Marks <derick.w.marks@intel.com>
Fixes: 54cdbf845cf7 ("cxl/port: Add a driver for 'struct cxl_port' objects")
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Link: https://lore.kernel.org/r/168437998331.403037.15719879757678389217.stgit@dwillia2-xfh.jf.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/cxl/core/pci.c
drivers/cxl/cxl.h
drivers/cxl/port.c
tools/testing/cxl/Kbuild
tools/testing/cxl/test/mock.c