]> git.itanic.dy.fi Git - linux-stable/commit
drm/i915/display: Wait PSR2 get out of deep sleep to update pipe
authorJosé Roberto de Souza <jose.souza@intel.com>
Tue, 5 Oct 2021 23:18:51 +0000 (16:18 -0700)
committerJosé Roberto de Souza <jose.souza@intel.com>
Tue, 26 Oct 2021 17:30:51 +0000 (10:30 -0700)
commitfed98c16f13f4c68fc507384d3429516ef5c3b6d
tree808d8815b39ea0d17ec9ac8c5aec8ab52ed00c61
parentbf0d608b55d9b7f426031dfd9f08d9df36c94728
drm/i915/display: Wait PSR2 get out of deep sleep to update pipe

Alderlake-P was getting 'max time under evasion' messages when PSR2
is enabled, this is due PIPE_SCANLINE/PIPEDSL returning 0 over a
period of time longer than VBLANK_EVASION_TIME_US.

For PSR1 we had the same issue so intel_psr_wait_for_idle() was
implemented to wait for PSR1 to get into idle state but nothing was
done for PSR2.

For PSR2 we can't only wait for idle state as PSR2 tends to keep
into sleep state(ready to send selective updates).
Waiting for any state below deep sleep proved to be effective in
avoiding the evasion messages and also not wasted a lot of time.

v2:
- dropping the additional wait_for loops, only the _wait_for_atomic()
is necessary
- waiting for states below EDP_PSR2_STATUS_STATE_DEEP_SLEEP

v3:
- dropping intel_wait_for_condition_atomic() function

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211005231851.67698-1-jose.souza@intel.com
drivers/gpu/drm/i915/display/intel_display_debugfs.c
drivers/gpu/drm/i915/display/intel_psr.c
drivers/gpu/drm/i915/i915_reg.h