]> git.itanic.dy.fi Git - linux-stable/commit
drm/i915: update rawclk also on resume
authorJani Nikula <jani.nikula@intel.com>
Fri, 1 Nov 2019 14:20:24 +0000 (16:20 +0200)
committerJani Nikula <jani.nikula@intel.com>
Tue, 5 Nov 2019 07:01:49 +0000 (09:01 +0200)
commit59ed05ccdded5eb18ce012eff3d01798ac8535fa
tree6a518aca015c650e618f4a1cc7f2ebb15f4c0cf2
parent35ac28a88223d64a996535c58b8f0112118a989c
drm/i915: update rawclk also on resume

Since CNP it's possible for rawclk to have two different values, 19.2
and 24 MHz. If the value indicated by SFUSE_STRAP register is different
from the power on default for PCH_RAWCLK_FREQ, we'll end up having a
mismatch between the rawclk hardware and software states after
suspend/resume. On previous platforms this used to work by accident,
because the power on defaults worked just fine.

Update the rawclk also on resume. The natural place to do this would be
intel_modeset_init_hw(), however VLV/CHV need it done before
intel_power_domains_init_hw(). Thus put it there even if it feels
slightly out of place.

v2: Call intel_update_rawclck() in intel_power_domains_init_hw() for all
    platforms (Ville).

Reported-by: Shawn Lee <shawn.c.lee@intel.com>
Cc: Shawn Lee <shawn.c.lee@intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Tested-by: Shawn Lee <shawn.c.lee@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191101142024.13877-1-jani.nikula@intel.com
drivers/gpu/drm/i915/display/intel_display_power.c
drivers/gpu/drm/i915/i915_drv.c