git.itanic.dy.fi Git - linux-stable/blob - drivers/net/ethernet/broadcom/bnxt/bnxt_ptp.c

   1 /* Broadcom NetXtreme-C/E network driver.
   2  *
   3  * Copyright (c) 2021 Broadcom Inc.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation.
   8  */
   9 #include <linux/kernel.h>
  10 #include <linux/errno.h>
  11 #include <linux/pci.h>
  12 #include <linux/netdevice.h>
  13 #include <linux/etherdevice.h>
  14 #include <linux/net_tstamp.h>
  15 #include <linux/timekeeping.h>
  16 #include <linux/ptp_classify.h>
  17 #include "bnxt_hsi.h"
  18 #include "bnxt.h"
  19 #include "bnxt_hwrm.h"
  20 #include "bnxt_ptp.h"
  21
  22 static int bnxt_ptp_cfg_settime(struct bnxt *bp, u64 time)
  23 {
  24         struct hwrm_func_ptp_cfg_input *req;
  25         int rc;
  26
  27         rc = hwrm_req_init(bp, req, HWRM_FUNC_PTP_CFG);
  28         if (rc)
  29                 return rc;
  30
  31         req->enables = cpu_to_le16(FUNC_PTP_CFG_REQ_ENABLES_PTP_SET_TIME);
  32         req->ptp_set_time = cpu_to_le64(time);
  33         return hwrm_req_send(bp, req);
  34 }
  35
  36 int bnxt_ptp_parse(struct sk_buff *skb, u16 *seq_id, u16 *hdr_off)
  37 {
  38         unsigned int ptp_class;
  39         struct ptp_header *hdr;
  40
  41         ptp_class = ptp_classify_raw(skb);
  42
  43         switch (ptp_class & PTP_CLASS_VMASK) {
  44         case PTP_CLASS_V1:
  45         case PTP_CLASS_V2:
  46                 hdr = ptp_parse_header(skb, ptp_class);
  47                 if (!hdr)
  48                         return -EINVAL;
  49
  50                 *hdr_off = (u8 *)hdr - skb->data;
  51                 *seq_id  = ntohs(hdr->sequence_id);
  52                 return 0;
  53         default:
  54                 return -ERANGE;
  55         }
  56 }
  57
  58 static int bnxt_ptp_settime(struct ptp_clock_info *ptp_info,
  59                             const struct timespec64 *ts)
  60 {
  61         struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
  62                                                 ptp_info);
  63         u64 ns = timespec64_to_ns(ts);
  64
  65         if (ptp->bp->fw_cap & BNXT_FW_CAP_PTP_RTC)
  66                 return bnxt_ptp_cfg_settime(ptp->bp, ns);
  67
  68         spin_lock_bh(&ptp->ptp_lock);
  69         timecounter_init(&ptp->tc, &ptp->cc, ns);
  70         spin_unlock_bh(&ptp->ptp_lock);
  71         return 0;
  72 }
  73
  74 /* Caller holds ptp_lock */
  75 static int bnxt_refclk_read(struct bnxt *bp, struct ptp_system_timestamp *sts,
  76                             u64 *ns)
  77 {
  78         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
  79         u32 high_before, high_now, low;
  80
  81         if (test_bit(BNXT_STATE_IN_FW_RESET, &bp->state))
  82                 return -EIO;
  83
  84         high_before = readl(bp->bar0 + ptp->refclk_mapped_regs[1]);
  85         ptp_read_system_prets(sts);
  86         low = readl(bp->bar0 + ptp->refclk_mapped_regs[0]);
  87         ptp_read_system_postts(sts);
  88         high_now = readl(bp->bar0 + ptp->refclk_mapped_regs[1]);
  89         if (high_now != high_before) {
  90                 ptp_read_system_prets(sts);
  91                 low = readl(bp->bar0 + ptp->refclk_mapped_regs[0]);
  92                 ptp_read_system_postts(sts);
  93         }
  94         *ns = ((u64)high_now << 32) | low;
  95
  96         return 0;
  97 }
  98
  99 static void bnxt_ptp_get_current_time(struct bnxt *bp)
 100 {
 101         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 102
 103         if (!ptp)
 104                 return;
 105         spin_lock_bh(&ptp->ptp_lock);
 106         WRITE_ONCE(ptp->old_time, ptp->current_time);
 107         bnxt_refclk_read(bp, NULL, &ptp->current_time);
 108         spin_unlock_bh(&ptp->ptp_lock);
 109 }
 110
 111 static int bnxt_hwrm_port_ts_query(struct bnxt *bp, u32 flags, u64 *ts)
 112 {
 113         struct hwrm_port_ts_query_output *resp;
 114         struct hwrm_port_ts_query_input *req;
 115         int rc;
 116
 117         rc = hwrm_req_init(bp, req, HWRM_PORT_TS_QUERY);
 118         if (rc)
 119                 return rc;
 120
 121         req->flags = cpu_to_le32(flags);
 122         if ((flags & PORT_TS_QUERY_REQ_FLAGS_PATH) ==
 123             PORT_TS_QUERY_REQ_FLAGS_PATH_TX) {
 124                 req->enables = cpu_to_le16(BNXT_PTP_QTS_TX_ENABLES);
 125                 req->ptp_seq_id = cpu_to_le32(bp->ptp_cfg->tx_seqid);
 126                 req->ptp_hdr_offset = cpu_to_le16(bp->ptp_cfg->tx_hdr_off);
 127                 req->ts_req_timeout = cpu_to_le16(BNXT_PTP_QTS_TIMEOUT);
 128         }
 129         resp = hwrm_req_hold(bp, req);
 130
 131         rc = hwrm_req_send(bp, req);
 132         if (!rc)
 133                 *ts = le64_to_cpu(resp->ptp_msg_ts);
 134         hwrm_req_drop(bp, req);
 135         return rc;
 136 }
 137
 138 static int bnxt_ptp_gettimex(struct ptp_clock_info *ptp_info,
 139                              struct timespec64 *ts,
 140                              struct ptp_system_timestamp *sts)
 141 {
 142         struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
 143                                                 ptp_info);
 144         u64 ns, cycles;
 145         int rc;
 146
 147         spin_lock_bh(&ptp->ptp_lock);
 148         rc = bnxt_refclk_read(ptp->bp, sts, &cycles);
 149         if (rc) {
 150                 spin_unlock_bh(&ptp->ptp_lock);
 151                 return rc;
 152         }
 153         ns = timecounter_cyc2time(&ptp->tc, cycles);
 154         spin_unlock_bh(&ptp->ptp_lock);
 155         *ts = ns_to_timespec64(ns);
 156
 157         return 0;
 158 }
 159
 160 /* Caller holds ptp_lock */
 161 void bnxt_ptp_update_current_time(struct bnxt *bp)
 162 {
 163         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 164
 165         bnxt_refclk_read(ptp->bp, NULL, &ptp->current_time);
 166         WRITE_ONCE(ptp->old_time, ptp->current_time);
 167 }
 168
 169 static int bnxt_ptp_adjphc(struct bnxt_ptp_cfg *ptp, s64 delta)
 170 {
 171         struct hwrm_port_mac_cfg_input *req;
 172         int rc;
 173
 174         rc = hwrm_req_init(ptp->bp, req, HWRM_PORT_MAC_CFG);
 175         if (rc)
 176                 return rc;
 177
 178         req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_PTP_ADJ_PHASE);
 179         req->ptp_adj_phase = cpu_to_le64(delta);
 180
 181         rc = hwrm_req_send(ptp->bp, req);
 182         if (rc) {
 183                 netdev_err(ptp->bp->dev, "ptp adjphc failed. rc = %x\n", rc);
 184         } else {
 185                 spin_lock_bh(&ptp->ptp_lock);
 186                 bnxt_ptp_update_current_time(ptp->bp);
 187                 spin_unlock_bh(&ptp->ptp_lock);
 188         }
 189
 190         return rc;
 191 }
 192
 193 static int bnxt_ptp_adjtime(struct ptp_clock_info *ptp_info, s64 delta)
 194 {
 195         struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
 196                                                 ptp_info);
 197
 198         if (ptp->bp->fw_cap & BNXT_FW_CAP_PTP_RTC)
 199                 return bnxt_ptp_adjphc(ptp, delta);
 200
 201         spin_lock_bh(&ptp->ptp_lock);
 202         timecounter_adjtime(&ptp->tc, delta);
 203         spin_unlock_bh(&ptp->ptp_lock);
 204         return 0;
 205 }
 206
 207 static int bnxt_ptp_adjfreq(struct ptp_clock_info *ptp_info, s32 ppb)
 208 {
 209         struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
 210                                                 ptp_info);
 211         struct hwrm_port_mac_cfg_input *req;
 212         struct bnxt *bp = ptp->bp;
 213         int rc;
 214
 215         rc = hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG);
 216         if (rc)
 217                 return rc;
 218
 219         req->ptp_freq_adj_ppb = cpu_to_le32(ppb);
 220         req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_PTP_FREQ_ADJ_PPB);
 221         rc = hwrm_req_send(ptp->bp, req);
 222         if (rc)
 223                 netdev_err(ptp->bp->dev,
 224                            "ptp adjfreq failed. rc = %d\n", rc);
 225         return rc;
 226 }
 227
 228 void bnxt_ptp_pps_event(struct bnxt *bp, u32 data1, u32 data2)
 229 {
 230         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 231         struct ptp_clock_event event;
 232         u64 ns, pps_ts;
 233
 234         pps_ts = EVENT_PPS_TS(data2, data1);
 235         spin_lock_bh(&ptp->ptp_lock);
 236         ns = timecounter_cyc2time(&ptp->tc, pps_ts);
 237         spin_unlock_bh(&ptp->ptp_lock);
 238
 239         switch (EVENT_DATA2_PPS_EVENT_TYPE(data2)) {
 240         case ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE_INTERNAL:
 241                 event.pps_times.ts_real = ns_to_timespec64(ns);
 242                 event.type = PTP_CLOCK_PPSUSR;
 243                 event.index = EVENT_DATA2_PPS_PIN_NUM(data2);
 244                 break;
 245         case ASYNC_EVENT_CMPL_PPS_TIMESTAMP_EVENT_DATA2_EVENT_TYPE_EXTERNAL:
 246                 event.timestamp = ns;
 247                 event.type = PTP_CLOCK_EXTTS;
 248                 event.index = EVENT_DATA2_PPS_PIN_NUM(data2);
 249                 break;
 250         }
 251
 252         ptp_clock_event(bp->ptp_cfg->ptp_clock, &event);
 253 }
 254
 255 static int bnxt_ptp_cfg_pin(struct bnxt *bp, u8 pin, u8 usage)
 256 {
 257         struct hwrm_func_ptp_pin_cfg_input *req;
 258         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 259         u8 state = usage != BNXT_PPS_PIN_NONE;
 260         u8 *pin_state, *pin_usg;
 261         u32 enables;
 262         int rc;
 263
 264         if (!TSIO_PIN_VALID(pin)) {
 265                 netdev_err(ptp->bp->dev, "1PPS: Invalid pin. Check pin-function configuration\n");
 266                 return -EOPNOTSUPP;
 267         }
 268
 269         rc = hwrm_req_init(ptp->bp, req, HWRM_FUNC_PTP_PIN_CFG);
 270         if (rc)
 271                 return rc;
 272
 273         enables = (FUNC_PTP_PIN_CFG_REQ_ENABLES_PIN0_STATE |
 274                    FUNC_PTP_PIN_CFG_REQ_ENABLES_PIN0_USAGE) << (pin * 2);
 275         req->enables = cpu_to_le32(enables);
 276
 277         pin_state = &req->pin0_state;
 278         pin_usg = &req->pin0_usage;
 279
 280         *(pin_state + (pin * 2)) = state;
 281         *(pin_usg + (pin * 2)) = usage;
 282
 283         rc = hwrm_req_send(ptp->bp, req);
 284         if (rc)
 285                 return rc;
 286
 287         ptp->pps_info.pins[pin].usage = usage;
 288         ptp->pps_info.pins[pin].state = state;
 289
 290         return 0;
 291 }
 292
 293 static int bnxt_ptp_cfg_event(struct bnxt *bp, u8 event)
 294 {
 295         struct hwrm_func_ptp_cfg_input *req;
 296         int rc;
 297
 298         rc = hwrm_req_init(bp, req, HWRM_FUNC_PTP_CFG);
 299         if (rc)
 300                 return rc;
 301
 302         req->enables = cpu_to_le16(FUNC_PTP_CFG_REQ_ENABLES_PTP_PPS_EVENT);
 303         req->ptp_pps_event = event;
 304         return hwrm_req_send(bp, req);
 305 }
 306
 307 void bnxt_ptp_cfg_tstamp_filters(struct bnxt *bp)
 308 {
 309         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 310         struct hwrm_port_mac_cfg_input *req;
 311
 312         if (!ptp || !ptp->tstamp_filters)
 313                 return;
 314
 315         if (hwrm_req_init(bp, req, HWRM_PORT_MAC_CFG))
 316                 goto out;
 317
 318         if (!(bp->fw_cap & BNXT_FW_CAP_RX_ALL_PKT_TS) && (ptp->tstamp_filters &
 319             (PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_ENABLE |
 320              PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_DISABLE))) {
 321                 ptp->tstamp_filters &= ~(PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_ENABLE |
 322                                          PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_DISABLE);
 323                 netdev_warn(bp->dev, "Unsupported FW for all RX pkts timestamp filter\n");
 324         }
 325
 326         req->flags = cpu_to_le32(ptp->tstamp_filters);
 327         req->enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_RX_TS_CAPTURE_PTP_MSG_TYPE);
 328         req->rx_ts_capture_ptp_msg_type = cpu_to_le16(ptp->rxctl);
 329
 330         if (!hwrm_req_send(bp, req)) {
 331                 bp->ptp_all_rx_tstamp = !!(ptp->tstamp_filters &
 332                                            PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_ENABLE);
 333                 return;
 334         }
 335         ptp->tstamp_filters = 0;
 336 out:
 337         bp->ptp_all_rx_tstamp = 0;
 338         netdev_warn(bp->dev, "Failed to configure HW packet timestamp filters\n");
 339 }
 340
 341 void bnxt_ptp_reapply_pps(struct bnxt *bp)
 342 {
 343         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 344         struct bnxt_pps *pps;
 345         u32 pin = 0;
 346         int rc;
 347
 348         if (!ptp || !(bp->fw_cap & BNXT_FW_CAP_PTP_PPS) ||
 349             !(ptp->ptp_info.pin_config))
 350                 return;
 351         pps = &ptp->pps_info;
 352         for (pin = 0; pin < BNXT_MAX_TSIO_PINS; pin++) {
 353                 if (pps->pins[pin].state) {
 354                         rc = bnxt_ptp_cfg_pin(bp, pin, pps->pins[pin].usage);
 355                         if (!rc && pps->pins[pin].event)
 356                                 rc = bnxt_ptp_cfg_event(bp,
 357                                                         pps->pins[pin].event);
 358                         if (rc)
 359                                 netdev_err(bp->dev, "1PPS: Failed to configure pin%d\n",
 360                                            pin);
 361                 }
 362         }
 363 }
 364
 365 static int bnxt_get_target_cycles(struct bnxt_ptp_cfg *ptp, u64 target_ns,
 366                                   u64 *cycles_delta)
 367 {
 368         u64 cycles_now;
 369         u64 nsec_now, nsec_delta;
 370         int rc;
 371
 372         spin_lock_bh(&ptp->ptp_lock);
 373         rc = bnxt_refclk_read(ptp->bp, NULL, &cycles_now);
 374         if (rc) {
 375                 spin_unlock_bh(&ptp->ptp_lock);
 376                 return rc;
 377         }
 378         nsec_now = timecounter_cyc2time(&ptp->tc, cycles_now);
 379         spin_unlock_bh(&ptp->ptp_lock);
 380
 381         nsec_delta = target_ns - nsec_now;
 382         *cycles_delta = div64_u64(nsec_delta << ptp->cc.shift, ptp->cc.mult);
 383         return 0;
 384 }
 385
 386 static int bnxt_ptp_perout_cfg(struct bnxt_ptp_cfg *ptp,
 387                                struct ptp_clock_request *rq)
 388 {
 389         struct hwrm_func_ptp_cfg_input *req;
 390         struct bnxt *bp = ptp->bp;
 391         struct timespec64 ts;
 392         u64 target_ns, delta;
 393         u16 enables;
 394         int rc;
 395
 396         ts.tv_sec = rq->perout.start.sec;
 397         ts.tv_nsec = rq->perout.start.nsec;
 398         target_ns = timespec64_to_ns(&ts);
 399
 400         rc = bnxt_get_target_cycles(ptp, target_ns, &delta);
 401         if (rc)
 402                 return rc;
 403
 404         rc = hwrm_req_init(bp, req, HWRM_FUNC_PTP_CFG);
 405         if (rc)
 406                 return rc;
 407
 408         enables = FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_PERIOD |
 409                   FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_UP |
 410                   FUNC_PTP_CFG_REQ_ENABLES_PTP_FREQ_ADJ_EXT_PHASE;
 411         req->enables = cpu_to_le16(enables);
 412         req->ptp_pps_event = 0;
 413         req->ptp_freq_adj_dll_source = 0;
 414         req->ptp_freq_adj_dll_phase = 0;
 415         req->ptp_freq_adj_ext_period = cpu_to_le32(NSEC_PER_SEC);
 416         req->ptp_freq_adj_ext_up = 0;
 417         req->ptp_freq_adj_ext_phase_lower = cpu_to_le32(delta);
 418
 419         return hwrm_req_send(bp, req);
 420 }
 421
 422 static int bnxt_ptp_enable(struct ptp_clock_info *ptp_info,
 423                            struct ptp_clock_request *rq, int on)
 424 {
 425         struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
 426                                                 ptp_info);
 427         struct bnxt *bp = ptp->bp;
 428         int pin_id;
 429         int rc;
 430
 431         switch (rq->type) {
 432         case PTP_CLK_REQ_EXTTS:
 433                 /* Configure an External PPS IN */
 434                 pin_id = ptp_find_pin(ptp->ptp_clock, PTP_PF_EXTTS,
 435                                       rq->extts.index);
 436                 if (!TSIO_PIN_VALID(pin_id))
 437                         return -EOPNOTSUPP;
 438                 if (!on)
 439                         break;
 440                 rc = bnxt_ptp_cfg_pin(bp, pin_id, BNXT_PPS_PIN_PPS_IN);
 441                 if (rc)
 442                         return rc;
 443                 rc = bnxt_ptp_cfg_event(bp, BNXT_PPS_EVENT_EXTERNAL);
 444                 if (!rc)
 445                         ptp->pps_info.pins[pin_id].event = BNXT_PPS_EVENT_EXTERNAL;
 446                 return rc;
 447         case PTP_CLK_REQ_PEROUT:
 448                 /* Configure a Periodic PPS OUT */
 449                 pin_id = ptp_find_pin(ptp->ptp_clock, PTP_PF_PEROUT,
 450                                       rq->perout.index);
 451                 if (!TSIO_PIN_VALID(pin_id))
 452                         return -EOPNOTSUPP;
 453                 if (!on)
 454                         break;
 455
 456                 rc = bnxt_ptp_cfg_pin(bp, pin_id, BNXT_PPS_PIN_PPS_OUT);
 457                 if (!rc)
 458                         rc = bnxt_ptp_perout_cfg(ptp, rq);
 459
 460                 return rc;
 461         case PTP_CLK_REQ_PPS:
 462                 /* Configure PHC PPS IN */
 463                 rc = bnxt_ptp_cfg_pin(bp, 0, BNXT_PPS_PIN_PPS_IN);
 464                 if (rc)
 465                         return rc;
 466                 rc = bnxt_ptp_cfg_event(bp, BNXT_PPS_EVENT_INTERNAL);
 467                 if (!rc)
 468                         ptp->pps_info.pins[0].event = BNXT_PPS_EVENT_INTERNAL;
 469                 return rc;
 470         default:
 471                 netdev_err(ptp->bp->dev, "Unrecognized PIN function\n");
 472                 return -EOPNOTSUPP;
 473         }
 474
 475         return bnxt_ptp_cfg_pin(bp, pin_id, BNXT_PPS_PIN_NONE);
 476 }
 477
 478 static int bnxt_hwrm_ptp_cfg(struct bnxt *bp)
 479 {
 480         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 481         u32 flags = 0;
 482         int rc = 0;
 483
 484         switch (ptp->rx_filter) {
 485         case HWTSTAMP_FILTER_ALL:
 486                 flags = PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_ENABLE;
 487                 break;
 488         case HWTSTAMP_FILTER_NONE:
 489                 flags = PORT_MAC_CFG_REQ_FLAGS_PTP_RX_TS_CAPTURE_DISABLE;
 490                 if (bp->fw_cap & BNXT_FW_CAP_RX_ALL_PKT_TS)
 491                         flags |= PORT_MAC_CFG_REQ_FLAGS_ALL_RX_TS_CAPTURE_DISABLE;
 492                 break;
 493         case HWTSTAMP_FILTER_PTP_V2_EVENT:
 494         case HWTSTAMP_FILTER_PTP_V2_SYNC:
 495         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
 496                 flags = PORT_MAC_CFG_REQ_FLAGS_PTP_RX_TS_CAPTURE_ENABLE;
 497                 break;
 498         }
 499
 500         if (ptp->tx_tstamp_en)
 501                 flags |= PORT_MAC_CFG_REQ_FLAGS_PTP_TX_TS_CAPTURE_ENABLE;
 502         else
 503                 flags |= PORT_MAC_CFG_REQ_FLAGS_PTP_TX_TS_CAPTURE_DISABLE;
 504
 505         ptp->tstamp_filters = flags;
 506
 507         if (netif_running(bp->dev)) {
 508                 rc = bnxt_close_nic(bp, false, false);
 509                 if (!rc)
 510                         rc = bnxt_open_nic(bp, false, false);
 511                 if (!rc && !ptp->tstamp_filters)
 512                         rc = -EIO;
 513         }
 514
 515         return rc;
 516 }
 517
 518 int bnxt_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
 519 {
 520         struct bnxt *bp = netdev_priv(dev);
 521         struct hwtstamp_config stmpconf;
 522         struct bnxt_ptp_cfg *ptp;
 523         u16 old_rxctl;
 524         int old_rx_filter, rc;
 525         u8 old_tx_tstamp_en;
 526
 527         ptp = bp->ptp_cfg;
 528         if (!ptp)
 529                 return -EOPNOTSUPP;
 530
 531         if (copy_from_user(&stmpconf, ifr->ifr_data, sizeof(stmpconf)))
 532                 return -EFAULT;
 533
 534         if (stmpconf.tx_type != HWTSTAMP_TX_ON &&
 535             stmpconf.tx_type != HWTSTAMP_TX_OFF)
 536                 return -ERANGE;
 537
 538         old_rx_filter = ptp->rx_filter;
 539         old_rxctl = ptp->rxctl;
 540         old_tx_tstamp_en = ptp->tx_tstamp_en;
 541         switch (stmpconf.rx_filter) {
 542         case HWTSTAMP_FILTER_NONE:
 543                 ptp->rxctl = 0;
 544                 ptp->rx_filter = HWTSTAMP_FILTER_NONE;
 545                 break;
 546         case HWTSTAMP_FILTER_ALL:
 547                 if (bp->fw_cap & BNXT_FW_CAP_RX_ALL_PKT_TS) {
 548                         ptp->rx_filter = HWTSTAMP_FILTER_ALL;
 549                         break;
 550                 }
 551                 return -EOPNOTSUPP;
 552         case HWTSTAMP_FILTER_PTP_V2_EVENT:
 553         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
 554         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
 555                 ptp->rxctl = BNXT_PTP_MSG_EVENTS;
 556                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
 557                 break;
 558         case HWTSTAMP_FILTER_PTP_V2_SYNC:
 559         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
 560         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
 561                 ptp->rxctl = BNXT_PTP_MSG_SYNC;
 562                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_SYNC;
 563                 break;
 564         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
 565         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
 566         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
 567                 ptp->rxctl = BNXT_PTP_MSG_DELAY_REQ;
 568                 ptp->rx_filter = HWTSTAMP_FILTER_PTP_V2_DELAY_REQ;
 569                 break;
 570         default:
 571                 return -ERANGE;
 572         }
 573
 574         if (stmpconf.tx_type == HWTSTAMP_TX_ON)
 575                 ptp->tx_tstamp_en = 1;
 576         else
 577                 ptp->tx_tstamp_en = 0;
 578
 579         rc = bnxt_hwrm_ptp_cfg(bp);
 580         if (rc)
 581                 goto ts_set_err;
 582
 583         stmpconf.rx_filter = ptp->rx_filter;
 584         return copy_to_user(ifr->ifr_data, &stmpconf, sizeof(stmpconf)) ?
 585                 -EFAULT : 0;
 586
 587 ts_set_err:
 588         ptp->rx_filter = old_rx_filter;
 589         ptp->rxctl = old_rxctl;
 590         ptp->tx_tstamp_en = old_tx_tstamp_en;
 591         return rc;
 592 }
 593
 594 int bnxt_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
 595 {
 596         struct bnxt *bp = netdev_priv(dev);
 597         struct hwtstamp_config stmpconf;
 598         struct bnxt_ptp_cfg *ptp;
 599
 600         ptp = bp->ptp_cfg;
 601         if (!ptp)
 602                 return -EOPNOTSUPP;
 603
 604         stmpconf.flags = 0;
 605         stmpconf.tx_type = ptp->tx_tstamp_en ? HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;
 606
 607         stmpconf.rx_filter = ptp->rx_filter;
 608         return copy_to_user(ifr->ifr_data, &stmpconf, sizeof(stmpconf)) ?
 609                 -EFAULT : 0;
 610 }
 611
 612 static int bnxt_map_regs(struct bnxt *bp, u32 *reg_arr, int count, int reg_win)
 613 {
 614         u32 reg_base = *reg_arr & BNXT_GRC_BASE_MASK;
 615         u32 win_off;
 616         int i;
 617
 618         for (i = 0; i < count; i++) {
 619                 if ((reg_arr[i] & BNXT_GRC_BASE_MASK) != reg_base)
 620                         return -ERANGE;
 621         }
 622         win_off = BNXT_GRCPF_REG_WINDOW_BASE_OUT + (reg_win - 1) * 4;
 623         writel(reg_base, bp->bar0 + win_off);
 624         return 0;
 625 }
 626
 627 static int bnxt_map_ptp_regs(struct bnxt *bp)
 628 {
 629         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 630         u32 *reg_arr;
 631         int rc, i;
 632
 633         reg_arr = ptp->refclk_regs;
 634         if (bp->flags & BNXT_FLAG_CHIP_P5) {
 635                 rc = bnxt_map_regs(bp, reg_arr, 2, BNXT_PTP_GRC_WIN);
 636                 if (rc)
 637                         return rc;
 638                 for (i = 0; i < 2; i++)
 639                         ptp->refclk_mapped_regs[i] = BNXT_PTP_GRC_WIN_BASE +
 640                                 (ptp->refclk_regs[i] & BNXT_GRC_OFFSET_MASK);
 641                 return 0;
 642         }
 643         return -ENODEV;
 644 }
 645
 646 static void bnxt_unmap_ptp_regs(struct bnxt *bp)
 647 {
 648         writel(0, bp->bar0 + BNXT_GRCPF_REG_WINDOW_BASE_OUT +
 649                   (BNXT_PTP_GRC_WIN - 1) * 4);
 650 }
 651
 652 static u64 bnxt_cc_read(const struct cyclecounter *cc)
 653 {
 654         struct bnxt_ptp_cfg *ptp = container_of(cc, struct bnxt_ptp_cfg, cc);
 655         u64 ns = 0;
 656
 657         bnxt_refclk_read(ptp->bp, NULL, &ns);
 658         return ns;
 659 }
 660
 661 static void bnxt_stamp_tx_skb(struct bnxt *bp, struct sk_buff *skb)
 662 {
 663         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 664         struct skb_shared_hwtstamps timestamp;
 665         u64 ts = 0, ns = 0;
 666         int rc;
 667
 668         rc = bnxt_hwrm_port_ts_query(bp, PORT_TS_QUERY_REQ_FLAGS_PATH_TX, &ts);
 669         if (!rc) {
 670                 memset(&timestamp, 0, sizeof(timestamp));
 671                 spin_lock_bh(&ptp->ptp_lock);
 672                 ns = timecounter_cyc2time(&ptp->tc, ts);
 673                 spin_unlock_bh(&ptp->ptp_lock);
 674                 timestamp.hwtstamp = ns_to_ktime(ns);
 675                 skb_tstamp_tx(ptp->tx_skb, &timestamp);
 676         } else {
 677                 netdev_err(bp->dev, "TS query for TX timer failed rc = %x\n",
 678                            rc);
 679         }
 680
 681         dev_kfree_skb_any(ptp->tx_skb);
 682         ptp->tx_skb = NULL;
 683         atomic_inc(&ptp->tx_avail);
 684 }
 685
 686 static long bnxt_ptp_ts_aux_work(struct ptp_clock_info *ptp_info)
 687 {
 688         struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
 689                                                 ptp_info);
 690         unsigned long now = jiffies;
 691         struct bnxt *bp = ptp->bp;
 692
 693         if (ptp->tx_skb)
 694                 bnxt_stamp_tx_skb(bp, ptp->tx_skb);
 695
 696         if (!time_after_eq(now, ptp->next_period))
 697                 return ptp->next_period - now;
 698
 699         bnxt_ptp_get_current_time(bp);
 700         ptp->next_period = now + HZ;
 701         if (time_after_eq(now, ptp->next_overflow_check)) {
 702                 spin_lock_bh(&ptp->ptp_lock);
 703                 timecounter_read(&ptp->tc);
 704                 spin_unlock_bh(&ptp->ptp_lock);
 705                 ptp->next_overflow_check = now + BNXT_PHC_OVERFLOW_PERIOD;
 706         }
 707         return HZ;
 708 }
 709
 710 int bnxt_get_tx_ts_p5(struct bnxt *bp, struct sk_buff *skb)
 711 {
 712         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 713
 714         if (ptp->tx_skb) {
 715                 netdev_err(bp->dev, "deferring skb:one SKB is still outstanding\n");
 716                 return -EBUSY;
 717         }
 718         ptp->tx_skb = skb;
 719         ptp_schedule_worker(ptp->ptp_clock, 0);
 720         return 0;
 721 }
 722
 723 int bnxt_get_rx_ts_p5(struct bnxt *bp, u64 *ts, u32 pkt_ts)
 724 {
 725         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 726         u64 time;
 727
 728         if (!ptp)
 729                 return -ENODEV;
 730
 731         BNXT_READ_TIME64(ptp, time, ptp->old_time);
 732         *ts = (time & BNXT_HI_TIMER_MASK) | pkt_ts;
 733         if (pkt_ts < (time & BNXT_LO_TIMER_MASK))
 734                 *ts += BNXT_LO_TIMER_MASK + 1;
 735
 736         return 0;
 737 }
 738
 739 static const struct ptp_clock_info bnxt_ptp_caps = {
 740         .owner          = THIS_MODULE,
 741         .name           = "bnxt clock",
 742         .max_adj        = BNXT_MAX_PHC_DRIFT,
 743         .n_alarm        = 0,
 744         .n_ext_ts       = 0,
 745         .n_per_out      = 0,
 746         .n_pins         = 0,
 747         .pps            = 0,
 748         .adjfreq        = bnxt_ptp_adjfreq,
 749         .adjtime        = bnxt_ptp_adjtime,
 750         .do_aux_work    = bnxt_ptp_ts_aux_work,
 751         .gettimex64     = bnxt_ptp_gettimex,
 752         .settime64      = bnxt_ptp_settime,
 753         .enable         = bnxt_ptp_enable,
 754 };
 755
 756 static int bnxt_ptp_verify(struct ptp_clock_info *ptp_info, unsigned int pin,
 757                            enum ptp_pin_function func, unsigned int chan)
 758 {
 759         struct bnxt_ptp_cfg *ptp = container_of(ptp_info, struct bnxt_ptp_cfg,
 760                                                 ptp_info);
 761         /* Allow only PPS pin function configuration */
 762         if (ptp->pps_info.pins[pin].usage <= BNXT_PPS_PIN_PPS_OUT &&
 763             func != PTP_PF_PHYSYNC)
 764                 return 0;
 765         else
 766                 return -EOPNOTSUPP;
 767 }
 768
 769 static int bnxt_ptp_pps_init(struct bnxt *bp)
 770 {
 771         struct hwrm_func_ptp_pin_qcfg_output *resp;
 772         struct hwrm_func_ptp_pin_qcfg_input *req;
 773         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 774         struct ptp_clock_info *ptp_info;
 775         struct bnxt_pps *pps_info;
 776         u8 *pin_usg;
 777         u32 i, rc;
 778
 779         /* Query current/default PIN CFG */
 780         rc = hwrm_req_init(bp, req, HWRM_FUNC_PTP_PIN_QCFG);
 781         if (rc)
 782                 return rc;
 783
 784         resp = hwrm_req_hold(bp, req);
 785         rc = hwrm_req_send(bp, req);
 786         if (rc || !resp->num_pins) {
 787                 hwrm_req_drop(bp, req);
 788                 return -EOPNOTSUPP;
 789         }
 790
 791         ptp_info = &ptp->ptp_info;
 792         pps_info = &ptp->pps_info;
 793         pps_info->num_pins = resp->num_pins;
 794         ptp_info->n_pins = pps_info->num_pins;
 795         ptp_info->pin_config = kcalloc(ptp_info->n_pins,
 796                                        sizeof(*ptp_info->pin_config),
 797                                        GFP_KERNEL);
 798         if (!ptp_info->pin_config) {
 799                 hwrm_req_drop(bp, req);
 800                 return -ENOMEM;
 801         }
 802
 803         /* Report the TSIO capability to kernel */
 804         pin_usg = &resp->pin0_usage;
 805         for (i = 0; i < pps_info->num_pins; i++, pin_usg++) {
 806                 snprintf(ptp_info->pin_config[i].name,
 807                          sizeof(ptp_info->pin_config[i].name), "bnxt_pps%d", i);
 808                 ptp_info->pin_config[i].index = i;
 809                 ptp_info->pin_config[i].chan = i;
 810                 if (*pin_usg == BNXT_PPS_PIN_PPS_IN)
 811                         ptp_info->pin_config[i].func = PTP_PF_EXTTS;
 812                 else if (*pin_usg == BNXT_PPS_PIN_PPS_OUT)
 813                         ptp_info->pin_config[i].func = PTP_PF_PEROUT;
 814                 else
 815                         ptp_info->pin_config[i].func = PTP_PF_NONE;
 816
 817                 pps_info->pins[i].usage = *pin_usg;
 818         }
 819         hwrm_req_drop(bp, req);
 820
 821         /* Only 1 each of ext_ts and per_out pins is available in HW */
 822         ptp_info->n_ext_ts = 1;
 823         ptp_info->n_per_out = 1;
 824         ptp_info->pps = 1;
 825         ptp_info->verify = bnxt_ptp_verify;
 826
 827         return 0;
 828 }
 829
 830 static bool bnxt_pps_config_ok(struct bnxt *bp)
 831 {
 832         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 833
 834         return !(bp->fw_cap & BNXT_FW_CAP_PTP_PPS) == !ptp->ptp_info.pin_config;
 835 }
 836
 837 static void bnxt_ptp_timecounter_init(struct bnxt *bp, bool init_tc)
 838 {
 839         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 840
 841         if (!ptp->ptp_clock) {
 842                 memset(&ptp->cc, 0, sizeof(ptp->cc));
 843                 ptp->cc.read = bnxt_cc_read;
 844                 ptp->cc.mask = CYCLECOUNTER_MASK(48);
 845                 ptp->cc.shift = 0;
 846                 ptp->cc.mult = 1;
 847                 ptp->next_overflow_check = jiffies + BNXT_PHC_OVERFLOW_PERIOD;
 848         }
 849         if (init_tc)
 850                 timecounter_init(&ptp->tc, &ptp->cc, ktime_to_ns(ktime_get_real()));
 851 }
 852
 853 /* Caller holds ptp_lock */
 854 void bnxt_ptp_rtc_timecounter_init(struct bnxt_ptp_cfg *ptp, u64 ns)
 855 {
 856         timecounter_init(&ptp->tc, &ptp->cc, ns);
 857         /* For RTC, cycle_last must be in sync with the timecounter value. */
 858         ptp->tc.cycle_last = ns & ptp->cc.mask;
 859 }
 860
 861 int bnxt_ptp_init_rtc(struct bnxt *bp, bool phc_cfg)
 862 {
 863         struct timespec64 tsp;
 864         u64 ns;
 865         int rc;
 866
 867         if (!bp->ptp_cfg || !(bp->fw_cap & BNXT_FW_CAP_PTP_RTC))
 868                 return -ENODEV;
 869
 870         if (!phc_cfg) {
 871                 ktime_get_real_ts64(&tsp);
 872                 ns = timespec64_to_ns(&tsp);
 873                 rc = bnxt_ptp_cfg_settime(bp, ns);
 874                 if (rc)
 875                         return rc;
 876         } else {
 877                 rc = bnxt_hwrm_port_ts_query(bp, PORT_TS_QUERY_REQ_FLAGS_CURRENT_TIME, &ns);
 878                 if (rc)
 879                         return rc;
 880         }
 881         spin_lock_bh(&bp->ptp_cfg->ptp_lock);
 882         bnxt_ptp_rtc_timecounter_init(bp->ptp_cfg, ns);
 883         spin_unlock_bh(&bp->ptp_cfg->ptp_lock);
 884
 885         return 0;
 886 }
 887
 888 static void bnxt_ptp_free(struct bnxt *bp)
 889 {
 890         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 891
 892         if (ptp->ptp_clock) {
 893                 ptp_clock_unregister(ptp->ptp_clock);
 894                 ptp->ptp_clock = NULL;
 895                 kfree(ptp->ptp_info.pin_config);
 896                 ptp->ptp_info.pin_config = NULL;
 897         }
 898 }
 899
 900 int bnxt_ptp_init(struct bnxt *bp, bool phc_cfg)
 901 {
 902         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 903         int rc;
 904
 905         if (!ptp)
 906                 return 0;
 907
 908         rc = bnxt_map_ptp_regs(bp);
 909         if (rc)
 910                 return rc;
 911
 912         if (ptp->ptp_clock && bnxt_pps_config_ok(bp))
 913                 return 0;
 914
 915         bnxt_ptp_free(bp);
 916
 917         atomic_set(&ptp->tx_avail, BNXT_MAX_TX_TS);
 918         spin_lock_init(&ptp->ptp_lock);
 919
 920         if (bp->fw_cap & BNXT_FW_CAP_PTP_RTC) {
 921                 bnxt_ptp_timecounter_init(bp, false);
 922                 rc = bnxt_ptp_init_rtc(bp, phc_cfg);
 923                 if (rc)
 924                         goto out;
 925         } else {
 926                 bnxt_ptp_timecounter_init(bp, true);
 927         }
 928
 929         ptp->ptp_info = bnxt_ptp_caps;
 930         if ((bp->fw_cap & BNXT_FW_CAP_PTP_PPS)) {
 931                 if (bnxt_ptp_pps_init(bp))
 932                         netdev_err(bp->dev, "1pps not initialized, continuing without 1pps support\n");
 933         }
 934         ptp->ptp_clock = ptp_clock_register(&ptp->ptp_info, &bp->pdev->dev);
 935         if (IS_ERR(ptp->ptp_clock)) {
 936                 int err = PTR_ERR(ptp->ptp_clock);
 937
 938                 ptp->ptp_clock = NULL;
 939                 rc = err;
 940                 goto out;
 941         }
 942         if (bp->flags & BNXT_FLAG_CHIP_P5) {
 943                 spin_lock_bh(&ptp->ptp_lock);
 944                 bnxt_refclk_read(bp, NULL, &ptp->current_time);
 945                 WRITE_ONCE(ptp->old_time, ptp->current_time);
 946                 spin_unlock_bh(&ptp->ptp_lock);
 947                 ptp_schedule_worker(ptp->ptp_clock, 0);
 948         }
 949         return 0;
 950
 951 out:
 952         bnxt_ptp_free(bp);
 953         bnxt_unmap_ptp_regs(bp);
 954         return rc;
 955 }
 956
 957 void bnxt_ptp_clear(struct bnxt *bp)
 958 {
 959         struct bnxt_ptp_cfg *ptp = bp->ptp_cfg;
 960
 961         if (!ptp)
 962                 return;
 963
 964         if (ptp->ptp_clock)
 965                 ptp_clock_unregister(ptp->ptp_clock);
 966
 967         ptp->ptp_clock = NULL;
 968         kfree(ptp->ptp_info.pin_config);
 969         ptp->ptp_info.pin_config = NULL;
 970
 971         if (ptp->tx_skb) {
 972                 dev_kfree_skb_any(ptp->tx_skb);
 973                 ptp->tx_skb = NULL;
 974         }
 975         bnxt_unmap_ptp_regs(bp);
 976 }