git.itanic.dy.fi Git - linux-stable/blob - drivers/net/ethernet/intel/i40e/i40e_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
   3
   4 #include <linux/etherdevice.h>
   5 #include <linux/of_net.h>
   6 #include <linux/pci.h>
   7 #include <linux/bpf.h>
   8 #include <generated/utsrelease.h>
   9 #include <linux/crash_dump.h>
  10
  11 /* Local includes */
  12 #include "i40e.h"
  13 #include "i40e_diag.h"
  14 #include "i40e_xsk.h"
  15 #include <net/udp_tunnel.h>
  16 #include <net/xdp_sock_drv.h>
  17 /* All i40e tracepoints are defined by the include below, which
  18  * must be included exactly once across the whole kernel with
  19  * CREATE_TRACE_POINTS defined
  20  */
  21 #define CREATE_TRACE_POINTS
  22 #include "i40e_trace.h"
  23
  24 const char i40e_driver_name[] = "i40e";
  25 static const char i40e_driver_string[] =
  26                         "Intel(R) Ethernet Connection XL710 Network Driver";
  27
  28 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
  29
  30 /* a bit of forward declarations */
  31 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
  32 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
  33 static int i40e_add_vsi(struct i40e_vsi *vsi);
  34 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
  35 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired);
  36 static int i40e_setup_misc_vector(struct i40e_pf *pf);
  37 static void i40e_determine_queue_usage(struct i40e_pf *pf);
  38 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
  39 static void i40e_prep_for_reset(struct i40e_pf *pf);
  40 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
  41                                    bool lock_acquired);
  42 static int i40e_reset(struct i40e_pf *pf);
  43 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
  44 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf);
  45 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf);
  46 static bool i40e_check_recovery_mode(struct i40e_pf *pf);
  47 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw);
  48 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
  49 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
  50 static int i40e_get_capabilities(struct i40e_pf *pf,
  51                                  enum i40e_admin_queue_opc list_type);
  52 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf);
  53
  54 /* i40e_pci_tbl - PCI Device ID Table
  55  *
  56  * Last entry must be all 0s
  57  *
  58  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  59  *   Class, Class Mask, private data (not used) }
  60  */
  61 static const struct pci_device_id i40e_pci_tbl[] = {
  62         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
  63         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
  64         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
  65         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
  66         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
  67         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
  68         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
  69         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
  70         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
  71         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0},
  72         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_SFP), 0},
  73         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_B), 0},
  74         {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
  75         {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
  76         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
  77         {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
  78         {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
  79         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
  80         {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722_A), 0},
  81         {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
  82         {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
  83         {PCI_VDEVICE(INTEL, I40E_DEV_ID_X710_N3000), 0},
  84         {PCI_VDEVICE(INTEL, I40E_DEV_ID_XXV710_N3000), 0},
  85         {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
  86         {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
  87         /* required last entry */
  88         {0, }
  89 };
  90 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
  91
  92 #define I40E_MAX_VF_COUNT 128
  93 static int debug = -1;
  94 module_param(debug, uint, 0);
  95 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
  96
  97 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
  98 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
  99 MODULE_LICENSE("GPL v2");
 100
 101 static struct workqueue_struct *i40e_wq;
 102
 103 static void netdev_hw_addr_refcnt(struct i40e_mac_filter *f,
 104                                   struct net_device *netdev, int delta)
 105 {
 106         struct netdev_hw_addr *ha;
 107
 108         if (!f || !netdev)
 109                 return;
 110
 111         netdev_for_each_mc_addr(ha, netdev) {
 112                 if (ether_addr_equal(ha->addr, f->macaddr)) {
 113                         ha->refcount += delta;
 114                         if (ha->refcount <= 0)
 115                                 ha->refcount = 1;
 116                         break;
 117                 }
 118         }
 119 }
 120
 121 /**
 122  * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
 123  * @hw:   pointer to the HW structure
 124  * @mem:  ptr to mem struct to fill out
 125  * @size: size of memory requested
 126  * @alignment: what to align the allocation to
 127  **/
 128 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
 129                             u64 size, u32 alignment)
 130 {
 131         struct i40e_pf *pf = (struct i40e_pf *)hw->back;
 132
 133         mem->size = ALIGN(size, alignment);
 134         mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
 135                                      GFP_KERNEL);
 136         if (!mem->va)
 137                 return -ENOMEM;
 138
 139         return 0;
 140 }
 141
 142 /**
 143  * i40e_free_dma_mem_d - OS specific memory free for shared code
 144  * @hw:   pointer to the HW structure
 145  * @mem:  ptr to mem struct to free
 146  **/
 147 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
 148 {
 149         struct i40e_pf *pf = (struct i40e_pf *)hw->back;
 150
 151         dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
 152         mem->va = NULL;
 153         mem->pa = 0;
 154         mem->size = 0;
 155
 156         return 0;
 157 }
 158
 159 /**
 160  * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
 161  * @hw:   pointer to the HW structure
 162  * @mem:  ptr to mem struct to fill out
 163  * @size: size of memory requested
 164  **/
 165 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
 166                              u32 size)
 167 {
 168         mem->size = size;
 169         mem->va = kzalloc(size, GFP_KERNEL);
 170
 171         if (!mem->va)
 172                 return -ENOMEM;
 173
 174         return 0;
 175 }
 176
 177 /**
 178  * i40e_free_virt_mem_d - OS specific memory free for shared code
 179  * @hw:   pointer to the HW structure
 180  * @mem:  ptr to mem struct to free
 181  **/
 182 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
 183 {
 184         /* it's ok to kfree a NULL pointer */
 185         kfree(mem->va);
 186         mem->va = NULL;
 187         mem->size = 0;
 188
 189         return 0;
 190 }
 191
 192 /**
 193  * i40e_get_lump - find a lump of free generic resource
 194  * @pf: board private structure
 195  * @pile: the pile of resource to search
 196  * @needed: the number of items needed
 197  * @id: an owner id to stick on the items assigned
 198  *
 199  * Returns the base item index of the lump, or negative for error
 200  **/
 201 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
 202                          u16 needed, u16 id)
 203 {
 204         int ret = -ENOMEM;
 205         int i, j;
 206
 207         if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
 208                 dev_info(&pf->pdev->dev,
 209                          "param err: pile=%s needed=%d id=0x%04x\n",
 210                          pile ? "<valid>" : "<null>", needed, id);
 211                 return -EINVAL;
 212         }
 213
 214         /* Allocate last queue in the pile for FDIR VSI queue
 215          * so it doesn't fragment the qp_pile
 216          */
 217         if (pile == pf->qp_pile && pf->vsi[id]->type == I40E_VSI_FDIR) {
 218                 if (pile->list[pile->num_entries - 1] & I40E_PILE_VALID_BIT) {
 219                         dev_err(&pf->pdev->dev,
 220                                 "Cannot allocate queue %d for I40E_VSI_FDIR\n",
 221                                 pile->num_entries - 1);
 222                         return -ENOMEM;
 223                 }
 224                 pile->list[pile->num_entries - 1] = id | I40E_PILE_VALID_BIT;
 225                 return pile->num_entries - 1;
 226         }
 227
 228         i = 0;
 229         while (i < pile->num_entries) {
 230                 /* skip already allocated entries */
 231                 if (pile->list[i] & I40E_PILE_VALID_BIT) {
 232                         i++;
 233                         continue;
 234                 }
 235
 236                 /* do we have enough in this lump? */
 237                 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
 238                         if (pile->list[i+j] & I40E_PILE_VALID_BIT)
 239                                 break;
 240                 }
 241
 242                 if (j == needed) {
 243                         /* there was enough, so assign it to the requestor */
 244                         for (j = 0; j < needed; j++)
 245                                 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
 246                         ret = i;
 247                         break;
 248                 }
 249
 250                 /* not enough, so skip over it and continue looking */
 251                 i += j;
 252         }
 253
 254         return ret;
 255 }
 256
 257 /**
 258  * i40e_put_lump - return a lump of generic resource
 259  * @pile: the pile of resource to search
 260  * @index: the base item index
 261  * @id: the owner id of the items assigned
 262  *
 263  * Returns the count of items in the lump
 264  **/
 265 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
 266 {
 267         int valid_id = (id | I40E_PILE_VALID_BIT);
 268         int count = 0;
 269         u16 i;
 270
 271         if (!pile || index >= pile->num_entries)
 272                 return -EINVAL;
 273
 274         for (i = index;
 275              i < pile->num_entries && pile->list[i] == valid_id;
 276              i++) {
 277                 pile->list[i] = 0;
 278                 count++;
 279         }
 280
 281
 282         return count;
 283 }
 284
 285 /**
 286  * i40e_find_vsi_from_id - searches for the vsi with the given id
 287  * @pf: the pf structure to search for the vsi
 288  * @id: id of the vsi it is searching for
 289  **/
 290 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
 291 {
 292         int i;
 293
 294         for (i = 0; i < pf->num_alloc_vsi; i++)
 295                 if (pf->vsi[i] && (pf->vsi[i]->id == id))
 296                         return pf->vsi[i];
 297
 298         return NULL;
 299 }
 300
 301 /**
 302  * i40e_service_event_schedule - Schedule the service task to wake up
 303  * @pf: board private structure
 304  *
 305  * If not already scheduled, this puts the task into the work queue
 306  **/
 307 void i40e_service_event_schedule(struct i40e_pf *pf)
 308 {
 309         if ((!test_bit(__I40E_DOWN, pf->state) &&
 310              !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) ||
 311               test_bit(__I40E_RECOVERY_MODE, pf->state))
 312                 queue_work(i40e_wq, &pf->service_task);
 313 }
 314
 315 /**
 316  * i40e_tx_timeout - Respond to a Tx Hang
 317  * @netdev: network interface device structure
 318  * @txqueue: queue number timing out
 319  *
 320  * If any port has noticed a Tx timeout, it is likely that the whole
 321  * device is munged, not just the one netdev port, so go for the full
 322  * reset.
 323  **/
 324 static void i40e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
 325 {
 326         struct i40e_netdev_priv *np = netdev_priv(netdev);
 327         struct i40e_vsi *vsi = np->vsi;
 328         struct i40e_pf *pf = vsi->back;
 329         struct i40e_ring *tx_ring = NULL;
 330         unsigned int i;
 331         u32 head, val;
 332
 333         pf->tx_timeout_count++;
 334
 335         /* with txqueue index, find the tx_ring struct */
 336         for (i = 0; i < vsi->num_queue_pairs; i++) {
 337                 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
 338                         if (txqueue ==
 339                             vsi->tx_rings[i]->queue_index) {
 340                                 tx_ring = vsi->tx_rings[i];
 341                                 break;
 342                         }
 343                 }
 344         }
 345
 346         if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
 347                 pf->tx_timeout_recovery_level = 1;  /* reset after some time */
 348         else if (time_before(jiffies,
 349                       (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
 350                 return;   /* don't do any new action before the next timeout */
 351
 352         /* don't kick off another recovery if one is already pending */
 353         if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
 354                 return;
 355
 356         if (tx_ring) {
 357                 head = i40e_get_head(tx_ring);
 358                 /* Read interrupt register */
 359                 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
 360                         val = rd32(&pf->hw,
 361                              I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
 362                                                 tx_ring->vsi->base_vector - 1));
 363                 else
 364                         val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
 365
 366                 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
 367                             vsi->seid, txqueue, tx_ring->next_to_clean,
 368                             head, tx_ring->next_to_use,
 369                             readl(tx_ring->tail), val);
 370         }
 371
 372         pf->tx_timeout_last_recovery = jiffies;
 373         netdev_info(netdev, "tx_timeout recovery level %d, txqueue %d\n",
 374                     pf->tx_timeout_recovery_level, txqueue);
 375
 376         switch (pf->tx_timeout_recovery_level) {
 377         case 1:
 378                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
 379                 break;
 380         case 2:
 381                 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
 382                 break;
 383         case 3:
 384                 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
 385                 break;
 386         default:
 387                 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
 388                 break;
 389         }
 390
 391         i40e_service_event_schedule(pf);
 392         pf->tx_timeout_recovery_level++;
 393 }
 394
 395 /**
 396  * i40e_get_vsi_stats_struct - Get System Network Statistics
 397  * @vsi: the VSI we care about
 398  *
 399  * Returns the address of the device statistics structure.
 400  * The statistics are actually updated from the service task.
 401  **/
 402 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
 403 {
 404         return &vsi->net_stats;
 405 }
 406
 407 /**
 408  * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
 409  * @ring: Tx ring to get statistics from
 410  * @stats: statistics entry to be updated
 411  **/
 412 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
 413                                             struct rtnl_link_stats64 *stats)
 414 {
 415         u64 bytes, packets;
 416         unsigned int start;
 417
 418         do {
 419                 start = u64_stats_fetch_begin_irq(&ring->syncp);
 420                 packets = ring->stats.packets;
 421                 bytes   = ring->stats.bytes;
 422         } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
 423
 424         stats->tx_packets += packets;
 425         stats->tx_bytes   += bytes;
 426 }
 427
 428 /**
 429  * i40e_get_netdev_stats_struct - Get statistics for netdev interface
 430  * @netdev: network interface device structure
 431  * @stats: data structure to store statistics
 432  *
 433  * Returns the address of the device statistics structure.
 434  * The statistics are actually updated from the service task.
 435  **/
 436 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
 437                                   struct rtnl_link_stats64 *stats)
 438 {
 439         struct i40e_netdev_priv *np = netdev_priv(netdev);
 440         struct i40e_vsi *vsi = np->vsi;
 441         struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
 442         struct i40e_ring *ring;
 443         int i;
 444
 445         if (test_bit(__I40E_VSI_DOWN, vsi->state))
 446                 return;
 447
 448         if (!vsi->tx_rings)
 449                 return;
 450
 451         rcu_read_lock();
 452         for (i = 0; i < vsi->num_queue_pairs; i++) {
 453                 u64 bytes, packets;
 454                 unsigned int start;
 455
 456                 ring = READ_ONCE(vsi->tx_rings[i]);
 457                 if (!ring)
 458                         continue;
 459                 i40e_get_netdev_stats_struct_tx(ring, stats);
 460
 461                 if (i40e_enabled_xdp_vsi(vsi)) {
 462                         ring = READ_ONCE(vsi->xdp_rings[i]);
 463                         if (!ring)
 464                                 continue;
 465                         i40e_get_netdev_stats_struct_tx(ring, stats);
 466                 }
 467
 468                 ring = READ_ONCE(vsi->rx_rings[i]);
 469                 if (!ring)
 470                         continue;
 471                 do {
 472                         start   = u64_stats_fetch_begin_irq(&ring->syncp);
 473                         packets = ring->stats.packets;
 474                         bytes   = ring->stats.bytes;
 475                 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
 476
 477                 stats->rx_packets += packets;
 478                 stats->rx_bytes   += bytes;
 479
 480         }
 481         rcu_read_unlock();
 482
 483         /* following stats updated by i40e_watchdog_subtask() */
 484         stats->multicast        = vsi_stats->multicast;
 485         stats->tx_errors        = vsi_stats->tx_errors;
 486         stats->tx_dropped       = vsi_stats->tx_dropped;
 487         stats->rx_errors        = vsi_stats->rx_errors;
 488         stats->rx_dropped       = vsi_stats->rx_dropped;
 489         stats->rx_crc_errors    = vsi_stats->rx_crc_errors;
 490         stats->rx_length_errors = vsi_stats->rx_length_errors;
 491 }
 492
 493 /**
 494  * i40e_vsi_reset_stats - Resets all stats of the given vsi
 495  * @vsi: the VSI to have its stats reset
 496  **/
 497 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
 498 {
 499         struct rtnl_link_stats64 *ns;
 500         int i;
 501
 502         if (!vsi)
 503                 return;
 504
 505         ns = i40e_get_vsi_stats_struct(vsi);
 506         memset(ns, 0, sizeof(*ns));
 507         memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
 508         memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
 509         memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
 510         if (vsi->rx_rings && vsi->rx_rings[0]) {
 511                 for (i = 0; i < vsi->num_queue_pairs; i++) {
 512                         memset(&vsi->rx_rings[i]->stats, 0,
 513                                sizeof(vsi->rx_rings[i]->stats));
 514                         memset(&vsi->rx_rings[i]->rx_stats, 0,
 515                                sizeof(vsi->rx_rings[i]->rx_stats));
 516                         memset(&vsi->tx_rings[i]->stats, 0,
 517                                sizeof(vsi->tx_rings[i]->stats));
 518                         memset(&vsi->tx_rings[i]->tx_stats, 0,
 519                                sizeof(vsi->tx_rings[i]->tx_stats));
 520                 }
 521         }
 522         vsi->stat_offsets_loaded = false;
 523 }
 524
 525 /**
 526  * i40e_pf_reset_stats - Reset all of the stats for the given PF
 527  * @pf: the PF to be reset
 528  **/
 529 void i40e_pf_reset_stats(struct i40e_pf *pf)
 530 {
 531         int i;
 532
 533         memset(&pf->stats, 0, sizeof(pf->stats));
 534         memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
 535         pf->stat_offsets_loaded = false;
 536
 537         for (i = 0; i < I40E_MAX_VEB; i++) {
 538                 if (pf->veb[i]) {
 539                         memset(&pf->veb[i]->stats, 0,
 540                                sizeof(pf->veb[i]->stats));
 541                         memset(&pf->veb[i]->stats_offsets, 0,
 542                                sizeof(pf->veb[i]->stats_offsets));
 543                         memset(&pf->veb[i]->tc_stats, 0,
 544                                sizeof(pf->veb[i]->tc_stats));
 545                         memset(&pf->veb[i]->tc_stats_offsets, 0,
 546                                sizeof(pf->veb[i]->tc_stats_offsets));
 547                         pf->veb[i]->stat_offsets_loaded = false;
 548                 }
 549         }
 550         pf->hw_csum_rx_error = 0;
 551 }
 552
 553 /**
 554  * i40e_compute_pci_to_hw_id - compute index form PCI function.
 555  * @vsi: ptr to the VSI to read from.
 556  * @hw: ptr to the hardware info.
 557  **/
 558 static u32 i40e_compute_pci_to_hw_id(struct i40e_vsi *vsi, struct i40e_hw *hw)
 559 {
 560         int pf_count = i40e_get_pf_count(hw);
 561
 562         if (vsi->type == I40E_VSI_SRIOV)
 563                 return (hw->port * BIT(7)) / pf_count + vsi->vf_id;
 564
 565         return hw->port + BIT(7);
 566 }
 567
 568 /**
 569  * i40e_stat_update64 - read and update a 64 bit stat from the chip.
 570  * @hw: ptr to the hardware info.
 571  * @hireg: the high 32 bit reg to read.
 572  * @loreg: the low 32 bit reg to read.
 573  * @offset_loaded: has the initial offset been loaded yet.
 574  * @offset: ptr to current offset value.
 575  * @stat: ptr to the stat.
 576  *
 577  * Since the device stats are not reset at PFReset, they will not
 578  * be zeroed when the driver starts.  We'll save the first values read
 579  * and use them as offsets to be subtracted from the raw values in order
 580  * to report stats that count from zero.
 581  **/
 582 static void i40e_stat_update64(struct i40e_hw *hw, u32 hireg, u32 loreg,
 583                                bool offset_loaded, u64 *offset, u64 *stat)
 584 {
 585         u64 new_data;
 586
 587         new_data = rd64(hw, loreg);
 588
 589         if (!offset_loaded || new_data < *offset)
 590                 *offset = new_data;
 591         *stat = new_data - *offset;
 592 }
 593
 594 /**
 595  * i40e_stat_update48 - read and update a 48 bit stat from the chip
 596  * @hw: ptr to the hardware info
 597  * @hireg: the high 32 bit reg to read
 598  * @loreg: the low 32 bit reg to read
 599  * @offset_loaded: has the initial offset been loaded yet
 600  * @offset: ptr to current offset value
 601  * @stat: ptr to the stat
 602  *
 603  * Since the device stats are not reset at PFReset, they likely will not
 604  * be zeroed when the driver starts.  We'll save the first values read
 605  * and use them as offsets to be subtracted from the raw values in order
 606  * to report stats that count from zero.  In the process, we also manage
 607  * the potential roll-over.
 608  **/
 609 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
 610                                bool offset_loaded, u64 *offset, u64 *stat)
 611 {
 612         u64 new_data;
 613
 614         if (hw->device_id == I40E_DEV_ID_QEMU) {
 615                 new_data = rd32(hw, loreg);
 616                 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
 617         } else {
 618                 new_data = rd64(hw, loreg);
 619         }
 620         if (!offset_loaded)
 621                 *offset = new_data;
 622         if (likely(new_data >= *offset))
 623                 *stat = new_data - *offset;
 624         else
 625                 *stat = (new_data + BIT_ULL(48)) - *offset;
 626         *stat &= 0xFFFFFFFFFFFFULL;
 627 }
 628
 629 /**
 630  * i40e_stat_update32 - read and update a 32 bit stat from the chip
 631  * @hw: ptr to the hardware info
 632  * @reg: the hw reg to read
 633  * @offset_loaded: has the initial offset been loaded yet
 634  * @offset: ptr to current offset value
 635  * @stat: ptr to the stat
 636  **/
 637 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
 638                                bool offset_loaded, u64 *offset, u64 *stat)
 639 {
 640         u32 new_data;
 641
 642         new_data = rd32(hw, reg);
 643         if (!offset_loaded)
 644                 *offset = new_data;
 645         if (likely(new_data >= *offset))
 646                 *stat = (u32)(new_data - *offset);
 647         else
 648                 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
 649 }
 650
 651 /**
 652  * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
 653  * @hw: ptr to the hardware info
 654  * @reg: the hw reg to read and clear
 655  * @stat: ptr to the stat
 656  **/
 657 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
 658 {
 659         u32 new_data = rd32(hw, reg);
 660
 661         wr32(hw, reg, 1); /* must write a nonzero value to clear register */
 662         *stat += new_data;
 663 }
 664
 665 /**
 666  * i40e_stats_update_rx_discards - update rx_discards.
 667  * @vsi: ptr to the VSI to be updated.
 668  * @hw: ptr to the hardware info.
 669  * @stat_idx: VSI's stat_counter_idx.
 670  * @offset_loaded: ptr to the VSI's stat_offsets_loaded.
 671  * @stat_offset: ptr to stat_offset to store first read of specific register.
 672  * @stat: ptr to VSI's stat to be updated.
 673  **/
 674 static void
 675 i40e_stats_update_rx_discards(struct i40e_vsi *vsi, struct i40e_hw *hw,
 676                               int stat_idx, bool offset_loaded,
 677                               struct i40e_eth_stats *stat_offset,
 678                               struct i40e_eth_stats *stat)
 679 {
 680         u64 rx_rdpc, rx_rxerr;
 681
 682         i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), offset_loaded,
 683                            &stat_offset->rx_discards, &rx_rdpc);
 684         i40e_stat_update64(hw,
 685                            I40E_GL_RXERR1H(i40e_compute_pci_to_hw_id(vsi, hw)),
 686                            I40E_GL_RXERR1L(i40e_compute_pci_to_hw_id(vsi, hw)),
 687                            offset_loaded, &stat_offset->rx_discards_other,
 688                            &rx_rxerr);
 689
 690         stat->rx_discards = rx_rdpc + rx_rxerr;
 691 }
 692
 693 /**
 694  * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
 695  * @vsi: the VSI to be updated
 696  **/
 697 void i40e_update_eth_stats(struct i40e_vsi *vsi)
 698 {
 699         int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
 700         struct i40e_pf *pf = vsi->back;
 701         struct i40e_hw *hw = &pf->hw;
 702         struct i40e_eth_stats *oes;
 703         struct i40e_eth_stats *es;     /* device's eth stats */
 704
 705         es = &vsi->eth_stats;
 706         oes = &vsi->eth_stats_offsets;
 707
 708         /* Gather up the stats that the hw collects */
 709         i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
 710                            vsi->stat_offsets_loaded,
 711                            &oes->tx_errors, &es->tx_errors);
 712         i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
 713                            vsi->stat_offsets_loaded,
 714                            &oes->rx_discards, &es->rx_discards);
 715         i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
 716                            vsi->stat_offsets_loaded,
 717                            &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
 718
 719         i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
 720                            I40E_GLV_GORCL(stat_idx),
 721                            vsi->stat_offsets_loaded,
 722                            &oes->rx_bytes, &es->rx_bytes);
 723         i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
 724                            I40E_GLV_UPRCL(stat_idx),
 725                            vsi->stat_offsets_loaded,
 726                            &oes->rx_unicast, &es->rx_unicast);
 727         i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
 728                            I40E_GLV_MPRCL(stat_idx),
 729                            vsi->stat_offsets_loaded,
 730                            &oes->rx_multicast, &es->rx_multicast);
 731         i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
 732                            I40E_GLV_BPRCL(stat_idx),
 733                            vsi->stat_offsets_loaded,
 734                            &oes->rx_broadcast, &es->rx_broadcast);
 735
 736         i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
 737                            I40E_GLV_GOTCL(stat_idx),
 738                            vsi->stat_offsets_loaded,
 739                            &oes->tx_bytes, &es->tx_bytes);
 740         i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
 741                            I40E_GLV_UPTCL(stat_idx),
 742                            vsi->stat_offsets_loaded,
 743                            &oes->tx_unicast, &es->tx_unicast);
 744         i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
 745                            I40E_GLV_MPTCL(stat_idx),
 746                            vsi->stat_offsets_loaded,
 747                            &oes->tx_multicast, &es->tx_multicast);
 748         i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
 749                            I40E_GLV_BPTCL(stat_idx),
 750                            vsi->stat_offsets_loaded,
 751                            &oes->tx_broadcast, &es->tx_broadcast);
 752
 753         i40e_stats_update_rx_discards(vsi, hw, stat_idx,
 754                                       vsi->stat_offsets_loaded, oes, es);
 755
 756         vsi->stat_offsets_loaded = true;
 757 }
 758
 759 /**
 760  * i40e_update_veb_stats - Update Switch component statistics
 761  * @veb: the VEB being updated
 762  **/
 763 void i40e_update_veb_stats(struct i40e_veb *veb)
 764 {
 765         struct i40e_pf *pf = veb->pf;
 766         struct i40e_hw *hw = &pf->hw;
 767         struct i40e_eth_stats *oes;
 768         struct i40e_eth_stats *es;     /* device's eth stats */
 769         struct i40e_veb_tc_stats *veb_oes;
 770         struct i40e_veb_tc_stats *veb_es;
 771         int i, idx = 0;
 772
 773         idx = veb->stats_idx;
 774         es = &veb->stats;
 775         oes = &veb->stats_offsets;
 776         veb_es = &veb->tc_stats;
 777         veb_oes = &veb->tc_stats_offsets;
 778
 779         /* Gather up the stats that the hw collects */
 780         i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
 781                            veb->stat_offsets_loaded,
 782                            &oes->tx_discards, &es->tx_discards);
 783         if (hw->revision_id > 0)
 784                 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
 785                                    veb->stat_offsets_loaded,
 786                                    &oes->rx_unknown_protocol,
 787                                    &es->rx_unknown_protocol);
 788         i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
 789                            veb->stat_offsets_loaded,
 790                            &oes->rx_bytes, &es->rx_bytes);
 791         i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
 792                            veb->stat_offsets_loaded,
 793                            &oes->rx_unicast, &es->rx_unicast);
 794         i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
 795                            veb->stat_offsets_loaded,
 796                            &oes->rx_multicast, &es->rx_multicast);
 797         i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
 798                            veb->stat_offsets_loaded,
 799                            &oes->rx_broadcast, &es->rx_broadcast);
 800
 801         i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
 802                            veb->stat_offsets_loaded,
 803                            &oes->tx_bytes, &es->tx_bytes);
 804         i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
 805                            veb->stat_offsets_loaded,
 806                            &oes->tx_unicast, &es->tx_unicast);
 807         i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
 808                            veb->stat_offsets_loaded,
 809                            &oes->tx_multicast, &es->tx_multicast);
 810         i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
 811                            veb->stat_offsets_loaded,
 812                            &oes->tx_broadcast, &es->tx_broadcast);
 813         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
 814                 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
 815                                    I40E_GLVEBTC_RPCL(i, idx),
 816                                    veb->stat_offsets_loaded,
 817                                    &veb_oes->tc_rx_packets[i],
 818                                    &veb_es->tc_rx_packets[i]);
 819                 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
 820                                    I40E_GLVEBTC_RBCL(i, idx),
 821                                    veb->stat_offsets_loaded,
 822                                    &veb_oes->tc_rx_bytes[i],
 823                                    &veb_es->tc_rx_bytes[i]);
 824                 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
 825                                    I40E_GLVEBTC_TPCL(i, idx),
 826                                    veb->stat_offsets_loaded,
 827                                    &veb_oes->tc_tx_packets[i],
 828                                    &veb_es->tc_tx_packets[i]);
 829                 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
 830                                    I40E_GLVEBTC_TBCL(i, idx),
 831                                    veb->stat_offsets_loaded,
 832                                    &veb_oes->tc_tx_bytes[i],
 833                                    &veb_es->tc_tx_bytes[i]);
 834         }
 835         veb->stat_offsets_loaded = true;
 836 }
 837
 838 /**
 839  * i40e_update_vsi_stats - Update the vsi statistics counters.
 840  * @vsi: the VSI to be updated
 841  *
 842  * There are a few instances where we store the same stat in a
 843  * couple of different structs.  This is partly because we have
 844  * the netdev stats that need to be filled out, which is slightly
 845  * different from the "eth_stats" defined by the chip and used in
 846  * VF communications.  We sort it out here.
 847  **/
 848 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
 849 {
 850         u64 rx_page, rx_buf, rx_reuse, rx_alloc, rx_waive, rx_busy;
 851         struct i40e_pf *pf = vsi->back;
 852         struct rtnl_link_stats64 *ons;
 853         struct rtnl_link_stats64 *ns;   /* netdev stats */
 854         struct i40e_eth_stats *oes;
 855         struct i40e_eth_stats *es;     /* device's eth stats */
 856         u64 tx_restart, tx_busy;
 857         struct i40e_ring *p;
 858         u64 bytes, packets;
 859         unsigned int start;
 860         u64 tx_linearize;
 861         u64 tx_force_wb;
 862         u64 tx_stopped;
 863         u64 rx_p, rx_b;
 864         u64 tx_p, tx_b;
 865         u16 q;
 866
 867         if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
 868             test_bit(__I40E_CONFIG_BUSY, pf->state))
 869                 return;
 870
 871         ns = i40e_get_vsi_stats_struct(vsi);
 872         ons = &vsi->net_stats_offsets;
 873         es = &vsi->eth_stats;
 874         oes = &vsi->eth_stats_offsets;
 875
 876         /* Gather up the netdev and vsi stats that the driver collects
 877          * on the fly during packet processing
 878          */
 879         rx_b = rx_p = 0;
 880         tx_b = tx_p = 0;
 881         tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
 882         tx_stopped = 0;
 883         rx_page = 0;
 884         rx_buf = 0;
 885         rx_reuse = 0;
 886         rx_alloc = 0;
 887         rx_waive = 0;
 888         rx_busy = 0;
 889         rcu_read_lock();
 890         for (q = 0; q < vsi->num_queue_pairs; q++) {
 891                 /* locate Tx ring */
 892                 p = READ_ONCE(vsi->tx_rings[q]);
 893                 if (!p)
 894                         continue;
 895
 896                 do {
 897                         start = u64_stats_fetch_begin_irq(&p->syncp);
 898                         packets = p->stats.packets;
 899                         bytes = p->stats.bytes;
 900                 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
 901                 tx_b += bytes;
 902                 tx_p += packets;
 903                 tx_restart += p->tx_stats.restart_queue;
 904                 tx_busy += p->tx_stats.tx_busy;
 905                 tx_linearize += p->tx_stats.tx_linearize;
 906                 tx_force_wb += p->tx_stats.tx_force_wb;
 907                 tx_stopped += p->tx_stats.tx_stopped;
 908
 909                 /* locate Rx ring */
 910                 p = READ_ONCE(vsi->rx_rings[q]);
 911                 if (!p)
 912                         continue;
 913
 914                 do {
 915                         start = u64_stats_fetch_begin_irq(&p->syncp);
 916                         packets = p->stats.packets;
 917                         bytes = p->stats.bytes;
 918                 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
 919                 rx_b += bytes;
 920                 rx_p += packets;
 921                 rx_buf += p->rx_stats.alloc_buff_failed;
 922                 rx_page += p->rx_stats.alloc_page_failed;
 923                 rx_reuse += p->rx_stats.page_reuse_count;
 924                 rx_alloc += p->rx_stats.page_alloc_count;
 925                 rx_waive += p->rx_stats.page_waive_count;
 926                 rx_busy += p->rx_stats.page_busy_count;
 927
 928                 if (i40e_enabled_xdp_vsi(vsi)) {
 929                         /* locate XDP ring */
 930                         p = READ_ONCE(vsi->xdp_rings[q]);
 931                         if (!p)
 932                                 continue;
 933
 934                         do {
 935                                 start = u64_stats_fetch_begin_irq(&p->syncp);
 936                                 packets = p->stats.packets;
 937                                 bytes = p->stats.bytes;
 938                         } while (u64_stats_fetch_retry_irq(&p->syncp, start));
 939                         tx_b += bytes;
 940                         tx_p += packets;
 941                         tx_restart += p->tx_stats.restart_queue;
 942                         tx_busy += p->tx_stats.tx_busy;
 943                         tx_linearize += p->tx_stats.tx_linearize;
 944                         tx_force_wb += p->tx_stats.tx_force_wb;
 945                 }
 946         }
 947         rcu_read_unlock();
 948         vsi->tx_restart = tx_restart;
 949         vsi->tx_busy = tx_busy;
 950         vsi->tx_linearize = tx_linearize;
 951         vsi->tx_force_wb = tx_force_wb;
 952         vsi->tx_stopped = tx_stopped;
 953         vsi->rx_page_failed = rx_page;
 954         vsi->rx_buf_failed = rx_buf;
 955         vsi->rx_page_reuse = rx_reuse;
 956         vsi->rx_page_alloc = rx_alloc;
 957         vsi->rx_page_waive = rx_waive;
 958         vsi->rx_page_busy = rx_busy;
 959
 960         ns->rx_packets = rx_p;
 961         ns->rx_bytes = rx_b;
 962         ns->tx_packets = tx_p;
 963         ns->tx_bytes = tx_b;
 964
 965         /* update netdev stats from eth stats */
 966         i40e_update_eth_stats(vsi);
 967         ons->tx_errors = oes->tx_errors;
 968         ns->tx_errors = es->tx_errors;
 969         ons->multicast = oes->rx_multicast;
 970         ns->multicast = es->rx_multicast;
 971         ons->rx_dropped = oes->rx_discards;
 972         ns->rx_dropped = es->rx_discards;
 973         ons->tx_dropped = oes->tx_discards;
 974         ns->tx_dropped = es->tx_discards;
 975
 976         /* pull in a couple PF stats if this is the main vsi */
 977         if (vsi == pf->vsi[pf->lan_vsi]) {
 978                 ns->rx_crc_errors = pf->stats.crc_errors;
 979                 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
 980                 ns->rx_length_errors = pf->stats.rx_length_errors;
 981         }
 982 }
 983
 984 /**
 985  * i40e_update_pf_stats - Update the PF statistics counters.
 986  * @pf: the PF to be updated
 987  **/
 988 static void i40e_update_pf_stats(struct i40e_pf *pf)
 989 {
 990         struct i40e_hw_port_stats *osd = &pf->stats_offsets;
 991         struct i40e_hw_port_stats *nsd = &pf->stats;
 992         struct i40e_hw *hw = &pf->hw;
 993         u32 val;
 994         int i;
 995
 996         i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
 997                            I40E_GLPRT_GORCL(hw->port),
 998                            pf->stat_offsets_loaded,
 999                            &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
1000         i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
1001                            I40E_GLPRT_GOTCL(hw->port),
1002                            pf->stat_offsets_loaded,
1003                            &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
1004         i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
1005                            pf->stat_offsets_loaded,
1006                            &osd->eth.rx_discards,
1007                            &nsd->eth.rx_discards);
1008         i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
1009                            I40E_GLPRT_UPRCL(hw->port),
1010                            pf->stat_offsets_loaded,
1011                            &osd->eth.rx_unicast,
1012                            &nsd->eth.rx_unicast);
1013         i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
1014                            I40E_GLPRT_MPRCL(hw->port),
1015                            pf->stat_offsets_loaded,
1016                            &osd->eth.rx_multicast,
1017                            &nsd->eth.rx_multicast);
1018         i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
1019                            I40E_GLPRT_BPRCL(hw->port),
1020                            pf->stat_offsets_loaded,
1021                            &osd->eth.rx_broadcast,
1022                            &nsd->eth.rx_broadcast);
1023         i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1024                            I40E_GLPRT_UPTCL(hw->port),
1025                            pf->stat_offsets_loaded,
1026                            &osd->eth.tx_unicast,
1027                            &nsd->eth.tx_unicast);
1028         i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1029                            I40E_GLPRT_MPTCL(hw->port),
1030                            pf->stat_offsets_loaded,
1031                            &osd->eth.tx_multicast,
1032                            &nsd->eth.tx_multicast);
1033         i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1034                            I40E_GLPRT_BPTCL(hw->port),
1035                            pf->stat_offsets_loaded,
1036                            &osd->eth.tx_broadcast,
1037                            &nsd->eth.tx_broadcast);
1038
1039         i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1040                            pf->stat_offsets_loaded,
1041                            &osd->tx_dropped_link_down,
1042                            &nsd->tx_dropped_link_down);
1043
1044         i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1045                            pf->stat_offsets_loaded,
1046                            &osd->crc_errors, &nsd->crc_errors);
1047
1048         i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1049                            pf->stat_offsets_loaded,
1050                            &osd->illegal_bytes, &nsd->illegal_bytes);
1051
1052         i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1053                            pf->stat_offsets_loaded,
1054                            &osd->mac_local_faults,
1055                            &nsd->mac_local_faults);
1056         i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1057                            pf->stat_offsets_loaded,
1058                            &osd->mac_remote_faults,
1059                            &nsd->mac_remote_faults);
1060
1061         i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1062                            pf->stat_offsets_loaded,
1063                            &osd->rx_length_errors,
1064                            &nsd->rx_length_errors);
1065
1066         i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1067                            pf->stat_offsets_loaded,
1068                            &osd->link_xon_rx, &nsd->link_xon_rx);
1069         i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1070                            pf->stat_offsets_loaded,
1071                            &osd->link_xon_tx, &nsd->link_xon_tx);
1072         i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
1073                            pf->stat_offsets_loaded,
1074                            &osd->link_xoff_rx, &nsd->link_xoff_rx);
1075         i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1076                            pf->stat_offsets_loaded,
1077                            &osd->link_xoff_tx, &nsd->link_xoff_tx);
1078
1079         for (i = 0; i < 8; i++) {
1080                 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
1081                                    pf->stat_offsets_loaded,
1082                                    &osd->priority_xoff_rx[i],
1083                                    &nsd->priority_xoff_rx[i]);
1084                 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1085                                    pf->stat_offsets_loaded,
1086                                    &osd->priority_xon_rx[i],
1087                                    &nsd->priority_xon_rx[i]);
1088                 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1089                                    pf->stat_offsets_loaded,
1090                                    &osd->priority_xon_tx[i],
1091                                    &nsd->priority_xon_tx[i]);
1092                 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1093                                    pf->stat_offsets_loaded,
1094                                    &osd->priority_xoff_tx[i],
1095                                    &nsd->priority_xoff_tx[i]);
1096                 i40e_stat_update32(hw,
1097                                    I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1098                                    pf->stat_offsets_loaded,
1099                                    &osd->priority_xon_2_xoff[i],
1100                                    &nsd->priority_xon_2_xoff[i]);
1101         }
1102
1103         i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1104                            I40E_GLPRT_PRC64L(hw->port),
1105                            pf->stat_offsets_loaded,
1106                            &osd->rx_size_64, &nsd->rx_size_64);
1107         i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1108                            I40E_GLPRT_PRC127L(hw->port),
1109                            pf->stat_offsets_loaded,
1110                            &osd->rx_size_127, &nsd->rx_size_127);
1111         i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1112                            I40E_GLPRT_PRC255L(hw->port),
1113                            pf->stat_offsets_loaded,
1114                            &osd->rx_size_255, &nsd->rx_size_255);
1115         i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1116                            I40E_GLPRT_PRC511L(hw->port),
1117                            pf->stat_offsets_loaded,
1118                            &osd->rx_size_511, &nsd->rx_size_511);
1119         i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1120                            I40E_GLPRT_PRC1023L(hw->port),
1121                            pf->stat_offsets_loaded,
1122                            &osd->rx_size_1023, &nsd->rx_size_1023);
1123         i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1124                            I40E_GLPRT_PRC1522L(hw->port),
1125                            pf->stat_offsets_loaded,
1126                            &osd->rx_size_1522, &nsd->rx_size_1522);
1127         i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1128                            I40E_GLPRT_PRC9522L(hw->port),
1129                            pf->stat_offsets_loaded,
1130                            &osd->rx_size_big, &nsd->rx_size_big);
1131
1132         i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1133                            I40E_GLPRT_PTC64L(hw->port),
1134                            pf->stat_offsets_loaded,
1135                            &osd->tx_size_64, &nsd->tx_size_64);
1136         i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1137                            I40E_GLPRT_PTC127L(hw->port),
1138                            pf->stat_offsets_loaded,
1139                            &osd->tx_size_127, &nsd->tx_size_127);
1140         i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1141                            I40E_GLPRT_PTC255L(hw->port),
1142                            pf->stat_offsets_loaded,
1143                            &osd->tx_size_255, &nsd->tx_size_255);
1144         i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1145                            I40E_GLPRT_PTC511L(hw->port),
1146                            pf->stat_offsets_loaded,
1147                            &osd->tx_size_511, &nsd->tx_size_511);
1148         i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1149                            I40E_GLPRT_PTC1023L(hw->port),
1150                            pf->stat_offsets_loaded,
1151                            &osd->tx_size_1023, &nsd->tx_size_1023);
1152         i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1153                            I40E_GLPRT_PTC1522L(hw->port),
1154                            pf->stat_offsets_loaded,
1155                            &osd->tx_size_1522, &nsd->tx_size_1522);
1156         i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1157                            I40E_GLPRT_PTC9522L(hw->port),
1158                            pf->stat_offsets_loaded,
1159                            &osd->tx_size_big, &nsd->tx_size_big);
1160
1161         i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1162                            pf->stat_offsets_loaded,
1163                            &osd->rx_undersize, &nsd->rx_undersize);
1164         i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1165                            pf->stat_offsets_loaded,
1166                            &osd->rx_fragments, &nsd->rx_fragments);
1167         i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1168                            pf->stat_offsets_loaded,
1169                            &osd->rx_oversize, &nsd->rx_oversize);
1170         i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1171                            pf->stat_offsets_loaded,
1172                            &osd->rx_jabber, &nsd->rx_jabber);
1173
1174         /* FDIR stats */
1175         i40e_stat_update_and_clear32(hw,
1176                         I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1177                         &nsd->fd_atr_match);
1178         i40e_stat_update_and_clear32(hw,
1179                         I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1180                         &nsd->fd_sb_match);
1181         i40e_stat_update_and_clear32(hw,
1182                         I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1183                         &nsd->fd_atr_tunnel_match);
1184
1185         val = rd32(hw, I40E_PRTPM_EEE_STAT);
1186         nsd->tx_lpi_status =
1187                        (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1188                         I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1189         nsd->rx_lpi_status =
1190                        (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1191                         I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1192         i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1193                            pf->stat_offsets_loaded,
1194                            &osd->tx_lpi_count, &nsd->tx_lpi_count);
1195         i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1196                            pf->stat_offsets_loaded,
1197                            &osd->rx_lpi_count, &nsd->rx_lpi_count);
1198
1199         if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1200             !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1201                 nsd->fd_sb_status = true;
1202         else
1203                 nsd->fd_sb_status = false;
1204
1205         if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1206             !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1207                 nsd->fd_atr_status = true;
1208         else
1209                 nsd->fd_atr_status = false;
1210
1211         pf->stat_offsets_loaded = true;
1212 }
1213
1214 /**
1215  * i40e_update_stats - Update the various statistics counters.
1216  * @vsi: the VSI to be updated
1217  *
1218  * Update the various stats for this VSI and its related entities.
1219  **/
1220 void i40e_update_stats(struct i40e_vsi *vsi)
1221 {
1222         struct i40e_pf *pf = vsi->back;
1223
1224         if (vsi == pf->vsi[pf->lan_vsi])
1225                 i40e_update_pf_stats(pf);
1226
1227         i40e_update_vsi_stats(vsi);
1228 }
1229
1230 /**
1231  * i40e_count_filters - counts VSI mac filters
1232  * @vsi: the VSI to be searched
1233  *
1234  * Returns count of mac filters
1235  **/
1236 int i40e_count_filters(struct i40e_vsi *vsi)
1237 {
1238         struct i40e_mac_filter *f;
1239         struct hlist_node *h;
1240         int bkt;
1241         int cnt = 0;
1242
1243         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
1244                 ++cnt;
1245
1246         return cnt;
1247 }
1248
1249 /**
1250  * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1251  * @vsi: the VSI to be searched
1252  * @macaddr: the MAC address
1253  * @vlan: the vlan
1254  *
1255  * Returns ptr to the filter object or NULL
1256  **/
1257 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1258                                                 const u8 *macaddr, s16 vlan)
1259 {
1260         struct i40e_mac_filter *f;
1261         u64 key;
1262
1263         if (!vsi || !macaddr)
1264                 return NULL;
1265
1266         key = i40e_addr_to_hkey(macaddr);
1267         hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1268                 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1269                     (vlan == f->vlan))
1270                         return f;
1271         }
1272         return NULL;
1273 }
1274
1275 /**
1276  * i40e_find_mac - Find a mac addr in the macvlan filters list
1277  * @vsi: the VSI to be searched
1278  * @macaddr: the MAC address we are searching for
1279  *
1280  * Returns the first filter with the provided MAC address or NULL if
1281  * MAC address was not found
1282  **/
1283 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1284 {
1285         struct i40e_mac_filter *f;
1286         u64 key;
1287
1288         if (!vsi || !macaddr)
1289                 return NULL;
1290
1291         key = i40e_addr_to_hkey(macaddr);
1292         hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1293                 if ((ether_addr_equal(macaddr, f->macaddr)))
1294                         return f;
1295         }
1296         return NULL;
1297 }
1298
1299 /**
1300  * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1301  * @vsi: the VSI to be searched
1302  *
1303  * Returns true if VSI is in vlan mode or false otherwise
1304  **/
1305 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1306 {
1307         /* If we have a PVID, always operate in VLAN mode */
1308         if (vsi->info.pvid)
1309                 return true;
1310
1311         /* We need to operate in VLAN mode whenever we have any filters with
1312          * a VLAN other than I40E_VLAN_ALL. We could check the table each
1313          * time, incurring search cost repeatedly. However, we can notice two
1314          * things:
1315          *
1316          * 1) the only place where we can gain a VLAN filter is in
1317          *    i40e_add_filter.
1318          *
1319          * 2) the only place where filters are actually removed is in
1320          *    i40e_sync_filters_subtask.
1321          *
1322          * Thus, we can simply use a boolean value, has_vlan_filters which we
1323          * will set to true when we add a VLAN filter in i40e_add_filter. Then
1324          * we have to perform the full search after deleting filters in
1325          * i40e_sync_filters_subtask, but we already have to search
1326          * filters here and can perform the check at the same time. This
1327          * results in avoiding embedding a loop for VLAN mode inside another
1328          * loop over all the filters, and should maintain correctness as noted
1329          * above.
1330          */
1331         return vsi->has_vlan_filter;
1332 }
1333
1334 /**
1335  * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1336  * @vsi: the VSI to configure
1337  * @tmp_add_list: list of filters ready to be added
1338  * @tmp_del_list: list of filters ready to be deleted
1339  * @vlan_filters: the number of active VLAN filters
1340  *
1341  * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1342  * behave as expected. If we have any active VLAN filters remaining or about
1343  * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1344  * so that they only match against untagged traffic. If we no longer have any
1345  * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1346  * so that they match against both tagged and untagged traffic. In this way,
1347  * we ensure that we correctly receive the desired traffic. This ensures that
1348  * when we have an active VLAN we will receive only untagged traffic and
1349  * traffic matching active VLANs. If we have no active VLANs then we will
1350  * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1351  *
1352  * Finally, in a similar fashion, this function also corrects filters when
1353  * there is an active PVID assigned to this VSI.
1354  *
1355  * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1356  *
1357  * This function is only expected to be called from within
1358  * i40e_sync_vsi_filters.
1359  *
1360  * NOTE: This function expects to be called while under the
1361  * mac_filter_hash_lock
1362  */
1363 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1364                                          struct hlist_head *tmp_add_list,
1365                                          struct hlist_head *tmp_del_list,
1366                                          int vlan_filters)
1367 {
1368         s16 pvid = le16_to_cpu(vsi->info.pvid);
1369         struct i40e_mac_filter *f, *add_head;
1370         struct i40e_new_mac_filter *new;
1371         struct hlist_node *h;
1372         int bkt, new_vlan;
1373
1374         /* To determine if a particular filter needs to be replaced we
1375          * have the three following conditions:
1376          *
1377          * a) if we have a PVID assigned, then all filters which are
1378          *    not marked as VLAN=PVID must be replaced with filters that
1379          *    are.
1380          * b) otherwise, if we have any active VLANS, all filters
1381          *    which are marked as VLAN=-1 must be replaced with
1382          *    filters marked as VLAN=0
1383          * c) finally, if we do not have any active VLANS, all filters
1384          *    which are marked as VLAN=0 must be replaced with filters
1385          *    marked as VLAN=-1
1386          */
1387
1388         /* Update the filters about to be added in place */
1389         hlist_for_each_entry(new, tmp_add_list, hlist) {
1390                 if (pvid && new->f->vlan != pvid)
1391                         new->f->vlan = pvid;
1392                 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1393                         new->f->vlan = 0;
1394                 else if (!vlan_filters && new->f->vlan == 0)
1395                         new->f->vlan = I40E_VLAN_ANY;
1396         }
1397
1398         /* Update the remaining active filters */
1399         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1400                 /* Combine the checks for whether a filter needs to be changed
1401                  * and then determine the new VLAN inside the if block, in
1402                  * order to avoid duplicating code for adding the new filter
1403                  * then deleting the old filter.
1404                  */
1405                 if ((pvid && f->vlan != pvid) ||
1406                     (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1407                     (!vlan_filters && f->vlan == 0)) {
1408                         /* Determine the new vlan we will be adding */
1409                         if (pvid)
1410                                 new_vlan = pvid;
1411                         else if (vlan_filters)
1412                                 new_vlan = 0;
1413                         else
1414                                 new_vlan = I40E_VLAN_ANY;
1415
1416                         /* Create the new filter */
1417                         add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1418                         if (!add_head)
1419                                 return -ENOMEM;
1420
1421                         /* Create a temporary i40e_new_mac_filter */
1422                         new = kzalloc(sizeof(*new), GFP_ATOMIC);
1423                         if (!new)
1424                                 return -ENOMEM;
1425
1426                         new->f = add_head;
1427                         new->state = add_head->state;
1428
1429                         /* Add the new filter to the tmp list */
1430                         hlist_add_head(&new->hlist, tmp_add_list);
1431
1432                         /* Put the original filter into the delete list */
1433                         f->state = I40E_FILTER_REMOVE;
1434                         hash_del(&f->hlist);
1435                         hlist_add_head(&f->hlist, tmp_del_list);
1436                 }
1437         }
1438
1439         vsi->has_vlan_filter = !!vlan_filters;
1440
1441         return 0;
1442 }
1443
1444 /**
1445  * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1446  * @vsi: the PF Main VSI - inappropriate for any other VSI
1447  * @macaddr: the MAC address
1448  *
1449  * Remove whatever filter the firmware set up so the driver can manage
1450  * its own filtering intelligently.
1451  **/
1452 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1453 {
1454         struct i40e_aqc_remove_macvlan_element_data element;
1455         struct i40e_pf *pf = vsi->back;
1456
1457         /* Only appropriate for the PF main VSI */
1458         if (vsi->type != I40E_VSI_MAIN)
1459                 return;
1460
1461         memset(&element, 0, sizeof(element));
1462         ether_addr_copy(element.mac_addr, macaddr);
1463         element.vlan_tag = 0;
1464         /* Ignore error returns, some firmware does it this way... */
1465         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1466         i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1467
1468         memset(&element, 0, sizeof(element));
1469         ether_addr_copy(element.mac_addr, macaddr);
1470         element.vlan_tag = 0;
1471         /* ...and some firmware does it this way. */
1472         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1473                         I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1474         i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1475 }
1476
1477 /**
1478  * i40e_add_filter - Add a mac/vlan filter to the VSI
1479  * @vsi: the VSI to be searched
1480  * @macaddr: the MAC address
1481  * @vlan: the vlan
1482  *
1483  * Returns ptr to the filter object or NULL when no memory available.
1484  *
1485  * NOTE: This function is expected to be called with mac_filter_hash_lock
1486  * being held.
1487  **/
1488 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1489                                         const u8 *macaddr, s16 vlan)
1490 {
1491         struct i40e_mac_filter *f;
1492         u64 key;
1493
1494         if (!vsi || !macaddr)
1495                 return NULL;
1496
1497         f = i40e_find_filter(vsi, macaddr, vlan);
1498         if (!f) {
1499                 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1500                 if (!f)
1501                         return NULL;
1502
1503                 /* Update the boolean indicating if we need to function in
1504                  * VLAN mode.
1505                  */
1506                 if (vlan >= 0)
1507                         vsi->has_vlan_filter = true;
1508
1509                 ether_addr_copy(f->macaddr, macaddr);
1510                 f->vlan = vlan;
1511                 f->state = I40E_FILTER_NEW;
1512                 INIT_HLIST_NODE(&f->hlist);
1513
1514                 key = i40e_addr_to_hkey(macaddr);
1515                 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1516
1517                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1518                 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1519         }
1520
1521         /* If we're asked to add a filter that has been marked for removal, it
1522          * is safe to simply restore it to active state. __i40e_del_filter
1523          * will have simply deleted any filters which were previously marked
1524          * NEW or FAILED, so if it is currently marked REMOVE it must have
1525          * previously been ACTIVE. Since we haven't yet run the sync filters
1526          * task, just restore this filter to the ACTIVE state so that the
1527          * sync task leaves it in place
1528          */
1529         if (f->state == I40E_FILTER_REMOVE)
1530                 f->state = I40E_FILTER_ACTIVE;
1531
1532         return f;
1533 }
1534
1535 /**
1536  * __i40e_del_filter - Remove a specific filter from the VSI
1537  * @vsi: VSI to remove from
1538  * @f: the filter to remove from the list
1539  *
1540  * This function should be called instead of i40e_del_filter only if you know
1541  * the exact filter you will remove already, such as via i40e_find_filter or
1542  * i40e_find_mac.
1543  *
1544  * NOTE: This function is expected to be called with mac_filter_hash_lock
1545  * being held.
1546  * ANOTHER NOTE: This function MUST be called from within the context of
1547  * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1548  * instead of list_for_each_entry().
1549  **/
1550 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1551 {
1552         if (!f)
1553                 return;
1554
1555         /* If the filter was never added to firmware then we can just delete it
1556          * directly and we don't want to set the status to remove or else an
1557          * admin queue command will unnecessarily fire.
1558          */
1559         if ((f->state == I40E_FILTER_FAILED) ||
1560             (f->state == I40E_FILTER_NEW)) {
1561                 hash_del(&f->hlist);
1562                 kfree(f);
1563         } else {
1564                 f->state = I40E_FILTER_REMOVE;
1565         }
1566
1567         vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1568         set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1569 }
1570
1571 /**
1572  * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1573  * @vsi: the VSI to be searched
1574  * @macaddr: the MAC address
1575  * @vlan: the VLAN
1576  *
1577  * NOTE: This function is expected to be called with mac_filter_hash_lock
1578  * being held.
1579  * ANOTHER NOTE: This function MUST be called from within the context of
1580  * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1581  * instead of list_for_each_entry().
1582  **/
1583 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1584 {
1585         struct i40e_mac_filter *f;
1586
1587         if (!vsi || !macaddr)
1588                 return;
1589
1590         f = i40e_find_filter(vsi, macaddr, vlan);
1591         __i40e_del_filter(vsi, f);
1592 }
1593
1594 /**
1595  * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1596  * @vsi: the VSI to be searched
1597  * @macaddr: the mac address to be filtered
1598  *
1599  * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1600  * go through all the macvlan filters and add a macvlan filter for each
1601  * unique vlan that already exists. If a PVID has been assigned, instead only
1602  * add the macaddr to that VLAN.
1603  *
1604  * Returns last filter added on success, else NULL
1605  **/
1606 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1607                                             const u8 *macaddr)
1608 {
1609         struct i40e_mac_filter *f, *add = NULL;
1610         struct hlist_node *h;
1611         int bkt;
1612
1613         if (vsi->info.pvid)
1614                 return i40e_add_filter(vsi, macaddr,
1615                                        le16_to_cpu(vsi->info.pvid));
1616
1617         if (!i40e_is_vsi_in_vlan(vsi))
1618                 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1619
1620         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1621                 if (f->state == I40E_FILTER_REMOVE)
1622                         continue;
1623                 add = i40e_add_filter(vsi, macaddr, f->vlan);
1624                 if (!add)
1625                         return NULL;
1626         }
1627
1628         return add;
1629 }
1630
1631 /**
1632  * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1633  * @vsi: the VSI to be searched
1634  * @macaddr: the mac address to be removed
1635  *
1636  * Removes a given MAC address from a VSI regardless of what VLAN it has been
1637  * associated with.
1638  *
1639  * Returns 0 for success, or error
1640  **/
1641 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1642 {
1643         struct i40e_mac_filter *f;
1644         struct hlist_node *h;
1645         bool found = false;
1646         int bkt;
1647
1648         lockdep_assert_held(&vsi->mac_filter_hash_lock);
1649         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1650                 if (ether_addr_equal(macaddr, f->macaddr)) {
1651                         __i40e_del_filter(vsi, f);
1652                         found = true;
1653                 }
1654         }
1655
1656         if (found)
1657                 return 0;
1658         else
1659                 return -ENOENT;
1660 }
1661
1662 /**
1663  * i40e_set_mac - NDO callback to set mac address
1664  * @netdev: network interface device structure
1665  * @p: pointer to an address structure
1666  *
1667  * Returns 0 on success, negative on failure
1668  **/
1669 static int i40e_set_mac(struct net_device *netdev, void *p)
1670 {
1671         struct i40e_netdev_priv *np = netdev_priv(netdev);
1672         struct i40e_vsi *vsi = np->vsi;
1673         struct i40e_pf *pf = vsi->back;
1674         struct i40e_hw *hw = &pf->hw;
1675         struct sockaddr *addr = p;
1676
1677         if (!is_valid_ether_addr(addr->sa_data))
1678                 return -EADDRNOTAVAIL;
1679
1680         if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1681                 netdev_info(netdev, "already using mac address %pM\n",
1682                             addr->sa_data);
1683                 return 0;
1684         }
1685
1686         if (test_bit(__I40E_DOWN, pf->state) ||
1687             test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1688                 return -EADDRNOTAVAIL;
1689
1690         if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1691                 netdev_info(netdev, "returning to hw mac address %pM\n",
1692                             hw->mac.addr);
1693         else
1694                 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1695
1696         /* Copy the address first, so that we avoid a possible race with
1697          * .set_rx_mode().
1698          * - Remove old address from MAC filter
1699          * - Copy new address
1700          * - Add new address to MAC filter
1701          */
1702         spin_lock_bh(&vsi->mac_filter_hash_lock);
1703         i40e_del_mac_filter(vsi, netdev->dev_addr);
1704         eth_hw_addr_set(netdev, addr->sa_data);
1705         i40e_add_mac_filter(vsi, netdev->dev_addr);
1706         spin_unlock_bh(&vsi->mac_filter_hash_lock);
1707
1708         if (vsi->type == I40E_VSI_MAIN) {
1709                 i40e_status ret;
1710
1711                 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL,
1712                                                 addr->sa_data, NULL);
1713                 if (ret)
1714                         netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1715                                     i40e_stat_str(hw, ret),
1716                                     i40e_aq_str(hw, hw->aq.asq_last_status));
1717         }
1718
1719         /* schedule our worker thread which will take care of
1720          * applying the new filter changes
1721          */
1722         i40e_service_event_schedule(pf);
1723         return 0;
1724 }
1725
1726 /**
1727  * i40e_config_rss_aq - Prepare for RSS using AQ commands
1728  * @vsi: vsi structure
1729  * @seed: RSS hash seed
1730  * @lut: pointer to lookup table of lut_size
1731  * @lut_size: size of the lookup table
1732  **/
1733 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1734                               u8 *lut, u16 lut_size)
1735 {
1736         struct i40e_pf *pf = vsi->back;
1737         struct i40e_hw *hw = &pf->hw;
1738         int ret = 0;
1739
1740         if (seed) {
1741                 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1742                         (struct i40e_aqc_get_set_rss_key_data *)seed;
1743                 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
1744                 if (ret) {
1745                         dev_info(&pf->pdev->dev,
1746                                  "Cannot set RSS key, err %s aq_err %s\n",
1747                                  i40e_stat_str(hw, ret),
1748                                  i40e_aq_str(hw, hw->aq.asq_last_status));
1749                         return ret;
1750                 }
1751         }
1752         if (lut) {
1753                 bool pf_lut = vsi->type == I40E_VSI_MAIN;
1754
1755                 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1756                 if (ret) {
1757                         dev_info(&pf->pdev->dev,
1758                                  "Cannot set RSS lut, err %s aq_err %s\n",
1759                                  i40e_stat_str(hw, ret),
1760                                  i40e_aq_str(hw, hw->aq.asq_last_status));
1761                         return ret;
1762                 }
1763         }
1764         return ret;
1765 }
1766
1767 /**
1768  * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1769  * @vsi: VSI structure
1770  **/
1771 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1772 {
1773         struct i40e_pf *pf = vsi->back;
1774         u8 seed[I40E_HKEY_ARRAY_SIZE];
1775         u8 *lut;
1776         int ret;
1777
1778         if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))
1779                 return 0;
1780         if (!vsi->rss_size)
1781                 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1782                                       vsi->num_queue_pairs);
1783         if (!vsi->rss_size)
1784                 return -EINVAL;
1785         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1786         if (!lut)
1787                 return -ENOMEM;
1788
1789         /* Use the user configured hash keys and lookup table if there is one,
1790          * otherwise use default
1791          */
1792         if (vsi->rss_lut_user)
1793                 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1794         else
1795                 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
1796         if (vsi->rss_hkey_user)
1797                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1798         else
1799                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
1800         ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
1801         kfree(lut);
1802         return ret;
1803 }
1804
1805 /**
1806  * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1807  * @vsi: the VSI being configured,
1808  * @ctxt: VSI context structure
1809  * @enabled_tc: number of traffic classes to enable
1810  *
1811  * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1812  **/
1813 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1814                                            struct i40e_vsi_context *ctxt,
1815                                            u8 enabled_tc)
1816 {
1817         u16 qcount = 0, max_qcount, qmap, sections = 0;
1818         int i, override_q, pow, num_qps, ret;
1819         u8 netdev_tc = 0, offset = 0;
1820
1821         if (vsi->type != I40E_VSI_MAIN)
1822                 return -EINVAL;
1823         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1824         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1825         vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1826         vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1827         num_qps = vsi->mqprio_qopt.qopt.count[0];
1828
1829         /* find the next higher power-of-2 of num queue pairs */
1830         pow = ilog2(num_qps);
1831         if (!is_power_of_2(num_qps))
1832                 pow++;
1833         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1834                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1835
1836         /* Setup queue offset/count for all TCs for given VSI */
1837         max_qcount = vsi->mqprio_qopt.qopt.count[0];
1838         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1839                 /* See if the given TC is enabled for the given VSI */
1840                 if (vsi->tc_config.enabled_tc & BIT(i)) {
1841                         offset = vsi->mqprio_qopt.qopt.offset[i];
1842                         qcount = vsi->mqprio_qopt.qopt.count[i];
1843                         if (qcount > max_qcount)
1844                                 max_qcount = qcount;
1845                         vsi->tc_config.tc_info[i].qoffset = offset;
1846                         vsi->tc_config.tc_info[i].qcount = qcount;
1847                         vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1848                 } else {
1849                         /* TC is not enabled so set the offset to
1850                          * default queue and allocate one queue
1851                          * for the given TC.
1852                          */
1853                         vsi->tc_config.tc_info[i].qoffset = 0;
1854                         vsi->tc_config.tc_info[i].qcount = 1;
1855                         vsi->tc_config.tc_info[i].netdev_tc = 0;
1856                 }
1857         }
1858
1859         /* Set actual Tx/Rx queue pairs */
1860         vsi->num_queue_pairs = offset + qcount;
1861
1862         /* Setup queue TC[0].qmap for given VSI context */
1863         ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1864         ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1865         ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1866         ctxt->info.valid_sections |= cpu_to_le16(sections);
1867
1868         /* Reconfigure RSS for main VSI with max queue count */
1869         vsi->rss_size = max_qcount;
1870         ret = i40e_vsi_config_rss(vsi);
1871         if (ret) {
1872                 dev_info(&vsi->back->pdev->dev,
1873                          "Failed to reconfig rss for num_queues (%u)\n",
1874                          max_qcount);
1875                 return ret;
1876         }
1877         vsi->reconfig_rss = true;
1878         dev_dbg(&vsi->back->pdev->dev,
1879                 "Reconfigured rss with num_queues (%u)\n", max_qcount);
1880
1881         /* Find queue count available for channel VSIs and starting offset
1882          * for channel VSIs
1883          */
1884         override_q = vsi->mqprio_qopt.qopt.count[0];
1885         if (override_q && override_q < vsi->num_queue_pairs) {
1886                 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
1887                 vsi->next_base_queue = override_q;
1888         }
1889         return 0;
1890 }
1891
1892 /**
1893  * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1894  * @vsi: the VSI being setup
1895  * @ctxt: VSI context structure
1896  * @enabled_tc: Enabled TCs bitmap
1897  * @is_add: True if called before Add VSI
1898  *
1899  * Setup VSI queue mapping for enabled traffic classes.
1900  **/
1901 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1902                                      struct i40e_vsi_context *ctxt,
1903                                      u8 enabled_tc,
1904                                      bool is_add)
1905 {
1906         struct i40e_pf *pf = vsi->back;
1907         u16 num_tc_qps = 0;
1908         u16 sections = 0;
1909         u8 netdev_tc = 0;
1910         u16 numtc = 1;
1911         u16 qcount;
1912         u8 offset;
1913         u16 qmap;
1914         int i;
1915
1916         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1917         offset = 0;
1918         /* zero out queue mapping, it will get updated on the end of the function */
1919         memset(ctxt->info.queue_mapping, 0, sizeof(ctxt->info.queue_mapping));
1920
1921         if (vsi->type == I40E_VSI_MAIN) {
1922                 /* This code helps add more queue to the VSI if we have
1923                  * more cores than RSS can support, the higher cores will
1924                  * be served by ATR or other filters. Furthermore, the
1925                  * non-zero req_queue_pairs says that user requested a new
1926                  * queue count via ethtool's set_channels, so use this
1927                  * value for queues distribution across traffic classes
1928                  */
1929                 if (vsi->req_queue_pairs > 0)
1930                         vsi->num_queue_pairs = vsi->req_queue_pairs;
1931                 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1932                         vsi->num_queue_pairs = pf->num_lan_msix;
1933         }
1934
1935         /* Number of queues per enabled TC */
1936         if (vsi->type == I40E_VSI_MAIN ||
1937             (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs != 0))
1938                 num_tc_qps = vsi->num_queue_pairs;
1939         else
1940                 num_tc_qps = vsi->alloc_queue_pairs;
1941
1942         if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1943                 /* Find numtc from enabled TC bitmap */
1944                 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1945                         if (enabled_tc & BIT(i)) /* TC is enabled */
1946                                 numtc++;
1947                 }
1948                 if (!numtc) {
1949                         dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1950                         numtc = 1;
1951                 }
1952                 num_tc_qps = num_tc_qps / numtc;
1953                 num_tc_qps = min_t(int, num_tc_qps,
1954                                    i40e_pf_get_max_q_per_tc(pf));
1955         }
1956
1957         vsi->tc_config.numtc = numtc;
1958         vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1959
1960         /* Do not allow use more TC queue pairs than MSI-X vectors exist */
1961         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1962                 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
1963
1964         /* Setup queue offset/count for all TCs for given VSI */
1965         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1966                 /* See if the given TC is enabled for the given VSI */
1967                 if (vsi->tc_config.enabled_tc & BIT(i)) {
1968                         /* TC is enabled */
1969                         int pow, num_qps;
1970
1971                         switch (vsi->type) {
1972                         case I40E_VSI_MAIN:
1973                                 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED |
1974                                     I40E_FLAG_FD_ATR_ENABLED)) ||
1975                                     vsi->tc_config.enabled_tc != 1) {
1976                                         qcount = min_t(int, pf->alloc_rss_size,
1977                                                        num_tc_qps);
1978                                         break;
1979                                 }
1980                                 fallthrough;
1981                         case I40E_VSI_FDIR:
1982                         case I40E_VSI_SRIOV:
1983                         case I40E_VSI_VMDQ2:
1984                         default:
1985                                 qcount = num_tc_qps;
1986                                 WARN_ON(i != 0);
1987                                 break;
1988                         }
1989                         vsi->tc_config.tc_info[i].qoffset = offset;
1990                         vsi->tc_config.tc_info[i].qcount = qcount;
1991
1992                         /* find the next higher power-of-2 of num queue pairs */
1993                         num_qps = qcount;
1994                         pow = 0;
1995                         while (num_qps && (BIT_ULL(pow) < qcount)) {
1996                                 pow++;
1997                                 num_qps >>= 1;
1998                         }
1999
2000                         vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
2001                         qmap =
2002                             (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
2003                             (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
2004
2005                         offset += qcount;
2006                 } else {
2007                         /* TC is not enabled so set the offset to
2008                          * default queue and allocate one queue
2009                          * for the given TC.
2010                          */
2011                         vsi->tc_config.tc_info[i].qoffset = 0;
2012                         vsi->tc_config.tc_info[i].qcount = 1;
2013                         vsi->tc_config.tc_info[i].netdev_tc = 0;
2014
2015                         qmap = 0;
2016                 }
2017                 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
2018         }
2019         /* Do not change previously set num_queue_pairs for PFs and VFs*/
2020         if ((vsi->type == I40E_VSI_MAIN && numtc != 1) ||
2021             (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs == 0) ||
2022             (vsi->type != I40E_VSI_MAIN && vsi->type != I40E_VSI_SRIOV))
2023                 vsi->num_queue_pairs = offset;
2024
2025         /* Scheduler section valid can only be set for ADD VSI */
2026         if (is_add) {
2027                 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
2028
2029                 ctxt->info.up_enable_bits = enabled_tc;
2030         }
2031         if (vsi->type == I40E_VSI_SRIOV) {
2032                 ctxt->info.mapping_flags |=
2033                                      cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
2034                 for (i = 0; i < vsi->num_queue_pairs; i++)
2035                         ctxt->info.queue_mapping[i] =
2036                                                cpu_to_le16(vsi->base_queue + i);
2037         } else {
2038                 ctxt->info.mapping_flags |=
2039                                         cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
2040                 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
2041         }
2042         ctxt->info.valid_sections |= cpu_to_le16(sections);
2043 }
2044
2045 /**
2046  * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
2047  * @netdev: the netdevice
2048  * @addr: address to add
2049  *
2050  * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
2051  * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2052  */
2053 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
2054 {
2055         struct i40e_netdev_priv *np = netdev_priv(netdev);
2056         struct i40e_vsi *vsi = np->vsi;
2057
2058         if (i40e_add_mac_filter(vsi, addr))
2059                 return 0;
2060         else
2061                 return -ENOMEM;
2062 }
2063
2064 /**
2065  * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
2066  * @netdev: the netdevice
2067  * @addr: address to add
2068  *
2069  * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
2070  * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2071  */
2072 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
2073 {
2074         struct i40e_netdev_priv *np = netdev_priv(netdev);
2075         struct i40e_vsi *vsi = np->vsi;
2076
2077         /* Under some circumstances, we might receive a request to delete
2078          * our own device address from our uc list. Because we store the
2079          * device address in the VSI's MAC/VLAN filter list, we need to ignore
2080          * such requests and not delete our device address from this list.
2081          */
2082         if (ether_addr_equal(addr, netdev->dev_addr))
2083                 return 0;
2084
2085         i40e_del_mac_filter(vsi, addr);
2086
2087         return 0;
2088 }
2089
2090 /**
2091  * i40e_set_rx_mode - NDO callback to set the netdev filters
2092  * @netdev: network interface device structure
2093  **/
2094 static void i40e_set_rx_mode(struct net_device *netdev)
2095 {
2096         struct i40e_netdev_priv *np = netdev_priv(netdev);
2097         struct i40e_vsi *vsi = np->vsi;
2098
2099         spin_lock_bh(&vsi->mac_filter_hash_lock);
2100
2101         __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
2102         __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
2103
2104         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2105
2106         /* check for other flag changes */
2107         if (vsi->current_netdev_flags != vsi->netdev->flags) {
2108                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2109                 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
2110         }
2111 }
2112
2113 /**
2114  * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
2115  * @vsi: Pointer to VSI struct
2116  * @from: Pointer to list which contains MAC filter entries - changes to
2117  *        those entries needs to be undone.
2118  *
2119  * MAC filter entries from this list were slated for deletion.
2120  **/
2121 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
2122                                          struct hlist_head *from)
2123 {
2124         struct i40e_mac_filter *f;
2125         struct hlist_node *h;
2126
2127         hlist_for_each_entry_safe(f, h, from, hlist) {
2128                 u64 key = i40e_addr_to_hkey(f->macaddr);
2129
2130                 /* Move the element back into MAC filter list*/
2131                 hlist_del(&f->hlist);
2132                 hash_add(vsi->mac_filter_hash, &f->hlist, key);
2133         }
2134 }
2135
2136 /**
2137  * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
2138  * @vsi: Pointer to vsi struct
2139  * @from: Pointer to list which contains MAC filter entries - changes to
2140  *        those entries needs to be undone.
2141  *
2142  * MAC filter entries from this list were slated for addition.
2143  **/
2144 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
2145                                          struct hlist_head *from)
2146 {
2147         struct i40e_new_mac_filter *new;
2148         struct hlist_node *h;
2149
2150         hlist_for_each_entry_safe(new, h, from, hlist) {
2151                 /* We can simply free the wrapper structure */
2152                 hlist_del(&new->hlist);
2153                 netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
2154                 kfree(new);
2155         }
2156 }
2157
2158 /**
2159  * i40e_next_filter - Get the next non-broadcast filter from a list
2160  * @next: pointer to filter in list
2161  *
2162  * Returns the next non-broadcast filter in the list. Required so that we
2163  * ignore broadcast filters within the list, since these are not handled via
2164  * the normal firmware update path.
2165  */
2166 static
2167 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2168 {
2169         hlist_for_each_entry_continue(next, hlist) {
2170                 if (!is_broadcast_ether_addr(next->f->macaddr))
2171                         return next;
2172         }
2173
2174         return NULL;
2175 }
2176
2177 /**
2178  * i40e_update_filter_state - Update filter state based on return data
2179  * from firmware
2180  * @count: Number of filters added
2181  * @add_list: return data from fw
2182  * @add_head: pointer to first filter in current batch
2183  *
2184  * MAC filter entries from list were slated to be added to device. Returns
2185  * number of successful filters. Note that 0 does NOT mean success!
2186  **/
2187 static int
2188 i40e_update_filter_state(int count,
2189                          struct i40e_aqc_add_macvlan_element_data *add_list,
2190                          struct i40e_new_mac_filter *add_head)
2191 {
2192         int retval = 0;
2193         int i;
2194
2195         for (i = 0; i < count; i++) {
2196                 /* Always check status of each filter. We don't need to check
2197                  * the firmware return status because we pre-set the filter
2198                  * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2199                  * request to the adminq. Thus, if it no longer matches then
2200                  * we know the filter is active.
2201                  */
2202                 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2203                         add_head->state = I40E_FILTER_FAILED;
2204                 } else {
2205                         add_head->state = I40E_FILTER_ACTIVE;
2206                         retval++;
2207                 }
2208
2209                 add_head = i40e_next_filter(add_head);
2210                 if (!add_head)
2211                         break;
2212         }
2213
2214         return retval;
2215 }
2216
2217 /**
2218  * i40e_aqc_del_filters - Request firmware to delete a set of filters
2219  * @vsi: ptr to the VSI
2220  * @vsi_name: name to display in messages
2221  * @list: the list of filters to send to firmware
2222  * @num_del: the number of filters to delete
2223  * @retval: Set to -EIO on failure to delete
2224  *
2225  * Send a request to firmware via AdminQ to delete a set of filters. Uses
2226  * *retval instead of a return value so that success does not force ret_val to
2227  * be set to 0. This ensures that a sequence of calls to this function
2228  * preserve the previous value of *retval on successful delete.
2229  */
2230 static
2231 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2232                           struct i40e_aqc_remove_macvlan_element_data *list,
2233                           int num_del, int *retval)
2234 {
2235         struct i40e_hw *hw = &vsi->back->hw;
2236         enum i40e_admin_queue_err aq_status;
2237         i40e_status aq_ret;
2238
2239         aq_ret = i40e_aq_remove_macvlan_v2(hw, vsi->seid, list, num_del, NULL,
2240                                            &aq_status);
2241
2242         /* Explicitly ignore and do not report when firmware returns ENOENT */
2243         if (aq_ret && !(aq_status == I40E_AQ_RC_ENOENT)) {
2244                 *retval = -EIO;
2245                 dev_info(&vsi->back->pdev->dev,
2246                          "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
2247                          vsi_name, i40e_stat_str(hw, aq_ret),
2248                          i40e_aq_str(hw, aq_status));
2249         }
2250 }
2251
2252 /**
2253  * i40e_aqc_add_filters - Request firmware to add a set of filters
2254  * @vsi: ptr to the VSI
2255  * @vsi_name: name to display in messages
2256  * @list: the list of filters to send to firmware
2257  * @add_head: Position in the add hlist
2258  * @num_add: the number of filters to add
2259  *
2260  * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2261  * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2262  * space for more filters.
2263  */
2264 static
2265 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2266                           struct i40e_aqc_add_macvlan_element_data *list,
2267                           struct i40e_new_mac_filter *add_head,
2268                           int num_add)
2269 {
2270         struct i40e_hw *hw = &vsi->back->hw;
2271         enum i40e_admin_queue_err aq_status;
2272         int fcnt;
2273
2274         i40e_aq_add_macvlan_v2(hw, vsi->seid, list, num_add, NULL, &aq_status);
2275         fcnt = i40e_update_filter_state(num_add, list, add_head);
2276
2277         if (fcnt != num_add) {
2278                 if (vsi->type == I40E_VSI_MAIN) {
2279                         set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2280                         dev_warn(&vsi->back->pdev->dev,
2281                                  "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2282                                  i40e_aq_str(hw, aq_status), vsi_name);
2283                 } else if (vsi->type == I40E_VSI_SRIOV ||
2284                            vsi->type == I40E_VSI_VMDQ1 ||
2285                            vsi->type == I40E_VSI_VMDQ2) {
2286                         dev_warn(&vsi->back->pdev->dev,
2287                                  "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n",
2288                                  i40e_aq_str(hw, aq_status), vsi_name,
2289                                              vsi_name);
2290                 } else {
2291                         dev_warn(&vsi->back->pdev->dev,
2292                                  "Error %s adding RX filters on %s, incorrect VSI type: %i.\n",
2293                                  i40e_aq_str(hw, aq_status), vsi_name,
2294                                              vsi->type);
2295                 }
2296         }
2297 }
2298
2299 /**
2300  * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2301  * @vsi: pointer to the VSI
2302  * @vsi_name: the VSI name
2303  * @f: filter data
2304  *
2305  * This function sets or clears the promiscuous broadcast flags for VLAN
2306  * filters in order to properly receive broadcast frames. Assumes that only
2307  * broadcast filters are passed.
2308  *
2309  * Returns status indicating success or failure;
2310  **/
2311 static i40e_status
2312 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2313                           struct i40e_mac_filter *f)
2314 {
2315         bool enable = f->state == I40E_FILTER_NEW;
2316         struct i40e_hw *hw = &vsi->back->hw;
2317         i40e_status aq_ret;
2318
2319         if (f->vlan == I40E_VLAN_ANY) {
2320                 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2321                                                    vsi->seid,
2322                                                    enable,
2323                                                    NULL);
2324         } else {
2325                 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2326                                                             vsi->seid,
2327                                                             enable,
2328                                                             f->vlan,
2329                                                             NULL);
2330         }
2331
2332         if (aq_ret) {
2333                 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2334                 dev_warn(&vsi->back->pdev->dev,
2335                          "Error %s, forcing overflow promiscuous on %s\n",
2336                          i40e_aq_str(hw, hw->aq.asq_last_status),
2337                          vsi_name);
2338         }
2339
2340         return aq_ret;
2341 }
2342
2343 /**
2344  * i40e_set_promiscuous - set promiscuous mode
2345  * @pf: board private structure
2346  * @promisc: promisc on or off
2347  *
2348  * There are different ways of setting promiscuous mode on a PF depending on
2349  * what state/environment we're in.  This identifies and sets it appropriately.
2350  * Returns 0 on success.
2351  **/
2352 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2353 {
2354         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2355         struct i40e_hw *hw = &pf->hw;
2356         i40e_status aq_ret;
2357
2358         if (vsi->type == I40E_VSI_MAIN &&
2359             pf->lan_veb != I40E_NO_VEB &&
2360             !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2361                 /* set defport ON for Main VSI instead of true promisc
2362                  * this way we will get all unicast/multicast and VLAN
2363                  * promisc behavior but will not get VF or VMDq traffic
2364                  * replicated on the Main VSI.
2365                  */
2366                 if (promisc)
2367                         aq_ret = i40e_aq_set_default_vsi(hw,
2368                                                          vsi->seid,
2369                                                          NULL);
2370                 else
2371                         aq_ret = i40e_aq_clear_default_vsi(hw,
2372                                                            vsi->seid,
2373                                                            NULL);
2374                 if (aq_ret) {
2375                         dev_info(&pf->pdev->dev,
2376                                  "Set default VSI failed, err %s, aq_err %s\n",
2377                                  i40e_stat_str(hw, aq_ret),
2378                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2379                 }
2380         } else {
2381                 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2382                                                   hw,
2383                                                   vsi->seid,
2384                                                   promisc, NULL,
2385                                                   true);
2386                 if (aq_ret) {
2387                         dev_info(&pf->pdev->dev,
2388                                  "set unicast promisc failed, err %s, aq_err %s\n",
2389                                  i40e_stat_str(hw, aq_ret),
2390                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2391                 }
2392                 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2393                                                   hw,
2394                                                   vsi->seid,
2395                                                   promisc, NULL);
2396                 if (aq_ret) {
2397                         dev_info(&pf->pdev->dev,
2398                                  "set multicast promisc failed, err %s, aq_err %s\n",
2399                                  i40e_stat_str(hw, aq_ret),
2400                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2401                 }
2402         }
2403
2404         if (!aq_ret)
2405                 pf->cur_promisc = promisc;
2406
2407         return aq_ret;
2408 }
2409
2410 /**
2411  * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2412  * @vsi: ptr to the VSI
2413  *
2414  * Push any outstanding VSI filter changes through the AdminQ.
2415  *
2416  * Returns 0 or error value
2417  **/
2418 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2419 {
2420         struct hlist_head tmp_add_list, tmp_del_list;
2421         struct i40e_mac_filter *f;
2422         struct i40e_new_mac_filter *new, *add_head = NULL;
2423         struct i40e_hw *hw = &vsi->back->hw;
2424         bool old_overflow, new_overflow;
2425         unsigned int failed_filters = 0;
2426         unsigned int vlan_filters = 0;
2427         char vsi_name[16] = "PF";
2428         int filter_list_len = 0;
2429         i40e_status aq_ret = 0;
2430         u32 changed_flags = 0;
2431         struct hlist_node *h;
2432         struct i40e_pf *pf;
2433         int num_add = 0;
2434         int num_del = 0;
2435         int retval = 0;
2436         u16 cmd_flags;
2437         int list_size;
2438         int bkt;
2439
2440         /* empty array typed pointers, kcalloc later */
2441         struct i40e_aqc_add_macvlan_element_data *add_list;
2442         struct i40e_aqc_remove_macvlan_element_data *del_list;
2443
2444         while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state))
2445                 usleep_range(1000, 2000);
2446         pf = vsi->back;
2447
2448         old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2449
2450         if (vsi->netdev) {
2451                 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2452                 vsi->current_netdev_flags = vsi->netdev->flags;
2453         }
2454
2455         INIT_HLIST_HEAD(&tmp_add_list);
2456         INIT_HLIST_HEAD(&tmp_del_list);
2457
2458         if (vsi->type == I40E_VSI_SRIOV)
2459                 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2460         else if (vsi->type != I40E_VSI_MAIN)
2461                 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2462
2463         if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2464                 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2465
2466                 spin_lock_bh(&vsi->mac_filter_hash_lock);
2467                 /* Create a list of filters to delete. */
2468                 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2469                         if (f->state == I40E_FILTER_REMOVE) {
2470                                 /* Move the element into temporary del_list */
2471                                 hash_del(&f->hlist);
2472                                 hlist_add_head(&f->hlist, &tmp_del_list);
2473
2474                                 /* Avoid counting removed filters */
2475                                 continue;
2476                         }
2477                         if (f->state == I40E_FILTER_NEW) {
2478                                 /* Create a temporary i40e_new_mac_filter */
2479                                 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2480                                 if (!new)
2481                                         goto err_no_memory_locked;
2482
2483                                 /* Store pointer to the real filter */
2484                                 new->f = f;
2485                                 new->state = f->state;
2486
2487                                 /* Add it to the hash list */
2488                                 hlist_add_head(&new->hlist, &tmp_add_list);
2489                         }
2490
2491                         /* Count the number of active (current and new) VLAN
2492                          * filters we have now. Does not count filters which
2493                          * are marked for deletion.
2494                          */
2495                         if (f->vlan > 0)
2496                                 vlan_filters++;
2497                 }
2498
2499                 retval = i40e_correct_mac_vlan_filters(vsi,
2500                                                        &tmp_add_list,
2501                                                        &tmp_del_list,
2502                                                        vlan_filters);
2503
2504                 hlist_for_each_entry(new, &tmp_add_list, hlist)
2505                         netdev_hw_addr_refcnt(new->f, vsi->netdev, 1);
2506
2507                 if (retval)
2508                         goto err_no_memory_locked;
2509
2510                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2511         }
2512
2513         /* Now process 'del_list' outside the lock */
2514         if (!hlist_empty(&tmp_del_list)) {
2515                 filter_list_len = hw->aq.asq_buf_size /
2516                             sizeof(struct i40e_aqc_remove_macvlan_element_data);
2517                 list_size = filter_list_len *
2518                             sizeof(struct i40e_aqc_remove_macvlan_element_data);
2519                 del_list = kzalloc(list_size, GFP_ATOMIC);
2520                 if (!del_list)
2521                         goto err_no_memory;
2522
2523                 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2524                         cmd_flags = 0;
2525
2526                         /* handle broadcast filters by updating the broadcast
2527                          * promiscuous flag and release filter list.
2528                          */
2529                         if (is_broadcast_ether_addr(f->macaddr)) {
2530                                 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2531
2532                                 hlist_del(&f->hlist);
2533                                 kfree(f);
2534                                 continue;
2535                         }
2536
2537                         /* add to delete list */
2538                         ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2539                         if (f->vlan == I40E_VLAN_ANY) {
2540                                 del_list[num_del].vlan_tag = 0;
2541                                 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2542                         } else {
2543                                 del_list[num_del].vlan_tag =
2544                                         cpu_to_le16((u16)(f->vlan));
2545                         }
2546
2547                         cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2548                         del_list[num_del].flags = cmd_flags;
2549                         num_del++;
2550
2551                         /* flush a full buffer */
2552                         if (num_del == filter_list_len) {
2553                                 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2554                                                      num_del, &retval);
2555                                 memset(del_list, 0, list_size);
2556                                 num_del = 0;
2557                         }
2558                         /* Release memory for MAC filter entries which were
2559                          * synced up with HW.
2560                          */
2561                         hlist_del(&f->hlist);
2562                         kfree(f);
2563                 }
2564
2565                 if (num_del) {
2566                         i40e_aqc_del_filters(vsi, vsi_name, del_list,
2567                                              num_del, &retval);
2568                 }
2569
2570                 kfree(del_list);
2571                 del_list = NULL;
2572         }
2573
2574         if (!hlist_empty(&tmp_add_list)) {
2575                 /* Do all the adds now. */
2576                 filter_list_len = hw->aq.asq_buf_size /
2577                                sizeof(struct i40e_aqc_add_macvlan_element_data);
2578                 list_size = filter_list_len *
2579                                sizeof(struct i40e_aqc_add_macvlan_element_data);
2580                 add_list = kzalloc(list_size, GFP_ATOMIC);
2581                 if (!add_list)
2582                         goto err_no_memory;
2583
2584                 num_add = 0;
2585                 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2586                         /* handle broadcast filters by updating the broadcast
2587                          * promiscuous flag instead of adding a MAC filter.
2588                          */
2589                         if (is_broadcast_ether_addr(new->f->macaddr)) {
2590                                 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2591                                                               new->f))
2592                                         new->state = I40E_FILTER_FAILED;
2593                                 else
2594                                         new->state = I40E_FILTER_ACTIVE;
2595                                 continue;
2596                         }
2597
2598                         /* add to add array */
2599                         if (num_add == 0)
2600                                 add_head = new;
2601                         cmd_flags = 0;
2602                         ether_addr_copy(add_list[num_add].mac_addr,
2603                                         new->f->macaddr);
2604                         if (new->f->vlan == I40E_VLAN_ANY) {
2605                                 add_list[num_add].vlan_tag = 0;
2606                                 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2607                         } else {
2608                                 add_list[num_add].vlan_tag =
2609                                         cpu_to_le16((u16)(new->f->vlan));
2610                         }
2611                         add_list[num_add].queue_number = 0;
2612                         /* set invalid match method for later detection */
2613                         add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2614                         cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2615                         add_list[num_add].flags = cpu_to_le16(cmd_flags);
2616                         num_add++;
2617
2618                         /* flush a full buffer */
2619                         if (num_add == filter_list_len) {
2620                                 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2621                                                      add_head, num_add);
2622                                 memset(add_list, 0, list_size);
2623                                 num_add = 0;
2624                         }
2625                 }
2626                 if (num_add) {
2627                         i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2628                                              num_add);
2629                 }
2630                 /* Now move all of the filters from the temp add list back to
2631                  * the VSI's list.
2632                  */
2633                 spin_lock_bh(&vsi->mac_filter_hash_lock);
2634                 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2635                         /* Only update the state if we're still NEW */
2636                         if (new->f->state == I40E_FILTER_NEW)
2637                                 new->f->state = new->state;
2638                         hlist_del(&new->hlist);
2639                         netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
2640                         kfree(new);
2641                 }
2642                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2643                 kfree(add_list);
2644                 add_list = NULL;
2645         }
2646
2647         /* Determine the number of active and failed filters. */
2648         spin_lock_bh(&vsi->mac_filter_hash_lock);
2649         vsi->active_filters = 0;
2650         hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2651                 if (f->state == I40E_FILTER_ACTIVE)
2652                         vsi->active_filters++;
2653                 else if (f->state == I40E_FILTER_FAILED)
2654                         failed_filters++;
2655         }
2656         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2657
2658         /* Check if we are able to exit overflow promiscuous mode. We can
2659          * safely exit if we didn't just enter, we no longer have any failed
2660          * filters, and we have reduced filters below the threshold value.
2661          */
2662         if (old_overflow && !failed_filters &&
2663             vsi->active_filters < vsi->promisc_threshold) {
2664                 dev_info(&pf->pdev->dev,
2665                          "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2666                          vsi_name);
2667                 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2668                 vsi->promisc_threshold = 0;
2669         }
2670
2671         /* if the VF is not trusted do not do promisc */
2672         if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2673                 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2674                 goto out;
2675         }
2676
2677         new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2678
2679         /* If we are entering overflow promiscuous, we need to calculate a new
2680          * threshold for when we are safe to exit
2681          */
2682         if (!old_overflow && new_overflow)
2683                 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2684
2685         /* check for changes in promiscuous modes */
2686         if (changed_flags & IFF_ALLMULTI) {
2687                 bool cur_multipromisc;
2688
2689                 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2690                 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2691                                                                vsi->seid,
2692                                                                cur_multipromisc,
2693                                                                NULL);
2694                 if (aq_ret) {
2695                         retval = i40e_aq_rc_to_posix(aq_ret,
2696                                                      hw->aq.asq_last_status);
2697                         dev_info(&pf->pdev->dev,
2698                                  "set multi promisc failed on %s, err %s aq_err %s\n",
2699                                  vsi_name,
2700                                  i40e_stat_str(hw, aq_ret),
2701                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2702                 } else {
2703                         dev_info(&pf->pdev->dev, "%s allmulti mode.\n",
2704                                  cur_multipromisc ? "entering" : "leaving");
2705                 }
2706         }
2707
2708         if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) {
2709                 bool cur_promisc;
2710
2711                 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2712                                new_overflow);
2713                 aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2714                 if (aq_ret) {
2715                         retval = i40e_aq_rc_to_posix(aq_ret,
2716                                                      hw->aq.asq_last_status);
2717                         dev_info(&pf->pdev->dev,
2718                                  "Setting promiscuous %s failed on %s, err %s aq_err %s\n",
2719                                  cur_promisc ? "on" : "off",
2720                                  vsi_name,
2721                                  i40e_stat_str(hw, aq_ret),
2722                                  i40e_aq_str(hw, hw->aq.asq_last_status));
2723                 }
2724         }
2725 out:
2726         /* if something went wrong then set the changed flag so we try again */
2727         if (retval)
2728                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2729
2730         clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2731         return retval;
2732
2733 err_no_memory:
2734         /* Restore elements on the temporary add and delete lists */
2735         spin_lock_bh(&vsi->mac_filter_hash_lock);
2736 err_no_memory_locked:
2737         i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2738         i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2739         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2740
2741         vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2742         clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2743         return -ENOMEM;
2744 }
2745
2746 /**
2747  * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2748  * @pf: board private structure
2749  **/
2750 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2751 {
2752         int v;
2753
2754         if (!pf)
2755                 return;
2756         if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
2757                 return;
2758         if (test_bit(__I40E_VF_DISABLE, pf->state)) {
2759                 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
2760                 return;
2761         }
2762
2763         for (v = 0; v < pf->num_alloc_vsi; v++) {
2764                 if (pf->vsi[v] &&
2765                     (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED) &&
2766                     !test_bit(__I40E_VSI_RELEASING, pf->vsi[v]->state)) {
2767                         int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2768
2769                         if (ret) {
2770                                 /* come back and try again later */
2771                                 set_bit(__I40E_MACVLAN_SYNC_PENDING,
2772                                         pf->state);
2773                                 break;
2774                         }
2775                 }
2776         }
2777 }
2778
2779 /**
2780  * i40e_max_xdp_frame_size - returns the maximum allowed frame size for XDP
2781  * @vsi: the vsi
2782  **/
2783 static int i40e_max_xdp_frame_size(struct i40e_vsi *vsi)
2784 {
2785         if (PAGE_SIZE >= 8192 || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
2786                 return I40E_RXBUFFER_2048;
2787         else
2788                 return I40E_RXBUFFER_3072;
2789 }
2790
2791 /**
2792  * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2793  * @netdev: network interface device structure
2794  * @new_mtu: new value for maximum frame size
2795  *
2796  * Returns 0 on success, negative on failure
2797  **/
2798 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2799 {
2800         struct i40e_netdev_priv *np = netdev_priv(netdev);
2801         struct i40e_vsi *vsi = np->vsi;
2802         struct i40e_pf *pf = vsi->back;
2803
2804         if (i40e_enabled_xdp_vsi(vsi)) {
2805                 int frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2806
2807                 if (frame_size > i40e_max_xdp_frame_size(vsi))
2808                         return -EINVAL;
2809         }
2810
2811         netdev_dbg(netdev, "changing MTU from %d to %d\n",
2812                    netdev->mtu, new_mtu);
2813         netdev->mtu = new_mtu;
2814         if (netif_running(netdev))
2815                 i40e_vsi_reinit_locked(vsi);
2816         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
2817         set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
2818         return 0;
2819 }
2820
2821 /**
2822  * i40e_ioctl - Access the hwtstamp interface
2823  * @netdev: network interface device structure
2824  * @ifr: interface request data
2825  * @cmd: ioctl command
2826  **/
2827 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2828 {
2829         struct i40e_netdev_priv *np = netdev_priv(netdev);
2830         struct i40e_pf *pf = np->vsi->back;
2831
2832         switch (cmd) {
2833         case SIOCGHWTSTAMP:
2834                 return i40e_ptp_get_ts_config(pf, ifr);
2835         case SIOCSHWTSTAMP:
2836                 return i40e_ptp_set_ts_config(pf, ifr);
2837         default:
2838                 return -EOPNOTSUPP;
2839         }
2840 }
2841
2842 /**
2843  * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2844  * @vsi: the vsi being adjusted
2845  **/
2846 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2847 {
2848         struct i40e_vsi_context ctxt;
2849         i40e_status ret;
2850
2851         /* Don't modify stripping options if a port VLAN is active */
2852         if (vsi->info.pvid)
2853                 return;
2854
2855         if ((vsi->info.valid_sections &
2856              cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2857             ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2858                 return;  /* already enabled */
2859
2860         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2861         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2862                                     I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2863
2864         ctxt.seid = vsi->seid;
2865         ctxt.info = vsi->info;
2866         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2867         if (ret) {
2868                 dev_info(&vsi->back->pdev->dev,
2869                          "update vlan stripping failed, err %s aq_err %s\n",
2870                          i40e_stat_str(&vsi->back->hw, ret),
2871                          i40e_aq_str(&vsi->back->hw,
2872                                      vsi->back->hw.aq.asq_last_status));
2873         }
2874 }
2875
2876 /**
2877  * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2878  * @vsi: the vsi being adjusted
2879  **/
2880 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2881 {
2882         struct i40e_vsi_context ctxt;
2883         i40e_status ret;
2884
2885         /* Don't modify stripping options if a port VLAN is active */
2886         if (vsi->info.pvid)
2887                 return;
2888
2889         if ((vsi->info.valid_sections &
2890              cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2891             ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2892              I40E_AQ_VSI_PVLAN_EMOD_MASK))
2893                 return;  /* already disabled */
2894
2895         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2896         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2897                                     I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2898
2899         ctxt.seid = vsi->seid;
2900         ctxt.info = vsi->info;
2901         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2902         if (ret) {
2903                 dev_info(&vsi->back->pdev->dev,
2904                          "update vlan stripping failed, err %s aq_err %s\n",
2905                          i40e_stat_str(&vsi->back->hw, ret),
2906                          i40e_aq_str(&vsi->back->hw,
2907                                      vsi->back->hw.aq.asq_last_status));
2908         }
2909 }
2910
2911 /**
2912  * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2913  * @vsi: the vsi being configured
2914  * @vid: vlan id to be added (0 = untagged only , -1 = any)
2915  *
2916  * This is a helper function for adding a new MAC/VLAN filter with the
2917  * specified VLAN for each existing MAC address already in the hash table.
2918  * This function does *not* perform any accounting to update filters based on
2919  * VLAN mode.
2920  *
2921  * NOTE: this function expects to be called while under the
2922  * mac_filter_hash_lock
2923  **/
2924 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2925 {
2926         struct i40e_mac_filter *f, *add_f;
2927         struct hlist_node *h;
2928         int bkt;
2929
2930         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2931                 if (f->state == I40E_FILTER_REMOVE)
2932                         continue;
2933                 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2934                 if (!add_f) {
2935                         dev_info(&vsi->back->pdev->dev,
2936                                  "Could not add vlan filter %d for %pM\n",
2937                                  vid, f->macaddr);
2938                         return -ENOMEM;
2939                 }
2940         }
2941
2942         return 0;
2943 }
2944
2945 /**
2946  * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2947  * @vsi: the VSI being configured
2948  * @vid: VLAN id to be added
2949  **/
2950 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2951 {
2952         int err;
2953
2954         if (vsi->info.pvid)
2955                 return -EINVAL;
2956
2957         /* The network stack will attempt to add VID=0, with the intention to
2958          * receive priority tagged packets with a VLAN of 0. Our HW receives
2959          * these packets by default when configured to receive untagged
2960          * packets, so we don't need to add a filter for this case.
2961          * Additionally, HW interprets adding a VID=0 filter as meaning to
2962          * receive *only* tagged traffic and stops receiving untagged traffic.
2963          * Thus, we do not want to actually add a filter for VID=0
2964          */
2965         if (!vid)
2966                 return 0;
2967
2968         /* Locked once because all functions invoked below iterates list*/
2969         spin_lock_bh(&vsi->mac_filter_hash_lock);
2970         err = i40e_add_vlan_all_mac(vsi, vid);
2971         spin_unlock_bh(&vsi->mac_filter_hash_lock);
2972         if (err)
2973                 return err;
2974
2975         /* schedule our worker thread which will take care of
2976          * applying the new filter changes
2977          */
2978         i40e_service_event_schedule(vsi->back);
2979         return 0;
2980 }
2981
2982 /**
2983  * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2984  * @vsi: the vsi being configured
2985  * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2986  *
2987  * This function should be used to remove all VLAN filters which match the
2988  * given VID. It does not schedule the service event and does not take the
2989  * mac_filter_hash_lock so it may be combined with other operations under
2990  * a single invocation of the mac_filter_hash_lock.
2991  *
2992  * NOTE: this function expects to be called while under the
2993  * mac_filter_hash_lock
2994  */
2995 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2996 {
2997         struct i40e_mac_filter *f;
2998         struct hlist_node *h;
2999         int bkt;
3000
3001         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
3002                 if (f->vlan == vid)
3003                         __i40e_del_filter(vsi, f);
3004         }
3005 }
3006
3007 /**
3008  * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
3009  * @vsi: the VSI being configured
3010  * @vid: VLAN id to be removed
3011  **/
3012 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
3013 {
3014         if (!vid || vsi->info.pvid)
3015                 return;
3016
3017         spin_lock_bh(&vsi->mac_filter_hash_lock);
3018         i40e_rm_vlan_all_mac(vsi, vid);
3019         spin_unlock_bh(&vsi->mac_filter_hash_lock);
3020
3021         /* schedule our worker thread which will take care of
3022          * applying the new filter changes
3023          */
3024         i40e_service_event_schedule(vsi->back);
3025 }
3026
3027 /**
3028  * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
3029  * @netdev: network interface to be adjusted
3030  * @proto: unused protocol value
3031  * @vid: vlan id to be added
3032  *
3033  * net_device_ops implementation for adding vlan ids
3034  **/
3035 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
3036                                 __always_unused __be16 proto, u16 vid)
3037 {
3038         struct i40e_netdev_priv *np = netdev_priv(netdev);
3039         struct i40e_vsi *vsi = np->vsi;
3040         int ret = 0;
3041
3042         if (vid >= VLAN_N_VID)
3043                 return -EINVAL;
3044
3045         ret = i40e_vsi_add_vlan(vsi, vid);
3046         if (!ret)
3047                 set_bit(vid, vsi->active_vlans);
3048
3049         return ret;
3050 }
3051
3052 /**
3053  * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
3054  * @netdev: network interface to be adjusted
3055  * @proto: unused protocol value
3056  * @vid: vlan id to be added
3057  **/
3058 static void i40e_vlan_rx_add_vid_up(struct net_device *netdev,
3059                                     __always_unused __be16 proto, u16 vid)
3060 {
3061         struct i40e_netdev_priv *np = netdev_priv(netdev);
3062         struct i40e_vsi *vsi = np->vsi;
3063
3064         if (vid >= VLAN_N_VID)
3065                 return;
3066         set_bit(vid, vsi->active_vlans);
3067 }
3068
3069 /**
3070  * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
3071  * @netdev: network interface to be adjusted
3072  * @proto: unused protocol value
3073  * @vid: vlan id to be removed
3074  *
3075  * net_device_ops implementation for removing vlan ids
3076  **/
3077 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
3078                                  __always_unused __be16 proto, u16 vid)
3079 {
3080         struct i40e_netdev_priv *np = netdev_priv(netdev);
3081         struct i40e_vsi *vsi = np->vsi;
3082
3083         /* return code is ignored as there is nothing a user
3084          * can do about failure to remove and a log message was
3085          * already printed from the other function
3086          */
3087         i40e_vsi_kill_vlan(vsi, vid);
3088
3089         clear_bit(vid, vsi->active_vlans);
3090
3091         return 0;
3092 }
3093
3094 /**
3095  * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
3096  * @vsi: the vsi being brought back up
3097  **/
3098 static void i40e_restore_vlan(struct i40e_vsi *vsi)
3099 {
3100         u16 vid;
3101
3102         if (!vsi->netdev)
3103                 return;
3104
3105         if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3106                 i40e_vlan_stripping_enable(vsi);
3107         else
3108                 i40e_vlan_stripping_disable(vsi);
3109
3110         for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
3111                 i40e_vlan_rx_add_vid_up(vsi->netdev, htons(ETH_P_8021Q),
3112                                         vid);
3113 }
3114
3115 /**
3116  * i40e_vsi_add_pvid - Add pvid for the VSI
3117  * @vsi: the vsi being adjusted
3118  * @vid: the vlan id to set as a PVID
3119  **/
3120 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
3121 {
3122         struct i40e_vsi_context ctxt;
3123         i40e_status ret;
3124
3125         vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3126         vsi->info.pvid = cpu_to_le16(vid);
3127         vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
3128                                     I40E_AQ_VSI_PVLAN_INSERT_PVID |
3129                                     I40E_AQ_VSI_PVLAN_EMOD_STR;
3130
3131         ctxt.seid = vsi->seid;
3132         ctxt.info = vsi->info;
3133         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3134         if (ret) {
3135                 dev_info(&vsi->back->pdev->dev,
3136                          "add pvid failed, err %s aq_err %s\n",
3137                          i40e_stat_str(&vsi->back->hw, ret),
3138                          i40e_aq_str(&vsi->back->hw,
3139                                      vsi->back->hw.aq.asq_last_status));
3140                 return -ENOENT;
3141         }
3142
3143         return 0;
3144 }
3145
3146 /**
3147  * i40e_vsi_remove_pvid - Remove the pvid from the VSI
3148  * @vsi: the vsi being adjusted
3149  *
3150  * Just use the vlan_rx_register() service to put it back to normal
3151  **/
3152 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
3153 {
3154         vsi->info.pvid = 0;
3155
3156         i40e_vlan_stripping_disable(vsi);
3157 }
3158
3159 /**
3160  * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
3161  * @vsi: ptr to the VSI
3162  *
3163  * If this function returns with an error, then it's possible one or
3164  * more of the rings is populated (while the rest are not).  It is the
3165  * callers duty to clean those orphaned rings.
3166  *
3167  * Return 0 on success, negative on failure
3168  **/
3169 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
3170 {
3171         int i, err = 0;
3172
3173         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3174                 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
3175
3176         if (!i40e_enabled_xdp_vsi(vsi))
3177                 return err;
3178
3179         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3180                 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]);
3181
3182         return err;
3183 }
3184
3185 /**
3186  * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
3187  * @vsi: ptr to the VSI
3188  *
3189  * Free VSI's transmit software resources
3190  **/
3191 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
3192 {
3193         int i;
3194
3195         if (vsi->tx_rings) {
3196                 for (i = 0; i < vsi->num_queue_pairs; i++)
3197                         if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
3198                                 i40e_free_tx_resources(vsi->tx_rings[i]);
3199         }
3200
3201         if (vsi->xdp_rings) {
3202                 for (i = 0; i < vsi->num_queue_pairs; i++)
3203                         if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3204                                 i40e_free_tx_resources(vsi->xdp_rings[i]);
3205         }
3206 }
3207
3208 /**
3209  * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3210  * @vsi: ptr to the VSI
3211  *
3212  * If this function returns with an error, then it's possible one or
3213  * more of the rings is populated (while the rest are not).  It is the
3214  * callers duty to clean those orphaned rings.
3215  *
3216  * Return 0 on success, negative on failure
3217  **/
3218 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3219 {
3220         int i, err = 0;
3221
3222         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3223                 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
3224         return err;
3225 }
3226
3227 /**
3228  * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3229  * @vsi: ptr to the VSI
3230  *
3231  * Free all receive software resources
3232  **/
3233 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3234 {
3235         int i;
3236
3237         if (!vsi->rx_rings)
3238                 return;
3239
3240         for (i = 0; i < vsi->num_queue_pairs; i++)
3241                 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3242                         i40e_free_rx_resources(vsi->rx_rings[i]);
3243 }
3244
3245 /**
3246  * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3247  * @ring: The Tx ring to configure
3248  *
3249  * This enables/disables XPS for a given Tx descriptor ring
3250  * based on the TCs enabled for the VSI that ring belongs to.
3251  **/
3252 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3253 {
3254         int cpu;
3255
3256         if (!ring->q_vector || !ring->netdev || ring->ch)
3257                 return;
3258
3259         /* We only initialize XPS once, so as not to overwrite user settings */
3260         if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state))
3261                 return;
3262
3263         cpu = cpumask_local_spread(ring->q_vector->v_idx, -1);
3264         netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu),
3265                             ring->queue_index);
3266 }
3267
3268 /**
3269  * i40e_xsk_pool - Retrieve the AF_XDP buffer pool if XDP and ZC is enabled
3270  * @ring: The Tx or Rx ring
3271  *
3272  * Returns the AF_XDP buffer pool or NULL.
3273  **/
3274 static struct xsk_buff_pool *i40e_xsk_pool(struct i40e_ring *ring)
3275 {
3276         bool xdp_on = i40e_enabled_xdp_vsi(ring->vsi);
3277         int qid = ring->queue_index;
3278
3279         if (ring_is_xdp(ring))
3280                 qid -= ring->vsi->alloc_queue_pairs;
3281
3282         if (!xdp_on || !test_bit(qid, ring->vsi->af_xdp_zc_qps))
3283                 return NULL;
3284
3285         return xsk_get_pool_from_qid(ring->vsi->netdev, qid);
3286 }
3287
3288 /**
3289  * i40e_configure_tx_ring - Configure a transmit ring context and rest
3290  * @ring: The Tx ring to configure
3291  *
3292  * Configure the Tx descriptor ring in the HMC context.
3293  **/
3294 static int i40e_configure_tx_ring(struct i40e_ring *ring)
3295 {
3296         struct i40e_vsi *vsi = ring->vsi;
3297         u16 pf_q = vsi->base_queue + ring->queue_index;
3298         struct i40e_hw *hw = &vsi->back->hw;
3299         struct i40e_hmc_obj_txq tx_ctx;
3300         i40e_status err = 0;
3301         u32 qtx_ctl = 0;
3302
3303         if (ring_is_xdp(ring))
3304                 ring->xsk_pool = i40e_xsk_pool(ring);
3305
3306         /* some ATR related tx ring init */
3307         if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3308                 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3309                 ring->atr_count = 0;
3310         } else {
3311                 ring->atr_sample_rate = 0;
3312         }
3313
3314         /* configure XPS */
3315         i40e_config_xps_tx_ring(ring);
3316
3317         /* clear the context structure first */
3318         memset(&tx_ctx, 0, sizeof(tx_ctx));
3319
3320         tx_ctx.new_context = 1;
3321         tx_ctx.base = (ring->dma / 128);
3322         tx_ctx.qlen = ring->count;
3323         tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3324                                                I40E_FLAG_FD_ATR_ENABLED));
3325         tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3326         /* FDIR VSI tx ring can still use RS bit and writebacks */
3327         if (vsi->type != I40E_VSI_FDIR)
3328                 tx_ctx.head_wb_ena = 1;
3329         tx_ctx.head_wb_addr = ring->dma +
3330                               (ring->count * sizeof(struct i40e_tx_desc));
3331
3332         /* As part of VSI creation/update, FW allocates certain
3333          * Tx arbitration queue sets for each TC enabled for
3334          * the VSI. The FW returns the handles to these queue
3335          * sets as part of the response buffer to Add VSI,
3336          * Update VSI, etc. AQ commands. It is expected that
3337          * these queue set handles be associated with the Tx
3338          * queues by the driver as part of the TX queue context
3339          * initialization. This has to be done regardless of
3340          * DCB as by default everything is mapped to TC0.
3341          */
3342
3343         if (ring->ch)
3344                 tx_ctx.rdylist =
3345                         le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3346
3347         else
3348                 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3349
3350         tx_ctx.rdylist_act = 0;
3351
3352         /* clear the context in the HMC */
3353         err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3354         if (err) {
3355                 dev_info(&vsi->back->pdev->dev,
3356                          "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3357                          ring->queue_index, pf_q, err);
3358                 return -ENOMEM;
3359         }
3360
3361         /* set the context in the HMC */
3362         err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3363         if (err) {
3364                 dev_info(&vsi->back->pdev->dev,
3365                          "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3366                          ring->queue_index, pf_q, err);
3367                 return -ENOMEM;
3368         }
3369
3370         /* Now associate this queue with this PCI function */
3371         if (ring->ch) {
3372                 if (ring->ch->type == I40E_VSI_VMDQ2)
3373                         qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3374                 else
3375                         return -EINVAL;
3376
3377                 qtx_ctl |= (ring->ch->vsi_number <<
3378                             I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3379                             I40E_QTX_CTL_VFVM_INDX_MASK;
3380         } else {
3381                 if (vsi->type == I40E_VSI_VMDQ2) {
3382                         qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3383                         qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3384                                     I40E_QTX_CTL_VFVM_INDX_MASK;
3385                 } else {
3386                         qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3387                 }
3388         }
3389
3390         qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3391                     I40E_QTX_CTL_PF_INDX_MASK);
3392         wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3393         i40e_flush(hw);
3394
3395         /* cache tail off for easier writes later */
3396         ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3397
3398         return 0;
3399 }
3400
3401 /**
3402  * i40e_rx_offset - Return expected offset into page to access data
3403  * @rx_ring: Ring we are requesting offset of
3404  *
3405  * Returns the offset value for ring into the data buffer.
3406  */
3407 static unsigned int i40e_rx_offset(struct i40e_ring *rx_ring)
3408 {
3409         return ring_uses_build_skb(rx_ring) ? I40E_SKB_PAD : 0;
3410 }
3411
3412 /**
3413  * i40e_configure_rx_ring - Configure a receive ring context
3414  * @ring: The Rx ring to configure
3415  *
3416  * Configure the Rx descriptor ring in the HMC context.
3417  **/
3418 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3419 {
3420         struct i40e_vsi *vsi = ring->vsi;
3421         u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3422         u16 pf_q = vsi->base_queue + ring->queue_index;
3423         struct i40e_hw *hw = &vsi->back->hw;
3424         struct i40e_hmc_obj_rxq rx_ctx;
3425         i40e_status err = 0;
3426         bool ok;
3427         int ret;
3428
3429         bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
3430
3431         /* clear the context structure first */
3432         memset(&rx_ctx, 0, sizeof(rx_ctx));
3433
3434         if (ring->vsi->type == I40E_VSI_MAIN)
3435                 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
3436
3437         kfree(ring->rx_bi);
3438         ring->xsk_pool = i40e_xsk_pool(ring);
3439         if (ring->xsk_pool) {
3440                 ret = i40e_alloc_rx_bi_zc(ring);
3441                 if (ret)
3442                         return ret;
3443                 ring->rx_buf_len =
3444                   xsk_pool_get_rx_frame_size(ring->xsk_pool);
3445                 /* For AF_XDP ZC, we disallow packets to span on
3446                  * multiple buffers, thus letting us skip that
3447                  * handling in the fast-path.
3448                  */
3449                 chain_len = 1;
3450                 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3451                                                  MEM_TYPE_XSK_BUFF_POOL,
3452                                                  NULL);
3453                 if (ret)
3454                         return ret;
3455                 dev_info(&vsi->back->pdev->dev,
3456                          "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
3457                          ring->queue_index);
3458
3459         } else {
3460                 ret = i40e_alloc_rx_bi(ring);
3461                 if (ret)
3462                         return ret;
3463                 ring->rx_buf_len = vsi->rx_buf_len;
3464                 if (ring->vsi->type == I40E_VSI_MAIN) {
3465                         ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3466                                                          MEM_TYPE_PAGE_SHARED,
3467                                                          NULL);
3468                         if (ret)
3469                                 return ret;
3470                 }
3471         }
3472
3473         rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3474                                     BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3475
3476         rx_ctx.base = (ring->dma / 128);
3477         rx_ctx.qlen = ring->count;
3478
3479         /* use 16 byte descriptors */
3480         rx_ctx.dsize = 0;
3481
3482         /* descriptor type is always zero
3483          * rx_ctx.dtype = 0;
3484          */
3485         rx_ctx.hsplit_0 = 0;
3486
3487         rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3488         if (hw->revision_id == 0)
3489                 rx_ctx.lrxqthresh = 0;
3490         else
3491                 rx_ctx.lrxqthresh = 1;
3492         rx_ctx.crcstrip = 1;
3493         rx_ctx.l2tsel = 1;
3494         /* this controls whether VLAN is stripped from inner headers */
3495         rx_ctx.showiv = 0;
3496         /* set the prefena field to 1 because the manual says to */
3497         rx_ctx.prefena = 1;
3498
3499         /* clear the context in the HMC */
3500         err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3501         if (err) {
3502                 dev_info(&vsi->back->pdev->dev,
3503                          "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3504                          ring->queue_index, pf_q, err);
3505                 return -ENOMEM;
3506         }
3507
3508         /* set the context in the HMC */
3509         err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3510         if (err) {
3511                 dev_info(&vsi->back->pdev->dev,
3512                          "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3513                          ring->queue_index, pf_q, err);
3514                 return -ENOMEM;
3515         }
3516
3517         /* configure Rx buffer alignment */
3518         if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
3519                 clear_ring_build_skb_enabled(ring);
3520         else
3521                 set_ring_build_skb_enabled(ring);
3522
3523         ring->rx_offset = i40e_rx_offset(ring);
3524
3525         /* cache tail for quicker writes, and clear the reg before use */
3526         ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3527         writel(0, ring->tail);
3528
3529         if (ring->xsk_pool) {
3530                 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq);
3531                 ok = i40e_alloc_rx_buffers_zc(ring, I40E_DESC_UNUSED(ring));
3532         } else {
3533                 ok = !i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3534         }
3535         if (!ok) {
3536                 /* Log this in case the user has forgotten to give the kernel
3537                  * any buffers, even later in the application.
3538                  */
3539                 dev_info(&vsi->back->pdev->dev,
3540                          "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n",
3541                          ring->xsk_pool ? "AF_XDP ZC enabled " : "",
3542                          ring->queue_index, pf_q);
3543         }
3544
3545         return 0;
3546 }
3547
3548 /**
3549  * i40e_vsi_configure_tx - Configure the VSI for Tx
3550  * @vsi: VSI structure describing this set of rings and resources
3551  *
3552  * Configure the Tx VSI for operation.
3553  **/
3554 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3555 {
3556         int err = 0;
3557         u16 i;
3558
3559         for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3560                 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3561
3562         if (err || !i40e_enabled_xdp_vsi(vsi))
3563                 return err;
3564
3565         for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3566                 err = i40e_configure_tx_ring(vsi->xdp_rings[i]);
3567
3568         return err;
3569 }
3570
3571 /**
3572  * i40e_vsi_configure_rx - Configure the VSI for Rx
3573  * @vsi: the VSI being configured
3574  *
3575  * Configure the Rx VSI for operation.
3576  **/
3577 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3578 {
3579         int err = 0;
3580         u16 i;
3581
3582         if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3583                 vsi->max_frame = I40E_MAX_RXBUFFER;
3584                 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3585 #if (PAGE_SIZE < 8192)
3586         } else if (!I40E_2K_TOO_SMALL_WITH_PADDING &&
3587                    (vsi->netdev->mtu <= ETH_DATA_LEN)) {
3588                 vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3589                 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3590 #endif
3591         } else {
3592                 vsi->max_frame = I40E_MAX_RXBUFFER;
3593                 vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 :
3594                                                        I40E_RXBUFFER_2048;
3595         }
3596
3597         /* set up individual rings */
3598         for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3599                 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3600
3601         return err;
3602 }
3603
3604 /**
3605  * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3606  * @vsi: ptr to the VSI
3607  **/
3608 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3609 {
3610         struct i40e_ring *tx_ring, *rx_ring;
3611         u16 qoffset, qcount;
3612         int i, n;
3613
3614         if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3615                 /* Reset the TC information */
3616                 for (i = 0; i < vsi->num_queue_pairs; i++) {
3617                         rx_ring = vsi->rx_rings[i];
3618                         tx_ring = vsi->tx_rings[i];
3619                         rx_ring->dcb_tc = 0;
3620                         tx_ring->dcb_tc = 0;
3621                 }
3622                 return;
3623         }
3624
3625         for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3626                 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3627                         continue;
3628
3629                 qoffset = vsi->tc_config.tc_info[n].qoffset;
3630                 qcount = vsi->tc_config.tc_info[n].qcount;
3631                 for (i = qoffset; i < (qoffset + qcount); i++) {
3632                         rx_ring = vsi->rx_rings[i];
3633                         tx_ring = vsi->tx_rings[i];
3634                         rx_ring->dcb_tc = n;
3635                         tx_ring->dcb_tc = n;
3636                 }
3637         }
3638 }
3639
3640 /**
3641  * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3642  * @vsi: ptr to the VSI
3643  **/
3644 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3645 {
3646         if (vsi->netdev)
3647                 i40e_set_rx_mode(vsi->netdev);
3648 }
3649
3650 /**
3651  * i40e_reset_fdir_filter_cnt - Reset flow director filter counters
3652  * @pf: Pointer to the targeted PF
3653  *
3654  * Set all flow director counters to 0.
3655  */
3656 static void i40e_reset_fdir_filter_cnt(struct i40e_pf *pf)
3657 {
3658         pf->fd_tcp4_filter_cnt = 0;
3659         pf->fd_udp4_filter_cnt = 0;
3660         pf->fd_sctp4_filter_cnt = 0;
3661         pf->fd_ip4_filter_cnt = 0;
3662         pf->fd_tcp6_filter_cnt = 0;
3663         pf->fd_udp6_filter_cnt = 0;
3664         pf->fd_sctp6_filter_cnt = 0;
3665         pf->fd_ip6_filter_cnt = 0;
3666 }
3667
3668 /**
3669  * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3670  * @vsi: Pointer to the targeted VSI
3671  *
3672  * This function replays the hlist on the hw where all the SB Flow Director
3673  * filters were saved.
3674  **/
3675 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3676 {
3677         struct i40e_fdir_filter *filter;
3678         struct i40e_pf *pf = vsi->back;
3679         struct hlist_node *node;
3680
3681         if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3682                 return;
3683
3684         /* Reset FDir counters as we're replaying all existing filters */
3685         i40e_reset_fdir_filter_cnt(pf);
3686
3687         hlist_for_each_entry_safe(filter, node,
3688                                   &pf->fdir_filter_list, fdir_node) {
3689                 i40e_add_del_fdir(vsi, filter, true);
3690         }
3691 }
3692
3693 /**
3694  * i40e_vsi_configure - Set up the VSI for action
3695  * @vsi: the VSI being configured
3696  **/
3697 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3698 {
3699         int err;
3700
3701         i40e_set_vsi_rx_mode(vsi);
3702         i40e_restore_vlan(vsi);
3703         i40e_vsi_config_dcb_rings(vsi);
3704         err = i40e_vsi_configure_tx(vsi);
3705         if (!err)
3706                 err = i40e_vsi_configure_rx(vsi);
3707
3708         return err;
3709 }
3710
3711 /**
3712  * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3713  * @vsi: the VSI being configured
3714  **/
3715 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3716 {
3717         bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3718         struct i40e_pf *pf = vsi->back;
3719         struct i40e_hw *hw = &pf->hw;
3720         u16 vector;
3721         int i, q;
3722         u32 qp;
3723
3724         /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3725          * and PFINT_LNKLSTn registers, e.g.:
3726          *   PFINT_ITRn[0..n-1] gets msix-1..msix-n  (qpair interrupts)
3727          */
3728         qp = vsi->base_queue;
3729         vector = vsi->base_vector;
3730         for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3731                 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3732
3733                 q_vector->rx.next_update = jiffies + 1;
3734                 q_vector->rx.target_itr =
3735                         ITR_TO_REG(vsi->rx_rings[i]->itr_setting);
3736                 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3737                      q_vector->rx.target_itr >> 1);
3738                 q_vector->rx.current_itr = q_vector->rx.target_itr;
3739
3740                 q_vector->tx.next_update = jiffies + 1;
3741                 q_vector->tx.target_itr =
3742                         ITR_TO_REG(vsi->tx_rings[i]->itr_setting);
3743                 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3744                      q_vector->tx.target_itr >> 1);
3745                 q_vector->tx.current_itr = q_vector->tx.target_itr;
3746
3747                 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3748                      i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3749
3750                 /* Linked list for the queuepairs assigned to this vector */
3751                 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3752                 for (q = 0; q < q_vector->num_ringpairs; q++) {
3753                         u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3754                         u32 val;
3755
3756                         val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3757                               (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3758                               (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3759                               (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3760                               (I40E_QUEUE_TYPE_TX <<
3761                                I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3762
3763                         wr32(hw, I40E_QINT_RQCTL(qp), val);
3764
3765                         if (has_xdp) {
3766                                 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3767                                       (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3768                                       (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3769                                       (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3770                                       (I40E_QUEUE_TYPE_TX <<
3771                                        I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3772
3773                                 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3774                         }
3775
3776                         val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3777                               (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3778                               (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3779                               ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3780                               (I40E_QUEUE_TYPE_RX <<
3781                                I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3782
3783                         /* Terminate the linked list */
3784                         if (q == (q_vector->num_ringpairs - 1))
3785                                 val |= (I40E_QUEUE_END_OF_LIST <<
3786                                         I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3787
3788                         wr32(hw, I40E_QINT_TQCTL(qp), val);
3789                         qp++;
3790                 }
3791         }
3792
3793         i40e_flush(hw);
3794 }
3795
3796 /**
3797  * i40e_enable_misc_int_causes - enable the non-queue interrupts
3798  * @pf: pointer to private device data structure
3799  **/
3800 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3801 {
3802         struct i40e_hw *hw = &pf->hw;
3803         u32 val;
3804
3805         /* clear things first */
3806         wr32(hw, I40E_PFINT_ICR0_ENA, 0);  /* disable all */
3807         rd32(hw, I40E_PFINT_ICR0);         /* read to clear */
3808
3809         val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK       |
3810               I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK    |
3811               I40E_PFINT_ICR0_ENA_GRST_MASK          |
3812               I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3813               I40E_PFINT_ICR0_ENA_GPIO_MASK          |
3814               I40E_PFINT_ICR0_ENA_HMC_ERR_MASK       |
3815               I40E_PFINT_ICR0_ENA_VFLR_MASK          |
3816               I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3817
3818         if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3819                 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3820
3821         if (pf->flags & I40E_FLAG_PTP)
3822                 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3823
3824         wr32(hw, I40E_PFINT_ICR0_ENA, val);
3825
3826         /* SW_ITR_IDX = 0, but don't change INTENA */
3827         wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3828                                         I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3829
3830         /* OTHER_ITR_IDX = 0 */
3831         wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3832 }
3833
3834 /**
3835  * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3836  * @vsi: the VSI being configured
3837  **/
3838 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3839 {
3840         u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
3841         struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3842         struct i40e_pf *pf = vsi->back;
3843         struct i40e_hw *hw = &pf->hw;
3844         u32 val;
3845
3846         /* set the ITR configuration */
3847         q_vector->rx.next_update = jiffies + 1;
3848         q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting);
3849         wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1);
3850         q_vector->rx.current_itr = q_vector->rx.target_itr;
3851         q_vector->tx.next_update = jiffies + 1;
3852         q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting);
3853         wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr >> 1);
3854         q_vector->tx.current_itr = q_vector->tx.target_itr;
3855
3856         i40e_enable_misc_int_causes(pf);
3857
3858         /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3859         wr32(hw, I40E_PFINT_LNKLST0, 0);
3860
3861         /* Associate the queue pair to the vector and enable the queue int */
3862         val = I40E_QINT_RQCTL_CAUSE_ENA_MASK                   |
3863               (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT)  |
3864               (nextqp      << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3865               (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3866
3867         wr32(hw, I40E_QINT_RQCTL(0), val);
3868
3869         if (i40e_enabled_xdp_vsi(vsi)) {
3870                 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK                 |
3871                       (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT)|
3872                       (I40E_QUEUE_TYPE_TX
3873                        << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3874
3875                 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3876         }
3877
3878         val = I40E_QINT_TQCTL_CAUSE_ENA_MASK                  |
3879               (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3880               (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3881
3882         wr32(hw, I40E_QINT_TQCTL(0), val);
3883         i40e_flush(hw);
3884 }
3885
3886 /**
3887  * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3888  * @pf: board private structure
3889  **/
3890 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3891 {
3892         struct i40e_hw *hw = &pf->hw;
3893
3894         wr32(hw, I40E_PFINT_DYN_CTL0,
3895              I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3896         i40e_flush(hw);
3897 }
3898
3899 /**
3900  * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3901  * @pf: board private structure
3902  **/
3903 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3904 {
3905         struct i40e_hw *hw = &pf->hw;
3906         u32 val;
3907
3908         val = I40E_PFINT_DYN_CTL0_INTENA_MASK   |
3909               I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3910               (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3911
3912         wr32(hw, I40E_PFINT_DYN_CTL0, val);
3913         i40e_flush(hw);
3914 }
3915
3916 /**
3917  * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3918  * @irq: interrupt number
3919  * @data: pointer to a q_vector
3920  **/
3921 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3922 {
3923         struct i40e_q_vector *q_vector = data;
3924
3925         if (!q_vector->tx.ring && !q_vector->rx.ring)
3926                 return IRQ_HANDLED;
3927
3928         napi_schedule_irqoff(&q_vector->napi);
3929
3930         return IRQ_HANDLED;
3931 }
3932
3933 /**
3934  * i40e_irq_affinity_notify - Callback for affinity changes
3935  * @notify: context as to what irq was changed
3936  * @mask: the new affinity mask
3937  *
3938  * This is a callback function used by the irq_set_affinity_notifier function
3939  * so that we may register to receive changes to the irq affinity masks.
3940  **/
3941 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3942                                      const cpumask_t *mask)
3943 {
3944         struct i40e_q_vector *q_vector =
3945                 container_of(notify, struct i40e_q_vector, affinity_notify);
3946
3947         cpumask_copy(&q_vector->affinity_mask, mask);
3948 }
3949
3950 /**
3951  * i40e_irq_affinity_release - Callback for affinity notifier release
3952  * @ref: internal core kernel usage
3953  *
3954  * This is a callback function used by the irq_set_affinity_notifier function
3955  * to inform the current notification subscriber that they will no longer
3956  * receive notifications.
3957  **/
3958 static void i40e_irq_affinity_release(struct kref *ref) {}
3959
3960 /**
3961  * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3962  * @vsi: the VSI being configured
3963  * @basename: name for the vector
3964  *
3965  * Allocates MSI-X vectors and requests interrupts from the kernel.
3966  **/
3967 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3968 {
3969         int q_vectors = vsi->num_q_vectors;
3970         struct i40e_pf *pf = vsi->back;
3971         int base = vsi->base_vector;
3972         int rx_int_idx = 0;
3973         int tx_int_idx = 0;
3974         int vector, err;
3975         int irq_num;
3976         int cpu;
3977
3978         for (vector = 0; vector < q_vectors; vector++) {
3979                 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3980
3981                 irq_num = pf->msix_entries[base + vector].vector;
3982
3983                 if (q_vector->tx.ring && q_vector->rx.ring) {
3984                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3985                                  "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3986                         tx_int_idx++;
3987                 } else if (q_vector->rx.ring) {
3988                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3989                                  "%s-%s-%d", basename, "rx", rx_int_idx++);
3990                 } else if (q_vector->tx.ring) {
3991                         snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3992                                  "%s-%s-%d", basename, "tx", tx_int_idx++);
3993                 } else {
3994                         /* skip this unused q_vector */
3995                         continue;
3996                 }
3997                 err = request_irq(irq_num,
3998                                   vsi->irq_handler,
3999                                   0,
4000                                   q_vector->name,
4001                                   q_vector);
4002                 if (err) {
4003                         dev_info(&pf->pdev->dev,
4004                                  "MSIX request_irq failed, error: %d\n", err);
4005                         goto free_queue_irqs;
4006                 }
4007
4008                 /* register for affinity change notifications */
4009                 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
4010                 q_vector->affinity_notify.release = i40e_irq_affinity_release;
4011                 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
4012                 /* Spread affinity hints out across online CPUs.
4013                  *
4014                  * get_cpu_mask returns a static constant mask with
4015                  * a permanent lifetime so it's ok to pass to
4016                  * irq_update_affinity_hint without making a copy.
4017                  */
4018                 cpu = cpumask_local_spread(q_vector->v_idx, -1);
4019                 irq_update_affinity_hint(irq_num, get_cpu_mask(cpu));
4020         }
4021
4022         vsi->irqs_ready = true;
4023         return 0;
4024
4025 free_queue_irqs:
4026         while (vector) {
4027                 vector--;
4028                 irq_num = pf->msix_entries[base + vector].vector;
4029                 irq_set_affinity_notifier(irq_num, NULL);
4030                 irq_update_affinity_hint(irq_num, NULL);
4031                 free_irq(irq_num, &vsi->q_vectors[vector]);
4032         }
4033         return err;
4034 }
4035
4036 /**
4037  * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
4038  * @vsi: the VSI being un-configured
4039  **/
4040 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
4041 {
4042         struct i40e_pf *pf = vsi->back;
4043         struct i40e_hw *hw = &pf->hw;
4044         int base = vsi->base_vector;
4045         int i;
4046
4047         /* disable interrupt causation from each queue */
4048         for (i = 0; i < vsi->num_queue_pairs; i++) {
4049                 u32 val;
4050
4051                 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
4052                 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
4053                 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
4054
4055                 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
4056                 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
4057                 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
4058
4059                 if (!i40e_enabled_xdp_vsi(vsi))
4060                         continue;
4061                 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
4062         }
4063
4064         /* disable each interrupt */
4065         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4066                 for (i = vsi->base_vector;
4067                      i < (vsi->num_q_vectors + vsi->base_vector); i++)
4068                         wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
4069
4070                 i40e_flush(hw);
4071                 for (i = 0; i < vsi->num_q_vectors; i++)
4072                         synchronize_irq(pf->msix_entries[i + base].vector);
4073         } else {
4074                 /* Legacy and MSI mode - this stops all interrupt handling */
4075                 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
4076                 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
4077                 i40e_flush(hw);
4078                 synchronize_irq(pf->pdev->irq);
4079         }
4080 }
4081
4082 /**
4083  * i40e_vsi_enable_irq - Enable IRQ for the given VSI
4084  * @vsi: the VSI being configured
4085  **/
4086 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
4087 {
4088         struct i40e_pf *pf = vsi->back;
4089         int i;
4090
4091         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4092                 for (i = 0; i < vsi->num_q_vectors; i++)
4093                         i40e_irq_dynamic_enable(vsi, i);
4094         } else {
4095                 i40e_irq_dynamic_enable_icr0(pf);
4096         }
4097
4098         i40e_flush(&pf->hw);
4099         return 0;
4100 }
4101
4102 /**
4103  * i40e_free_misc_vector - Free the vector that handles non-queue events
4104  * @pf: board private structure
4105  **/
4106 static void i40e_free_misc_vector(struct i40e_pf *pf)
4107 {
4108         /* Disable ICR 0 */
4109         wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
4110         i40e_flush(&pf->hw);
4111
4112         if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4113                 synchronize_irq(pf->msix_entries[0].vector);
4114                 free_irq(pf->msix_entries[0].vector, pf);
4115                 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
4116         }
4117 }
4118
4119 /**
4120  * i40e_intr - MSI/Legacy and non-queue interrupt handler
4121  * @irq: interrupt number
4122  * @data: pointer to a q_vector
4123  *
4124  * This is the handler used for all MSI/Legacy interrupts, and deals
4125  * with both queue and non-queue interrupts.  This is also used in
4126  * MSIX mode to handle the non-queue interrupts.
4127  **/
4128 static irqreturn_t i40e_intr(int irq, void *data)
4129 {
4130         struct i40e_pf *pf = (struct i40e_pf *)data;
4131         struct i40e_hw *hw = &pf->hw;
4132         irqreturn_t ret = IRQ_NONE;
4133         u32 icr0, icr0_remaining;
4134         u32 val, ena_mask;
4135
4136         icr0 = rd32(hw, I40E_PFINT_ICR0);
4137         ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
4138
4139         /* if sharing a legacy IRQ, we might get called w/o an intr pending */
4140         if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
4141                 goto enable_intr;
4142
4143         /* if interrupt but no bits showing, must be SWINT */
4144         if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
4145             (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
4146                 pf->sw_int_count++;
4147
4148         if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
4149             (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
4150                 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
4151                 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
4152                 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
4153         }
4154
4155         /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
4156         if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
4157                 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
4158                 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
4159
4160                 /* We do not have a way to disarm Queue causes while leaving
4161                  * interrupt enabled for all other causes, ideally
4162                  * interrupt should be disabled while we are in NAPI but
4163                  * this is not a performance path and napi_schedule()
4164                  * can deal with rescheduling.
4165                  */
4166                 if (!test_bit(__I40E_DOWN, pf->state))
4167                         napi_schedule_irqoff(&q_vector->napi);
4168         }
4169
4170         if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
4171                 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4172                 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
4173                 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
4174         }
4175
4176         if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
4177                 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
4178                 set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
4179         }
4180
4181         if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
4182                 /* disable any further VFLR event notifications */
4183                 if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state)) {
4184                         u32 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
4185
4186                         reg &= ~I40E_PFINT_ICR0_VFLR_MASK;
4187                         wr32(hw, I40E_PFINT_ICR0_ENA, reg);
4188                 } else {
4189                         ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
4190                         set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
4191                 }
4192         }
4193
4194         if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
4195                 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4196                         set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
4197                 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
4198                 val = rd32(hw, I40E_GLGEN_RSTAT);
4199                 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
4200                        >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
4201                 if (val == I40E_RESET_CORER) {
4202                         pf->corer_count++;
4203                 } else if (val == I40E_RESET_GLOBR) {
4204                         pf->globr_count++;
4205                 } else if (val == I40E_RESET_EMPR) {
4206                         pf->empr_count++;
4207                         set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
4208                 }
4209         }
4210
4211         if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
4212                 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
4213                 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
4214                 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
4215                          rd32(hw, I40E_PFHMC_ERRORINFO),
4216                          rd32(hw, I40E_PFHMC_ERRORDATA));
4217         }
4218
4219         if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
4220                 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
4221
4222                 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_EVENT0_MASK)
4223                         schedule_work(&pf->ptp_extts0_work);
4224
4225                 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK)
4226                         i40e_ptp_tx_hwtstamp(pf);
4227
4228                 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4229         }
4230
4231         /* If a critical error is pending we have no choice but to reset the
4232          * device.
4233          * Report and mask out any remaining unexpected interrupts.
4234          */
4235         icr0_remaining = icr0 & ena_mask;
4236         if (icr0_remaining) {
4237                 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
4238                          icr0_remaining);
4239                 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
4240                     (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
4241                     (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
4242                         dev_info(&pf->pdev->dev, "device will be reset\n");
4243                         set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
4244                         i40e_service_event_schedule(pf);
4245                 }
4246                 ena_mask &= ~icr0_remaining;
4247         }
4248         ret = IRQ_HANDLED;
4249
4250 enable_intr:
4251         /* re-enable interrupt causes */
4252         wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
4253         if (!test_bit(__I40E_DOWN, pf->state) ||
4254             test_bit(__I40E_RECOVERY_MODE, pf->state)) {
4255                 i40e_service_event_schedule(pf);
4256                 i40e_irq_dynamic_enable_icr0(pf);
4257         }
4258
4259         return ret;
4260 }
4261
4262 /**
4263  * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
4264  * @tx_ring:  tx ring to clean
4265  * @budget:   how many cleans we're allowed
4266  *
4267  * Returns true if there's any budget left (e.g. the clean is finished)
4268  **/
4269 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
4270 {
4271         struct i40e_vsi *vsi = tx_ring->vsi;
4272         u16 i = tx_ring->next_to_clean;
4273         struct i40e_tx_buffer *tx_buf;
4274         struct i40e_tx_desc *tx_desc;
4275
4276         tx_buf = &tx_ring->tx_bi[i];
4277         tx_desc = I40E_TX_DESC(tx_ring, i);
4278         i -= tx_ring->count;
4279
4280         do {
4281                 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
4282
4283                 /* if next_to_watch is not set then there is no work pending */
4284                 if (!eop_desc)
4285                         break;
4286
4287                 /* prevent any other reads prior to eop_desc */
4288                 smp_rmb();
4289
4290                 /* if the descriptor isn't done, no work yet to do */
4291                 if (!(eop_desc->cmd_type_offset_bsz &
4292                       cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
4293                         break;
4294
4295                 /* clear next_to_watch to prevent false hangs */
4296                 tx_buf->next_to_watch = NULL;
4297
4298                 tx_desc->buffer_addr = 0;
4299                 tx_desc->cmd_type_offset_bsz = 0;
4300                 /* move past filter desc */
4301                 tx_buf++;
4302                 tx_desc++;
4303                 i++;
4304                 if (unlikely(!i)) {
4305                         i -= tx_ring->count;
4306                         tx_buf = tx_ring->tx_bi;
4307                         tx_desc = I40E_TX_DESC(tx_ring, 0);
4308                 }
4309                 /* unmap skb header data */
4310                 dma_unmap_single(tx_ring->dev,
4311                                  dma_unmap_addr(tx_buf, dma),
4312                                  dma_unmap_len(tx_buf, len),
4313                                  DMA_TO_DEVICE);
4314                 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4315                         kfree(tx_buf->raw_buf);
4316
4317                 tx_buf->raw_buf = NULL;
4318                 tx_buf->tx_flags = 0;
4319                 tx_buf->next_to_watch = NULL;
4320                 dma_unmap_len_set(tx_buf, len, 0);
4321                 tx_desc->buffer_addr = 0;
4322                 tx_desc->cmd_type_offset_bsz = 0;
4323
4324                 /* move us past the eop_desc for start of next FD desc */
4325                 tx_buf++;
4326                 tx_desc++;
4327                 i++;
4328                 if (unlikely(!i)) {
4329                         i -= tx_ring->count;
4330                         tx_buf = tx_ring->tx_bi;
4331                         tx_desc = I40E_TX_DESC(tx_ring, 0);
4332                 }
4333
4334                 /* update budget accounting */
4335                 budget--;
4336         } while (likely(budget));
4337
4338         i += tx_ring->count;
4339         tx_ring->next_to_clean = i;
4340
4341         if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
4342                 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
4343
4344         return budget > 0;
4345 }
4346
4347 /**
4348  * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4349  * @irq: interrupt number
4350  * @data: pointer to a q_vector
4351  **/
4352 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4353 {
4354         struct i40e_q_vector *q_vector = data;
4355         struct i40e_vsi *vsi;
4356
4357         if (!q_vector->tx.ring)
4358                 return IRQ_HANDLED;
4359
4360         vsi = q_vector->tx.ring->vsi;
4361         i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
4362
4363         return IRQ_HANDLED;
4364 }
4365
4366 /**
4367  * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4368  * @vsi: the VSI being configured
4369  * @v_idx: vector index
4370  * @qp_idx: queue pair index
4371  **/
4372 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4373 {
4374         struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4375         struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4376         struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4377
4378         tx_ring->q_vector = q_vector;
4379         tx_ring->next = q_vector->tx.ring;
4380         q_vector->tx.ring = tx_ring;
4381         q_vector->tx.count++;
4382
4383         /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4384         if (i40e_enabled_xdp_vsi(vsi)) {
4385                 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4386
4387                 xdp_ring->q_vector = q_vector;
4388                 xdp_ring->next = q_vector->tx.ring;
4389                 q_vector->tx.ring = xdp_ring;
4390                 q_vector->tx.count++;
4391         }
4392
4393         rx_ring->q_vector = q_vector;
4394         rx_ring->next = q_vector->rx.ring;
4395         q_vector->rx.ring = rx_ring;
4396         q_vector->rx.count++;
4397 }
4398
4399 /**
4400  * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4401  * @vsi: the VSI being configured
4402  *
4403  * This function maps descriptor rings to the queue-specific vectors
4404  * we were allotted through the MSI-X enabling code.  Ideally, we'd have
4405  * one vector per queue pair, but on a constrained vector budget, we
4406  * group the queue pairs as "efficiently" as possible.
4407  **/
4408 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4409 {
4410         int qp_remaining = vsi->num_queue_pairs;
4411         int q_vectors = vsi->num_q_vectors;
4412         int num_ringpairs;
4413         int v_start = 0;
4414         int qp_idx = 0;
4415
4416         /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4417          * group them so there are multiple queues per vector.
4418          * It is also important to go through all the vectors available to be
4419          * sure that if we don't use all the vectors, that the remaining vectors
4420          * are cleared. This is especially important when decreasing the
4421          * number of queues in use.
4422          */
4423         for (; v_start < q_vectors; v_start++) {
4424                 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4425
4426                 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4427
4428                 q_vector->num_ringpairs = num_ringpairs;
4429                 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1;
4430
4431                 q_vector->rx.count = 0;
4432                 q_vector->tx.count = 0;
4433                 q_vector->rx.ring = NULL;
4434                 q_vector->tx.ring = NULL;
4435
4436                 while (num_ringpairs--) {
4437                         i40e_map_vector_to_qp(vsi, v_start, qp_idx);
4438                         qp_idx++;
4439                         qp_remaining--;
4440                 }
4441         }
4442 }
4443
4444 /**
4445  * i40e_vsi_request_irq - Request IRQ from the OS
4446  * @vsi: the VSI being configured
4447  * @basename: name for the vector
4448  **/
4449 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4450 {
4451         struct i40e_pf *pf = vsi->back;
4452         int err;
4453
4454         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4455                 err = i40e_vsi_request_irq_msix(vsi, basename);
4456         else if (pf->flags & I40E_FLAG_MSI_ENABLED)
4457                 err = request_irq(pf->pdev->irq, i40e_intr, 0,
4458                                   pf->int_name, pf);
4459         else
4460                 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4461                                   pf->int_name, pf);
4462
4463         if (err)
4464                 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4465
4466         return err;
4467 }
4468
4469 #ifdef CONFIG_NET_POLL_CONTROLLER
4470 /**
4471  * i40e_netpoll - A Polling 'interrupt' handler
4472  * @netdev: network interface device structure
4473  *
4474  * This is used by netconsole to send skbs without having to re-enable
4475  * interrupts.  It's not called while the normal interrupt routine is executing.
4476  **/
4477 static void i40e_netpoll(struct net_device *netdev)
4478 {
4479         struct i40e_netdev_priv *np = netdev_priv(netdev);
4480         struct i40e_vsi *vsi = np->vsi;
4481         struct i40e_pf *pf = vsi->back;
4482         int i;
4483
4484         /* if interface is down do nothing */
4485         if (test_bit(__I40E_VSI_DOWN, vsi->state))
4486                 return;
4487
4488         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4489                 for (i = 0; i < vsi->num_q_vectors; i++)
4490                         i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4491         } else {
4492                 i40e_intr(pf->pdev->irq, netdev);
4493         }
4494 }
4495 #endif
4496
4497 #define I40E_QTX_ENA_WAIT_COUNT 50
4498
4499 /**
4500  * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4501  * @pf: the PF being configured
4502  * @pf_q: the PF queue
4503  * @enable: enable or disable state of the queue
4504  *
4505  * This routine will wait for the given Tx queue of the PF to reach the
4506  * enabled or disabled state.
4507  * Returns -ETIMEDOUT in case of failing to reach the requested state after
4508  * multiple retries; else will return 0 in case of success.
4509  **/
4510 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4511 {
4512         int i;
4513         u32 tx_reg;
4514
4515         for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4516                 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4517                 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4518                         break;
4519
4520                 usleep_range(10, 20);
4521         }
4522         if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4523                 return -ETIMEDOUT;
4524
4525         return 0;
4526 }
4527
4528 /**
4529  * i40e_control_tx_q - Start or stop a particular Tx queue
4530  * @pf: the PF structure
4531  * @pf_q: the PF queue to configure
4532  * @enable: start or stop the queue
4533  *
4534  * This function enables or disables a single queue. Note that any delay
4535  * required after the operation is expected to be handled by the caller of
4536  * this function.
4537  **/
4538 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4539 {
4540         struct i40e_hw *hw = &pf->hw;
4541         u32 tx_reg;
4542         int i;
4543
4544         /* warn the TX unit of coming changes */
4545         i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4546         if (!enable)
4547                 usleep_range(10, 20);
4548
4549         for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4550                 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4551                 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4552                     ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4553                         break;
4554                 usleep_range(1000, 2000);
4555         }
4556
4557         /* Skip if the queue is already in the requested state */
4558         if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4559                 return;
4560
4561         /* turn on/off the queue */
4562         if (enable) {
4563                 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4564                 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4565         } else {
4566                 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4567         }
4568
4569         wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4570 }
4571
4572 /**
4573  * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4574  * @seid: VSI SEID
4575  * @pf: the PF structure
4576  * @pf_q: the PF queue to configure
4577  * @is_xdp: true if the queue is used for XDP
4578  * @enable: start or stop the queue
4579  **/
4580 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4581                            bool is_xdp, bool enable)
4582 {
4583         int ret;
4584
4585         i40e_control_tx_q(pf, pf_q, enable);
4586
4587         /* wait for the change to finish */
4588         ret = i40e_pf_txq_wait(pf, pf_q, enable);
4589         if (ret) {
4590                 dev_info(&pf->pdev->dev,
4591                          "VSI seid %d %sTx ring %d %sable timeout\n",
4592                          seid, (is_xdp ? "XDP " : ""), pf_q,
4593                          (enable ? "en" : "dis"));
4594         }
4595
4596         return ret;
4597 }
4598
4599 /**
4600  * i40e_vsi_enable_tx - Start a VSI's rings
4601  * @vsi: the VSI being configured
4602  **/
4603 static int i40e_vsi_enable_tx(struct i40e_vsi *vsi)
4604 {
4605         struct i40e_pf *pf = vsi->back;
4606         int i, pf_q, ret = 0;
4607
4608         pf_q = vsi->base_queue;
4609         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4610                 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4611                                              pf_q,
4612                                              false /*is xdp*/, true);
4613                 if (ret)
4614                         break;
4615
4616                 if (!i40e_enabled_xdp_vsi(vsi))
4617                         continue;
4618
4619                 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4620                                              pf_q + vsi->alloc_queue_pairs,
4621                                              true /*is xdp*/, true);
4622                 if (ret)
4623                         break;
4624         }
4625         return ret;
4626 }
4627
4628 /**
4629  * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4630  * @pf: the PF being configured
4631  * @pf_q: the PF queue
4632  * @enable: enable or disable state of the queue
4633  *
4634  * This routine will wait for the given Rx queue of the PF to reach the
4635  * enabled or disabled state.
4636  * Returns -ETIMEDOUT in case of failing to reach the requested state after
4637  * multiple retries; else will return 0 in case of success.
4638  **/
4639 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4640 {
4641         int i;
4642         u32 rx_reg;
4643
4644         for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4645                 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4646                 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4647                         break;
4648
4649                 usleep_range(10, 20);
4650         }
4651         if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4652                 return -ETIMEDOUT;
4653
4654         return 0;
4655 }
4656
4657 /**
4658  * i40e_control_rx_q - Start or stop a particular Rx queue
4659  * @pf: the PF structure
4660  * @pf_q: the PF queue to configure
4661  * @enable: start or stop the queue
4662  *
4663  * This function enables or disables a single queue. Note that
4664  * any delay required after the operation is expected to be
4665  * handled by the caller of this function.
4666  **/
4667 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4668 {
4669         struct i40e_hw *hw = &pf->hw;
4670         u32 rx_reg;
4671         int i;
4672
4673         for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4674                 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4675                 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4676                     ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4677                         break;
4678                 usleep_range(1000, 2000);
4679         }
4680
4681         /* Skip if the queue is already in the requested state */
4682         if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4683                 return;
4684
4685         /* turn on/off the queue */
4686         if (enable)
4687                 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4688         else
4689                 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4690
4691         wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4692 }
4693
4694 /**
4695  * i40e_control_wait_rx_q
4696  * @pf: the PF structure
4697  * @pf_q: queue being configured
4698  * @enable: start or stop the rings
4699  *
4700  * This function enables or disables a single queue along with waiting
4701  * for the change to finish. The caller of this function should handle
4702  * the delays needed in the case of disabling queues.
4703  **/
4704 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4705 {
4706         int ret = 0;
4707
4708         i40e_control_rx_q(pf, pf_q, enable);
4709
4710         /* wait for the change to finish */
4711         ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4712         if (ret)
4713                 return ret;
4714
4715         return ret;
4716 }
4717
4718 /**
4719  * i40e_vsi_enable_rx - Start a VSI's rings
4720  * @vsi: the VSI being configured
4721  **/
4722 static int i40e_vsi_enable_rx(struct i40e_vsi *vsi)
4723 {
4724         struct i40e_pf *pf = vsi->back;
4725         int i, pf_q, ret = 0;
4726
4727         pf_q = vsi->base_queue;
4728         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4729                 ret = i40e_control_wait_rx_q(pf, pf_q, true);
4730                 if (ret) {
4731                         dev_info(&pf->pdev->dev,
4732                                  "VSI seid %d Rx ring %d enable timeout\n",
4733                                  vsi->seid, pf_q);
4734                         break;
4735                 }
4736         }
4737
4738         return ret;
4739 }
4740
4741 /**
4742  * i40e_vsi_start_rings - Start a VSI's rings
4743  * @vsi: the VSI being configured
4744  **/
4745 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4746 {
4747         int ret = 0;
4748
4749         /* do rx first for enable and last for disable */
4750         ret = i40e_vsi_enable_rx(vsi);
4751         if (ret)
4752                 return ret;
4753         ret = i40e_vsi_enable_tx(vsi);
4754
4755         return ret;
4756 }
4757
4758 #define I40E_DISABLE_TX_GAP_MSEC        50
4759
4760 /**
4761  * i40e_vsi_stop_rings - Stop a VSI's rings
4762  * @vsi: the VSI being configured
4763  **/
4764 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4765 {
4766         struct i40e_pf *pf = vsi->back;
4767         int pf_q, err, q_end;
4768
4769         /* When port TX is suspended, don't wait */
4770         if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4771                 return i40e_vsi_stop_rings_no_wait(vsi);
4772
4773         q_end = vsi->base_queue + vsi->num_queue_pairs;
4774         for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4775                 i40e_pre_tx_queue_cfg(&pf->hw, (u32)pf_q, false);
4776
4777         for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++) {
4778                 err = i40e_control_wait_rx_q(pf, pf_q, false);
4779                 if (err)
4780                         dev_info(&pf->pdev->dev,
4781                                  "VSI seid %d Rx ring %d disable timeout\n",
4782                                  vsi->seid, pf_q);
4783         }
4784
4785         msleep(I40E_DISABLE_TX_GAP_MSEC);
4786         pf_q = vsi->base_queue;
4787         for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4788                 wr32(&pf->hw, I40E_QTX_ENA(pf_q), 0);
4789
4790         i40e_vsi_wait_queues_disabled(vsi);
4791 }
4792
4793 /**
4794  * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4795  * @vsi: the VSI being shutdown
4796  *
4797  * This function stops all the rings for a VSI but does not delay to verify
4798  * that rings have been disabled. It is expected that the caller is shutting
4799  * down multiple VSIs at once and will delay together for all the VSIs after
4800  * initiating the shutdown. This is particularly useful for shutting down lots
4801  * of VFs together. Otherwise, a large delay can be incurred while configuring
4802  * each VSI in serial.
4803  **/
4804 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4805 {
4806         struct i40e_pf *pf = vsi->back;
4807         int i, pf_q;
4808
4809         pf_q = vsi->base_queue;
4810         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4811                 i40e_control_tx_q(pf, pf_q, false);
4812                 i40e_control_rx_q(pf, pf_q, false);
4813         }
4814 }
4815
4816 /**
4817  * i40e_vsi_free_irq - Free the irq association with the OS
4818  * @vsi: the VSI being configured
4819  **/
4820 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4821 {
4822         struct i40e_pf *pf = vsi->back;
4823         struct i40e_hw *hw = &pf->hw;
4824         int base = vsi->base_vector;
4825         u32 val, qp;
4826         int i;
4827
4828         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4829                 if (!vsi->q_vectors)
4830                         return;
4831
4832                 if (!vsi->irqs_ready)
4833                         return;
4834
4835                 vsi->irqs_ready = false;
4836                 for (i = 0; i < vsi->num_q_vectors; i++) {
4837                         int irq_num;
4838                         u16 vector;
4839
4840                         vector = i + base;
4841                         irq_num = pf->msix_entries[vector].vector;
4842
4843                         /* free only the irqs that were actually requested */
4844                         if (!vsi->q_vectors[i] ||
4845                             !vsi->q_vectors[i]->num_ringpairs)
4846                                 continue;
4847
4848                         /* clear the affinity notifier in the IRQ descriptor */
4849                         irq_set_affinity_notifier(irq_num, NULL);
4850                         /* remove our suggested affinity mask for this IRQ */
4851                         irq_update_affinity_hint(irq_num, NULL);
4852                         synchronize_irq(irq_num);
4853                         free_irq(irq_num, vsi->q_vectors[i]);
4854
4855                         /* Tear down the interrupt queue link list
4856                          *
4857                          * We know that they come in pairs and always
4858                          * the Rx first, then the Tx.  To clear the
4859                          * link list, stick the EOL value into the
4860                          * next_q field of the registers.
4861                          */
4862                         val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4863                         qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4864                                 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4865                         val |= I40E_QUEUE_END_OF_LIST
4866                                 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4867                         wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4868
4869                         while (qp != I40E_QUEUE_END_OF_LIST) {
4870                                 u32 next;
4871
4872                                 val = rd32(hw, I40E_QINT_RQCTL(qp));
4873
4874                                 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK  |
4875                                          I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4876                                          I40E_QINT_RQCTL_CAUSE_ENA_MASK  |
4877                                          I40E_QINT_RQCTL_INTEVENT_MASK);
4878
4879                                 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4880                                          I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4881
4882                                 wr32(hw, I40E_QINT_RQCTL(qp), val);
4883
4884                                 val = rd32(hw, I40E_QINT_TQCTL(qp));
4885
4886                                 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4887                                         >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4888
4889                                 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK  |
4890                                          I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4891                                          I40E_QINT_TQCTL_CAUSE_ENA_MASK  |
4892                                          I40E_QINT_TQCTL_INTEVENT_MASK);
4893
4894                                 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4895                                          I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4896
4897                                 wr32(hw, I40E_QINT_TQCTL(qp), val);
4898                                 qp = next;
4899                         }
4900                 }
4901         } else {
4902                 free_irq(pf->pdev->irq, pf);
4903
4904                 val = rd32(hw, I40E_PFINT_LNKLST0);
4905                 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4906                         >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4907                 val |= I40E_QUEUE_END_OF_LIST
4908                         << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4909                 wr32(hw, I40E_PFINT_LNKLST0, val);
4910
4911                 val = rd32(hw, I40E_QINT_RQCTL(qp));
4912                 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK  |
4913                          I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4914                          I40E_QINT_RQCTL_CAUSE_ENA_MASK  |
4915                          I40E_QINT_RQCTL_INTEVENT_MASK);
4916
4917                 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4918                         I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4919
4920                 wr32(hw, I40E_QINT_RQCTL(qp), val);
4921
4922                 val = rd32(hw, I40E_QINT_TQCTL(qp));
4923
4924                 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK  |
4925                          I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4926                          I40E_QINT_TQCTL_CAUSE_ENA_MASK  |
4927                          I40E_QINT_TQCTL_INTEVENT_MASK);
4928
4929                 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4930                         I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4931
4932                 wr32(hw, I40E_QINT_TQCTL(qp), val);
4933         }
4934 }
4935
4936 /**
4937  * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4938  * @vsi: the VSI being configured
4939  * @v_idx: Index of vector to be freed
4940  *
4941  * This function frees the memory allocated to the q_vector.  In addition if
4942  * NAPI is enabled it will delete any references to the NAPI struct prior
4943  * to freeing the q_vector.
4944  **/
4945 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4946 {
4947         struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4948         struct i40e_ring *ring;
4949
4950         if (!q_vector)
4951                 return;
4952
4953         /* disassociate q_vector from rings */
4954         i40e_for_each_ring(ring, q_vector->tx)
4955                 ring->q_vector = NULL;
4956
4957         i40e_for_each_ring(ring, q_vector->rx)
4958                 ring->q_vector = NULL;
4959
4960         /* only VSI w/ an associated netdev is set up w/ NAPI */
4961         if (vsi->netdev)
4962                 netif_napi_del(&q_vector->napi);
4963
4964         vsi->q_vectors[v_idx] = NULL;
4965
4966         kfree_rcu(q_vector, rcu);
4967 }
4968
4969 /**
4970  * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4971  * @vsi: the VSI being un-configured
4972  *
4973  * This frees the memory allocated to the q_vectors and
4974  * deletes references to the NAPI struct.
4975  **/
4976 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4977 {
4978         int v_idx;
4979
4980         for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4981                 i40e_free_q_vector(vsi, v_idx);
4982 }
4983
4984 /**
4985  * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4986  * @pf: board private structure
4987  **/
4988 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4989 {
4990         /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4991         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4992                 pci_disable_msix(pf->pdev);
4993                 kfree(pf->msix_entries);
4994                 pf->msix_entries = NULL;
4995                 kfree(pf->irq_pile);
4996                 pf->irq_pile = NULL;
4997         } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4998                 pci_disable_msi(pf->pdev);
4999         }
5000         pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
5001 }
5002
5003 /**
5004  * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
5005  * @pf: board private structure
5006  *
5007  * We go through and clear interrupt specific resources and reset the structure
5008  * to pre-load conditions
5009  **/
5010 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
5011 {
5012         int i;
5013
5014         if (test_bit(__I40E_MISC_IRQ_REQUESTED, pf->state))
5015                 i40e_free_misc_vector(pf);
5016
5017         i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
5018                       I40E_IWARP_IRQ_PILE_ID);
5019
5020         i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
5021         for (i = 0; i < pf->num_alloc_vsi; i++)
5022                 if (pf->vsi[i])
5023                         i40e_vsi_free_q_vectors(pf->vsi[i]);
5024         i40e_reset_interrupt_capability(pf);
5025 }
5026
5027 /**
5028  * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
5029  * @vsi: the VSI being configured
5030  **/
5031 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
5032 {
5033         int q_idx;
5034
5035         if (!vsi->netdev)
5036                 return;
5037
5038         for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5039                 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5040
5041                 if (q_vector->rx.ring || q_vector->tx.ring)
5042                         napi_enable(&q_vector->napi);
5043         }
5044 }
5045
5046 /**
5047  * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
5048  * @vsi: the VSI being configured
5049  **/
5050 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
5051 {
5052         int q_idx;
5053
5054         if (!vsi->netdev)
5055                 return;
5056
5057         for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5058                 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5059
5060                 if (q_vector->rx.ring || q_vector->tx.ring)
5061                         napi_disable(&q_vector->napi);
5062         }
5063 }
5064
5065 /**
5066  * i40e_vsi_close - Shut down a VSI
5067  * @vsi: the vsi to be quelled
5068  **/
5069 static void i40e_vsi_close(struct i40e_vsi *vsi)
5070 {
5071         struct i40e_pf *pf = vsi->back;
5072         if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state))
5073                 i40e_down(vsi);
5074         i40e_vsi_free_irq(vsi);
5075         i40e_vsi_free_tx_resources(vsi);
5076         i40e_vsi_free_rx_resources(vsi);
5077         vsi->current_netdev_flags = 0;
5078         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
5079         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
5080                 set_bit(__I40E_CLIENT_RESET, pf->state);
5081 }
5082
5083 /**
5084  * i40e_quiesce_vsi - Pause a given VSI
5085  * @vsi: the VSI being paused
5086  **/
5087 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
5088 {
5089         if (test_bit(__I40E_VSI_DOWN, vsi->state))
5090                 return;
5091
5092         set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state);
5093         if (vsi->netdev && netif_running(vsi->netdev))
5094                 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
5095         else
5096                 i40e_vsi_close(vsi);
5097 }
5098
5099 /**
5100  * i40e_unquiesce_vsi - Resume a given VSI
5101  * @vsi: the VSI being resumed
5102  **/
5103 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
5104 {
5105         if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state))
5106                 return;
5107
5108         if (vsi->netdev && netif_running(vsi->netdev))
5109                 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
5110         else
5111                 i40e_vsi_open(vsi);   /* this clears the DOWN bit */
5112 }
5113
5114 /**
5115  * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
5116  * @pf: the PF
5117  **/
5118 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
5119 {
5120         int v;
5121
5122         for (v = 0; v < pf->num_alloc_vsi; v++) {
5123                 if (pf->vsi[v])
5124                         i40e_quiesce_vsi(pf->vsi[v]);
5125         }
5126 }
5127
5128 /**
5129  * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
5130  * @pf: the PF
5131  **/
5132 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
5133 {
5134         int v;
5135
5136         for (v = 0; v < pf->num_alloc_vsi; v++) {
5137                 if (pf->vsi[v])
5138                         i40e_unquiesce_vsi(pf->vsi[v]);
5139         }
5140 }
5141
5142 /**
5143  * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
5144  * @vsi: the VSI being configured
5145  *
5146  * Wait until all queues on a given VSI have been disabled.
5147  **/
5148 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
5149 {
5150         struct i40e_pf *pf = vsi->back;
5151         int i, pf_q, ret;
5152
5153         pf_q = vsi->base_queue;
5154         for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
5155                 /* Check and wait for the Tx queue */
5156                 ret = i40e_pf_txq_wait(pf, pf_q, false);
5157                 if (ret) {
5158                         dev_info(&pf->pdev->dev,
5159                                  "VSI seid %d Tx ring %d disable timeout\n",
5160                                  vsi->seid, pf_q);
5161                         return ret;
5162                 }
5163
5164                 if (!i40e_enabled_xdp_vsi(vsi))
5165                         goto wait_rx;
5166
5167                 /* Check and wait for the XDP Tx queue */
5168                 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
5169                                        false);
5170                 if (ret) {
5171                         dev_info(&pf->pdev->dev,
5172                                  "VSI seid %d XDP Tx ring %d disable timeout\n",
5173                                  vsi->seid, pf_q);
5174                         return ret;
5175                 }
5176 wait_rx:
5177                 /* Check and wait for the Rx queue */
5178                 ret = i40e_pf_rxq_wait(pf, pf_q, false);
5179                 if (ret) {
5180                         dev_info(&pf->pdev->dev,
5181                                  "VSI seid %d Rx ring %d disable timeout\n",
5182                                  vsi->seid, pf_q);
5183                         return ret;
5184                 }
5185         }
5186
5187         return 0;
5188 }
5189
5190 #ifdef CONFIG_I40E_DCB
5191 /**
5192  * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
5193  * @pf: the PF
5194  *
5195  * This function waits for the queues to be in disabled state for all the
5196  * VSIs that are managed by this PF.
5197  **/
5198 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
5199 {
5200         int v, ret = 0;
5201
5202         for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5203                 if (pf->vsi[v]) {
5204                         ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
5205                         if (ret)
5206                                 break;
5207                 }
5208         }
5209
5210         return ret;
5211 }
5212
5213 #endif
5214
5215 /**
5216  * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
5217  * @pf: pointer to PF
5218  *
5219  * Get TC map for ISCSI PF type that will include iSCSI TC
5220  * and LAN TC.
5221  **/
5222 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
5223 {
5224         struct i40e_dcb_app_priority_table app;
5225         struct i40e_hw *hw = &pf->hw;
5226         u8 enabled_tc = 1; /* TC0 is always enabled */
5227         u8 tc, i;
5228         /* Get the iSCSI APP TLV */
5229         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5230
5231         for (i = 0; i < dcbcfg->numapps; i++) {
5232                 app = dcbcfg->app[i];
5233                 if (app.selector == I40E_APP_SEL_TCPIP &&
5234                     app.protocolid == I40E_APP_PROTOID_ISCSI) {
5235                         tc = dcbcfg->etscfg.prioritytable[app.priority];
5236                         enabled_tc |= BIT(tc);
5237                         break;
5238                 }
5239         }
5240
5241         return enabled_tc;
5242 }
5243
5244 /**
5245  * i40e_dcb_get_num_tc -  Get the number of TCs from DCBx config
5246  * @dcbcfg: the corresponding DCBx configuration structure
5247  *
5248  * Return the number of TCs from given DCBx configuration
5249  **/
5250 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
5251 {
5252         int i, tc_unused = 0;
5253         u8 num_tc = 0;
5254         u8 ret = 0;
5255
5256         /* Scan the ETS Config Priority Table to find
5257          * traffic class enabled for a given priority
5258          * and create a bitmask of enabled TCs
5259          */
5260         for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5261                 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
5262
5263         /* Now scan the bitmask to check for
5264          * contiguous TCs starting with TC0
5265          */
5266         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5267                 if (num_tc & BIT(i)) {
5268                         if (!tc_unused) {
5269                                 ret++;
5270                         } else {
5271                                 pr_err("Non-contiguous TC - Disabling DCB\n");
5272                                 return 1;
5273                         }
5274                 } else {
5275                         tc_unused = 1;
5276                 }
5277         }
5278
5279         /* There is always at least TC0 */
5280         if (!ret)
5281                 ret = 1;
5282
5283         return ret;
5284 }
5285
5286 /**
5287  * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5288  * @dcbcfg: the corresponding DCBx configuration structure
5289  *
5290  * Query the current DCB configuration and return the number of
5291  * traffic classes enabled from the given DCBX config
5292  **/
5293 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5294 {
5295         u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5296         u8 enabled_tc = 1;
5297         u8 i;
5298
5299         for (i = 0; i < num_tc; i++)
5300                 enabled_tc |= BIT(i);
5301
5302         return enabled_tc;
5303 }
5304
5305 /**
5306  * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5307  * @pf: PF being queried
5308  *
5309  * Query the current MQPRIO configuration and return the number of
5310  * traffic classes enabled.
5311  **/
5312 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5313 {
5314         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5315         u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5316         u8 enabled_tc = 1, i;
5317
5318         for (i = 1; i < num_tc; i++)
5319                 enabled_tc |= BIT(i);
5320         return enabled_tc;
5321 }
5322
5323 /**
5324  * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5325  * @pf: PF being queried
5326  *
5327  * Return number of traffic classes enabled for the given PF
5328  **/
5329 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5330 {
5331         struct i40e_hw *hw = &pf->hw;
5332         u8 i, enabled_tc = 1;
5333         u8 num_tc = 0;
5334         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5335
5336         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5337                 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;
5338
5339         /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5340         if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5341                 return 1;
5342
5343         /* SFP mode will be enabled for all TCs on port */
5344         if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5345                 return i40e_dcb_get_num_tc(dcbcfg);
5346
5347         /* MFP mode return count of enabled TCs for this PF */
5348         if (pf->hw.func_caps.iscsi)
5349                 enabled_tc =  i40e_get_iscsi_tc_map(pf);
5350         else
5351                 return 1; /* Only TC0 */
5352
5353         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5354                 if (enabled_tc & BIT(i))
5355                         num_tc++;
5356         }
5357         return num_tc;
5358 }
5359
5360 /**
5361  * i40e_pf_get_tc_map - Get bitmap for enabled traffic classes
5362  * @pf: PF being queried
5363  *
5364  * Return a bitmap for enabled traffic classes for this PF.
5365  **/
5366 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5367 {
5368         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5369                 return i40e_mqprio_get_enabled_tc(pf);
5370
5371         /* If neither MQPRIO nor DCB is enabled for this PF then just return
5372          * default TC
5373          */
5374         if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5375                 return I40E_DEFAULT_TRAFFIC_CLASS;
5376
5377         /* SFP mode we want PF to be enabled for all TCs */
5378         if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5379                 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5380
5381         /* MFP enabled and iSCSI PF type */
5382         if (pf->hw.func_caps.iscsi)
5383                 return i40e_get_iscsi_tc_map(pf);
5384         else
5385                 return I40E_DEFAULT_TRAFFIC_CLASS;
5386 }
5387
5388 /**
5389  * i40e_vsi_get_bw_info - Query VSI BW Information
5390  * @vsi: the VSI being queried
5391  *
5392  * Returns 0 on success, negative value on failure
5393  **/
5394 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5395 {
5396         struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5397         struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5398         struct i40e_pf *pf = vsi->back;
5399         struct i40e_hw *hw = &pf->hw;
5400         i40e_status ret;
5401         u32 tc_bw_max;
5402         int i;
5403
5404         /* Get the VSI level BW configuration */
5405         ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
5406         if (ret) {
5407                 dev_info(&pf->pdev->dev,
5408                          "couldn't get PF vsi bw config, err %s aq_err %s\n",
5409                          i40e_stat_str(&pf->hw, ret),
5410                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5411                 return -EINVAL;
5412         }
5413
5414         /* Get the VSI level BW configuration per TC */
5415         ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
5416                                                NULL);
5417         if (ret) {
5418                 dev_info(&pf->pdev->dev,
5419                          "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
5420                          i40e_stat_str(&pf->hw, ret),
5421                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5422                 return -EINVAL;
5423         }
5424
5425         if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5426                 dev_info(&pf->pdev->dev,
5427                          "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5428                          bw_config.tc_valid_bits,
5429                          bw_ets_config.tc_valid_bits);
5430                 /* Still continuing */
5431         }
5432
5433         vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5434         vsi->bw_max_quanta = bw_config.max_bw;
5435         tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5436                     (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5437         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5438                 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5439                 vsi->bw_ets_limit_credits[i] =
5440                                         le16_to_cpu(bw_ets_config.credits[i]);
5441                 /* 3 bits out of 4 for each TC */
5442                 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5443         }
5444
5445         return 0;
5446 }
5447
5448 /**
5449  * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5450  * @vsi: the VSI being configured
5451  * @enabled_tc: TC bitmap
5452  * @bw_share: BW shared credits per TC
5453  *
5454  * Returns 0 on success, negative value on failure
5455  **/
5456 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5457                                        u8 *bw_share)
5458 {
5459         struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5460         struct i40e_pf *pf = vsi->back;
5461         i40e_status ret;
5462         int i;
5463
5464         /* There is no need to reset BW when mqprio mode is on.  */
5465         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5466                 return 0;
5467         if (!vsi->mqprio_qopt.qopt.hw && !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5468                 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5469                 if (ret)
5470                         dev_info(&pf->pdev->dev,
5471                                  "Failed to reset tx rate for vsi->seid %u\n",
5472                                  vsi->seid);
5473                 return ret;
5474         }
5475         memset(&bw_data, 0, sizeof(bw_data));
5476         bw_data.tc_valid_bits = enabled_tc;
5477         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5478                 bw_data.tc_bw_credits[i] = bw_share[i];
5479
5480         ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL);
5481         if (ret) {
5482                 dev_info(&pf->pdev->dev,
5483                          "AQ command Config VSI BW allocation per TC failed = %d\n",
5484                          pf->hw.aq.asq_last_status);
5485                 return -EINVAL;
5486         }
5487
5488         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5489                 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5490
5491         return 0;
5492 }
5493
5494 /**
5495  * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5496  * @vsi: the VSI being configured
5497  * @enabled_tc: TC map to be enabled
5498  *
5499  **/
5500 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5501 {
5502         struct net_device *netdev = vsi->netdev;
5503         struct i40e_pf *pf = vsi->back;
5504         struct i40e_hw *hw = &pf->hw;
5505         u8 netdev_tc = 0;
5506         int i;
5507         struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5508
5509         if (!netdev)
5510                 return;
5511
5512         if (!enabled_tc) {
5513                 netdev_reset_tc(netdev);
5514                 return;
5515         }
5516
5517         /* Set up actual enabled TCs on the VSI */
5518         if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5519                 return;
5520
5521         /* set per TC queues for the VSI */
5522         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5523                 /* Only set TC queues for enabled tcs
5524                  *
5525                  * e.g. For a VSI that has TC0 and TC3 enabled the
5526                  * enabled_tc bitmap would be 0x00001001; the driver
5527                  * will set the numtc for netdev as 2 that will be
5528                  * referenced by the netdev layer as TC 0 and 1.
5529                  */
5530                 if (vsi->tc_config.enabled_tc & BIT(i))
5531                         netdev_set_tc_queue(netdev,
5532                                         vsi->tc_config.tc_info[i].netdev_tc,
5533                                         vsi->tc_config.tc_info[i].qcount,
5534                                         vsi->tc_config.tc_info[i].qoffset);
5535         }
5536
5537         if (pf->flags & I40E_FLAG_TC_MQPRIO)
5538                 return;
5539
5540         /* Assign UP2TC map for the VSI */
5541         for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5542                 /* Get the actual TC# for the UP */
5543                 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5544                 /* Get the mapped netdev TC# for the UP */
5545                 netdev_tc =  vsi->tc_config.tc_info[ets_tc].netdev_tc;
5546                 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5547         }
5548 }
5549
5550 /**
5551  * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5552  * @vsi: the VSI being configured
5553  * @ctxt: the ctxt buffer returned from AQ VSI update param command
5554  **/
5555 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5556                                       struct i40e_vsi_context *ctxt)
5557 {
5558         /* copy just the sections touched not the entire info
5559          * since not all sections are valid as returned by
5560          * update vsi params
5561          */
5562         vsi->info.mapping_flags = ctxt->info.mapping_flags;
5563         memcpy(&vsi->info.queue_mapping,
5564                &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5565         memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5566                sizeof(vsi->info.tc_mapping));
5567 }
5568
5569 /**
5570  * i40e_update_adq_vsi_queues - update queue mapping for ADq VSI
5571  * @vsi: the VSI being reconfigured
5572  * @vsi_offset: offset from main VF VSI
5573  */
5574 int i40e_update_adq_vsi_queues(struct i40e_vsi *vsi, int vsi_offset)
5575 {
5576         struct i40e_vsi_context ctxt = {};
5577         struct i40e_pf *pf;
5578         struct i40e_hw *hw;
5579         int ret;
5580
5581         if (!vsi)
5582                 return I40E_ERR_PARAM;
5583         pf = vsi->back;
5584         hw = &pf->hw;
5585
5586         ctxt.seid = vsi->seid;
5587         ctxt.pf_num = hw->pf_id;
5588         ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id + vsi_offset;
5589         ctxt.uplink_seid = vsi->uplink_seid;
5590         ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5591         ctxt.flags = I40E_AQ_VSI_TYPE_VF;
5592         ctxt.info = vsi->info;
5593
5594         i40e_vsi_setup_queue_map(vsi, &ctxt, vsi->tc_config.enabled_tc,
5595                                  false);
5596         if (vsi->reconfig_rss) {
5597                 vsi->rss_size = min_t(int, pf->alloc_rss_size,
5598                                       vsi->num_queue_pairs);
5599                 ret = i40e_vsi_config_rss(vsi);
5600                 if (ret) {
5601                         dev_info(&pf->pdev->dev, "Failed to reconfig rss for num_queues\n");
5602                         return ret;
5603                 }
5604                 vsi->reconfig_rss = false;
5605         }
5606
5607         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5608         if (ret) {
5609                 dev_info(&pf->pdev->dev, "Update vsi config failed, err %s aq_err %s\n",
5610                          i40e_stat_str(hw, ret),
5611                          i40e_aq_str(hw, hw->aq.asq_last_status));
5612                 return ret;
5613         }
5614         /* update the local VSI info with updated queue map */
5615         i40e_vsi_update_queue_map(vsi, &ctxt);
5616         vsi->info.valid_sections = 0;
5617
5618         return ret;
5619 }
5620
5621 /**
5622  * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5623  * @vsi: VSI to be configured
5624  * @enabled_tc: TC bitmap
5625  *
5626  * This configures a particular VSI for TCs that are mapped to the
5627  * given TC bitmap. It uses default bandwidth share for TCs across
5628  * VSIs to configure TC for a particular VSI.
5629  *
5630  * NOTE:
5631  * It is expected that the VSI queues have been quisced before calling
5632  * this function.
5633  **/
5634 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5635 {
5636         u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5637         struct i40e_pf *pf = vsi->back;
5638         struct i40e_hw *hw = &pf->hw;
5639         struct i40e_vsi_context ctxt;
5640         int ret = 0;
5641         int i;
5642
5643         /* Check if enabled_tc is same as existing or new TCs */
5644         if (vsi->tc_config.enabled_tc == enabled_tc &&
5645             vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5646                 return ret;
5647
5648         /* Enable ETS TCs with equal BW Share for now across all VSIs */
5649         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5650                 if (enabled_tc & BIT(i))
5651                         bw_share[i] = 1;
5652         }
5653
5654         ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5655         if (ret) {
5656                 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5657
5658                 dev_info(&pf->pdev->dev,
5659                          "Failed configuring TC map %d for VSI %d\n",
5660                          enabled_tc, vsi->seid);
5661                 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid,
5662                                                   &bw_config, NULL);
5663                 if (ret) {
5664                         dev_info(&pf->pdev->dev,
5665                                  "Failed querying vsi bw info, err %s aq_err %s\n",
5666                                  i40e_stat_str(hw, ret),
5667                                  i40e_aq_str(hw, hw->aq.asq_last_status));
5668                         goto out;
5669                 }
5670                 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) {
5671                         u8 valid_tc = bw_config.tc_valid_bits & enabled_tc;
5672
5673                         if (!valid_tc)
5674                                 valid_tc = bw_config.tc_valid_bits;
5675                         /* Always enable TC0, no matter what */
5676                         valid_tc |= 1;
5677                         dev_info(&pf->pdev->dev,
5678                                  "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5679                                  enabled_tc, bw_config.tc_valid_bits, valid_tc);
5680                         enabled_tc = valid_tc;
5681                 }
5682
5683                 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5684                 if (ret) {
5685                         dev_err(&pf->pdev->dev,
5686                                 "Unable to  configure TC map %d for VSI %d\n",
5687                                 enabled_tc, vsi->seid);
5688                         goto out;
5689                 }
5690         }
5691
5692         /* Update Queue Pairs Mapping for currently enabled UPs */
5693         ctxt.seid = vsi->seid;
5694         ctxt.pf_num = vsi->back->hw.pf_id;
5695         ctxt.vf_num = 0;
5696         ctxt.uplink_seid = vsi->uplink_seid;
5697         ctxt.info = vsi->info;
5698         if (vsi->back->flags & I40E_FLAG_TC_MQPRIO) {
5699                 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);
5700                 if (ret)
5701                         goto out;
5702         } else {
5703                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5704         }
5705
5706         /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5707          * queues changed.
5708          */
5709         if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5710                 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5711                                       vsi->num_queue_pairs);
5712                 ret = i40e_vsi_config_rss(vsi);
5713                 if (ret) {
5714                         dev_info(&vsi->back->pdev->dev,
5715                                  "Failed to reconfig rss for num_queues\n");
5716                         return ret;
5717                 }
5718                 vsi->reconfig_rss = false;
5719         }
5720         if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5721                 ctxt.info.valid_sections |=
5722                                 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5723                 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5724         }
5725
5726         /* Update the VSI after updating the VSI queue-mapping
5727          * information
5728          */
5729         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5730         if (ret) {
5731                 dev_info(&pf->pdev->dev,
5732                          "Update vsi tc config failed, err %s aq_err %s\n",
5733                          i40e_stat_str(hw, ret),
5734                          i40e_aq_str(hw, hw->aq.asq_last_status));
5735                 goto out;
5736         }
5737         /* update the local VSI info with updated queue map */
5738         i40e_vsi_update_queue_map(vsi, &ctxt);
5739         vsi->info.valid_sections = 0;
5740
5741         /* Update current VSI BW information */
5742         ret = i40e_vsi_get_bw_info(vsi);
5743         if (ret) {
5744                 dev_info(&pf->pdev->dev,
5745                          "Failed updating vsi bw info, err %s aq_err %s\n",
5746                          i40e_stat_str(hw, ret),
5747                          i40e_aq_str(hw, hw->aq.asq_last_status));
5748                 goto out;
5749         }
5750
5751         /* Update the netdev TC setup */
5752         i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5753 out:
5754         return ret;
5755 }
5756
5757 /**
5758  * i40e_get_link_speed - Returns link speed for the interface
5759  * @vsi: VSI to be configured
5760  *
5761  **/
5762 static int i40e_get_link_speed(struct i40e_vsi *vsi)
5763 {
5764         struct i40e_pf *pf = vsi->back;
5765
5766         switch (pf->hw.phy.link_info.link_speed) {
5767         case I40E_LINK_SPEED_40GB:
5768                 return 40000;
5769         case I40E_LINK_SPEED_25GB:
5770                 return 25000;
5771         case I40E_LINK_SPEED_20GB:
5772                 return 20000;
5773         case I40E_LINK_SPEED_10GB:
5774                 return 10000;
5775         case I40E_LINK_SPEED_1GB:
5776                 return 1000;
5777         default:
5778                 return -EINVAL;
5779         }
5780 }
5781
5782 /**
5783  * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5784  * @vsi: VSI to be configured
5785  * @seid: seid of the channel/VSI
5786  * @max_tx_rate: max TX rate to be configured as BW limit
5787  *
5788  * Helper function to set BW limit for a given VSI
5789  **/
5790 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5791 {
5792         struct i40e_pf *pf = vsi->back;
5793         u64 credits = 0;
5794         int speed = 0;
5795         int ret = 0;
5796
5797         speed = i40e_get_link_speed(vsi);
5798         if (max_tx_rate > speed) {
5799                 dev_err(&pf->pdev->dev,
5800                         "Invalid max tx rate %llu specified for VSI seid %d.",
5801                         max_tx_rate, seid);
5802                 return -EINVAL;
5803         }
5804         if (max_tx_rate && max_tx_rate < 50) {
5805                 dev_warn(&pf->pdev->dev,
5806                          "Setting max tx rate to minimum usable value of 50Mbps.\n");
5807                 max_tx_rate = 50;
5808         }
5809
5810         /* Tx rate credits are in values of 50Mbps, 0 is disabled */
5811         credits = max_tx_rate;
5812         do_div(credits, I40E_BW_CREDIT_DIVISOR);
5813         ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
5814                                           I40E_MAX_BW_INACTIVE_ACCUM, NULL);
5815         if (ret)
5816                 dev_err(&pf->pdev->dev,
5817                         "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %s aq_err %s\n",
5818                         max_tx_rate, seid, i40e_stat_str(&pf->hw, ret),
5819                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5820         return ret;
5821 }
5822
5823 /**
5824  * i40e_remove_queue_channels - Remove queue channels for the TCs
5825  * @vsi: VSI to be configured
5826  *
5827  * Remove queue channels for the TCs
5828  **/
5829 static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
5830 {
5831         enum i40e_admin_queue_err last_aq_status;
5832         struct i40e_cloud_filter *cfilter;
5833         struct i40e_channel *ch, *ch_tmp;
5834         struct i40e_pf *pf = vsi->back;
5835         struct hlist_node *node;
5836         int ret, i;
5837
5838         /* Reset rss size that was stored when reconfiguring rss for
5839          * channel VSIs with non-power-of-2 queue count.
5840          */
5841         vsi->current_rss_size = 0;
5842
5843         /* perform cleanup for channels if they exist */
5844         if (list_empty(&vsi->ch_list))
5845                 return;
5846
5847         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5848                 struct i40e_vsi *p_vsi;
5849
5850                 list_del(&ch->list);
5851                 p_vsi = ch->parent_vsi;
5852                 if (!p_vsi || !ch->initialized) {
5853                         kfree(ch);
5854                         continue;
5855                 }
5856                 /* Reset queue contexts */
5857                 for (i = 0; i < ch->num_queue_pairs; i++) {
5858                         struct i40e_ring *tx_ring, *rx_ring;
5859                         u16 pf_q;
5860
5861                         pf_q = ch->base_queue + i;
5862                         tx_ring = vsi->tx_rings[pf_q];
5863                         tx_ring->ch = NULL;
5864
5865                         rx_ring = vsi->rx_rings[pf_q];
5866                         rx_ring->ch = NULL;
5867                 }
5868
5869                 /* Reset BW configured for this VSI via mqprio */
5870                 ret = i40e_set_bw_limit(vsi, ch->seid, 0);
5871                 if (ret)
5872                         dev_info(&vsi->back->pdev->dev,
5873                                  "Failed to reset tx rate for ch->seid %u\n",
5874                                  ch->seid);
5875
5876                 /* delete cloud filters associated with this channel */
5877                 hlist_for_each_entry_safe(cfilter, node,
5878                                           &pf->cloud_filter_list, cloud_node) {
5879                         if (cfilter->seid != ch->seid)
5880                                 continue;
5881
5882                         hash_del(&cfilter->cloud_node);
5883                         if (cfilter->dst_port)
5884                                 ret = i40e_add_del_cloud_filter_big_buf(vsi,
5885                                                                         cfilter,
5886                                                                         false);
5887                         else
5888                                 ret = i40e_add_del_cloud_filter(vsi, cfilter,
5889                                                                 false);
5890                         last_aq_status = pf->hw.aq.asq_last_status;
5891                         if (ret)
5892                                 dev_info(&pf->pdev->dev,
5893                                          "Failed to delete cloud filter, err %s aq_err %s\n",
5894                                          i40e_stat_str(&pf->hw, ret),
5895                                          i40e_aq_str(&pf->hw, last_aq_status));
5896                         kfree(cfilter);
5897                 }
5898
5899                 /* delete VSI from FW */
5900                 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
5901                                              NULL);
5902                 if (ret)
5903                         dev_err(&vsi->back->pdev->dev,
5904                                 "unable to remove channel (%d) for parent VSI(%d)\n",
5905                                 ch->seid, p_vsi->seid);
5906                 kfree(ch);
5907         }
5908         INIT_LIST_HEAD(&vsi->ch_list);
5909 }
5910
5911 /**
5912  * i40e_get_max_queues_for_channel
5913  * @vsi: ptr to VSI to which channels are associated with
5914  *
5915  * Helper function which returns max value among the queue counts set on the
5916  * channels/TCs created.
5917  **/
5918 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
5919 {
5920         struct i40e_channel *ch, *ch_tmp;
5921         int max = 0;
5922
5923         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5924                 if (!ch->initialized)
5925                         continue;
5926                 if (ch->num_queue_pairs > max)
5927                         max = ch->num_queue_pairs;
5928         }
5929
5930         return max;
5931 }
5932
5933 /**
5934  * i40e_validate_num_queues - validate num_queues w.r.t channel
5935  * @pf: ptr to PF device
5936  * @num_queues: number of queues
5937  * @vsi: the parent VSI
5938  * @reconfig_rss: indicates should the RSS be reconfigured or not
5939  *
5940  * This function validates number of queues in the context of new channel
5941  * which is being established and determines if RSS should be reconfigured
5942  * or not for parent VSI.
5943  **/
5944 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
5945                                     struct i40e_vsi *vsi, bool *reconfig_rss)
5946 {
5947         int max_ch_queues;
5948
5949         if (!reconfig_rss)
5950                 return -EINVAL;
5951
5952         *reconfig_rss = false;
5953         if (vsi->current_rss_size) {
5954                 if (num_queues > vsi->current_rss_size) {
5955                         dev_dbg(&pf->pdev->dev,
5956                                 "Error: num_queues (%d) > vsi's current_size(%d)\n",
5957                                 num_queues, vsi->current_rss_size);
5958                         return -EINVAL;
5959                 } else if ((num_queues < vsi->current_rss_size) &&
5960                            (!is_power_of_2(num_queues))) {
5961                         dev_dbg(&pf->pdev->dev,
5962                                 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
5963                                 num_queues, vsi->current_rss_size);
5964                         return -EINVAL;
5965                 }
5966         }
5967
5968         if (!is_power_of_2(num_queues)) {
5969                 /* Find the max num_queues configured for channel if channel
5970                  * exist.
5971                  * if channel exist, then enforce 'num_queues' to be more than
5972                  * max ever queues configured for channel.
5973                  */
5974                 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
5975                 if (num_queues < max_ch_queues) {
5976                         dev_dbg(&pf->pdev->dev,
5977                                 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
5978                                 num_queues, max_ch_queues);
5979                         return -EINVAL;
5980                 }
5981                 *reconfig_rss = true;
5982         }
5983
5984         return 0;
5985 }
5986
5987 /**
5988  * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
5989  * @vsi: the VSI being setup
5990  * @rss_size: size of RSS, accordingly LUT gets reprogrammed
5991  *
5992  * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
5993  **/
5994 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
5995 {
5996         struct i40e_pf *pf = vsi->back;
5997         u8 seed[I40E_HKEY_ARRAY_SIZE];
5998         struct i40e_hw *hw = &pf->hw;
5999         int local_rss_size;
6000         u8 *lut;
6001         int ret;
6002
6003         if (!vsi->rss_size)
6004                 return -EINVAL;
6005
6006         if (rss_size > vsi->rss_size)
6007                 return -EINVAL;
6008
6009         local_rss_size = min_t(int, vsi->rss_size, rss_size);
6010         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
6011         if (!lut)
6012                 return -ENOMEM;
6013
6014         /* Ignoring user configured lut if there is one */
6015         i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
6016
6017         /* Use user configured hash key if there is one, otherwise
6018          * use default.
6019          */
6020         if (vsi->rss_hkey_user)
6021                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
6022         else
6023                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
6024
6025         ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
6026         if (ret) {
6027                 dev_info(&pf->pdev->dev,
6028                          "Cannot set RSS lut, err %s aq_err %s\n",
6029                          i40e_stat_str(hw, ret),
6030                          i40e_aq_str(hw, hw->aq.asq_last_status));
6031                 kfree(lut);
6032                 return ret;
6033         }
6034         kfree(lut);
6035
6036         /* Do the update w.r.t. storing rss_size */
6037         if (!vsi->orig_rss_size)
6038                 vsi->orig_rss_size = vsi->rss_size;
6039         vsi->current_rss_size = local_rss_size;
6040
6041         return ret;
6042 }
6043
6044 /**
6045  * i40e_channel_setup_queue_map - Setup a channel queue map
6046  * @pf: ptr to PF device
6047  * @ctxt: VSI context structure
6048  * @ch: ptr to channel structure
6049  *
6050  * Setup queue map for a specific channel
6051  **/
6052 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
6053                                          struct i40e_vsi_context *ctxt,
6054                                          struct i40e_channel *ch)
6055 {
6056         u16 qcount, qmap, sections = 0;
6057         u8 offset = 0;
6058         int pow;
6059
6060         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
6061         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
6062
6063         qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
6064         ch->num_queue_pairs = qcount;
6065
6066         /* find the next higher power-of-2 of num queue pairs */
6067         pow = ilog2(qcount);
6068         if (!is_power_of_2(qcount))
6069                 pow++;
6070
6071         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
6072                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
6073
6074         /* Setup queue TC[0].qmap for given VSI context */
6075         ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
6076
6077         ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
6078         ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
6079         ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
6080         ctxt->info.valid_sections |= cpu_to_le16(sections);
6081 }
6082
6083 /**
6084  * i40e_add_channel - add a channel by adding VSI
6085  * @pf: ptr to PF device
6086  * @uplink_seid: underlying HW switching element (VEB) ID
6087  * @ch: ptr to channel structure
6088  *
6089  * Add a channel (VSI) using add_vsi and queue_map
6090  **/
6091 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
6092                             struct i40e_channel *ch)
6093 {
6094         struct i40e_hw *hw = &pf->hw;
6095         struct i40e_vsi_context ctxt;
6096         u8 enabled_tc = 0x1; /* TC0 enabled */
6097         int ret;
6098
6099         if (ch->type != I40E_VSI_VMDQ2) {
6100                 dev_info(&pf->pdev->dev,
6101                          "add new vsi failed, ch->type %d\n", ch->type);
6102                 return -EINVAL;
6103         }
6104
6105         memset(&ctxt, 0, sizeof(ctxt));
6106         ctxt.pf_num = hw->pf_id;
6107         ctxt.vf_num = 0;
6108         ctxt.uplink_seid = uplink_seid;
6109         ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
6110         if (ch->type == I40E_VSI_VMDQ2)
6111                 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
6112
6113         if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) {
6114                 ctxt.info.valid_sections |=
6115                      cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6116                 ctxt.info.switch_id =
6117                    cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6118         }
6119
6120         /* Set queue map for a given VSI context */
6121         i40e_channel_setup_queue_map(pf, &ctxt, ch);
6122
6123         /* Now time to create VSI */
6124         ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
6125         if (ret) {
6126                 dev_info(&pf->pdev->dev,
6127                          "add new vsi failed, err %s aq_err %s\n",
6128                          i40e_stat_str(&pf->hw, ret),
6129                          i40e_aq_str(&pf->hw,
6130                                      pf->hw.aq.asq_last_status));
6131                 return -ENOENT;
6132         }
6133
6134         /* Success, update channel, set enabled_tc only if the channel
6135          * is not a macvlan
6136          */
6137         ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
6138         ch->seid = ctxt.seid;
6139         ch->vsi_number = ctxt.vsi_number;
6140         ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx);
6141
6142         /* copy just the sections touched not the entire info
6143          * since not all sections are valid as returned by
6144          * update vsi params
6145          */
6146         ch->info.mapping_flags = ctxt.info.mapping_flags;
6147         memcpy(&ch->info.queue_mapping,
6148                &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
6149         memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
6150                sizeof(ctxt.info.tc_mapping));
6151
6152         return 0;
6153 }
6154
6155 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
6156                                   u8 *bw_share)
6157 {
6158         struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
6159         i40e_status ret;
6160         int i;
6161
6162         memset(&bw_data, 0, sizeof(bw_data));
6163         bw_data.tc_valid_bits = ch->enabled_tc;
6164         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6165                 bw_data.tc_bw_credits[i] = bw_share[i];
6166
6167         ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid,
6168                                        &bw_data, NULL);
6169         if (ret) {
6170                 dev_info(&vsi->back->pdev->dev,
6171                          "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
6172                          vsi->back->hw.aq.asq_last_status, ch->seid);
6173                 return -EINVAL;
6174         }
6175
6176         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6177                 ch->info.qs_handle[i] = bw_data.qs_handles[i];
6178
6179         return 0;
6180 }
6181
6182 /**
6183  * i40e_channel_config_tx_ring - config TX ring associated with new channel
6184  * @pf: ptr to PF device
6185  * @vsi: the VSI being setup
6186  * @ch: ptr to channel structure
6187  *
6188  * Configure TX rings associated with channel (VSI) since queues are being
6189  * from parent VSI.
6190  **/
6191 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
6192                                        struct i40e_vsi *vsi,
6193                                        struct i40e_channel *ch)
6194 {
6195         i40e_status ret;
6196         int i;
6197         u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
6198
6199         /* Enable ETS TCs with equal BW Share for now across all VSIs */
6200         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6201                 if (ch->enabled_tc & BIT(i))
6202                         bw_share[i] = 1;
6203         }
6204
6205         /* configure BW for new VSI */
6206         ret = i40e_channel_config_bw(vsi, ch, bw_share);
6207         if (ret) {
6208                 dev_info(&vsi->back->pdev->dev,
6209                          "Failed configuring TC map %d for channel (seid %u)\n",
6210                          ch->enabled_tc, ch->seid);
6211                 return ret;
6212         }
6213
6214         for (i = 0; i < ch->num_queue_pairs; i++) {
6215                 struct i40e_ring *tx_ring, *rx_ring;
6216                 u16 pf_q;
6217
6218                 pf_q = ch->base_queue + i;
6219
6220                 /* Get to TX ring ptr of main VSI, for re-setup TX queue
6221                  * context
6222                  */
6223                 tx_ring = vsi->tx_rings[pf_q];
6224                 tx_ring->ch = ch;
6225
6226                 /* Get the RX ring ptr */
6227                 rx_ring = vsi->rx_rings[pf_q];
6228                 rx_ring->ch = ch;
6229         }
6230
6231         return 0;
6232 }
6233
6234 /**
6235  * i40e_setup_hw_channel - setup new channel
6236  * @pf: ptr to PF device
6237  * @vsi: the VSI being setup
6238  * @ch: ptr to channel structure
6239  * @uplink_seid: underlying HW switching element (VEB) ID
6240  * @type: type of channel to be created (VMDq2/VF)
6241  *
6242  * Setup new channel (VSI) based on specified type (VMDq2/VF)
6243  * and configures TX rings accordingly
6244  **/
6245 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
6246                                         struct i40e_vsi *vsi,
6247                                         struct i40e_channel *ch,
6248                                         u16 uplink_seid, u8 type)
6249 {
6250         int ret;
6251
6252         ch->initialized = false;
6253         ch->base_queue = vsi->next_base_queue;
6254         ch->type = type;
6255
6256         /* Proceed with creation of channel (VMDq2) VSI */
6257         ret = i40e_add_channel(pf, uplink_seid, ch);
6258         if (ret) {
6259                 dev_info(&pf->pdev->dev,
6260                          "failed to add_channel using uplink_seid %u\n",
6261                          uplink_seid);
6262                 return ret;
6263         }
6264
6265         /* Mark the successful creation of channel */
6266         ch->initialized = true;
6267
6268         /* Reconfigure TX queues using QTX_CTL register */
6269         ret = i40e_channel_config_tx_ring(pf, vsi, ch);
6270         if (ret) {
6271                 dev_info(&pf->pdev->dev,
6272                          "failed to configure TX rings for channel %u\n",
6273                          ch->seid);
6274                 return ret;
6275         }
6276
6277         /* update 'next_base_queue' */
6278         vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
6279         dev_dbg(&pf->pdev->dev,
6280                 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
6281                 ch->seid, ch->vsi_number, ch->stat_counter_idx,
6282                 ch->num_queue_pairs,
6283                 vsi->next_base_queue);
6284         return ret;
6285 }
6286
6287 /**
6288  * i40e_setup_channel - setup new channel using uplink element
6289  * @pf: ptr to PF device
6290  * @vsi: pointer to the VSI to set up the channel within
6291  * @ch: ptr to channel structure
6292  *
6293  * Setup new channel (VSI) based on specified type (VMDq2/VF)
6294  * and uplink switching element (uplink_seid)
6295  **/
6296 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
6297                                struct i40e_channel *ch)
6298 {
6299         u8 vsi_type;
6300         u16 seid;
6301         int ret;
6302
6303         if (vsi->type == I40E_VSI_MAIN) {
6304                 vsi_type = I40E_VSI_VMDQ2;
6305         } else {
6306                 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6307                         vsi->type);
6308                 return false;
6309         }
6310
6311         /* underlying switching element */
6312         seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6313
6314         /* create channel (VSI), configure TX rings */
6315         ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
6316         if (ret) {
6317                 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6318                 return false;
6319         }
6320
6321         return ch->initialized ? true : false;
6322 }
6323
6324 /**
6325  * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6326  * @vsi: ptr to VSI which has PF backing
6327  *
6328  * Sets up switch mode correctly if it needs to be changed and perform
6329  * what are allowed modes.
6330  **/
6331 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6332 {
6333         u8 mode;
6334         struct i40e_pf *pf = vsi->back;
6335         struct i40e_hw *hw = &pf->hw;
6336         int ret;
6337
6338         ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6339         if (ret)
6340                 return -EINVAL;
6341
6342         if (hw->dev_caps.switch_mode) {
6343                 /* if switch mode is set, support mode2 (non-tunneled for
6344                  * cloud filter) for now
6345                  */
6346                 u32 switch_mode = hw->dev_caps.switch_mode &
6347                                   I40E_SWITCH_MODE_MASK;
6348                 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6349                         if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6350                                 return 0;
6351                         dev_err(&pf->pdev->dev,
6352                                 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6353                                 hw->dev_caps.switch_mode);
6354                         return -EINVAL;
6355                 }
6356         }
6357
6358         /* Set Bit 7 to be valid */
6359         mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6360
6361         /* Set L4type for TCP support */
6362         mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6363
6364         /* Set cloud filter mode */
6365         mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6366
6367         /* Prep mode field for set_switch_config */
6368         ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6369                                         pf->last_sw_conf_valid_flags,
6370                                         mode, NULL);
6371         if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)
6372                 dev_err(&pf->pdev->dev,
6373                         "couldn't set switch config bits, err %s aq_err %s\n",
6374                         i40e_stat_str(hw, ret),
6375                         i40e_aq_str(hw,
6376                                     hw->aq.asq_last_status));
6377
6378         return ret;
6379 }
6380
6381 /**
6382  * i40e_create_queue_channel - function to create channel
6383  * @vsi: VSI to be configured
6384  * @ch: ptr to channel (it contains channel specific params)
6385  *
6386  * This function creates channel (VSI) using num_queues specified by user,
6387  * reconfigs RSS if needed.
6388  **/
6389 int i40e_create_queue_channel(struct i40e_vsi *vsi,
6390                               struct i40e_channel *ch)
6391 {
6392         struct i40e_pf *pf = vsi->back;
6393         bool reconfig_rss;
6394         int err;
6395
6396         if (!ch)
6397                 return -EINVAL;
6398
6399         if (!ch->num_queue_pairs) {
6400                 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6401                         ch->num_queue_pairs);
6402                 return -EINVAL;
6403         }
6404
6405         /* validate user requested num_queues for channel */
6406         err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6407                                        &reconfig_rss);
6408         if (err) {
6409                 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6410                          ch->num_queue_pairs);
6411                 return -EINVAL;
6412         }
6413
6414         /* By default we are in VEPA mode, if this is the first VF/VMDq
6415          * VSI to be added switch to VEB mode.
6416          */
6417
6418         if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
6419                 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
6420
6421                 if (vsi->type == I40E_VSI_MAIN) {
6422                         if (pf->flags & I40E_FLAG_TC_MQPRIO)
6423                                 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
6424                         else
6425                                 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
6426                 }
6427                 /* now onwards for main VSI, number of queues will be value
6428                  * of TC0's queue count
6429                  */
6430         }
6431
6432         /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6433          * it should be more than num_queues
6434          */
6435         if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6436                 dev_dbg(&pf->pdev->dev,
6437                         "Error: cnt_q_avail (%u) less than num_queues %d\n",
6438                         vsi->cnt_q_avail, ch->num_queue_pairs);
6439                 return -EINVAL;
6440         }
6441
6442         /* reconfig_rss only if vsi type is MAIN_VSI */
6443         if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6444                 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs);
6445                 if (err) {
6446                         dev_info(&pf->pdev->dev,
6447                                  "Error: unable to reconfig rss for num_queues (%u)\n",
6448                                  ch->num_queue_pairs);
6449                         return -EINVAL;
6450                 }
6451         }
6452
6453         if (!i40e_setup_channel(pf, vsi, ch)) {
6454                 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6455                 return -EINVAL;
6456         }
6457
6458         dev_info(&pf->pdev->dev,
6459                  "Setup channel (id:%u) utilizing num_queues %d\n",
6460                  ch->seid, ch->num_queue_pairs);
6461
6462         /* configure VSI for BW limit */
6463         if (ch->max_tx_rate) {
6464                 u64 credits = ch->max_tx_rate;
6465
6466                 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate))
6467                         return -EINVAL;
6468
6469                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6470                 dev_dbg(&pf->pdev->dev,
6471                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6472                         ch->max_tx_rate,
6473                         credits,
6474                         ch->seid);
6475         }
6476
6477         /* in case of VF, this will be main SRIOV VSI */
6478         ch->parent_vsi = vsi;
6479
6480         /* and update main_vsi's count for queue_available to use */
6481         vsi->cnt_q_avail -= ch->num_queue_pairs;
6482
6483         return 0;
6484 }
6485
6486 /**
6487  * i40e_configure_queue_channels - Add queue channel for the given TCs
6488  * @vsi: VSI to be configured
6489  *
6490  * Configures queue channel mapping to the given TCs
6491  **/
6492 static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6493 {
6494         struct i40e_channel *ch;
6495         u64 max_rate = 0;
6496         int ret = 0, i;
6497
6498         /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6499         vsi->tc_seid_map[0] = vsi->seid;
6500         for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6501                 if (vsi->tc_config.enabled_tc & BIT(i)) {
6502                         ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6503                         if (!ch) {
6504                                 ret = -ENOMEM;
6505                                 goto err_free;
6506                         }
6507
6508                         INIT_LIST_HEAD(&ch->list);
6509                         ch->num_queue_pairs =
6510                                 vsi->tc_config.tc_info[i].qcount;
6511                         ch->base_queue =
6512                                 vsi->tc_config.tc_info[i].qoffset;
6513
6514                         /* Bandwidth limit through tc interface is in bytes/s,
6515                          * change to Mbit/s
6516                          */
6517                         max_rate = vsi->mqprio_qopt.max_rate[i];
6518                         do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6519                         ch->max_tx_rate = max_rate;
6520
6521                         list_add_tail(&ch->list, &vsi->ch_list);
6522
6523                         ret = i40e_create_queue_channel(vsi, ch);
6524                         if (ret) {
6525                                 dev_err(&vsi->back->pdev->dev,
6526                                         "Failed creating queue channel with TC%d: queues %d\n",
6527                                         i, ch->num_queue_pairs);
6528                                 goto err_free;
6529                         }
6530                         vsi->tc_seid_map[i] = ch->seid;
6531                 }
6532         }
6533         return ret;
6534
6535 err_free:
6536         i40e_remove_queue_channels(vsi);
6537         return ret;
6538 }
6539
6540 /**
6541  * i40e_veb_config_tc - Configure TCs for given VEB
6542  * @veb: given VEB
6543  * @enabled_tc: TC bitmap
6544  *
6545  * Configures given TC bitmap for VEB (switching) element
6546  **/
6547 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6548 {
6549         struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6550         struct i40e_pf *pf = veb->pf;
6551         int ret = 0;
6552         int i;
6553
6554         /* No TCs or already enabled TCs just return */
6555         if (!enabled_tc || veb->enabled_tc == enabled_tc)
6556                 return ret;
6557
6558         bw_data.tc_valid_bits = enabled_tc;
6559         /* bw_data.absolute_credits is not set (relative) */
6560
6561         /* Enable ETS TCs with equal BW Share for now */
6562         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6563                 if (enabled_tc & BIT(i))
6564                         bw_data.tc_bw_share_credits[i] = 1;
6565         }
6566
6567         ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6568                                                    &bw_data, NULL);
6569         if (ret) {
6570                 dev_info(&pf->pdev->dev,
6571                          "VEB bw config failed, err %s aq_err %s\n",
6572                          i40e_stat_str(&pf->hw, ret),
6573                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6574                 goto out;
6575         }
6576
6577         /* Update the BW information */
6578         ret = i40e_veb_get_bw_info(veb);
6579         if (ret) {
6580                 dev_info(&pf->pdev->dev,
6581                          "Failed getting veb bw config, err %s aq_err %s\n",
6582                          i40e_stat_str(&pf->hw, ret),
6583                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6584         }
6585
6586 out:
6587         return ret;
6588 }
6589
6590 #ifdef CONFIG_I40E_DCB
6591 /**
6592  * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6593  * @pf: PF struct
6594  *
6595  * Reconfigure VEB/VSIs on a given PF; it is assumed that
6596  * the caller would've quiesce all the VSIs before calling
6597  * this function
6598  **/
6599 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6600 {
6601         u8 tc_map = 0;
6602         int ret;
6603         u8 v;
6604
6605         /* Enable the TCs available on PF to all VEBs */
6606         tc_map = i40e_pf_get_tc_map(pf);
6607         if (tc_map == I40E_DEFAULT_TRAFFIC_CLASS)
6608                 return;
6609
6610         for (v = 0; v < I40E_MAX_VEB; v++) {
6611                 if (!pf->veb[v])
6612                         continue;
6613                 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
6614                 if (ret) {
6615                         dev_info(&pf->pdev->dev,
6616                                  "Failed configuring TC for VEB seid=%d\n",
6617                                  pf->veb[v]->seid);
6618                         /* Will try to configure as many components */
6619                 }
6620         }
6621
6622         /* Update each VSI */
6623         for (v = 0; v < pf->num_alloc_vsi; v++) {
6624                 if (!pf->vsi[v])
6625                         continue;
6626
6627                 /* - Enable all TCs for the LAN VSI
6628                  * - For all others keep them at TC0 for now
6629                  */
6630                 if (v == pf->lan_vsi)
6631                         tc_map = i40e_pf_get_tc_map(pf);
6632                 else
6633                         tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6634
6635                 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
6636                 if (ret) {
6637                         dev_info(&pf->pdev->dev,
6638                                  "Failed configuring TC for VSI seid=%d\n",
6639                                  pf->vsi[v]->seid);
6640                         /* Will try to configure as many components */
6641                 } else {
6642                         /* Re-configure VSI vectors based on updated TC map */
6643                         i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
6644                         if (pf->vsi[v]->netdev)
6645                                 i40e_dcbnl_set_all(pf->vsi[v]);
6646                 }
6647         }
6648 }
6649
6650 /**
6651  * i40e_resume_port_tx - Resume port Tx
6652  * @pf: PF struct
6653  *
6654  * Resume a port's Tx and issue a PF reset in case of failure to
6655  * resume.
6656  **/
6657 static int i40e_resume_port_tx(struct i40e_pf *pf)
6658 {
6659         struct i40e_hw *hw = &pf->hw;
6660         int ret;
6661
6662         ret = i40e_aq_resume_port_tx(hw, NULL);
6663         if (ret) {
6664                 dev_info(&pf->pdev->dev,
6665                          "Resume Port Tx failed, err %s aq_err %s\n",
6666                           i40e_stat_str(&pf->hw, ret),
6667                           i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6668                 /* Schedule PF reset to recover */
6669                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6670                 i40e_service_event_schedule(pf);
6671         }
6672
6673         return ret;
6674 }
6675
6676 /**
6677  * i40e_suspend_port_tx - Suspend port Tx
6678  * @pf: PF struct
6679  *
6680  * Suspend a port's Tx and issue a PF reset in case of failure.
6681  **/
6682 static int i40e_suspend_port_tx(struct i40e_pf *pf)
6683 {
6684         struct i40e_hw *hw = &pf->hw;
6685         int ret;
6686
6687         ret = i40e_aq_suspend_port_tx(hw, pf->mac_seid, NULL);
6688         if (ret) {
6689                 dev_info(&pf->pdev->dev,
6690                          "Suspend Port Tx failed, err %s aq_err %s\n",
6691                          i40e_stat_str(&pf->hw, ret),
6692                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6693                 /* Schedule PF reset to recover */
6694                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6695                 i40e_service_event_schedule(pf);
6696         }
6697
6698         return ret;
6699 }
6700
6701 /**
6702  * i40e_hw_set_dcb_config - Program new DCBX settings into HW
6703  * @pf: PF being configured
6704  * @new_cfg: New DCBX configuration
6705  *
6706  * Program DCB settings into HW and reconfigure VEB/VSIs on
6707  * given PF. Uses "Set LLDP MIB" AQC to program the hardware.
6708  **/
6709 static int i40e_hw_set_dcb_config(struct i40e_pf *pf,
6710                                   struct i40e_dcbx_config *new_cfg)
6711 {
6712         struct i40e_dcbx_config *old_cfg = &pf->hw.local_dcbx_config;
6713         int ret;
6714
6715         /* Check if need reconfiguration */
6716         if (!memcmp(&new_cfg, &old_cfg, sizeof(new_cfg))) {
6717                 dev_dbg(&pf->pdev->dev, "No Change in DCB Config required.\n");
6718                 return 0;
6719         }
6720
6721         /* Config change disable all VSIs */
6722         i40e_pf_quiesce_all_vsi(pf);
6723
6724         /* Copy the new config to the current config */
6725         *old_cfg = *new_cfg;
6726         old_cfg->etsrec = old_cfg->etscfg;
6727         ret = i40e_set_dcb_config(&pf->hw);
6728         if (ret) {
6729                 dev_info(&pf->pdev->dev,
6730                          "Set DCB Config failed, err %s aq_err %s\n",
6731                          i40e_stat_str(&pf->hw, ret),
6732                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6733                 goto out;
6734         }
6735
6736         /* Changes in configuration update VEB/VSI */
6737         i40e_dcb_reconfigure(pf);
6738 out:
6739         /* In case of reset do not try to resume anything */
6740         if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) {
6741                 /* Re-start the VSIs if disabled */
6742                 ret = i40e_resume_port_tx(pf);
6743                 /* In case of error no point in resuming VSIs */
6744                 if (ret)
6745                         goto err;
6746                 i40e_pf_unquiesce_all_vsi(pf);
6747         }
6748 err:
6749         return ret;
6750 }
6751
6752 /**
6753  * i40e_hw_dcb_config - Program new DCBX settings into HW
6754  * @pf: PF being configured
6755  * @new_cfg: New DCBX configuration
6756  *
6757  * Program DCB settings into HW and reconfigure VEB/VSIs on
6758  * given PF
6759  **/
6760 int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)
6761 {
6762         struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6763         u8 prio_type[I40E_MAX_TRAFFIC_CLASS] = {0};
6764         u32 mfs_tc[I40E_MAX_TRAFFIC_CLASS];
6765         struct i40e_dcbx_config *old_cfg;
6766         u8 mode[I40E_MAX_TRAFFIC_CLASS];
6767         struct i40e_rx_pb_config pb_cfg;
6768         struct i40e_hw *hw = &pf->hw;
6769         u8 num_ports = hw->num_ports;
6770         bool need_reconfig;
6771         int ret = -EINVAL;
6772         u8 lltc_map = 0;
6773         u8 tc_map = 0;
6774         u8 new_numtc;
6775         u8 i;
6776
6777         dev_dbg(&pf->pdev->dev, "Configuring DCB registers directly\n");
6778         /* Un-pack information to Program ETS HW via shared API
6779          * numtc, tcmap
6780          * LLTC map
6781          * ETS/NON-ETS arbiter mode
6782          * max exponent (credit refills)
6783          * Total number of ports
6784          * PFC priority bit-map
6785          * Priority Table
6786          * BW % per TC
6787          * Arbiter mode between UPs sharing same TC
6788          * TSA table (ETS or non-ETS)
6789          * EEE enabled or not
6790          * MFS TC table
6791          */
6792
6793         new_numtc = i40e_dcb_get_num_tc(new_cfg);
6794
6795         memset(&ets_data, 0, sizeof(ets_data));
6796         for (i = 0; i < new_numtc; i++) {
6797                 tc_map |= BIT(i);
6798                 switch (new_cfg->etscfg.tsatable[i]) {
6799                 case I40E_IEEE_TSA_ETS:
6800                         prio_type[i] = I40E_DCB_PRIO_TYPE_ETS;
6801                         ets_data.tc_bw_share_credits[i] =
6802                                         new_cfg->etscfg.tcbwtable[i];
6803                         break;
6804                 case I40E_IEEE_TSA_STRICT:
6805                         prio_type[i] = I40E_DCB_PRIO_TYPE_STRICT;
6806                         lltc_map |= BIT(i);
6807                         ets_data.tc_bw_share_credits[i] =
6808                                         I40E_DCB_STRICT_PRIO_CREDITS;
6809                         break;
6810                 default:
6811                         /* Invalid TSA type */
6812                         need_reconfig = false;
6813                         goto out;
6814                 }
6815         }
6816
6817         old_cfg = &hw->local_dcbx_config;
6818         /* Check if need reconfiguration */
6819         need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg, new_cfg);
6820
6821         /* If needed, enable/disable frame tagging, disable all VSIs
6822          * and suspend port tx
6823          */
6824         if (need_reconfig) {
6825                 /* Enable DCB tagging only when more than one TC */
6826                 if (new_numtc > 1)
6827                         pf->flags |= I40E_FLAG_DCB_ENABLED;
6828                 else
6829                         pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6830
6831                 set_bit(__I40E_PORT_SUSPENDED, pf->state);
6832                 /* Reconfiguration needed quiesce all VSIs */
6833                 i40e_pf_quiesce_all_vsi(pf);
6834                 ret = i40e_suspend_port_tx(pf);
6835                 if (ret)
6836                         goto err;
6837         }
6838
6839         /* Configure Port ETS Tx Scheduler */
6840         ets_data.tc_valid_bits = tc_map;
6841         ets_data.tc_strict_priority_flags = lltc_map;
6842         ret = i40e_aq_config_switch_comp_ets
6843                 (hw, pf->mac_seid, &ets_data,
6844                  i40e_aqc_opc_modify_switching_comp_ets, NULL);
6845         if (ret) {
6846                 dev_info(&pf->pdev->dev,
6847                          "Modify Port ETS failed, err %s aq_err %s\n",
6848                          i40e_stat_str(&pf->hw, ret),
6849                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6850                 goto out;
6851         }
6852
6853         /* Configure Rx ETS HW */
6854         memset(&mode, I40E_DCB_ARB_MODE_ROUND_ROBIN, sizeof(mode));
6855         i40e_dcb_hw_set_num_tc(hw, new_numtc);
6856         i40e_dcb_hw_rx_fifo_config(hw, I40E_DCB_ARB_MODE_ROUND_ROBIN,
6857                                    I40E_DCB_ARB_MODE_STRICT_PRIORITY,
6858                                    I40E_DCB_DEFAULT_MAX_EXPONENT,
6859                                    lltc_map);
6860         i40e_dcb_hw_rx_cmd_monitor_config(hw, new_numtc, num_ports);
6861         i40e_dcb_hw_rx_ets_bw_config(hw, new_cfg->etscfg.tcbwtable, mode,
6862                                      prio_type);
6863         i40e_dcb_hw_pfc_config(hw, new_cfg->pfc.pfcenable,
6864                                new_cfg->etscfg.prioritytable);
6865         i40e_dcb_hw_rx_up2tc_config(hw, new_cfg->etscfg.prioritytable);
6866
6867         /* Configure Rx Packet Buffers in HW */
6868         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6869                 mfs_tc[i] = pf->vsi[pf->lan_vsi]->netdev->mtu;
6870                 mfs_tc[i] += I40E_PACKET_HDR_PAD;
6871         }
6872
6873         i40e_dcb_hw_calculate_pool_sizes(hw, num_ports,
6874                                          false, new_cfg->pfc.pfcenable,
6875                                          mfs_tc, &pb_cfg);
6876         i40e_dcb_hw_rx_pb_config(hw, &pf->pb_cfg, &pb_cfg);
6877
6878         /* Update the local Rx Packet buffer config */
6879         pf->pb_cfg = pb_cfg;
6880
6881         /* Inform the FW about changes to DCB configuration */
6882         ret = i40e_aq_dcb_updated(&pf->hw, NULL);
6883         if (ret) {
6884                 dev_info(&pf->pdev->dev,
6885                          "DCB Updated failed, err %s aq_err %s\n",
6886                          i40e_stat_str(&pf->hw, ret),
6887                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6888                 goto out;
6889         }
6890
6891         /* Update the port DCBx configuration */
6892         *old_cfg = *new_cfg;
6893
6894         /* Changes in configuration update VEB/VSI */
6895         i40e_dcb_reconfigure(pf);
6896 out:
6897         /* Re-start the VSIs if disabled */
6898         if (need_reconfig) {
6899                 ret = i40e_resume_port_tx(pf);
6900
6901                 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
6902                 /* In case of error no point in resuming VSIs */
6903                 if (ret)
6904                         goto err;
6905
6906                 /* Wait for the PF's queues to be disabled */
6907                 ret = i40e_pf_wait_queues_disabled(pf);
6908                 if (ret) {
6909                         /* Schedule PF reset to recover */
6910                         set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6911                         i40e_service_event_schedule(pf);
6912                         goto err;
6913                 } else {
6914                         i40e_pf_unquiesce_all_vsi(pf);
6915                         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
6916                         set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
6917                 }
6918                 /* registers are set, lets apply */
6919                 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB)
6920                         ret = i40e_hw_set_dcb_config(pf, new_cfg);
6921         }
6922
6923 err:
6924         return ret;
6925 }
6926
6927 /**
6928  * i40e_dcb_sw_default_config - Set default DCB configuration when DCB in SW
6929  * @pf: PF being queried
6930  *
6931  * Set default DCB configuration in case DCB is to be done in SW.
6932  **/
6933 int i40e_dcb_sw_default_config(struct i40e_pf *pf)
6934 {
6935         struct i40e_dcbx_config *dcb_cfg = &pf->hw.local_dcbx_config;
6936         struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6937         struct i40e_hw *hw = &pf->hw;
6938         int err;
6939
6940         if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB) {
6941                 /* Update the local cached instance with TC0 ETS */
6942                 memset(&pf->tmp_cfg, 0, sizeof(struct i40e_dcbx_config));
6943                 pf->tmp_cfg.etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
6944                 pf->tmp_cfg.etscfg.maxtcs = 0;
6945                 pf->tmp_cfg.etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
6946                 pf->tmp_cfg.etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
6947                 pf->tmp_cfg.pfc.willing = I40E_IEEE_DEFAULT_PFC_WILLING;
6948                 pf->tmp_cfg.pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
6949                 /* FW needs one App to configure HW */
6950                 pf->tmp_cfg.numapps = I40E_IEEE_DEFAULT_NUM_APPS;
6951                 pf->tmp_cfg.app[0].selector = I40E_APP_SEL_ETHTYPE;
6952                 pf->tmp_cfg.app[0].priority = I40E_IEEE_DEFAULT_APP_PRIO;
6953                 pf->tmp_cfg.app[0].protocolid = I40E_APP_PROTOID_FCOE;
6954
6955                 return i40e_hw_set_dcb_config(pf, &pf->tmp_cfg);
6956         }
6957
6958         memset(&ets_data, 0, sizeof(ets_data));
6959         ets_data.tc_valid_bits = I40E_DEFAULT_TRAFFIC_CLASS; /* TC0 only */
6960         ets_data.tc_strict_priority_flags = 0; /* ETS */
6961         ets_data.tc_bw_share_credits[0] = I40E_IEEE_DEFAULT_ETS_TCBW; /* 100% to TC0 */
6962
6963         /* Enable ETS on the Physical port */
6964         err = i40e_aq_config_switch_comp_ets
6965                 (hw, pf->mac_seid, &ets_data,
6966                  i40e_aqc_opc_enable_switching_comp_ets, NULL);
6967         if (err) {
6968                 dev_info(&pf->pdev->dev,
6969                          "Enable Port ETS failed, err %s aq_err %s\n",
6970                          i40e_stat_str(&pf->hw, err),
6971                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6972                 err = -ENOENT;
6973                 goto out;
6974         }
6975
6976         /* Update the local cached instance with TC0 ETS */
6977         dcb_cfg->etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
6978         dcb_cfg->etscfg.cbs = 0;
6979         dcb_cfg->etscfg.maxtcs = I40E_MAX_TRAFFIC_CLASS;
6980         dcb_cfg->etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
6981
6982 out:
6983         return err;
6984 }
6985
6986 /**
6987  * i40e_init_pf_dcb - Initialize DCB configuration
6988  * @pf: PF being configured
6989  *
6990  * Query the current DCB configuration and cache it
6991  * in the hardware structure
6992  **/
6993 static int i40e_init_pf_dcb(struct i40e_pf *pf)
6994 {
6995         struct i40e_hw *hw = &pf->hw;
6996         int err;
6997
6998         /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
6999          * Also do not enable DCBx if FW LLDP agent is disabled
7000          */
7001         if (pf->hw_features & I40E_HW_NO_DCB_SUPPORT) {
7002                 dev_info(&pf->pdev->dev, "DCB is not supported.\n");
7003                 err = I40E_NOT_SUPPORTED;
7004                 goto out;
7005         }
7006         if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) {
7007                 dev_info(&pf->pdev->dev, "FW LLDP is disabled, attempting SW DCB\n");
7008                 err = i40e_dcb_sw_default_config(pf);
7009                 if (err) {
7010                         dev_info(&pf->pdev->dev, "Could not initialize SW DCB\n");
7011                         goto out;
7012                 }
7013                 dev_info(&pf->pdev->dev, "SW DCB initialization succeeded.\n");
7014                 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
7015                                DCB_CAP_DCBX_VER_IEEE;
7016                 /* at init capable but disabled */
7017                 pf->flags |= I40E_FLAG_DCB_CAPABLE;
7018                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7019                 goto out;
7020         }
7021         err = i40e_init_dcb(hw, true);
7022         if (!err) {
7023                 /* Device/Function is not DCBX capable */
7024                 if ((!hw->func_caps.dcb) ||
7025                     (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
7026                         dev_info(&pf->pdev->dev,
7027                                  "DCBX offload is not supported or is disabled for this PF.\n");
7028                 } else {
7029                         /* When status is not DISABLED then DCBX in FW */
7030                         pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
7031                                        DCB_CAP_DCBX_VER_IEEE;
7032
7033                         pf->flags |= I40E_FLAG_DCB_CAPABLE;
7034                         /* Enable DCB tagging only when more than one TC
7035                          * or explicitly disable if only one TC
7036                          */
7037                         if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
7038                                 pf->flags |= I40E_FLAG_DCB_ENABLED;
7039                         else
7040                                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7041                         dev_dbg(&pf->pdev->dev,
7042                                 "DCBX offload is supported for this PF.\n");
7043                 }
7044         } else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {
7045                 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
7046                 pf->flags |= I40E_FLAG_DISABLE_FW_LLDP;
7047         } else {
7048                 dev_info(&pf->pdev->dev,
7049                          "Query for DCB configuration failed, err %s aq_err %s\n",
7050                          i40e_stat_str(&pf->hw, err),
7051                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7052         }
7053
7054 out:
7055         return err;
7056 }
7057 #endif /* CONFIG_I40E_DCB */
7058
7059 /**
7060  * i40e_print_link_message - print link up or down
7061  * @vsi: the VSI for which link needs a message
7062  * @isup: true of link is up, false otherwise
7063  */
7064 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
7065 {
7066         enum i40e_aq_link_speed new_speed;
7067         struct i40e_pf *pf = vsi->back;
7068         char *speed = "Unknown";
7069         char *fc = "Unknown";
7070         char *fec = "";
7071         char *req_fec = "";
7072         char *an = "";
7073
7074         if (isup)
7075                 new_speed = pf->hw.phy.link_info.link_speed;
7076         else
7077                 new_speed = I40E_LINK_SPEED_UNKNOWN;
7078
7079         if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
7080                 return;
7081         vsi->current_isup = isup;
7082         vsi->current_speed = new_speed;
7083         if (!isup) {
7084                 netdev_info(vsi->netdev, "NIC Link is Down\n");
7085                 return;
7086         }
7087
7088         /* Warn user if link speed on NPAR enabled partition is not at
7089          * least 10GB
7090          */
7091         if (pf->hw.func_caps.npar_enable &&
7092             (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
7093              pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
7094                 netdev_warn(vsi->netdev,
7095                             "The partition detected link speed that is less than 10Gbps\n");
7096
7097         switch (pf->hw.phy.link_info.link_speed) {
7098         case I40E_LINK_SPEED_40GB:
7099                 speed = "40 G";
7100                 break;
7101         case I40E_LINK_SPEED_20GB:
7102                 speed = "20 G";
7103                 break;
7104         case I40E_LINK_SPEED_25GB:
7105                 speed = "25 G";
7106                 break;
7107         case I40E_LINK_SPEED_10GB:
7108                 speed = "10 G";
7109                 break;
7110         case I40E_LINK_SPEED_5GB:
7111                 speed = "5 G";
7112                 break;
7113         case I40E_LINK_SPEED_2_5GB:
7114                 speed = "2.5 G";
7115                 break;
7116         case I40E_LINK_SPEED_1GB:
7117                 speed = "1000 M";
7118                 break;
7119         case I40E_LINK_SPEED_100MB:
7120                 speed = "100 M";
7121                 break;
7122         default:
7123                 break;
7124         }
7125
7126         switch (pf->hw.fc.current_mode) {
7127         case I40E_FC_FULL:
7128                 fc = "RX/TX";
7129                 break;
7130         case I40E_FC_TX_PAUSE:
7131                 fc = "TX";
7132                 break;
7133         case I40E_FC_RX_PAUSE:
7134                 fc = "RX";
7135                 break;
7136         default:
7137                 fc = "None";
7138                 break;
7139         }
7140
7141         if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
7142                 req_fec = "None";
7143                 fec = "None";
7144                 an = "False";
7145
7146                 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7147                         an = "True";
7148
7149                 if (pf->hw.phy.link_info.fec_info &
7150                     I40E_AQ_CONFIG_FEC_KR_ENA)
7151                         fec = "CL74 FC-FEC/BASE-R";
7152                 else if (pf->hw.phy.link_info.fec_info &
7153                          I40E_AQ_CONFIG_FEC_RS_ENA)
7154                         fec = "CL108 RS-FEC";
7155
7156                 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
7157                  * both RS and FC are requested
7158                  */
7159                 if (vsi->back->hw.phy.link_info.req_fec_info &
7160                     (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
7161                         if (vsi->back->hw.phy.link_info.req_fec_info &
7162                             I40E_AQ_REQUEST_FEC_RS)
7163                                 req_fec = "CL108 RS-FEC";
7164                         else
7165                                 req_fec = "CL74 FC-FEC/BASE-R";
7166                 }
7167                 netdev_info(vsi->netdev,
7168                             "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7169                             speed, req_fec, fec, an, fc);
7170         } else if (pf->hw.device_id == I40E_DEV_ID_KX_X722) {
7171                 req_fec = "None";
7172                 fec = "None";
7173                 an = "False";
7174
7175                 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7176                         an = "True";
7177
7178                 if (pf->hw.phy.link_info.fec_info &
7179                     I40E_AQ_CONFIG_FEC_KR_ENA)
7180                         fec = "CL74 FC-FEC/BASE-R";
7181
7182                 if (pf->hw.phy.link_info.req_fec_info &
7183                     I40E_AQ_REQUEST_FEC_KR)
7184                         req_fec = "CL74 FC-FEC/BASE-R";
7185
7186                 netdev_info(vsi->netdev,
7187                             "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7188                             speed, req_fec, fec, an, fc);
7189         } else {
7190                 netdev_info(vsi->netdev,
7191                             "NIC Link is Up, %sbps Full Duplex, Flow Control: %s\n",
7192                             speed, fc);
7193         }
7194
7195 }
7196
7197 /**
7198  * i40e_up_complete - Finish the last steps of bringing up a connection
7199  * @vsi: the VSI being configured
7200  **/
7201 static int i40e_up_complete(struct i40e_vsi *vsi)
7202 {
7203         struct i40e_pf *pf = vsi->back;
7204         int err;
7205
7206         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7207                 i40e_vsi_configure_msix(vsi);
7208         else
7209                 i40e_configure_msi_and_legacy(vsi);
7210
7211         /* start rings */
7212         err = i40e_vsi_start_rings(vsi);
7213         if (err)
7214                 return err;
7215
7216         clear_bit(__I40E_VSI_DOWN, vsi->state);
7217         i40e_napi_enable_all(vsi);
7218         i40e_vsi_enable_irq(vsi);
7219
7220         if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
7221             (vsi->netdev)) {
7222                 i40e_print_link_message(vsi, true);
7223                 netif_tx_start_all_queues(vsi->netdev);
7224                 netif_carrier_on(vsi->netdev);
7225         }
7226
7227         /* replay FDIR SB filters */
7228         if (vsi->type == I40E_VSI_FDIR) {
7229                 /* reset fd counters */
7230                 pf->fd_add_err = 0;
7231                 pf->fd_atr_cnt = 0;
7232                 i40e_fdir_filter_restore(vsi);
7233         }
7234
7235         /* On the next run of the service_task, notify any clients of the new
7236          * opened netdev
7237          */
7238         set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7239         i40e_service_event_schedule(pf);
7240
7241         return 0;
7242 }
7243
7244 /**
7245  * i40e_vsi_reinit_locked - Reset the VSI
7246  * @vsi: the VSI being configured
7247  *
7248  * Rebuild the ring structs after some configuration
7249  * has changed, e.g. MTU size.
7250  **/
7251 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
7252 {
7253         struct i40e_pf *pf = vsi->back;
7254
7255         while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
7256                 usleep_range(1000, 2000);
7257         i40e_down(vsi);
7258
7259         i40e_up(vsi);
7260         clear_bit(__I40E_CONFIG_BUSY, pf->state);
7261 }
7262
7263 /**
7264  * i40e_force_link_state - Force the link status
7265  * @pf: board private structure
7266  * @is_up: whether the link state should be forced up or down
7267  **/
7268 static i40e_status i40e_force_link_state(struct i40e_pf *pf, bool is_up)
7269 {
7270         struct i40e_aq_get_phy_abilities_resp abilities;
7271         struct i40e_aq_set_phy_config config = {0};
7272         bool non_zero_phy_type = is_up;
7273         struct i40e_hw *hw = &pf->hw;
7274         i40e_status err;
7275         u64 mask;
7276         u8 speed;
7277
7278         /* Card might've been put in an unstable state by other drivers
7279          * and applications, which causes incorrect speed values being
7280          * set on startup. In order to clear speed registers, we call
7281          * get_phy_capabilities twice, once to get initial state of
7282          * available speeds, and once to get current PHY config.
7283          */
7284         err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
7285                                            NULL);
7286         if (err) {
7287                 dev_err(&pf->pdev->dev,
7288                         "failed to get phy cap., ret =  %s last_status =  %s\n",
7289                         i40e_stat_str(hw, err),
7290                         i40e_aq_str(hw, hw->aq.asq_last_status));
7291                 return err;
7292         }
7293         speed = abilities.link_speed;
7294
7295         /* Get the current phy config */
7296         err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
7297                                            NULL);
7298         if (err) {
7299                 dev_err(&pf->pdev->dev,
7300                         "failed to get phy cap., ret =  %s last_status =  %s\n",
7301                         i40e_stat_str(hw, err),
7302                         i40e_aq_str(hw, hw->aq.asq_last_status));
7303                 return err;
7304         }
7305
7306         /* If link needs to go up, but was not forced to go down,
7307          * and its speed values are OK, no need for a flap
7308          * if non_zero_phy_type was set, still need to force up
7309          */
7310         if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)
7311                 non_zero_phy_type = true;
7312         else if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0)
7313                 return I40E_SUCCESS;
7314
7315         /* To force link we need to set bits for all supported PHY types,
7316          * but there are now more than 32, so we need to split the bitmap
7317          * across two fields.
7318          */
7319         mask = I40E_PHY_TYPES_BITMASK;
7320         config.phy_type =
7321                 non_zero_phy_type ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
7322         config.phy_type_ext =
7323                 non_zero_phy_type ? (u8)((mask >> 32) & 0xff) : 0;
7324         /* Copy the old settings, except of phy_type */
7325         config.abilities = abilities.abilities;
7326         if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED) {
7327                 if (is_up)
7328                         config.abilities |= I40E_AQ_PHY_ENABLE_LINK;
7329                 else
7330                         config.abilities &= ~(I40E_AQ_PHY_ENABLE_LINK);
7331         }
7332         if (abilities.link_speed != 0)
7333                 config.link_speed = abilities.link_speed;
7334         else
7335                 config.link_speed = speed;
7336         config.eee_capability = abilities.eee_capability;
7337         config.eeer = abilities.eeer_val;
7338         config.low_power_ctrl = abilities.d3_lpan;
7339         config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
7340                             I40E_AQ_PHY_FEC_CONFIG_MASK;
7341         err = i40e_aq_set_phy_config(hw, &config, NULL);
7342
7343         if (err) {
7344                 dev_err(&pf->pdev->dev,
7345                         "set phy config ret =  %s last_status =  %s\n",
7346                         i40e_stat_str(&pf->hw, err),
7347                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7348                 return err;
7349         }
7350
7351         /* Update the link info */
7352         err = i40e_update_link_info(hw);
7353         if (err) {
7354                 /* Wait a little bit (on 40G cards it sometimes takes a really
7355                  * long time for link to come back from the atomic reset)
7356                  * and try once more
7357                  */
7358                 msleep(1000);
7359                 i40e_update_link_info(hw);
7360         }
7361
7362         i40e_aq_set_link_restart_an(hw, is_up, NULL);
7363
7364         return I40E_SUCCESS;
7365 }
7366
7367 /**
7368  * i40e_up - Bring the connection back up after being down
7369  * @vsi: the VSI being configured
7370  **/
7371 int i40e_up(struct i40e_vsi *vsi)
7372 {
7373         int err;
7374
7375         if (vsi->type == I40E_VSI_MAIN &&
7376             (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7377              vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7378                 i40e_force_link_state(vsi->back, true);
7379
7380         err = i40e_vsi_configure(vsi);
7381         if (!err)
7382                 err = i40e_up_complete(vsi);
7383
7384         return err;
7385 }
7386
7387 /**
7388  * i40e_down - Shutdown the connection processing
7389  * @vsi: the VSI being stopped
7390  **/
7391 void i40e_down(struct i40e_vsi *vsi)
7392 {
7393         int i;
7394
7395         /* It is assumed that the caller of this function
7396          * sets the vsi->state __I40E_VSI_DOWN bit.
7397          */
7398         if (vsi->netdev) {
7399                 netif_carrier_off(vsi->netdev);
7400                 netif_tx_disable(vsi->netdev);
7401         }
7402         i40e_vsi_disable_irq(vsi);
7403         i40e_vsi_stop_rings(vsi);
7404         if (vsi->type == I40E_VSI_MAIN &&
7405            (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7406             vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7407                 i40e_force_link_state(vsi->back, false);
7408         i40e_napi_disable_all(vsi);
7409
7410         for (i = 0; i < vsi->num_queue_pairs; i++) {
7411                 i40e_clean_tx_ring(vsi->tx_rings[i]);
7412                 if (i40e_enabled_xdp_vsi(vsi)) {
7413                         /* Make sure that in-progress ndo_xdp_xmit and
7414                          * ndo_xsk_wakeup calls are completed.
7415                          */
7416                         synchronize_rcu();
7417                         i40e_clean_tx_ring(vsi->xdp_rings[i]);
7418                 }
7419                 i40e_clean_rx_ring(vsi->rx_rings[i]);
7420         }
7421
7422 }
7423
7424 /**
7425  * i40e_validate_mqprio_qopt- validate queue mapping info
7426  * @vsi: the VSI being configured
7427  * @mqprio_qopt: queue parametrs
7428  **/
7429 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
7430                                      struct tc_mqprio_qopt_offload *mqprio_qopt)
7431 {
7432         u64 sum_max_rate = 0;
7433         u64 max_rate = 0;
7434         int i;
7435
7436         if (mqprio_qopt->qopt.offset[0] != 0 ||
7437             mqprio_qopt->qopt.num_tc < 1 ||
7438             mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
7439                 return -EINVAL;
7440         for (i = 0; ; i++) {
7441                 if (!mqprio_qopt->qopt.count[i])
7442                         return -EINVAL;
7443                 if (mqprio_qopt->min_rate[i]) {
7444                         dev_err(&vsi->back->pdev->dev,
7445                                 "Invalid min tx rate (greater than 0) specified\n");
7446                         return -EINVAL;
7447                 }
7448                 max_rate = mqprio_qopt->max_rate[i];
7449                 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
7450                 sum_max_rate += max_rate;
7451
7452                 if (i >= mqprio_qopt->qopt.num_tc - 1)
7453                         break;
7454                 if (mqprio_qopt->qopt.offset[i + 1] !=
7455                     (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
7456                         return -EINVAL;
7457         }
7458         if (vsi->num_queue_pairs <
7459             (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
7460                 dev_err(&vsi->back->pdev->dev,
7461                         "Failed to create traffic channel, insufficient number of queues.\n");
7462                 return -EINVAL;
7463         }
7464         if (sum_max_rate > i40e_get_link_speed(vsi)) {
7465                 dev_err(&vsi->back->pdev->dev,
7466                         "Invalid max tx rate specified\n");
7467                 return -EINVAL;
7468         }
7469         return 0;
7470 }
7471
7472 /**
7473  * i40e_vsi_set_default_tc_config - set default values for tc configuration
7474  * @vsi: the VSI being configured
7475  **/
7476 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
7477 {
7478         u16 qcount;
7479         int i;
7480
7481         /* Only TC0 is enabled */
7482         vsi->tc_config.numtc = 1;
7483         vsi->tc_config.enabled_tc = 1;
7484         qcount = min_t(int, vsi->alloc_queue_pairs,
7485                        i40e_pf_get_max_q_per_tc(vsi->back));
7486         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7487                 /* For the TC that is not enabled set the offset to default
7488                  * queue and allocate one queue for the given TC.
7489                  */
7490                 vsi->tc_config.tc_info[i].qoffset = 0;
7491                 if (i == 0)
7492                         vsi->tc_config.tc_info[i].qcount = qcount;
7493                 else
7494                         vsi->tc_config.tc_info[i].qcount = 1;
7495                 vsi->tc_config.tc_info[i].netdev_tc = 0;
7496         }
7497 }
7498
7499 /**
7500  * i40e_del_macvlan_filter
7501  * @hw: pointer to the HW structure
7502  * @seid: seid of the channel VSI
7503  * @macaddr: the mac address to apply as a filter
7504  * @aq_err: store the admin Q error
7505  *
7506  * This function deletes a mac filter on the channel VSI which serves as the
7507  * macvlan. Returns 0 on success.
7508  **/
7509 static i40e_status i40e_del_macvlan_filter(struct i40e_hw *hw, u16 seid,
7510                                            const u8 *macaddr, int *aq_err)
7511 {
7512         struct i40e_aqc_remove_macvlan_element_data element;
7513         i40e_status status;
7514
7515         memset(&element, 0, sizeof(element));
7516         ether_addr_copy(element.mac_addr, macaddr);
7517         element.vlan_tag = 0;
7518         element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
7519         status = i40e_aq_remove_macvlan(hw, seid, &element, 1, NULL);
7520         *aq_err = hw->aq.asq_last_status;
7521
7522         return status;
7523 }
7524
7525 /**
7526  * i40e_add_macvlan_filter
7527  * @hw: pointer to the HW structure
7528  * @seid: seid of the channel VSI
7529  * @macaddr: the mac address to apply as a filter
7530  * @aq_err: store the admin Q error
7531  *
7532  * This function adds a mac filter on the channel VSI which serves as the
7533  * macvlan. Returns 0 on success.
7534  **/
7535 static i40e_status i40e_add_macvlan_filter(struct i40e_hw *hw, u16 seid,
7536                                            const u8 *macaddr, int *aq_err)
7537 {
7538         struct i40e_aqc_add_macvlan_element_data element;
7539         i40e_status status;
7540         u16 cmd_flags = 0;
7541
7542         ether_addr_copy(element.mac_addr, macaddr);
7543         element.vlan_tag = 0;
7544         element.queue_number = 0;
7545         element.match_method = I40E_AQC_MM_ERR_NO_RES;
7546         cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
7547         element.flags = cpu_to_le16(cmd_flags);
7548         status = i40e_aq_add_macvlan(hw, seid, &element, 1, NULL);
7549         *aq_err = hw->aq.asq_last_status;
7550
7551         return status;
7552 }
7553
7554 /**
7555  * i40e_reset_ch_rings - Reset the queue contexts in a channel
7556  * @vsi: the VSI we want to access
7557  * @ch: the channel we want to access
7558  */
7559 static void i40e_reset_ch_rings(struct i40e_vsi *vsi, struct i40e_channel *ch)
7560 {
7561         struct i40e_ring *tx_ring, *rx_ring;
7562         u16 pf_q;
7563         int i;
7564
7565         for (i = 0; i < ch->num_queue_pairs; i++) {
7566                 pf_q = ch->base_queue + i;
7567                 tx_ring = vsi->tx_rings[pf_q];
7568                 tx_ring->ch = NULL;
7569                 rx_ring = vsi->rx_rings[pf_q];
7570                 rx_ring->ch = NULL;
7571         }
7572 }
7573
7574 /**
7575  * i40e_free_macvlan_channels
7576  * @vsi: the VSI we want to access
7577  *
7578  * This function frees the Qs of the channel VSI from
7579  * the stack and also deletes the channel VSIs which
7580  * serve as macvlans.
7581  */
7582 static void i40e_free_macvlan_channels(struct i40e_vsi *vsi)
7583 {
7584         struct i40e_channel *ch, *ch_tmp;
7585         int ret;
7586
7587         if (list_empty(&vsi->macvlan_list))
7588                 return;
7589
7590         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7591                 struct i40e_vsi *parent_vsi;
7592
7593                 if (i40e_is_channel_macvlan(ch)) {
7594                         i40e_reset_ch_rings(vsi, ch);
7595                         clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7596                         netdev_unbind_sb_channel(vsi->netdev, ch->fwd->netdev);
7597                         netdev_set_sb_channel(ch->fwd->netdev, 0);
7598                         kfree(ch->fwd);
7599                         ch->fwd = NULL;
7600                 }
7601
7602                 list_del(&ch->list);
7603                 parent_vsi = ch->parent_vsi;
7604                 if (!parent_vsi || !ch->initialized) {
7605                         kfree(ch);
7606                         continue;
7607                 }
7608
7609                 /* remove the VSI */
7610                 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
7611                                              NULL);
7612                 if (ret)
7613                         dev_err(&vsi->back->pdev->dev,
7614                                 "unable to remove channel (%d) for parent VSI(%d)\n",
7615                                 ch->seid, parent_vsi->seid);
7616                 kfree(ch);
7617         }
7618         vsi->macvlan_cnt = 0;
7619 }
7620
7621 /**
7622  * i40e_fwd_ring_up - bring the macvlan device up
7623  * @vsi: the VSI we want to access
7624  * @vdev: macvlan netdevice
7625  * @fwd: the private fwd structure
7626  */
7627 static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,
7628                             struct i40e_fwd_adapter *fwd)
7629 {
7630         struct i40e_channel *ch = NULL, *ch_tmp, *iter;
7631         int ret = 0, num_tc = 1,  i, aq_err;
7632         struct i40e_pf *pf = vsi->back;
7633         struct i40e_hw *hw = &pf->hw;
7634
7635         /* Go through the list and find an available channel */
7636         list_for_each_entry_safe(iter, ch_tmp, &vsi->macvlan_list, list) {
7637                 if (!i40e_is_channel_macvlan(iter)) {
7638                         iter->fwd = fwd;
7639                         /* record configuration for macvlan interface in vdev */
7640                         for (i = 0; i < num_tc; i++)
7641                                 netdev_bind_sb_channel_queue(vsi->netdev, vdev,
7642                                                              i,
7643                                                              iter->num_queue_pairs,
7644                                                              iter->base_queue);
7645                         for (i = 0; i < iter->num_queue_pairs; i++) {
7646                                 struct i40e_ring *tx_ring, *rx_ring;
7647                                 u16 pf_q;
7648
7649                                 pf_q = iter->base_queue + i;
7650
7651                                 /* Get to TX ring ptr */
7652                                 tx_ring = vsi->tx_rings[pf_q];
7653                                 tx_ring->ch = iter;
7654
7655                                 /* Get the RX ring ptr */
7656                                 rx_ring = vsi->rx_rings[pf_q];
7657                                 rx_ring->ch = iter;
7658                         }
7659                         ch = iter;
7660                         break;
7661                 }
7662         }
7663
7664         if (!ch)
7665                 return -EINVAL;
7666
7667         /* Guarantee all rings are updated before we update the
7668          * MAC address filter.
7669          */
7670         wmb();
7671
7672         /* Add a mac filter */
7673         ret = i40e_add_macvlan_filter(hw, ch->seid, vdev->dev_addr, &aq_err);
7674         if (ret) {
7675                 /* if we cannot add the MAC rule then disable the offload */
7676                 macvlan_release_l2fw_offload(vdev);
7677                 for (i = 0; i < ch->num_queue_pairs; i++) {
7678                         struct i40e_ring *rx_ring;
7679                         u16 pf_q;
7680
7681                         pf_q = ch->base_queue + i;
7682                         rx_ring = vsi->rx_rings[pf_q];
7683                         rx_ring->netdev = NULL;
7684                 }
7685                 dev_info(&pf->pdev->dev,
7686                          "Error adding mac filter on macvlan err %s, aq_err %s\n",
7687                           i40e_stat_str(hw, ret),
7688                           i40e_aq_str(hw, aq_err));
7689                 netdev_err(vdev, "L2fwd offload disabled to L2 filter error\n");
7690         }
7691
7692         return ret;
7693 }
7694
7695 /**
7696  * i40e_setup_macvlans - create the channels which will be macvlans
7697  * @vsi: the VSI we want to access
7698  * @macvlan_cnt: no. of macvlans to be setup
7699  * @qcnt: no. of Qs per macvlan
7700  * @vdev: macvlan netdevice
7701  */
7702 static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt,
7703                                struct net_device *vdev)
7704 {
7705         struct i40e_pf *pf = vsi->back;
7706         struct i40e_hw *hw = &pf->hw;
7707         struct i40e_vsi_context ctxt;
7708         u16 sections, qmap, num_qps;
7709         struct i40e_channel *ch;
7710         int i, pow, ret = 0;
7711         u8 offset = 0;
7712
7713         if (vsi->type != I40E_VSI_MAIN || !macvlan_cnt)
7714                 return -EINVAL;
7715
7716         num_qps = vsi->num_queue_pairs - (macvlan_cnt * qcnt);
7717
7718         /* find the next higher power-of-2 of num queue pairs */
7719         pow = fls(roundup_pow_of_two(num_qps) - 1);
7720
7721         qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
7722                 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
7723
7724         /* Setup context bits for the main VSI */
7725         sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
7726         sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
7727         memset(&ctxt, 0, sizeof(ctxt));
7728         ctxt.seid = vsi->seid;
7729         ctxt.pf_num = vsi->back->hw.pf_id;
7730         ctxt.vf_num = 0;
7731         ctxt.uplink_seid = vsi->uplink_seid;
7732         ctxt.info = vsi->info;
7733         ctxt.info.tc_mapping[0] = cpu_to_le16(qmap);
7734         ctxt.info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
7735         ctxt.info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
7736         ctxt.info.valid_sections |= cpu_to_le16(sections);
7737
7738         /* Reconfigure RSS for main VSI with new max queue count */
7739         vsi->rss_size = max_t(u16, num_qps, qcnt);
7740         ret = i40e_vsi_config_rss(vsi);
7741         if (ret) {
7742                 dev_info(&pf->pdev->dev,
7743                          "Failed to reconfig RSS for num_queues (%u)\n",
7744                          vsi->rss_size);
7745                 return ret;
7746         }
7747         vsi->reconfig_rss = true;
7748         dev_dbg(&vsi->back->pdev->dev,
7749                 "Reconfigured RSS with num_queues (%u)\n", vsi->rss_size);
7750         vsi->next_base_queue = num_qps;
7751         vsi->cnt_q_avail = vsi->num_queue_pairs - num_qps;
7752
7753         /* Update the VSI after updating the VSI queue-mapping
7754          * information
7755          */
7756         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7757         if (ret) {
7758                 dev_info(&pf->pdev->dev,
7759                          "Update vsi tc config failed, err %s aq_err %s\n",
7760                          i40e_stat_str(hw, ret),
7761                          i40e_aq_str(hw, hw->aq.asq_last_status));
7762                 return ret;
7763         }
7764         /* update the local VSI info with updated queue map */
7765         i40e_vsi_update_queue_map(vsi, &ctxt);
7766         vsi->info.valid_sections = 0;
7767
7768         /* Create channels for macvlans */
7769         INIT_LIST_HEAD(&vsi->macvlan_list);
7770         for (i = 0; i < macvlan_cnt; i++) {
7771                 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
7772                 if (!ch) {
7773                         ret = -ENOMEM;
7774                         goto err_free;
7775                 }
7776                 INIT_LIST_HEAD(&ch->list);
7777                 ch->num_queue_pairs = qcnt;
7778                 if (!i40e_setup_channel(pf, vsi, ch)) {
7779                         ret = -EINVAL;
7780                         kfree(ch);
7781                         goto err_free;
7782                 }
7783                 ch->parent_vsi = vsi;
7784                 vsi->cnt_q_avail -= ch->num_queue_pairs;
7785                 vsi->macvlan_cnt++;
7786                 list_add_tail(&ch->list, &vsi->macvlan_list);
7787         }
7788
7789         return ret;
7790
7791 err_free:
7792         dev_info(&pf->pdev->dev, "Failed to setup macvlans\n");
7793         i40e_free_macvlan_channels(vsi);
7794
7795         return ret;
7796 }
7797
7798 /**
7799  * i40e_fwd_add - configure macvlans
7800  * @netdev: net device to configure
7801  * @vdev: macvlan netdevice
7802  **/
7803 static void *i40e_fwd_add(struct net_device *netdev, struct net_device *vdev)
7804 {
7805         struct i40e_netdev_priv *np = netdev_priv(netdev);
7806         u16 q_per_macvlan = 0, macvlan_cnt = 0, vectors;
7807         struct i40e_vsi *vsi = np->vsi;
7808         struct i40e_pf *pf = vsi->back;
7809         struct i40e_fwd_adapter *fwd;
7810         int avail_macvlan, ret;
7811
7812         if ((pf->flags & I40E_FLAG_DCB_ENABLED)) {
7813                 netdev_info(netdev, "Macvlans are not supported when DCB is enabled\n");
7814                 return ERR_PTR(-EINVAL);
7815         }
7816         if ((pf->flags & I40E_FLAG_TC_MQPRIO)) {
7817                 netdev_info(netdev, "Macvlans are not supported when HW TC offload is on\n");
7818                 return ERR_PTR(-EINVAL);
7819         }
7820         if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) {
7821                 netdev_info(netdev, "Not enough vectors available to support macvlans\n");
7822                 return ERR_PTR(-EINVAL);
7823         }
7824
7825         /* The macvlan device has to be a single Q device so that the
7826          * tc_to_txq field can be reused to pick the tx queue.
7827          */
7828         if (netif_is_multiqueue(vdev))
7829                 return ERR_PTR(-ERANGE);
7830
7831         if (!vsi->macvlan_cnt) {
7832                 /* reserve bit 0 for the pf device */
7833                 set_bit(0, vsi->fwd_bitmask);
7834
7835                 /* Try to reserve as many queues as possible for macvlans. First
7836                  * reserve 3/4th of max vectors, then half, then quarter and
7837                  * calculate Qs per macvlan as you go
7838                  */
7839                 vectors = pf->num_lan_msix;
7840                 if (vectors <= I40E_MAX_MACVLANS && vectors > 64) {
7841                         /* allocate 4 Qs per macvlan and 32 Qs to the PF*/
7842                         q_per_macvlan = 4;
7843                         macvlan_cnt = (vectors - 32) / 4;
7844                 } else if (vectors <= 64 && vectors > 32) {
7845                         /* allocate 2 Qs per macvlan and 16 Qs to the PF*/
7846                         q_per_macvlan = 2;
7847                         macvlan_cnt = (vectors - 16) / 2;
7848                 } else if (vectors <= 32 && vectors > 16) {
7849                         /* allocate 1 Q per macvlan and 16 Qs to the PF*/
7850                         q_per_macvlan = 1;
7851                         macvlan_cnt = vectors - 16;
7852                 } else if (vectors <= 16 && vectors > 8) {
7853                         /* allocate 1 Q per macvlan and 8 Qs to the PF */
7854                         q_per_macvlan = 1;
7855                         macvlan_cnt = vectors - 8;
7856                 } else {
7857                         /* allocate 1 Q per macvlan and 1 Q to the PF */
7858                         q_per_macvlan = 1;
7859                         macvlan_cnt = vectors - 1;
7860                 }
7861
7862                 if (macvlan_cnt == 0)
7863                         return ERR_PTR(-EBUSY);
7864
7865                 /* Quiesce VSI queues */
7866                 i40e_quiesce_vsi(vsi);
7867
7868                 /* sets up the macvlans but does not "enable" them */
7869                 ret = i40e_setup_macvlans(vsi, macvlan_cnt, q_per_macvlan,
7870                                           vdev);
7871                 if (ret)
7872                         return ERR_PTR(ret);
7873
7874                 /* Unquiesce VSI */
7875                 i40e_unquiesce_vsi(vsi);
7876         }
7877         avail_macvlan = find_first_zero_bit(vsi->fwd_bitmask,
7878                                             vsi->macvlan_cnt);
7879         if (avail_macvlan >= I40E_MAX_MACVLANS)
7880                 return ERR_PTR(-EBUSY);
7881
7882         /* create the fwd struct */
7883         fwd = kzalloc(sizeof(*fwd), GFP_KERNEL);
7884         if (!fwd)
7885                 return ERR_PTR(-ENOMEM);
7886
7887         set_bit(avail_macvlan, vsi->fwd_bitmask);
7888         fwd->bit_no = avail_macvlan;
7889         netdev_set_sb_channel(vdev, avail_macvlan);
7890         fwd->netdev = vdev;
7891
7892         if (!netif_running(netdev))
7893                 return fwd;
7894
7895         /* Set fwd ring up */
7896         ret = i40e_fwd_ring_up(vsi, vdev, fwd);
7897         if (ret) {
7898                 /* unbind the queues and drop the subordinate channel config */
7899                 netdev_unbind_sb_channel(netdev, vdev);
7900                 netdev_set_sb_channel(vdev, 0);
7901
7902                 kfree(fwd);
7903                 return ERR_PTR(-EINVAL);
7904         }
7905
7906         return fwd;
7907 }
7908
7909 /**
7910  * i40e_del_all_macvlans - Delete all the mac filters on the channels
7911  * @vsi: the VSI we want to access
7912  */
7913 static void i40e_del_all_macvlans(struct i40e_vsi *vsi)
7914 {
7915         struct i40e_channel *ch, *ch_tmp;
7916         struct i40e_pf *pf = vsi->back;
7917         struct i40e_hw *hw = &pf->hw;
7918         int aq_err, ret = 0;
7919
7920         if (list_empty(&vsi->macvlan_list))
7921                 return;
7922
7923         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7924                 if (i40e_is_channel_macvlan(ch)) {
7925                         ret = i40e_del_macvlan_filter(hw, ch->seid,
7926                                                       i40e_channel_mac(ch),
7927                                                       &aq_err);
7928                         if (!ret) {
7929                                 /* Reset queue contexts */
7930                                 i40e_reset_ch_rings(vsi, ch);
7931                                 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7932                                 netdev_unbind_sb_channel(vsi->netdev,
7933                                                          ch->fwd->netdev);
7934                                 netdev_set_sb_channel(ch->fwd->netdev, 0);
7935                                 kfree(ch->fwd);
7936                                 ch->fwd = NULL;
7937                         }
7938                 }
7939         }
7940 }
7941
7942 /**
7943  * i40e_fwd_del - delete macvlan interfaces
7944  * @netdev: net device to configure
7945  * @vdev: macvlan netdevice
7946  */
7947 static void i40e_fwd_del(struct net_device *netdev, void *vdev)
7948 {
7949         struct i40e_netdev_priv *np = netdev_priv(netdev);
7950         struct i40e_fwd_adapter *fwd = vdev;
7951         struct i40e_channel *ch, *ch_tmp;
7952         struct i40e_vsi *vsi = np->vsi;
7953         struct i40e_pf *pf = vsi->back;
7954         struct i40e_hw *hw = &pf->hw;
7955         int aq_err, ret = 0;
7956
7957         /* Find the channel associated with the macvlan and del mac filter */
7958         list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7959                 if (i40e_is_channel_macvlan(ch) &&
7960                     ether_addr_equal(i40e_channel_mac(ch),
7961                                      fwd->netdev->dev_addr)) {
7962                         ret = i40e_del_macvlan_filter(hw, ch->seid,
7963                                                       i40e_channel_mac(ch),
7964                                                       &aq_err);
7965                         if (!ret) {
7966                                 /* Reset queue contexts */
7967                                 i40e_reset_ch_rings(vsi, ch);
7968                                 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7969                                 netdev_unbind_sb_channel(netdev, fwd->netdev);
7970                                 netdev_set_sb_channel(fwd->netdev, 0);
7971                                 kfree(ch->fwd);
7972                                 ch->fwd = NULL;
7973                         } else {
7974                                 dev_info(&pf->pdev->dev,
7975                                          "Error deleting mac filter on macvlan err %s, aq_err %s\n",
7976                                           i40e_stat_str(hw, ret),
7977                                           i40e_aq_str(hw, aq_err));
7978                         }
7979                         break;
7980                 }
7981         }
7982 }
7983
7984 /**
7985  * i40e_setup_tc - configure multiple traffic classes
7986  * @netdev: net device to configure
7987  * @type_data: tc offload data
7988  **/
7989 static int i40e_setup_tc(struct net_device *netdev, void *type_data)
7990 {
7991         struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
7992         struct i40e_netdev_priv *np = netdev_priv(netdev);
7993         struct i40e_vsi *vsi = np->vsi;
7994         struct i40e_pf *pf = vsi->back;
7995         u8 enabled_tc = 0, num_tc, hw;
7996         bool need_reset = false;
7997         int old_queue_pairs;
7998         int ret = -EINVAL;
7999         u16 mode;
8000         int i;
8001
8002         old_queue_pairs = vsi->num_queue_pairs;
8003         num_tc = mqprio_qopt->qopt.num_tc;
8004         hw = mqprio_qopt->qopt.hw;
8005         mode = mqprio_qopt->mode;
8006         if (!hw) {
8007                 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
8008                 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
8009                 goto config_tc;
8010         }
8011
8012         /* Check if MFP enabled */
8013         if (pf->flags & I40E_FLAG_MFP_ENABLED) {
8014                 netdev_info(netdev,
8015                             "Configuring TC not supported in MFP mode\n");
8016                 return ret;
8017         }
8018         switch (mode) {
8019         case TC_MQPRIO_MODE_DCB:
8020                 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
8021
8022                 /* Check if DCB enabled to continue */
8023                 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
8024                         netdev_info(netdev,
8025                                     "DCB is not enabled for adapter\n");
8026                         return ret;
8027                 }
8028
8029                 /* Check whether tc count is within enabled limit */
8030                 if (num_tc > i40e_pf_get_num_tc(pf)) {
8031                         netdev_info(netdev,
8032                                     "TC count greater than enabled on link for adapter\n");
8033                         return ret;
8034                 }
8035                 break;
8036         case TC_MQPRIO_MODE_CHANNEL:
8037                 if (pf->flags & I40E_FLAG_DCB_ENABLED) {
8038                         netdev_info(netdev,
8039                                     "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
8040                         return ret;
8041                 }
8042                 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8043                         return ret;
8044                 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
8045                 if (ret)
8046                         return ret;
8047                 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
8048                        sizeof(*mqprio_qopt));
8049                 pf->flags |= I40E_FLAG_TC_MQPRIO;
8050                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
8051                 break;
8052         default:
8053                 return -EINVAL;
8054         }
8055
8056 config_tc:
8057         /* Generate TC map for number of tc requested */
8058         for (i = 0; i < num_tc; i++)
8059                 enabled_tc |= BIT(i);
8060
8061         /* Requesting same TC configuration as already enabled */
8062         if (enabled_tc == vsi->tc_config.enabled_tc &&
8063             mode != TC_MQPRIO_MODE_CHANNEL)
8064                 return 0;
8065
8066         /* Quiesce VSI queues */
8067         i40e_quiesce_vsi(vsi);
8068
8069         if (!hw && !(pf->flags & I40E_FLAG_TC_MQPRIO))
8070                 i40e_remove_queue_channels(vsi);
8071
8072         /* Configure VSI for enabled TCs */
8073         ret = i40e_vsi_config_tc(vsi, enabled_tc);
8074         if (ret) {
8075                 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
8076                             vsi->seid);
8077                 need_reset = true;
8078                 goto exit;
8079         } else if (enabled_tc &&
8080                    (!is_power_of_2(vsi->tc_config.tc_info[0].qcount))) {
8081                 netdev_info(netdev,
8082                             "Failed to create channel. Override queues (%u) not power of 2\n",
8083                             vsi->tc_config.tc_info[0].qcount);
8084                 ret = -EINVAL;
8085                 need_reset = true;
8086                 goto exit;
8087         }
8088
8089         dev_info(&vsi->back->pdev->dev,
8090                  "Setup channel (id:%u) utilizing num_queues %d\n",
8091                  vsi->seid, vsi->tc_config.tc_info[0].qcount);
8092
8093         if (pf->flags & I40E_FLAG_TC_MQPRIO) {
8094                 if (vsi->mqprio_qopt.max_rate[0]) {
8095                         u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
8096
8097                         do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
8098                         ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
8099                         if (!ret) {
8100                                 u64 credits = max_tx_rate;
8101
8102                                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
8103                                 dev_dbg(&vsi->back->pdev->dev,
8104                                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
8105                                         max_tx_rate,
8106                                         credits,
8107                                         vsi->seid);
8108                         } else {
8109                                 need_reset = true;
8110                                 goto exit;
8111                         }
8112                 }
8113                 ret = i40e_configure_queue_channels(vsi);
8114                 if (ret) {
8115                         vsi->num_queue_pairs = old_queue_pairs;
8116                         netdev_info(netdev,
8117                                     "Failed configuring queue channels\n");
8118                         need_reset = true;
8119                         goto exit;
8120                 }
8121         }
8122
8123 exit:
8124         /* Reset the configuration data to defaults, only TC0 is enabled */
8125         if (need_reset) {
8126                 i40e_vsi_set_default_tc_config(vsi);
8127                 need_reset = false;
8128         }
8129
8130         /* Unquiesce VSI */
8131         i40e_unquiesce_vsi(vsi);
8132         return ret;
8133 }
8134
8135 /**
8136  * i40e_set_cld_element - sets cloud filter element data
8137  * @filter: cloud filter rule
8138  * @cld: ptr to cloud filter element data
8139  *
8140  * This is helper function to copy data into cloud filter element
8141  **/
8142 static inline void
8143 i40e_set_cld_element(struct i40e_cloud_filter *filter,
8144                      struct i40e_aqc_cloud_filters_element_data *cld)
8145 {
8146         u32 ipa;
8147         int i;
8148
8149         memset(cld, 0, sizeof(*cld));
8150         ether_addr_copy(cld->outer_mac, filter->dst_mac);
8151         ether_addr_copy(cld->inner_mac, filter->src_mac);
8152
8153         if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
8154                 return;
8155
8156         if (filter->n_proto == ETH_P_IPV6) {
8157 #define IPV6_MAX_INDEX  (ARRAY_SIZE(filter->dst_ipv6) - 1)
8158                 for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) {
8159                         ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
8160
8161                         *(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa);
8162                 }
8163         } else {
8164                 ipa = be32_to_cpu(filter->dst_ipv4);
8165
8166                 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
8167         }
8168
8169         cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
8170
8171         /* tenant_id is not supported by FW now, once the support is enabled
8172          * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
8173          */
8174         if (filter->tenant_id)
8175                 return;
8176 }
8177
8178 /**
8179  * i40e_add_del_cloud_filter - Add/del cloud filter
8180  * @vsi: pointer to VSI
8181  * @filter: cloud filter rule
8182  * @add: if true, add, if false, delete
8183  *
8184  * Add or delete a cloud filter for a specific flow spec.
8185  * Returns 0 if the filter were successfully added.
8186  **/
8187 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
8188                               struct i40e_cloud_filter *filter, bool add)
8189 {
8190         struct i40e_aqc_cloud_filters_element_data cld_filter;
8191         struct i40e_pf *pf = vsi->back;
8192         int ret;
8193         static const u16 flag_table[128] = {
8194                 [I40E_CLOUD_FILTER_FLAGS_OMAC]  =
8195                         I40E_AQC_ADD_CLOUD_FILTER_OMAC,
8196                 [I40E_CLOUD_FILTER_FLAGS_IMAC]  =
8197                         I40E_AQC_ADD_CLOUD_FILTER_IMAC,
8198                 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN]  =
8199                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
8200                 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
8201                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
8202                 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
8203                         I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
8204                 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
8205                         I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
8206                 [I40E_CLOUD_FILTER_FLAGS_IIP] =
8207                         I40E_AQC_ADD_CLOUD_FILTER_IIP,
8208         };
8209
8210         if (filter->flags >= ARRAY_SIZE(flag_table))
8211                 return I40E_ERR_CONFIG;
8212
8213         memset(&cld_filter, 0, sizeof(cld_filter));
8214
8215         /* copy element needed to add cloud filter from filter */
8216         i40e_set_cld_element(filter, &cld_filter);
8217
8218         if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
8219                 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
8220                                              I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
8221
8222         if (filter->n_proto == ETH_P_IPV6)
8223                 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8224                                                 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8225         else
8226                 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8227                                                 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8228
8229         if (add)
8230                 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
8231                                                 &cld_filter, 1);
8232         else
8233                 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
8234                                                 &cld_filter, 1);
8235         if (ret)
8236                 dev_dbg(&pf->pdev->dev,
8237                         "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
8238                         add ? "add" : "delete", filter->dst_port, ret,
8239                         pf->hw.aq.asq_last_status);
8240         else
8241                 dev_info(&pf->pdev->dev,
8242                          "%s cloud filter for VSI: %d\n",
8243                          add ? "Added" : "Deleted", filter->seid);
8244         return ret;
8245 }
8246
8247 /**
8248  * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
8249  * @vsi: pointer to VSI
8250  * @filter: cloud filter rule
8251  * @add: if true, add, if false, delete
8252  *
8253  * Add or delete a cloud filter for a specific flow spec using big buffer.
8254  * Returns 0 if the filter were successfully added.
8255  **/
8256 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
8257                                       struct i40e_cloud_filter *filter,
8258                                       bool add)
8259 {
8260         struct i40e_aqc_cloud_filters_element_bb cld_filter;
8261         struct i40e_pf *pf = vsi->back;
8262         int ret;
8263
8264         /* Both (src/dst) valid mac_addr are not supported */
8265         if ((is_valid_ether_addr(filter->dst_mac) &&
8266              is_valid_ether_addr(filter->src_mac)) ||
8267             (is_multicast_ether_addr(filter->dst_mac) &&
8268              is_multicast_ether_addr(filter->src_mac)))
8269                 return -EOPNOTSUPP;
8270
8271         /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
8272          * ports are not supported via big buffer now.
8273          */
8274         if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
8275                 return -EOPNOTSUPP;
8276
8277         /* adding filter using src_port/src_ip is not supported at this stage */
8278         if (filter->src_port ||
8279             (filter->src_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8280             !ipv6_addr_any(&filter->ip.v6.src_ip6))
8281                 return -EOPNOTSUPP;
8282
8283         memset(&cld_filter, 0, sizeof(cld_filter));
8284
8285         /* copy element needed to add cloud filter from filter */
8286         i40e_set_cld_element(filter, &cld_filter.element);
8287
8288         if (is_valid_ether_addr(filter->dst_mac) ||
8289             is_valid_ether_addr(filter->src_mac) ||
8290             is_multicast_ether_addr(filter->dst_mac) ||
8291             is_multicast_ether_addr(filter->src_mac)) {
8292                 /* MAC + IP : unsupported mode */
8293                 if (filter->dst_ipv4)
8294                         return -EOPNOTSUPP;
8295
8296                 /* since we validated that L4 port must be valid before
8297                  * we get here, start with respective "flags" value
8298                  * and update if vlan is present or not
8299                  */
8300                 cld_filter.element.flags =
8301                         cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
8302
8303                 if (filter->vlan_id) {
8304                         cld_filter.element.flags =
8305                         cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
8306                 }
8307
8308         } else if ((filter->dst_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8309                    !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
8310                 cld_filter.element.flags =
8311                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
8312                 if (filter->n_proto == ETH_P_IPV6)
8313                         cld_filter.element.flags |=
8314                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8315                 else
8316                         cld_filter.element.flags |=
8317                                 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8318         } else {
8319                 dev_err(&pf->pdev->dev,
8320                         "either mac or ip has to be valid for cloud filter\n");
8321                 return -EINVAL;
8322         }
8323
8324         /* Now copy L4 port in Byte 6..7 in general fields */
8325         cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
8326                                                 be16_to_cpu(filter->dst_port);
8327
8328         if (add) {
8329                 /* Validate current device switch mode, change if necessary */
8330                 ret = i40e_validate_and_set_switch_mode(vsi);
8331                 if (ret) {
8332                         dev_err(&pf->pdev->dev,
8333                                 "failed to set switch mode, ret %d\n",
8334                                 ret);
8335                         return ret;
8336                 }
8337
8338                 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
8339                                                    &cld_filter, 1);
8340         } else {
8341                 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
8342                                                    &cld_filter, 1);
8343         }
8344
8345         if (ret)
8346                 dev_dbg(&pf->pdev->dev,
8347                         "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
8348                         add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
8349         else
8350                 dev_info(&pf->pdev->dev,
8351                          "%s cloud filter for VSI: %d, L4 port: %d\n",
8352                          add ? "add" : "delete", filter->seid,
8353                          ntohs(filter->dst_port));
8354         return ret;
8355 }
8356
8357 /**
8358  * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
8359  * @vsi: Pointer to VSI
8360  * @f: Pointer to struct flow_cls_offload
8361  * @filter: Pointer to cloud filter structure
8362  *
8363  **/
8364 static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
8365                                  struct flow_cls_offload *f,
8366                                  struct i40e_cloud_filter *filter)
8367 {
8368         struct flow_rule *rule = flow_cls_offload_flow_rule(f);
8369         struct flow_dissector *dissector = rule->match.dissector;
8370         u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
8371         struct i40e_pf *pf = vsi->back;
8372         u8 field_flags = 0;
8373
8374         if (dissector->used_keys &
8375             ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
8376               BIT(FLOW_DISSECTOR_KEY_BASIC) |
8377               BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
8378               BIT(FLOW_DISSECTOR_KEY_VLAN) |
8379               BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
8380               BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
8381               BIT(FLOW_DISSECTOR_KEY_PORTS) |
8382               BIT(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
8383                 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%x\n",
8384                         dissector->used_keys);
8385                 return -EOPNOTSUPP;
8386         }
8387
8388         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
8389                 struct flow_match_enc_keyid match;
8390
8391                 flow_rule_match_enc_keyid(rule, &match);
8392                 if (match.mask->keyid != 0)
8393                         field_flags |= I40E_CLOUD_FIELD_TEN_ID;
8394
8395                 filter->tenant_id = be32_to_cpu(match.key->keyid);
8396         }
8397
8398         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
8399                 struct flow_match_basic match;
8400
8401                 flow_rule_match_basic(rule, &match);
8402                 n_proto_key = ntohs(match.key->n_proto);
8403                 n_proto_mask = ntohs(match.mask->n_proto);
8404
8405                 if (n_proto_key == ETH_P_ALL) {
8406                         n_proto_key = 0;
8407                         n_proto_mask = 0;
8408                 }
8409                 filter->n_proto = n_proto_key & n_proto_mask;
8410                 filter->ip_proto = match.key->ip_proto;
8411         }
8412
8413         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
8414                 struct flow_match_eth_addrs match;
8415
8416                 flow_rule_match_eth_addrs(rule, &match);
8417
8418                 /* use is_broadcast and is_zero to check for all 0xf or 0 */
8419                 if (!is_zero_ether_addr(match.mask->dst)) {
8420                         if (is_broadcast_ether_addr(match.mask->dst)) {
8421                                 field_flags |= I40E_CLOUD_FIELD_OMAC;
8422                         } else {
8423                                 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
8424                                         match.mask->dst);
8425                                 return I40E_ERR_CONFIG;
8426                         }
8427                 }
8428
8429                 if (!is_zero_ether_addr(match.mask->src)) {
8430                         if (is_broadcast_ether_addr(match.mask->src)) {
8431                                 field_flags |= I40E_CLOUD_FIELD_IMAC;
8432                         } else {
8433                                 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
8434                                         match.mask->src);
8435                                 return I40E_ERR_CONFIG;
8436                         }
8437                 }
8438                 ether_addr_copy(filter->dst_mac, match.key->dst);
8439                 ether_addr_copy(filter->src_mac, match.key->src);
8440         }
8441
8442         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
8443                 struct flow_match_vlan match;
8444
8445                 flow_rule_match_vlan(rule, &match);
8446                 if (match.mask->vlan_id) {
8447                         if (match.mask->vlan_id == VLAN_VID_MASK) {
8448                                 field_flags |= I40E_CLOUD_FIELD_IVLAN;
8449
8450                         } else {
8451                                 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
8452                                         match.mask->vlan_id);
8453                                 return I40E_ERR_CONFIG;
8454                         }
8455                 }
8456
8457                 filter->vlan_id = cpu_to_be16(match.key->vlan_id);
8458         }
8459
8460         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
8461                 struct flow_match_control match;
8462
8463                 flow_rule_match_control(rule, &match);
8464                 addr_type = match.key->addr_type;
8465         }
8466
8467         if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
8468                 struct flow_match_ipv4_addrs match;
8469
8470                 flow_rule_match_ipv4_addrs(rule, &match);
8471                 if (match.mask->dst) {
8472                         if (match.mask->dst == cpu_to_be32(0xffffffff)) {
8473                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8474                         } else {
8475                                 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
8476                                         &match.mask->dst);
8477                                 return I40E_ERR_CONFIG;
8478                         }
8479                 }
8480
8481                 if (match.mask->src) {
8482                         if (match.mask->src == cpu_to_be32(0xffffffff)) {
8483                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8484                         } else {
8485                                 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
8486                                         &match.mask->src);
8487                                 return I40E_ERR_CONFIG;
8488                         }
8489                 }
8490
8491                 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
8492                         dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
8493                         return I40E_ERR_CONFIG;
8494                 }
8495                 filter->dst_ipv4 = match.key->dst;
8496                 filter->src_ipv4 = match.key->src;
8497         }
8498
8499         if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
8500                 struct flow_match_ipv6_addrs match;
8501
8502                 flow_rule_match_ipv6_addrs(rule, &match);
8503
8504                 /* src and dest IPV6 address should not be LOOPBACK
8505                  * (0:0:0:0:0:0:0:1), which can be represented as ::1
8506                  */
8507                 if (ipv6_addr_loopback(&match.key->dst) ||
8508                     ipv6_addr_loopback(&match.key->src)) {
8509                         dev_err(&pf->pdev->dev,
8510                                 "Bad ipv6, addr is LOOPBACK\n");
8511                         return I40E_ERR_CONFIG;
8512                 }
8513                 if (!ipv6_addr_any(&match.mask->dst) ||
8514                     !ipv6_addr_any(&match.mask->src))
8515                         field_flags |= I40E_CLOUD_FIELD_IIP;
8516
8517                 memcpy(&filter->src_ipv6, &match.key->src.s6_addr32,
8518                        sizeof(filter->src_ipv6));
8519                 memcpy(&filter->dst_ipv6, &match.key->dst.s6_addr32,
8520                        sizeof(filter->dst_ipv6));
8521         }
8522
8523         if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
8524                 struct flow_match_ports match;
8525
8526                 flow_rule_match_ports(rule, &match);
8527                 if (match.mask->src) {
8528                         if (match.mask->src == cpu_to_be16(0xffff)) {
8529                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8530                         } else {
8531                                 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
8532                                         be16_to_cpu(match.mask->src));
8533                                 return I40E_ERR_CONFIG;
8534                         }
8535                 }
8536
8537                 if (match.mask->dst) {
8538                         if (match.mask->dst == cpu_to_be16(0xffff)) {
8539                                 field_flags |= I40E_CLOUD_FIELD_IIP;
8540                         } else {
8541                                 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
8542                                         be16_to_cpu(match.mask->dst));
8543                                 return I40E_ERR_CONFIG;
8544                         }
8545                 }
8546
8547                 filter->dst_port = match.key->dst;
8548                 filter->src_port = match.key->src;
8549
8550                 switch (filter->ip_proto) {
8551                 case IPPROTO_TCP:
8552                 case IPPROTO_UDP:
8553                         break;
8554                 default:
8555                         dev_err(&pf->pdev->dev,
8556                                 "Only UDP and TCP transport are supported\n");
8557                         return -EINVAL;
8558                 }
8559         }
8560         filter->flags = field_flags;
8561         return 0;
8562 }
8563
8564 /**
8565  * i40e_handle_tclass: Forward to a traffic class on the device
8566  * @vsi: Pointer to VSI
8567  * @tc: traffic class index on the device
8568  * @filter: Pointer to cloud filter structure
8569  *
8570  **/
8571 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
8572                               struct i40e_cloud_filter *filter)
8573 {
8574         struct i40e_channel *ch, *ch_tmp;
8575
8576         /* direct to a traffic class on the same device */
8577         if (tc == 0) {
8578                 filter->seid = vsi->seid;
8579                 return 0;
8580         } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
8581                 if (!filter->dst_port) {
8582                         dev_err(&vsi->back->pdev->dev,
8583                                 "Specify destination port to direct to traffic class that is not default\n");
8584                         return -EINVAL;
8585                 }
8586                 if (list_empty(&vsi->ch_list))
8587                         return -EINVAL;
8588                 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
8589                                          list) {
8590                         if (ch->seid == vsi->tc_seid_map[tc])
8591                                 filter->seid = ch->seid;
8592                 }
8593                 return 0;
8594         }
8595         dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
8596         return -EINVAL;
8597 }
8598
8599 /**
8600  * i40e_configure_clsflower - Configure tc flower filters
8601  * @vsi: Pointer to VSI
8602  * @cls_flower: Pointer to struct flow_cls_offload
8603  *
8604  **/
8605 static int i40e_configure_clsflower(struct i40e_vsi *vsi,
8606                                     struct flow_cls_offload *cls_flower)
8607 {
8608         int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);
8609         struct i40e_cloud_filter *filter = NULL;
8610         struct i40e_pf *pf = vsi->back;
8611         int err = 0;
8612
8613         if (tc < 0) {
8614                 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
8615                 return -EOPNOTSUPP;
8616         }
8617
8618         if (!tc) {
8619                 dev_err(&pf->pdev->dev, "Unable to add filter because of invalid destination");
8620                 return -EINVAL;
8621         }
8622
8623         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
8624             test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
8625                 return -EBUSY;
8626
8627         if (pf->fdir_pf_active_filters ||
8628             (!hlist_empty(&pf->fdir_filter_list))) {
8629                 dev_err(&vsi->back->pdev->dev,
8630                         "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
8631                 return -EINVAL;
8632         }
8633
8634         if (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) {
8635                 dev_err(&vsi->back->pdev->dev,
8636                         "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
8637                 vsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8638                 vsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8639         }
8640
8641         filter = kzalloc(sizeof(*filter), GFP_KERNEL);
8642         if (!filter)
8643                 return -ENOMEM;
8644
8645         filter->cookie = cls_flower->cookie;
8646
8647         err = i40e_parse_cls_flower(vsi, cls_flower, filter);
8648         if (err < 0)
8649                 goto err;
8650
8651         err = i40e_handle_tclass(vsi, tc, filter);
8652         if (err < 0)
8653                 goto err;
8654
8655         /* Add cloud filter */
8656         if (filter->dst_port)
8657                 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);
8658         else
8659                 err = i40e_add_del_cloud_filter(vsi, filter, true);
8660
8661         if (err) {
8662                 dev_err(&pf->pdev->dev, "Failed to add cloud filter, err %d\n",
8663                         err);
8664                 goto err;
8665         }
8666
8667         /* add filter to the ordered list */
8668         INIT_HLIST_NODE(&filter->cloud_node);
8669
8670         hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
8671
8672         pf->num_cloud_filters++;
8673
8674         return err;
8675 err:
8676         kfree(filter);
8677         return err;
8678 }
8679
8680 /**
8681  * i40e_find_cloud_filter - Find the could filter in the list
8682  * @vsi: Pointer to VSI
8683  * @cookie: filter specific cookie
8684  *
8685  **/
8686 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
8687                                                         unsigned long *cookie)
8688 {
8689         struct i40e_cloud_filter *filter = NULL;
8690         struct hlist_node *node2;
8691
8692         hlist_for_each_entry_safe(filter, node2,
8693                                   &vsi->back->cloud_filter_list, cloud_node)
8694                 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))
8695                         return filter;
8696         return NULL;
8697 }
8698
8699 /**
8700  * i40e_delete_clsflower - Remove tc flower filters
8701  * @vsi: Pointer to VSI
8702  * @cls_flower: Pointer to struct flow_cls_offload
8703  *
8704  **/
8705 static int i40e_delete_clsflower(struct i40e_vsi *vsi,
8706                                  struct flow_cls_offload *cls_flower)
8707 {
8708         struct i40e_cloud_filter *filter = NULL;
8709         struct i40e_pf *pf = vsi->back;
8710         int err = 0;
8711
8712         filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);
8713
8714         if (!filter)
8715                 return -EINVAL;
8716
8717         hash_del(&filter->cloud_node);
8718
8719         if (filter->dst_port)
8720                 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);
8721         else
8722                 err = i40e_add_del_cloud_filter(vsi, filter, false);
8723
8724         kfree(filter);
8725         if (err) {
8726                 dev_err(&pf->pdev->dev,
8727                         "Failed to delete cloud filter, err %s\n",
8728                         i40e_stat_str(&pf->hw, err));
8729                 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
8730         }
8731
8732         pf->num_cloud_filters--;
8733         if (!pf->num_cloud_filters)
8734                 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8735                     !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8736                         pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8737                         pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8738                         pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8739                 }
8740         return 0;
8741 }
8742
8743 /**
8744  * i40e_setup_tc_cls_flower - flower classifier offloads
8745  * @np: net device to configure
8746  * @cls_flower: offload data
8747  **/
8748 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
8749                                     struct flow_cls_offload *cls_flower)
8750 {
8751         struct i40e_vsi *vsi = np->vsi;
8752
8753         switch (cls_flower->command) {
8754         case FLOW_CLS_REPLACE:
8755                 return i40e_configure_clsflower(vsi, cls_flower);
8756         case FLOW_CLS_DESTROY:
8757                 return i40e_delete_clsflower(vsi, cls_flower);
8758         case FLOW_CLS_STATS:
8759                 return -EOPNOTSUPP;
8760         default:
8761                 return -EOPNOTSUPP;
8762         }
8763 }
8764
8765 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
8766                                   void *cb_priv)
8767 {
8768         struct i40e_netdev_priv *np = cb_priv;
8769
8770         if (!tc_cls_can_offload_and_chain0(np->vsi->netdev, type_data))
8771                 return -EOPNOTSUPP;
8772
8773         switch (type) {
8774         case TC_SETUP_CLSFLOWER:
8775                 return i40e_setup_tc_cls_flower(np, type_data);
8776
8777         default:
8778                 return -EOPNOTSUPP;
8779         }
8780 }
8781
8782 static LIST_HEAD(i40e_block_cb_list);
8783
8784 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
8785                            void *type_data)
8786 {
8787         struct i40e_netdev_priv *np = netdev_priv(netdev);
8788
8789         switch (type) {
8790         case TC_SETUP_QDISC_MQPRIO:
8791                 return i40e_setup_tc(netdev, type_data);
8792         case TC_SETUP_BLOCK:
8793                 return flow_block_cb_setup_simple(type_data,
8794                                                   &i40e_block_cb_list,
8795                                                   i40e_setup_tc_block_cb,
8796                                                   np, np, true);
8797         default:
8798                 return -EOPNOTSUPP;
8799         }
8800 }
8801
8802 /**
8803  * i40e_open - Called when a network interface is made active
8804  * @netdev: network interface device structure
8805  *
8806  * The open entry point is called when a network interface is made
8807  * active by the system (IFF_UP).  At this point all resources needed
8808  * for transmit and receive operations are allocated, the interrupt
8809  * handler is registered with the OS, the netdev watchdog subtask is
8810  * enabled, and the stack is notified that the interface is ready.
8811  *
8812  * Returns 0 on success, negative value on failure
8813  **/
8814 int i40e_open(struct net_device *netdev)
8815 {
8816         struct i40e_netdev_priv *np = netdev_priv(netdev);
8817         struct i40e_vsi *vsi = np->vsi;
8818         struct i40e_pf *pf = vsi->back;
8819         int err;
8820
8821         /* disallow open during test or if eeprom is broken */
8822         if (test_bit(__I40E_TESTING, pf->state) ||
8823             test_bit(__I40E_BAD_EEPROM, pf->state))
8824                 return -EBUSY;
8825
8826         netif_carrier_off(netdev);
8827
8828         if (i40e_force_link_state(pf, true))
8829                 return -EAGAIN;
8830
8831         err = i40e_vsi_open(vsi);
8832         if (err)
8833                 return err;
8834
8835         /* configure global TSO hardware offload settings */
8836         wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
8837                                                        TCP_FLAG_FIN) >> 16);
8838         wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
8839                                                        TCP_FLAG_FIN |
8840                                                        TCP_FLAG_CWR) >> 16);
8841         wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
8842         udp_tunnel_get_rx_info(netdev);
8843
8844         return 0;
8845 }
8846
8847 /**
8848  * i40e_netif_set_realnum_tx_rx_queues - Update number of tx/rx queues
8849  * @vsi: vsi structure
8850  *
8851  * This updates netdev's number of tx/rx queues
8852  *
8853  * Returns status of setting tx/rx queues
8854  **/
8855 static int i40e_netif_set_realnum_tx_rx_queues(struct i40e_vsi *vsi)
8856 {
8857         int ret;
8858
8859         ret = netif_set_real_num_rx_queues(vsi->netdev,
8860                                            vsi->num_queue_pairs);
8861         if (ret)
8862                 return ret;
8863
8864         return netif_set_real_num_tx_queues(vsi->netdev,
8865                                             vsi->num_queue_pairs);
8866 }
8867
8868 /**
8869  * i40e_vsi_open -
8870  * @vsi: the VSI to open
8871  *
8872  * Finish initialization of the VSI.
8873  *
8874  * Returns 0 on success, negative value on failure
8875  *
8876  * Note: expects to be called while under rtnl_lock()
8877  **/
8878 int i40e_vsi_open(struct i40e_vsi *vsi)
8879 {
8880         struct i40e_pf *pf = vsi->back;
8881         char int_name[I40E_INT_NAME_STR_LEN];
8882         int err;
8883
8884         /* allocate descriptors */
8885         err = i40e_vsi_setup_tx_resources(vsi);
8886         if (err)
8887                 goto err_setup_tx;
8888         err = i40e_vsi_setup_rx_resources(vsi);
8889         if (err)
8890                 goto err_setup_rx;
8891
8892         err = i40e_vsi_configure(vsi);
8893         if (err)
8894                 goto err_setup_rx;
8895
8896         if (vsi->netdev) {
8897                 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
8898                          dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
8899                 err = i40e_vsi_request_irq(vsi, int_name);
8900                 if (err)
8901                         goto err_setup_rx;
8902
8903                 /* Notify the stack of the actual queue counts. */
8904                 err = i40e_netif_set_realnum_tx_rx_queues(vsi);
8905                 if (err)
8906                         goto err_set_queues;
8907
8908         } else if (vsi->type == I40E_VSI_FDIR) {
8909                 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
8910                          dev_driver_string(&pf->pdev->dev),
8911                          dev_name(&pf->pdev->dev));
8912                 err = i40e_vsi_request_irq(vsi, int_name);
8913                 if (err)
8914                         goto err_setup_rx;
8915
8916         } else {
8917                 err = -EINVAL;
8918                 goto err_setup_rx;
8919         }
8920
8921         err = i40e_up_complete(vsi);
8922         if (err)
8923                 goto err_up_complete;
8924
8925         return 0;
8926
8927 err_up_complete:
8928         i40e_down(vsi);
8929 err_set_queues:
8930         i40e_vsi_free_irq(vsi);
8931 err_setup_rx:
8932         i40e_vsi_free_rx_resources(vsi);
8933 err_setup_tx:
8934         i40e_vsi_free_tx_resources(vsi);
8935         if (vsi == pf->vsi[pf->lan_vsi])
8936                 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
8937
8938         return err;
8939 }
8940
8941 /**
8942  * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
8943  * @pf: Pointer to PF
8944  *
8945  * This function destroys the hlist where all the Flow Director
8946  * filters were saved.
8947  **/
8948 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
8949 {
8950         struct i40e_fdir_filter *filter;
8951         struct i40e_flex_pit *pit_entry, *tmp;
8952         struct hlist_node *node2;
8953
8954         hlist_for_each_entry_safe(filter, node2,
8955                                   &pf->fdir_filter_list, fdir_node) {
8956                 hlist_del(&filter->fdir_node);
8957                 kfree(filter);
8958         }
8959
8960         list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
8961                 list_del(&pit_entry->list);
8962                 kfree(pit_entry);
8963         }
8964         INIT_LIST_HEAD(&pf->l3_flex_pit_list);
8965
8966         list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
8967                 list_del(&pit_entry->list);
8968                 kfree(pit_entry);
8969         }
8970         INIT_LIST_HEAD(&pf->l4_flex_pit_list);
8971
8972         pf->fdir_pf_active_filters = 0;
8973         i40e_reset_fdir_filter_cnt(pf);
8974
8975         /* Reprogram the default input set for TCP/IPv4 */
8976         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
8977                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8978                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8979
8980         /* Reprogram the default input set for TCP/IPv6 */
8981         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_TCP,
8982                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8983                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8984
8985         /* Reprogram the default input set for UDP/IPv4 */
8986         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
8987                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8988                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8989
8990         /* Reprogram the default input set for UDP/IPv6 */
8991         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_UDP,
8992                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8993                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8994
8995         /* Reprogram the default input set for SCTP/IPv4 */
8996         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
8997                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8998                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8999
9000         /* Reprogram the default input set for SCTP/IPv6 */
9001         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_SCTP,
9002                                 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9003                                 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9004
9005         /* Reprogram the default input set for Other/IPv4 */
9006         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
9007                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9008
9009         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
9010                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9011
9012         /* Reprogram the default input set for Other/IPv6 */
9013         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER,
9014                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9015
9016         i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV6,
9017                                 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9018 }
9019
9020 /**
9021  * i40e_cloud_filter_exit - Cleans up the cloud filters
9022  * @pf: Pointer to PF
9023  *
9024  * This function destroys the hlist where all the cloud filters
9025  * were saved.
9026  **/
9027 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
9028 {
9029         struct i40e_cloud_filter *cfilter;
9030         struct hlist_node *node;
9031
9032         hlist_for_each_entry_safe(cfilter, node,
9033                                   &pf->cloud_filter_list, cloud_node) {
9034                 hlist_del(&cfilter->cloud_node);
9035                 kfree(cfilter);
9036         }
9037         pf->num_cloud_filters = 0;
9038
9039         if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
9040             !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
9041                 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
9042                 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
9043                 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
9044         }
9045 }
9046
9047 /**
9048  * i40e_close - Disables a network interface
9049  * @netdev: network interface device structure
9050  *
9051  * The close entry point is called when an interface is de-activated
9052  * by the OS.  The hardware is still under the driver's control, but
9053  * this netdev interface is disabled.
9054  *
9055  * Returns 0, this is not allowed to fail
9056  **/
9057 int i40e_close(struct net_device *netdev)
9058 {
9059         struct i40e_netdev_priv *np = netdev_priv(netdev);
9060         struct i40e_vsi *vsi = np->vsi;
9061
9062         i40e_vsi_close(vsi);
9063
9064         return 0;
9065 }
9066
9067 /**
9068  * i40e_do_reset - Start a PF or Core Reset sequence
9069  * @pf: board private structure
9070  * @reset_flags: which reset is requested
9071  * @lock_acquired: indicates whether or not the lock has been acquired
9072  * before this function was called.
9073  *
9074  * The essential difference in resets is that the PF Reset
9075  * doesn't clear the packet buffers, doesn't reset the PE
9076  * firmware, and doesn't bother the other PFs on the chip.
9077  **/
9078 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
9079 {
9080         u32 val;
9081
9082         /* do the biggest reset indicated */
9083         if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
9084
9085                 /* Request a Global Reset
9086                  *
9087                  * This will start the chip's countdown to the actual full
9088                  * chip reset event, and a warning interrupt to be sent
9089                  * to all PFs, including the requestor.  Our handler
9090                  * for the warning interrupt will deal with the shutdown
9091                  * and recovery of the switch setup.
9092                  */
9093                 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
9094                 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9095                 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
9096                 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9097
9098         } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
9099
9100                 /* Request a Core Reset
9101                  *
9102                  * Same as Global Reset, except does *not* include the MAC/PHY
9103                  */
9104                 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
9105                 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9106                 val |= I40E_GLGEN_RTRIG_CORER_MASK;
9107                 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9108                 i40e_flush(&pf->hw);
9109
9110         } else if (reset_flags & I40E_PF_RESET_FLAG) {
9111
9112                 /* Request a PF Reset
9113                  *
9114                  * Resets only the PF-specific registers
9115                  *
9116                  * This goes directly to the tear-down and rebuild of
9117                  * the switch, since we need to do all the recovery as
9118                  * for the Core Reset.
9119                  */
9120                 dev_dbg(&pf->pdev->dev, "PFR requested\n");
9121                 i40e_handle_reset_warning(pf, lock_acquired);
9122
9123         } else if (reset_flags & I40E_PF_RESET_AND_REBUILD_FLAG) {
9124                 /* Request a PF Reset
9125                  *
9126                  * Resets PF and reinitializes PFs VSI.
9127                  */
9128                 i40e_prep_for_reset(pf);
9129                 i40e_reset_and_rebuild(pf, true, lock_acquired);
9130                 dev_info(&pf->pdev->dev,
9131                          pf->flags & I40E_FLAG_DISABLE_FW_LLDP ?
9132                          "FW LLDP is disabled\n" :
9133                          "FW LLDP is enabled\n");
9134
9135         } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
9136                 int v;
9137
9138                 /* Find the VSI(s) that requested a re-init */
9139                 dev_info(&pf->pdev->dev,
9140                          "VSI reinit requested\n");
9141                 for (v = 0; v < pf->num_alloc_vsi; v++) {
9142                         struct i40e_vsi *vsi = pf->vsi[v];
9143
9144                         if (vsi != NULL &&
9145                             test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED,
9146                                                vsi->state))
9147                                 i40e_vsi_reinit_locked(pf->vsi[v]);
9148                 }
9149         } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
9150                 int v;
9151
9152                 /* Find the VSI(s) that needs to be brought down */
9153                 dev_info(&pf->pdev->dev, "VSI down requested\n");
9154                 for (v = 0; v < pf->num_alloc_vsi; v++) {
9155                         struct i40e_vsi *vsi = pf->vsi[v];
9156
9157                         if (vsi != NULL &&
9158                             test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED,
9159                                                vsi->state)) {
9160                                 set_bit(__I40E_VSI_DOWN, vsi->state);
9161                                 i40e_down(vsi);
9162                         }
9163                 }
9164         } else {
9165                 dev_info(&pf->pdev->dev,
9166                          "bad reset request 0x%08x\n", reset_flags);
9167         }
9168 }
9169
9170 #ifdef CONFIG_I40E_DCB
9171 /**
9172  * i40e_dcb_need_reconfig - Check if DCB needs reconfig
9173  * @pf: board private structure
9174  * @old_cfg: current DCB config
9175  * @new_cfg: new DCB config
9176  **/
9177 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
9178                             struct i40e_dcbx_config *old_cfg,
9179                             struct i40e_dcbx_config *new_cfg)
9180 {
9181         bool need_reconfig = false;
9182
9183         /* Check if ETS configuration has changed */
9184         if (memcmp(&new_cfg->etscfg,
9185                    &old_cfg->etscfg,
9186                    sizeof(new_cfg->etscfg))) {
9187                 /* If Priority Table has changed reconfig is needed */
9188                 if (memcmp(&new_cfg->etscfg.prioritytable,
9189                            &old_cfg->etscfg.prioritytable,
9190                            sizeof(new_cfg->etscfg.prioritytable))) {
9191                         need_reconfig = true;
9192                         dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
9193                 }
9194
9195                 if (memcmp(&new_cfg->etscfg.tcbwtable,
9196                            &old_cfg->etscfg.tcbwtable,
9197                            sizeof(new_cfg->etscfg.tcbwtable)))
9198                         dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
9199
9200                 if (memcmp(&new_cfg->etscfg.tsatable,
9201                            &old_cfg->etscfg.tsatable,
9202                            sizeof(new_cfg->etscfg.tsatable)))
9203                         dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
9204         }
9205
9206         /* Check if PFC configuration has changed */
9207         if (memcmp(&new_cfg->pfc,
9208                    &old_cfg->pfc,
9209                    sizeof(new_cfg->pfc))) {
9210                 need_reconfig = true;
9211                 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
9212         }
9213
9214         /* Check if APP Table has changed */
9215         if (memcmp(&new_cfg->app,
9216                    &old_cfg->app,
9217                    sizeof(new_cfg->app))) {
9218                 need_reconfig = true;
9219                 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
9220         }
9221
9222         dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
9223         return need_reconfig;
9224 }
9225
9226 /**
9227  * i40e_handle_lldp_event - Handle LLDP Change MIB event
9228  * @pf: board private structure
9229  * @e: event info posted on ARQ
9230  **/
9231 static int i40e_handle_lldp_event(struct i40e_pf *pf,
9232                                   struct i40e_arq_event_info *e)
9233 {
9234         struct i40e_aqc_lldp_get_mib *mib =
9235                 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
9236         struct i40e_hw *hw = &pf->hw;
9237         struct i40e_dcbx_config tmp_dcbx_cfg;
9238         bool need_reconfig = false;
9239         int ret = 0;
9240         u8 type;
9241
9242         /* X710-T*L 2.5G and 5G speeds don't support DCB */
9243         if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9244             (hw->phy.link_info.link_speed &
9245              ~(I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB)) &&
9246              !(pf->flags & I40E_FLAG_DCB_CAPABLE))
9247                 /* let firmware decide if the DCB should be disabled */
9248                 pf->flags |= I40E_FLAG_DCB_CAPABLE;
9249
9250         /* Not DCB capable or capability disabled */
9251         if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
9252                 return ret;
9253
9254         /* Ignore if event is not for Nearest Bridge */
9255         type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
9256                 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
9257         dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
9258         if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
9259                 return ret;
9260
9261         /* Check MIB Type and return if event for Remote MIB update */
9262         type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
9263         dev_dbg(&pf->pdev->dev,
9264                 "LLDP event mib type %s\n", type ? "remote" : "local");
9265         if (type == I40E_AQ_LLDP_MIB_REMOTE) {
9266                 /* Update the remote cached instance and return */
9267                 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
9268                                 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
9269                                 &hw->remote_dcbx_config);
9270                 goto exit;
9271         }
9272
9273         /* Store the old configuration */
9274         tmp_dcbx_cfg = hw->local_dcbx_config;
9275
9276         /* Reset the old DCBx configuration data */
9277         memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
9278         /* Get updated DCBX data from firmware */
9279         ret = i40e_get_dcb_config(&pf->hw);
9280         if (ret) {
9281                 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9282                 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9283                     (hw->phy.link_info.link_speed &
9284                      (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
9285                         dev_warn(&pf->pdev->dev,
9286                                  "DCB is not supported for X710-T*L 2.5/5G speeds\n");
9287                         pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9288                 } else {
9289                         dev_info(&pf->pdev->dev,
9290                                  "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
9291                                  i40e_stat_str(&pf->hw, ret),
9292                                  i40e_aq_str(&pf->hw,
9293                                              pf->hw.aq.asq_last_status));
9294                 }
9295                 goto exit;
9296         }
9297
9298         /* No change detected in DCBX configs */
9299         if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
9300                     sizeof(tmp_dcbx_cfg))) {
9301                 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
9302                 goto exit;
9303         }
9304
9305         need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
9306                                                &hw->local_dcbx_config);
9307
9308         i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
9309
9310         if (!need_reconfig)
9311                 goto exit;
9312
9313         /* Enable DCB tagging only when more than one TC */
9314         if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
9315                 pf->flags |= I40E_FLAG_DCB_ENABLED;
9316         else
9317                 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9318
9319         set_bit(__I40E_PORT_SUSPENDED, pf->state);
9320         /* Reconfiguration needed quiesce all VSIs */
9321         i40e_pf_quiesce_all_vsi(pf);
9322
9323         /* Changes in configuration update VEB/VSI */
9324         i40e_dcb_reconfigure(pf);
9325
9326         ret = i40e_resume_port_tx(pf);
9327
9328         clear_bit(__I40E_PORT_SUSPENDED, pf->state);
9329         /* In case of error no point in resuming VSIs */
9330         if (ret)
9331                 goto exit;
9332
9333         /* Wait for the PF's queues to be disabled */
9334         ret = i40e_pf_wait_queues_disabled(pf);
9335         if (ret) {
9336                 /* Schedule PF reset to recover */
9337                 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9338                 i40e_service_event_schedule(pf);
9339         } else {
9340                 i40e_pf_unquiesce_all_vsi(pf);
9341                 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
9342                 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
9343         }
9344
9345 exit:
9346         return ret;
9347 }
9348 #endif /* CONFIG_I40E_DCB */
9349
9350 /**
9351  * i40e_do_reset_safe - Protected reset path for userland calls.
9352  * @pf: board private structure
9353  * @reset_flags: which reset is requested
9354  *
9355  **/
9356 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
9357 {
9358         rtnl_lock();
9359         i40e_do_reset(pf, reset_flags, true);
9360         rtnl_unlock();
9361 }
9362
9363 /**
9364  * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
9365  * @pf: board private structure
9366  * @e: event info posted on ARQ
9367  *
9368  * Handler for LAN Queue Overflow Event generated by the firmware for PF
9369  * and VF queues
9370  **/
9371 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
9372                                            struct i40e_arq_event_info *e)
9373 {
9374         struct i40e_aqc_lan_overflow *data =
9375                 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
9376         u32 queue = le32_to_cpu(data->prtdcb_rupto);
9377         u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
9378         struct i40e_hw *hw = &pf->hw;
9379         struct i40e_vf *vf;
9380         u16 vf_id;
9381
9382         dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
9383                 queue, qtx_ctl);
9384
9385         /* Queue belongs to VF, find the VF and issue VF reset */
9386         if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
9387             >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
9388                 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
9389                          >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
9390                 vf_id -= hw->func_caps.vf_base_id;
9391                 vf = &pf->vf[vf_id];
9392                 i40e_vc_notify_vf_reset(vf);
9393                 /* Allow VF to process pending reset notification */
9394                 msleep(20);
9395                 i40e_reset_vf(vf, false);
9396         }
9397 }
9398
9399 /**
9400  * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
9401  * @pf: board private structure
9402  **/
9403 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
9404 {
9405         u32 val, fcnt_prog;
9406
9407         val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9408         fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
9409         return fcnt_prog;
9410 }
9411
9412 /**
9413  * i40e_get_current_fd_count - Get total FD filters programmed for this PF
9414  * @pf: board private structure
9415  **/
9416 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
9417 {
9418         u32 val, fcnt_prog;
9419
9420         val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9421         fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
9422                     ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
9423                       I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
9424         return fcnt_prog;
9425 }
9426
9427 /**
9428  * i40e_get_global_fd_count - Get total FD filters programmed on device
9429  * @pf: board private structure
9430  **/
9431 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
9432 {
9433         u32 val, fcnt_prog;
9434
9435         val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
9436         fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
9437                     ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
9438                      I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
9439         return fcnt_prog;
9440 }
9441
9442 /**
9443  * i40e_reenable_fdir_sb - Restore FDir SB capability
9444  * @pf: board private structure
9445  **/
9446 static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
9447 {
9448         if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
9449                 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
9450                     (I40E_DEBUG_FD & pf->hw.debug_mask))
9451                         dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
9452 }
9453
9454 /**
9455  * i40e_reenable_fdir_atr - Restore FDir ATR capability
9456  * @pf: board private structure
9457  **/
9458 static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
9459 {
9460         if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) {
9461                 /* ATR uses the same filtering logic as SB rules. It only
9462                  * functions properly if the input set mask is at the default
9463                  * settings. It is safe to restore the default input set
9464                  * because there are no active TCPv4 filter rules.
9465                  */
9466                 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9467                                         I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9468                                         I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9469
9470                 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
9471                     (I40E_DEBUG_FD & pf->hw.debug_mask))
9472                         dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
9473         }
9474 }
9475
9476 /**
9477  * i40e_delete_invalid_filter - Delete an invalid FDIR filter
9478  * @pf: board private structure
9479  * @filter: FDir filter to remove
9480  */
9481 static void i40e_delete_invalid_filter(struct i40e_pf *pf,
9482                                        struct i40e_fdir_filter *filter)
9483 {
9484         /* Update counters */
9485         pf->fdir_pf_active_filters--;
9486         pf->fd_inv = 0;
9487
9488         switch (filter->flow_type) {
9489         case TCP_V4_FLOW:
9490                 pf->fd_tcp4_filter_cnt--;
9491                 break;
9492         case UDP_V4_FLOW:
9493                 pf->fd_udp4_filter_cnt--;
9494                 break;
9495         case SCTP_V4_FLOW:
9496                 pf->fd_sctp4_filter_cnt--;
9497                 break;
9498         case TCP_V6_FLOW:
9499                 pf->fd_tcp6_filter_cnt--;
9500                 break;
9501         case UDP_V6_FLOW:
9502                 pf->fd_udp6_filter_cnt--;
9503                 break;
9504         case SCTP_V6_FLOW:
9505                 pf->fd_udp6_filter_cnt--;
9506                 break;
9507         case IP_USER_FLOW:
9508                 switch (filter->ipl4_proto) {
9509                 case IPPROTO_TCP:
9510                         pf->fd_tcp4_filter_cnt--;
9511                         break;
9512                 case IPPROTO_UDP:
9513                         pf->fd_udp4_filter_cnt--;
9514                         break;
9515                 case IPPROTO_SCTP:
9516                         pf->fd_sctp4_filter_cnt--;
9517                         break;
9518                 case IPPROTO_IP:
9519                         pf->fd_ip4_filter_cnt--;
9520                         break;
9521                 }
9522                 break;
9523         case IPV6_USER_FLOW:
9524                 switch (filter->ipl4_proto) {
9525                 case IPPROTO_TCP:
9526                         pf->fd_tcp6_filter_cnt--;
9527                         break;
9528                 case IPPROTO_UDP:
9529                         pf->fd_udp6_filter_cnt--;
9530                         break;
9531                 case IPPROTO_SCTP:
9532                         pf->fd_sctp6_filter_cnt--;
9533                         break;
9534                 case IPPROTO_IP:
9535                         pf->fd_ip6_filter_cnt--;
9536                         break;
9537                 }
9538                 break;
9539         }
9540
9541         /* Remove the filter from the list and free memory */
9542         hlist_del(&filter->fdir_node);
9543         kfree(filter);
9544 }
9545
9546 /**
9547  * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
9548  * @pf: board private structure
9549  **/
9550 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
9551 {
9552         struct i40e_fdir_filter *filter;
9553         u32 fcnt_prog, fcnt_avail;
9554         struct hlist_node *node;
9555
9556         if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9557                 return;
9558
9559         /* Check if we have enough room to re-enable FDir SB capability. */
9560         fcnt_prog = i40e_get_global_fd_count(pf);
9561         fcnt_avail = pf->fdir_pf_filter_count;
9562         if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
9563             (pf->fd_add_err == 0) ||
9564             (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
9565                 i40e_reenable_fdir_sb(pf);
9566
9567         /* We should wait for even more space before re-enabling ATR.
9568          * Additionally, we cannot enable ATR as long as we still have TCP SB
9569          * rules active.
9570          */
9571         if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
9572             pf->fd_tcp4_filter_cnt == 0 && pf->fd_tcp6_filter_cnt == 0)
9573                 i40e_reenable_fdir_atr(pf);
9574
9575         /* if hw had a problem adding a filter, delete it */
9576         if (pf->fd_inv > 0) {
9577                 hlist_for_each_entry_safe(filter, node,
9578                                           &pf->fdir_filter_list, fdir_node)
9579                         if (filter->fd_id == pf->fd_inv)
9580                                 i40e_delete_invalid_filter(pf, filter);
9581         }
9582 }
9583
9584 #define I40E_MIN_FD_FLUSH_INTERVAL 10
9585 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
9586 /**
9587  * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
9588  * @pf: board private structure
9589  **/
9590 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
9591 {
9592         unsigned long min_flush_time;
9593         int flush_wait_retry = 50;
9594         bool disable_atr = false;
9595         int fd_room;
9596         int reg;
9597
9598         if (!time_after(jiffies, pf->fd_flush_timestamp +
9599                                  (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
9600                 return;
9601
9602         /* If the flush is happening too quick and we have mostly SB rules we
9603          * should not re-enable ATR for some time.
9604          */
9605         min_flush_time = pf->fd_flush_timestamp +
9606                          (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
9607         fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
9608
9609         if (!(time_after(jiffies, min_flush_time)) &&
9610             (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
9611                 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9612                         dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
9613                 disable_atr = true;
9614         }
9615
9616         pf->fd_flush_timestamp = jiffies;
9617         set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9618         /* flush all filters */
9619         wr32(&pf->hw, I40E_PFQF_CTL_1,
9620              I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
9621         i40e_flush(&pf->hw);
9622         pf->fd_flush_cnt++;
9623         pf->fd_add_err = 0;
9624         do {
9625                 /* Check FD flush status every 5-6msec */
9626                 usleep_range(5000, 6000);
9627                 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
9628                 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
9629                         break;
9630         } while (flush_wait_retry--);
9631         if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
9632                 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
9633         } else {
9634                 /* replay sideband filters */
9635                 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
9636                 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
9637                         clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9638                 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
9639                 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9640                         dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
9641         }
9642 }
9643
9644 /**
9645  * i40e_get_current_atr_cnt - Get the count of total FD ATR filters programmed
9646  * @pf: board private structure
9647  **/
9648 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
9649 {
9650         return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
9651 }
9652
9653 /**
9654  * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
9655  * @pf: board private structure
9656  **/
9657 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
9658 {
9659
9660         /* if interface is down do nothing */
9661         if (test_bit(__I40E_DOWN, pf->state))
9662                 return;
9663
9664         if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9665                 i40e_fdir_flush_and_replay(pf);
9666
9667         i40e_fdir_check_and_reenable(pf);
9668
9669 }
9670
9671 /**
9672  * i40e_vsi_link_event - notify VSI of a link event
9673  * @vsi: vsi to be notified
9674  * @link_up: link up or down
9675  **/
9676 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
9677 {
9678         if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
9679                 return;
9680
9681         switch (vsi->type) {
9682         case I40E_VSI_MAIN:
9683                 if (!vsi->netdev || !vsi->netdev_registered)
9684                         break;
9685
9686                 if (link_up) {
9687                         netif_carrier_on(vsi->netdev);
9688                         netif_tx_wake_all_queues(vsi->netdev);
9689                 } else {
9690                         netif_carrier_off(vsi->netdev);
9691                         netif_tx_stop_all_queues(vsi->netdev);
9692                 }
9693                 break;
9694
9695         case I40E_VSI_SRIOV:
9696         case I40E_VSI_VMDQ2:
9697         case I40E_VSI_CTRL:
9698         case I40E_VSI_IWARP:
9699         case I40E_VSI_MIRROR:
9700         default:
9701                 /* there is no notification for other VSIs */
9702                 break;
9703         }
9704 }
9705
9706 /**
9707  * i40e_veb_link_event - notify elements on the veb of a link event
9708  * @veb: veb to be notified
9709  * @link_up: link up or down
9710  **/
9711 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
9712 {
9713         struct i40e_pf *pf;
9714         int i;
9715
9716         if (!veb || !veb->pf)
9717                 return;
9718         pf = veb->pf;
9719
9720         /* depth first... */
9721         for (i = 0; i < I40E_MAX_VEB; i++)
9722                 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
9723                         i40e_veb_link_event(pf->veb[i], link_up);
9724
9725         /* ... now the local VSIs */
9726         for (i = 0; i < pf->num_alloc_vsi; i++)
9727                 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
9728                         i40e_vsi_link_event(pf->vsi[i], link_up);
9729 }
9730
9731 /**
9732  * i40e_link_event - Update netif_carrier status
9733  * @pf: board private structure
9734  **/
9735 static void i40e_link_event(struct i40e_pf *pf)
9736 {
9737         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9738         u8 new_link_speed, old_link_speed;
9739         i40e_status status;
9740         bool new_link, old_link;
9741 #ifdef CONFIG_I40E_DCB
9742         int err;
9743 #endif /* CONFIG_I40E_DCB */
9744
9745         /* set this to force the get_link_status call to refresh state */
9746         pf->hw.phy.get_link_info = true;
9747         old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
9748         status = i40e_get_link_status(&pf->hw, &new_link);
9749
9750         /* On success, disable temp link polling */
9751         if (status == I40E_SUCCESS) {
9752                 clear_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9753         } else {
9754                 /* Enable link polling temporarily until i40e_get_link_status
9755                  * returns I40E_SUCCESS
9756                  */
9757                 set_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9758                 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
9759                         status);
9760                 return;
9761         }
9762
9763         old_link_speed = pf->hw.phy.link_info_old.link_speed;
9764         new_link_speed = pf->hw.phy.link_info.link_speed;
9765
9766         if (new_link == old_link &&
9767             new_link_speed == old_link_speed &&
9768             (test_bit(__I40E_VSI_DOWN, vsi->state) ||
9769              new_link == netif_carrier_ok(vsi->netdev)))
9770                 return;
9771
9772         i40e_print_link_message(vsi, new_link);
9773
9774         /* Notify the base of the switch tree connected to
9775          * the link.  Floating VEBs are not notified.
9776          */
9777         if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
9778                 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
9779         else
9780                 i40e_vsi_link_event(vsi, new_link);
9781
9782         if (pf->vf)
9783                 i40e_vc_notify_link_state(pf);
9784
9785         if (pf->flags & I40E_FLAG_PTP)
9786                 i40e_ptp_set_increment(pf);
9787 #ifdef CONFIG_I40E_DCB
9788         if (new_link == old_link)
9789                 return;
9790         /* Not SW DCB so firmware will take care of default settings */
9791         if (pf->dcbx_cap & DCB_CAP_DCBX_LLD_MANAGED)
9792                 return;
9793
9794         /* We cover here only link down, as after link up in case of SW DCB
9795          * SW LLDP agent will take care of setting it up
9796          */
9797         if (!new_link) {
9798                 dev_dbg(&pf->pdev->dev, "Reconfig DCB to single TC as result of Link Down\n");
9799                 memset(&pf->tmp_cfg, 0, sizeof(pf->tmp_cfg));
9800                 err = i40e_dcb_sw_default_config(pf);
9801                 if (err) {
9802                         pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
9803                                        I40E_FLAG_DCB_ENABLED);
9804                 } else {
9805                         pf->dcbx_cap = DCB_CAP_DCBX_HOST |
9806                                        DCB_CAP_DCBX_VER_IEEE;
9807                         pf->flags |= I40E_FLAG_DCB_CAPABLE;
9808                         pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9809                 }
9810         }
9811 #endif /* CONFIG_I40E_DCB */
9812 }
9813
9814 /**
9815  * i40e_watchdog_subtask - periodic checks not using event driven response
9816  * @pf: board private structure
9817  **/
9818 static void i40e_watchdog_subtask(struct i40e_pf *pf)
9819 {
9820         int i;
9821
9822         /* if interface is down do nothing */
9823         if (test_bit(__I40E_DOWN, pf->state) ||
9824             test_bit(__I40E_CONFIG_BUSY, pf->state))
9825                 return;
9826
9827         /* make sure we don't do these things too often */
9828         if (time_before(jiffies, (pf->service_timer_previous +
9829                                   pf->service_timer_period)))
9830                 return;
9831         pf->service_timer_previous = jiffies;
9832
9833         if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
9834             test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
9835                 i40e_link_event(pf);
9836
9837         /* Update the stats for active netdevs so the network stack
9838          * can look at updated numbers whenever it cares to
9839          */
9840         for (i = 0; i < pf->num_alloc_vsi; i++)
9841                 if (pf->vsi[i] && pf->vsi[i]->netdev)
9842                         i40e_update_stats(pf->vsi[i]);
9843
9844         if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
9845                 /* Update the stats for the active switching components */
9846                 for (i = 0; i < I40E_MAX_VEB; i++)
9847                         if (pf->veb[i])
9848                                 i40e_update_veb_stats(pf->veb[i]);
9849         }
9850
9851         i40e_ptp_rx_hang(pf);
9852         i40e_ptp_tx_hang(pf);
9853 }
9854
9855 /**
9856  * i40e_reset_subtask - Set up for resetting the device and driver
9857  * @pf: board private structure
9858  **/
9859 static void i40e_reset_subtask(struct i40e_pf *pf)
9860 {
9861         u32 reset_flags = 0;
9862
9863         if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
9864                 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
9865                 clear_bit(__I40E_REINIT_REQUESTED, pf->state);
9866         }
9867         if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
9868                 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
9869                 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9870         }
9871         if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
9872                 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
9873                 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
9874         }
9875         if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
9876                 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
9877                 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
9878         }
9879         if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
9880                 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
9881                 clear_bit(__I40E_DOWN_REQUESTED, pf->state);
9882         }
9883
9884         /* If there's a recovery already waiting, it takes
9885          * precedence before starting a new reset sequence.
9886          */
9887         if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
9888                 i40e_prep_for_reset(pf);
9889                 i40e_reset(pf);
9890                 i40e_rebuild(pf, false, false);
9891         }
9892
9893         /* If we're already down or resetting, just bail */
9894         if (reset_flags &&
9895             !test_bit(__I40E_DOWN, pf->state) &&
9896             !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
9897                 i40e_do_reset(pf, reset_flags, false);
9898         }
9899 }
9900
9901 /**
9902  * i40e_handle_link_event - Handle link event
9903  * @pf: board private structure
9904  * @e: event info posted on ARQ
9905  **/
9906 static void i40e_handle_link_event(struct i40e_pf *pf,
9907                                    struct i40e_arq_event_info *e)
9908 {
9909         struct i40e_aqc_get_link_status *status =
9910                 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
9911
9912         /* Do a new status request to re-enable LSE reporting
9913          * and load new status information into the hw struct
9914          * This completely ignores any state information
9915          * in the ARQ event info, instead choosing to always
9916          * issue the AQ update link status command.
9917          */
9918         i40e_link_event(pf);
9919
9920         /* Check if module meets thermal requirements */
9921         if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
9922                 dev_err(&pf->pdev->dev,
9923                         "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
9924                 dev_err(&pf->pdev->dev,
9925                         "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9926         } else {
9927                 /* check for unqualified module, if link is down, suppress
9928                  * the message if link was forced to be down.
9929                  */
9930                 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
9931                     (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
9932                     (!(status->link_info & I40E_AQ_LINK_UP)) &&
9933                     (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) {
9934                         dev_err(&pf->pdev->dev,
9935                                 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
9936                         dev_err(&pf->pdev->dev,
9937                                 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9938                 }
9939         }
9940 }
9941
9942 /**
9943  * i40e_clean_adminq_subtask - Clean the AdminQ rings
9944  * @pf: board private structure
9945  **/
9946 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
9947 {
9948         struct i40e_arq_event_info event;
9949         struct i40e_hw *hw = &pf->hw;
9950         u16 pending, i = 0;
9951         i40e_status ret;
9952         u16 opcode;
9953         u32 oldval;
9954         u32 val;
9955
9956         /* Do not run clean AQ when PF reset fails */
9957         if (test_bit(__I40E_RESET_FAILED, pf->state))
9958                 return;
9959
9960         /* check for error indications */
9961         val = rd32(&pf->hw, pf->hw.aq.arq.len);
9962         oldval = val;
9963         if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
9964                 if (hw->debug_mask & I40E_DEBUG_AQ)
9965                         dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
9966                 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
9967         }
9968         if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
9969                 if (hw->debug_mask & I40E_DEBUG_AQ)
9970                         dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
9971                 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
9972                 pf->arq_overflows++;
9973         }
9974         if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
9975                 if (hw->debug_mask & I40E_DEBUG_AQ)
9976                         dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
9977                 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
9978         }
9979         if (oldval != val)
9980                 wr32(&pf->hw, pf->hw.aq.arq.len, val);
9981
9982         val = rd32(&pf->hw, pf->hw.aq.asq.len);
9983         oldval = val;
9984         if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
9985                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9986                         dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
9987                 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
9988         }
9989         if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
9990                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9991                         dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
9992                 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
9993         }
9994         if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
9995                 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9996                         dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
9997                 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
9998         }
9999         if (oldval != val)
10000                 wr32(&pf->hw, pf->hw.aq.asq.len, val);
10001
10002         event.buf_len = I40E_MAX_AQ_BUF_SIZE;
10003         event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
10004         if (!event.msg_buf)
10005                 return;
10006
10007         do {
10008                 ret = i40e_clean_arq_element(hw, &event, &pending);
10009                 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
10010                         break;
10011                 else if (ret) {
10012                         dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
10013                         break;
10014                 }
10015
10016                 opcode = le16_to_cpu(event.desc.opcode);
10017                 switch (opcode) {
10018
10019                 case i40e_aqc_opc_get_link_status:
10020                         rtnl_lock();
10021                         i40e_handle_link_event(pf, &event);
10022                         rtnl_unlock();
10023                         break;
10024                 case i40e_aqc_opc_send_msg_to_pf:
10025                         ret = i40e_vc_process_vf_msg(pf,
10026                                         le16_to_cpu(event.desc.retval),
10027                                         le32_to_cpu(event.desc.cookie_high),
10028                                         le32_to_cpu(event.desc.cookie_low),
10029                                         event.msg_buf,
10030                                         event.msg_len);
10031                         break;
10032                 case i40e_aqc_opc_lldp_update_mib:
10033                         dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
10034 #ifdef CONFIG_I40E_DCB
10035                         rtnl_lock();
10036                         i40e_handle_lldp_event(pf, &event);
10037                         rtnl_unlock();
10038 #endif /* CONFIG_I40E_DCB */
10039                         break;
10040                 case i40e_aqc_opc_event_lan_overflow:
10041                         dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
10042                         i40e_handle_lan_overflow_event(pf, &event);
10043                         break;
10044                 case i40e_aqc_opc_send_msg_to_peer:
10045                         dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
10046                         break;
10047                 case i40e_aqc_opc_nvm_erase:
10048                 case i40e_aqc_opc_nvm_update:
10049                 case i40e_aqc_opc_oem_post_update:
10050                         i40e_debug(&pf->hw, I40E_DEBUG_NVM,
10051                                    "ARQ NVM operation 0x%04x completed\n",
10052                                    opcode);
10053                         break;
10054                 default:
10055                         dev_info(&pf->pdev->dev,
10056                                  "ARQ: Unknown event 0x%04x ignored\n",
10057                                  opcode);
10058                         break;
10059                 }
10060         } while (i++ < pf->adminq_work_limit);
10061
10062         if (i < pf->adminq_work_limit)
10063                 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
10064
10065         /* re-enable Admin queue interrupt cause */
10066         val = rd32(hw, I40E_PFINT_ICR0_ENA);
10067         val |=  I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
10068         wr32(hw, I40E_PFINT_ICR0_ENA, val);
10069         i40e_flush(hw);
10070
10071         kfree(event.msg_buf);
10072 }
10073
10074 /**
10075  * i40e_verify_eeprom - make sure eeprom is good to use
10076  * @pf: board private structure
10077  **/
10078 static void i40e_verify_eeprom(struct i40e_pf *pf)
10079 {
10080         int err;
10081
10082         err = i40e_diag_eeprom_test(&pf->hw);
10083         if (err) {
10084                 /* retry in case of garbage read */
10085                 err = i40e_diag_eeprom_test(&pf->hw);
10086                 if (err) {
10087                         dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
10088                                  err);
10089                         set_bit(__I40E_BAD_EEPROM, pf->state);
10090                 }
10091         }
10092
10093         if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
10094                 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
10095                 clear_bit(__I40E_BAD_EEPROM, pf->state);
10096         }
10097 }
10098
10099 /**
10100  * i40e_enable_pf_switch_lb
10101  * @pf: pointer to the PF structure
10102  *
10103  * enable switch loop back or die - no point in a return value
10104  **/
10105 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
10106 {
10107         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10108         struct i40e_vsi_context ctxt;
10109         int ret;
10110
10111         ctxt.seid = pf->main_vsi_seid;
10112         ctxt.pf_num = pf->hw.pf_id;
10113         ctxt.vf_num = 0;
10114         ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10115         if (ret) {
10116                 dev_info(&pf->pdev->dev,
10117                          "couldn't get PF vsi config, err %s aq_err %s\n",
10118                          i40e_stat_str(&pf->hw, ret),
10119                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10120                 return;
10121         }
10122         ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10123         ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10124         ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10125
10126         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
10127         if (ret) {
10128                 dev_info(&pf->pdev->dev,
10129                          "update vsi switch failed, err %s aq_err %s\n",
10130                          i40e_stat_str(&pf->hw, ret),
10131                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10132         }
10133 }
10134
10135 /**
10136  * i40e_disable_pf_switch_lb
10137  * @pf: pointer to the PF structure
10138  *
10139  * disable switch loop back or die - no point in a return value
10140  **/
10141 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
10142 {
10143         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10144         struct i40e_vsi_context ctxt;
10145         int ret;
10146
10147         ctxt.seid = pf->main_vsi_seid;
10148         ctxt.pf_num = pf->hw.pf_id;
10149         ctxt.vf_num = 0;
10150         ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10151         if (ret) {
10152                 dev_info(&pf->pdev->dev,
10153                          "couldn't get PF vsi config, err %s aq_err %s\n",
10154                          i40e_stat_str(&pf->hw, ret),
10155                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10156                 return;
10157         }
10158         ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10159         ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10160         ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10161
10162         ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
10163         if (ret) {
10164                 dev_info(&pf->pdev->dev,
10165                          "update vsi switch failed, err %s aq_err %s\n",
10166                          i40e_stat_str(&pf->hw, ret),
10167                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10168         }
10169 }
10170
10171 /**
10172  * i40e_config_bridge_mode - Configure the HW bridge mode
10173  * @veb: pointer to the bridge instance
10174  *
10175  * Configure the loop back mode for the LAN VSI that is downlink to the
10176  * specified HW bridge instance. It is expected this function is called
10177  * when a new HW bridge is instantiated.
10178  **/
10179 static void i40e_config_bridge_mode(struct i40e_veb *veb)
10180 {
10181         struct i40e_pf *pf = veb->pf;
10182
10183         if (pf->hw.debug_mask & I40E_DEBUG_LAN)
10184                 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
10185                          veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
10186         if (veb->bridge_mode & BRIDGE_MODE_VEPA)
10187                 i40e_disable_pf_switch_lb(pf);
10188         else
10189                 i40e_enable_pf_switch_lb(pf);
10190 }
10191
10192 /**
10193  * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
10194  * @veb: pointer to the VEB instance
10195  *
10196  * This is a recursive function that first builds the attached VSIs then
10197  * recurses in to build the next layer of VEB.  We track the connections
10198  * through our own index numbers because the seid's from the HW could
10199  * change across the reset.
10200  **/
10201 static int i40e_reconstitute_veb(struct i40e_veb *veb)
10202 {
10203         struct i40e_vsi *ctl_vsi = NULL;
10204         struct i40e_pf *pf = veb->pf;
10205         int v, veb_idx;
10206         int ret;
10207
10208         /* build VSI that owns this VEB, temporarily attached to base VEB */
10209         for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
10210                 if (pf->vsi[v] &&
10211                     pf->vsi[v]->veb_idx == veb->idx &&
10212                     pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
10213                         ctl_vsi = pf->vsi[v];
10214                         break;
10215                 }
10216         }
10217         if (!ctl_vsi) {
10218                 dev_info(&pf->pdev->dev,
10219                          "missing owner VSI for veb_idx %d\n", veb->idx);
10220                 ret = -ENOENT;
10221                 goto end_reconstitute;
10222         }
10223         if (ctl_vsi != pf->vsi[pf->lan_vsi])
10224                 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10225         ret = i40e_add_vsi(ctl_vsi);
10226         if (ret) {
10227                 dev_info(&pf->pdev->dev,
10228                          "rebuild of veb_idx %d owner VSI failed: %d\n",
10229                          veb->idx, ret);
10230                 goto end_reconstitute;
10231         }
10232         i40e_vsi_reset_stats(ctl_vsi);
10233
10234         /* create the VEB in the switch and move the VSI onto the VEB */
10235         ret = i40e_add_veb(veb, ctl_vsi);
10236         if (ret)
10237                 goto end_reconstitute;
10238
10239         if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10240                 veb->bridge_mode = BRIDGE_MODE_VEB;
10241         else
10242                 veb->bridge_mode = BRIDGE_MODE_VEPA;
10243         i40e_config_bridge_mode(veb);
10244
10245         /* create the remaining VSIs attached to this VEB */
10246         for (v = 0; v < pf->num_alloc_vsi; v++) {
10247                 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
10248                         continue;
10249
10250                 if (pf->vsi[v]->veb_idx == veb->idx) {
10251                         struct i40e_vsi *vsi = pf->vsi[v];
10252
10253                         vsi->uplink_seid = veb->seid;
10254                         ret = i40e_add_vsi(vsi);
10255                         if (ret) {
10256                                 dev_info(&pf->pdev->dev,
10257                                          "rebuild of vsi_idx %d failed: %d\n",
10258                                          v, ret);
10259                                 goto end_reconstitute;
10260                         }
10261                         i40e_vsi_reset_stats(vsi);
10262                 }
10263         }
10264
10265         /* create any VEBs attached to this VEB - RECURSION */
10266         for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10267                 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
10268                         pf->veb[veb_idx]->uplink_seid = veb->seid;
10269                         ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
10270                         if (ret)
10271                                 break;
10272                 }
10273         }
10274
10275 end_reconstitute:
10276         return ret;
10277 }
10278
10279 /**
10280  * i40e_get_capabilities - get info about the HW
10281  * @pf: the PF struct
10282  * @list_type: AQ capability to be queried
10283  **/
10284 static int i40e_get_capabilities(struct i40e_pf *pf,
10285                                  enum i40e_admin_queue_opc list_type)
10286 {
10287         struct i40e_aqc_list_capabilities_element_resp *cap_buf;
10288         u16 data_size;
10289         int buf_len;
10290         int err;
10291
10292         buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
10293         do {
10294                 cap_buf = kzalloc(buf_len, GFP_KERNEL);
10295                 if (!cap_buf)
10296                         return -ENOMEM;
10297
10298                 /* this loads the data into the hw struct for us */
10299                 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
10300                                                     &data_size, list_type,
10301                                                     NULL);
10302                 /* data loaded, buffer no longer needed */
10303                 kfree(cap_buf);
10304
10305                 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
10306                         /* retry with a larger buffer */
10307                         buf_len = data_size;
10308                 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK || err) {
10309                         dev_info(&pf->pdev->dev,
10310                                  "capability discovery failed, err %s aq_err %s\n",
10311                                  i40e_stat_str(&pf->hw, err),
10312                                  i40e_aq_str(&pf->hw,
10313                                              pf->hw.aq.asq_last_status));
10314                         return -ENODEV;
10315                 }
10316         } while (err);
10317
10318         if (pf->hw.debug_mask & I40E_DEBUG_USER) {
10319                 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10320                         dev_info(&pf->pdev->dev,
10321                                  "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
10322                                  pf->hw.pf_id, pf->hw.func_caps.num_vfs,
10323                                  pf->hw.func_caps.num_msix_vectors,
10324                                  pf->hw.func_caps.num_msix_vectors_vf,
10325                                  pf->hw.func_caps.fd_filters_guaranteed,
10326                                  pf->hw.func_caps.fd_filters_best_effort,
10327                                  pf->hw.func_caps.num_tx_qp,
10328                                  pf->hw.func_caps.num_vsis);
10329                 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
10330                         dev_info(&pf->pdev->dev,
10331                                  "switch_mode=0x%04x, function_valid=0x%08x\n",
10332                                  pf->hw.dev_caps.switch_mode,
10333                                  pf->hw.dev_caps.valid_functions);
10334                         dev_info(&pf->pdev->dev,
10335                                  "SR-IOV=%d, num_vfs for all function=%u\n",
10336                                  pf->hw.dev_caps.sr_iov_1_1,
10337                                  pf->hw.dev_caps.num_vfs);
10338                         dev_info(&pf->pdev->dev,
10339                                  "num_vsis=%u, num_rx:%u, num_tx=%u\n",
10340                                  pf->hw.dev_caps.num_vsis,
10341                                  pf->hw.dev_caps.num_rx_qp,
10342                                  pf->hw.dev_caps.num_tx_qp);
10343                 }
10344         }
10345         if (list_type == i40e_aqc_opc_list_func_capabilities) {
10346 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
10347                        + pf->hw.func_caps.num_vfs)
10348                 if (pf->hw.revision_id == 0 &&
10349                     pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
10350                         dev_info(&pf->pdev->dev,
10351                                  "got num_vsis %d, setting num_vsis to %d\n",
10352                                  pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
10353                         pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
10354                 }
10355         }
10356         return 0;
10357 }
10358
10359 static int i40e_vsi_clear(struct i40e_vsi *vsi);
10360
10361 /**
10362  * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
10363  * @pf: board private structure
10364  **/
10365 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
10366 {
10367         struct i40e_vsi *vsi;
10368
10369         /* quick workaround for an NVM issue that leaves a critical register
10370          * uninitialized
10371          */
10372         if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
10373                 static const u32 hkey[] = {
10374                         0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
10375                         0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
10376                         0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
10377                         0x95b3a76d};
10378                 int i;
10379
10380                 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
10381                         wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
10382         }
10383
10384         if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
10385                 return;
10386
10387         /* find existing VSI and see if it needs configuring */
10388         vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10389
10390         /* create a new VSI if none exists */
10391         if (!vsi) {
10392                 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
10393                                      pf->vsi[pf->lan_vsi]->seid, 0);
10394                 if (!vsi) {
10395                         dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
10396                         pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10397                         pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
10398                         return;
10399                 }
10400         }
10401
10402         i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
10403 }
10404
10405 /**
10406  * i40e_fdir_teardown - release the Flow Director resources
10407  * @pf: board private structure
10408  **/
10409 static void i40e_fdir_teardown(struct i40e_pf *pf)
10410 {
10411         struct i40e_vsi *vsi;
10412
10413         i40e_fdir_filter_exit(pf);
10414         vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10415         if (vsi)
10416                 i40e_vsi_release(vsi);
10417 }
10418
10419 /**
10420  * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
10421  * @vsi: PF main vsi
10422  * @seid: seid of main or channel VSIs
10423  *
10424  * Rebuilds cloud filters associated with main VSI and channel VSIs if they
10425  * existed before reset
10426  **/
10427 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
10428 {
10429         struct i40e_cloud_filter *cfilter;
10430         struct i40e_pf *pf = vsi->back;
10431         struct hlist_node *node;
10432         i40e_status ret;
10433
10434         /* Add cloud filters back if they exist */
10435         hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
10436                                   cloud_node) {
10437                 if (cfilter->seid != seid)
10438                         continue;
10439
10440                 if (cfilter->dst_port)
10441                         ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
10442                                                                 true);
10443                 else
10444                         ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
10445
10446                 if (ret) {
10447                         dev_dbg(&pf->pdev->dev,
10448                                 "Failed to rebuild cloud filter, err %s aq_err %s\n",
10449                                 i40e_stat_str(&pf->hw, ret),
10450                                 i40e_aq_str(&pf->hw,
10451                                             pf->hw.aq.asq_last_status));
10452                         return ret;
10453                 }
10454         }
10455         return 0;
10456 }
10457
10458 /**
10459  * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
10460  * @vsi: PF main vsi
10461  *
10462  * Rebuilds channel VSIs if they existed before reset
10463  **/
10464 static int i40e_rebuild_channels(struct i40e_vsi *vsi)
10465 {
10466         struct i40e_channel *ch, *ch_tmp;
10467         i40e_status ret;
10468
10469         if (list_empty(&vsi->ch_list))
10470                 return 0;
10471
10472         list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
10473                 if (!ch->initialized)
10474                         break;
10475                 /* Proceed with creation of channel (VMDq2) VSI */
10476                 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch);
10477                 if (ret) {
10478                         dev_info(&vsi->back->pdev->dev,
10479                                  "failed to rebuild channels using uplink_seid %u\n",
10480                                  vsi->uplink_seid);
10481                         return ret;
10482                 }
10483                 /* Reconfigure TX queues using QTX_CTL register */
10484                 ret = i40e_channel_config_tx_ring(vsi->back, vsi, ch);
10485                 if (ret) {
10486                         dev_info(&vsi->back->pdev->dev,
10487                                  "failed to configure TX rings for channel %u\n",
10488                                  ch->seid);
10489                         return ret;
10490                 }
10491                 /* update 'next_base_queue' */
10492                 vsi->next_base_queue = vsi->next_base_queue +
10493                                                         ch->num_queue_pairs;
10494                 if (ch->max_tx_rate) {
10495                         u64 credits = ch->max_tx_rate;
10496
10497                         if (i40e_set_bw_limit(vsi, ch->seid,
10498                                               ch->max_tx_rate))
10499                                 return -EINVAL;
10500
10501                         do_div(credits, I40E_BW_CREDIT_DIVISOR);
10502                         dev_dbg(&vsi->back->pdev->dev,
10503                                 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10504                                 ch->max_tx_rate,
10505                                 credits,
10506                                 ch->seid);
10507                 }
10508                 ret = i40e_rebuild_cloud_filters(vsi, ch->seid);
10509                 if (ret) {
10510                         dev_dbg(&vsi->back->pdev->dev,
10511                                 "Failed to rebuild cloud filters for channel VSI %u\n",
10512                                 ch->seid);
10513                         return ret;
10514                 }
10515         }
10516         return 0;
10517 }
10518
10519 /**
10520  * i40e_prep_for_reset - prep for the core to reset
10521  * @pf: board private structure
10522  *
10523  * Close up the VFs and other things in prep for PF Reset.
10524   **/
10525 static void i40e_prep_for_reset(struct i40e_pf *pf)
10526 {
10527         struct i40e_hw *hw = &pf->hw;
10528         i40e_status ret = 0;
10529         u32 v;
10530
10531         clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
10532         if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
10533                 return;
10534         if (i40e_check_asq_alive(&pf->hw))
10535                 i40e_vc_notify_reset(pf);
10536
10537         dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
10538
10539         /* quiesce the VSIs and their queues that are not already DOWN */
10540         i40e_pf_quiesce_all_vsi(pf);
10541
10542         for (v = 0; v < pf->num_alloc_vsi; v++) {
10543                 if (pf->vsi[v])
10544                         pf->vsi[v]->seid = 0;
10545         }
10546
10547         i40e_shutdown_adminq(&pf->hw);
10548
10549         /* call shutdown HMC */
10550         if (hw->hmc.hmc_obj) {
10551                 ret = i40e_shutdown_lan_hmc(hw);
10552                 if (ret)
10553                         dev_warn(&pf->pdev->dev,
10554                                  "shutdown_lan_hmc failed: %d\n", ret);
10555         }
10556
10557         /* Save the current PTP time so that we can restore the time after the
10558          * reset completes.
10559          */
10560         i40e_ptp_save_hw_time(pf);
10561 }
10562
10563 /**
10564  * i40e_send_version - update firmware with driver version
10565  * @pf: PF struct
10566  */
10567 static void i40e_send_version(struct i40e_pf *pf)
10568 {
10569         struct i40e_driver_version dv;
10570
10571         dv.major_version = 0xff;
10572         dv.minor_version = 0xff;
10573         dv.build_version = 0xff;
10574         dv.subbuild_version = 0;
10575         strlcpy(dv.driver_string, UTS_RELEASE, sizeof(dv.driver_string));
10576         i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
10577 }
10578
10579 /**
10580  * i40e_get_oem_version - get OEM specific version information
10581  * @hw: pointer to the hardware structure
10582  **/
10583 static void i40e_get_oem_version(struct i40e_hw *hw)
10584 {
10585         u16 block_offset = 0xffff;
10586         u16 block_length = 0;
10587         u16 capabilities = 0;
10588         u16 gen_snap = 0;
10589         u16 release = 0;
10590
10591 #define I40E_SR_NVM_OEM_VERSION_PTR             0x1B
10592 #define I40E_NVM_OEM_LENGTH_OFFSET              0x00
10593 #define I40E_NVM_OEM_CAPABILITIES_OFFSET        0x01
10594 #define I40E_NVM_OEM_GEN_OFFSET                 0x02
10595 #define I40E_NVM_OEM_RELEASE_OFFSET             0x03
10596 #define I40E_NVM_OEM_CAPABILITIES_MASK          0x000F
10597 #define I40E_NVM_OEM_LENGTH                     3
10598
10599         /* Check if pointer to OEM version block is valid. */
10600         i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset);
10601         if (block_offset == 0xffff)
10602                 return;
10603
10604         /* Check if OEM version block has correct length. */
10605         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
10606                            &block_length);
10607         if (block_length < I40E_NVM_OEM_LENGTH)
10608                 return;
10609
10610         /* Check if OEM version format is as expected. */
10611         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
10612                            &capabilities);
10613         if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
10614                 return;
10615
10616         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET,
10617                            &gen_snap);
10618         i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
10619                            &release);
10620         hw->nvm.oem_ver = (gen_snap << I40E_OEM_SNAP_SHIFT) | release;
10621         hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
10622 }
10623
10624 /**
10625  * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
10626  * @pf: board private structure
10627  **/
10628 static int i40e_reset(struct i40e_pf *pf)
10629 {
10630         struct i40e_hw *hw = &pf->hw;
10631         i40e_status ret;
10632
10633         ret = i40e_pf_reset(hw);
10634         if (ret) {
10635                 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
10636                 set_bit(__I40E_RESET_FAILED, pf->state);
10637                 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10638         } else {
10639                 pf->pfr_count++;
10640         }
10641         return ret;
10642 }
10643
10644 /**
10645  * i40e_rebuild - rebuild using a saved config
10646  * @pf: board private structure
10647  * @reinit: if the Main VSI needs to re-initialized.
10648  * @lock_acquired: indicates whether or not the lock has been acquired
10649  * before this function was called.
10650  **/
10651 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
10652 {
10653         const bool is_recovery_mode_reported = i40e_check_recovery_mode(pf);
10654         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10655         struct i40e_hw *hw = &pf->hw;
10656         i40e_status ret;
10657         u32 val;
10658         int v;
10659
10660         if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10661             is_recovery_mode_reported)
10662                 i40e_set_ethtool_ops(pf->vsi[pf->lan_vsi]->netdev);
10663
10664         if (test_bit(__I40E_DOWN, pf->state) &&
10665             !test_bit(__I40E_RECOVERY_MODE, pf->state))
10666                 goto clear_recovery;
10667         dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
10668
10669         /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
10670         ret = i40e_init_adminq(&pf->hw);
10671         if (ret) {
10672                 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
10673                          i40e_stat_str(&pf->hw, ret),
10674                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10675                 goto clear_recovery;
10676         }
10677         i40e_get_oem_version(&pf->hw);
10678
10679         if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state)) {
10680                 /* The following delay is necessary for firmware update. */
10681                 mdelay(1000);
10682         }
10683
10684         /* re-verify the eeprom if we just had an EMP reset */
10685         if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
10686                 i40e_verify_eeprom(pf);
10687
10688         /* if we are going out of or into recovery mode we have to act
10689          * accordingly with regard to resources initialization
10690          * and deinitialization
10691          */
10692         if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10693                 if (i40e_get_capabilities(pf,
10694                                           i40e_aqc_opc_list_func_capabilities))
10695                         goto end_unlock;
10696
10697                 if (is_recovery_mode_reported) {
10698                         /* we're staying in recovery mode so we'll reinitialize
10699                          * misc vector here
10700                          */
10701                         if (i40e_setup_misc_vector_for_recovery_mode(pf))
10702                                 goto end_unlock;
10703                 } else {
10704                         if (!lock_acquired)
10705                                 rtnl_lock();
10706                         /* we're going out of recovery mode so we'll free
10707                          * the IRQ allocated specifically for recovery mode
10708                          * and restore the interrupt scheme
10709                          */
10710                         free_irq(pf->pdev->irq, pf);
10711                         i40e_clear_interrupt_scheme(pf);
10712                         if (i40e_restore_interrupt_scheme(pf))
10713                                 goto end_unlock;
10714                 }
10715
10716                 /* tell the firmware that we're starting */
10717                 i40e_send_version(pf);
10718
10719                 /* bail out in case recovery mode was detected, as there is
10720                  * no need for further configuration.
10721                  */
10722                 goto end_unlock;
10723         }
10724
10725         i40e_clear_pxe_mode(hw);
10726         ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
10727         if (ret)
10728                 goto end_core_reset;
10729
10730         ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10731                                 hw->func_caps.num_rx_qp, 0, 0);
10732         if (ret) {
10733                 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
10734                 goto end_core_reset;
10735         }
10736         ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10737         if (ret) {
10738                 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
10739                 goto end_core_reset;
10740         }
10741
10742 #ifdef CONFIG_I40E_DCB
10743         /* Enable FW to write a default DCB config on link-up
10744          * unless I40E_FLAG_TC_MQPRIO was enabled or DCB
10745          * is not supported with new link speed
10746          */
10747         if (pf->flags & I40E_FLAG_TC_MQPRIO) {
10748                 i40e_aq_set_dcb_parameters(hw, false, NULL);
10749         } else {
10750                 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
10751                     (hw->phy.link_info.link_speed &
10752                      (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
10753                         i40e_aq_set_dcb_parameters(hw, false, NULL);
10754                         dev_warn(&pf->pdev->dev,
10755                                  "DCB is not supported for X710-T*L 2.5/5G speeds\n");
10756                         pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10757                 } else {
10758                         i40e_aq_set_dcb_parameters(hw, true, NULL);
10759                         ret = i40e_init_pf_dcb(pf);
10760                         if (ret) {
10761                                 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n",
10762                                          ret);
10763                                 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10764                                 /* Continue without DCB enabled */
10765                         }
10766                 }
10767         }
10768
10769 #endif /* CONFIG_I40E_DCB */
10770         if (!lock_acquired)
10771                 rtnl_lock();
10772         ret = i40e_setup_pf_switch(pf, reinit, true);
10773         if (ret)
10774                 goto end_unlock;
10775
10776         /* The driver only wants link up/down and module qualification
10777          * reports from firmware.  Note the negative logic.
10778          */
10779         ret = i40e_aq_set_phy_int_mask(&pf->hw,
10780                                        ~(I40E_AQ_EVENT_LINK_UPDOWN |
10781                                          I40E_AQ_EVENT_MEDIA_NA |
10782                                          I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10783         if (ret)
10784                 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10785                          i40e_stat_str(&pf->hw, ret),
10786                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10787
10788         /* Rebuild the VSIs and VEBs that existed before reset.
10789          * They are still in our local switch element arrays, so only
10790          * need to rebuild the switch model in the HW.
10791          *
10792          * If there were VEBs but the reconstitution failed, we'll try
10793          * to recover minimal use by getting the basic PF VSI working.
10794          */
10795         if (vsi->uplink_seid != pf->mac_seid) {
10796                 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
10797                 /* find the one VEB connected to the MAC, and find orphans */
10798                 for (v = 0; v < I40E_MAX_VEB; v++) {
10799                         if (!pf->veb[v])
10800                                 continue;
10801
10802                         if (pf->veb[v]->uplink_seid == pf->mac_seid ||
10803                             pf->veb[v]->uplink_seid == 0) {
10804                                 ret = i40e_reconstitute_veb(pf->veb[v]);
10805
10806                                 if (!ret)
10807                                         continue;
10808
10809                                 /* If Main VEB failed, we're in deep doodoo,
10810                                  * so give up rebuilding the switch and set up
10811                                  * for minimal rebuild of PF VSI.
10812                                  * If orphan failed, we'll report the error
10813                                  * but try to keep going.
10814                                  */
10815                                 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
10816                                         dev_info(&pf->pdev->dev,
10817                                                  "rebuild of switch failed: %d, will try to set up simple PF connection\n",
10818                                                  ret);
10819                                         vsi->uplink_seid = pf->mac_seid;
10820                                         break;
10821                                 } else if (pf->veb[v]->uplink_seid == 0) {
10822                                         dev_info(&pf->pdev->dev,
10823                                                  "rebuild of orphan VEB failed: %d\n",
10824                                                  ret);
10825                                 }
10826                         }
10827                 }
10828         }
10829
10830         if (vsi->uplink_seid == pf->mac_seid) {
10831                 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
10832                 /* no VEB, so rebuild only the Main VSI */
10833                 ret = i40e_add_vsi(vsi);
10834                 if (ret) {
10835                         dev_info(&pf->pdev->dev,
10836                                  "rebuild of Main VSI failed: %d\n", ret);
10837                         goto end_unlock;
10838                 }
10839         }
10840
10841         if (vsi->mqprio_qopt.max_rate[0]) {
10842                 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
10843                 u64 credits = 0;
10844
10845                 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
10846                 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
10847                 if (ret)
10848                         goto end_unlock;
10849
10850                 credits = max_tx_rate;
10851                 do_div(credits, I40E_BW_CREDIT_DIVISOR);
10852                 dev_dbg(&vsi->back->pdev->dev,
10853                         "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10854                         max_tx_rate,
10855                         credits,
10856                         vsi->seid);
10857         }
10858
10859         ret = i40e_rebuild_cloud_filters(vsi, vsi->seid);
10860         if (ret)
10861                 goto end_unlock;
10862
10863         /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
10864          * for this main VSI if they exist
10865          */
10866         ret = i40e_rebuild_channels(vsi);
10867         if (ret)
10868                 goto end_unlock;
10869
10870         /* Reconfigure hardware for allowing smaller MSS in the case
10871          * of TSO, so that we avoid the MDD being fired and causing
10872          * a reset in the case of small MSS+TSO.
10873          */
10874 #define I40E_REG_MSS          0x000E64DC
10875 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
10876 #define I40E_64BYTE_MSS       0x400000
10877         val = rd32(hw, I40E_REG_MSS);
10878         if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10879                 val &= ~I40E_REG_MSS_MIN_MASK;
10880                 val |= I40E_64BYTE_MSS;
10881                 wr32(hw, I40E_REG_MSS, val);
10882         }
10883
10884         if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
10885                 msleep(75);
10886                 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10887                 if (ret)
10888                         dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10889                                  i40e_stat_str(&pf->hw, ret),
10890                                  i40e_aq_str(&pf->hw,
10891                                              pf->hw.aq.asq_last_status));
10892         }
10893         /* reinit the misc interrupt */
10894         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
10895                 ret = i40e_setup_misc_vector(pf);
10896
10897         /* Add a filter to drop all Flow control frames from any VSI from being
10898          * transmitted. By doing so we stop a malicious VF from sending out
10899          * PAUSE or PFC frames and potentially controlling traffic for other
10900          * PF/VF VSIs.
10901          * The FW can still send Flow control frames if enabled.
10902          */
10903         i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10904                                                        pf->main_vsi_seid);
10905
10906         /* restart the VSIs that were rebuilt and running before the reset */
10907         i40e_pf_unquiesce_all_vsi(pf);
10908
10909         /* Release the RTNL lock before we start resetting VFs */
10910         if (!lock_acquired)
10911                 rtnl_unlock();
10912
10913         /* Restore promiscuous settings */
10914         ret = i40e_set_promiscuous(pf, pf->cur_promisc);
10915         if (ret)
10916                 dev_warn(&pf->pdev->dev,
10917                          "Failed to restore promiscuous setting: %s, err %s aq_err %s\n",
10918                          pf->cur_promisc ? "on" : "off",
10919                          i40e_stat_str(&pf->hw, ret),
10920                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10921
10922         i40e_reset_all_vfs(pf, true);
10923
10924         /* tell the firmware that we're starting */
10925         i40e_send_version(pf);
10926
10927         /* We've already released the lock, so don't do it again */
10928         goto end_core_reset;
10929
10930 end_unlock:
10931         if (!lock_acquired)
10932                 rtnl_unlock();
10933 end_core_reset:
10934         clear_bit(__I40E_RESET_FAILED, pf->state);
10935 clear_recovery:
10936         clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10937         clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
10938 }
10939
10940 /**
10941  * i40e_reset_and_rebuild - reset and rebuild using a saved config
10942  * @pf: board private structure
10943  * @reinit: if the Main VSI needs to re-initialized.
10944  * @lock_acquired: indicates whether or not the lock has been acquired
10945  * before this function was called.
10946  **/
10947 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
10948                                    bool lock_acquired)
10949 {
10950         int ret;
10951
10952         if (test_bit(__I40E_IN_REMOVE, pf->state))
10953                 return;
10954         /* Now we wait for GRST to settle out.
10955          * We don't have to delete the VEBs or VSIs from the hw switch
10956          * because the reset will make them disappear.
10957          */
10958         ret = i40e_reset(pf);
10959         if (!ret)
10960                 i40e_rebuild(pf, reinit, lock_acquired);
10961 }
10962
10963 /**
10964  * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
10965  * @pf: board private structure
10966  *
10967  * Close up the VFs and other things in prep for a Core Reset,
10968  * then get ready to rebuild the world.
10969  * @lock_acquired: indicates whether or not the lock has been acquired
10970  * before this function was called.
10971  **/
10972 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
10973 {
10974         i40e_prep_for_reset(pf);
10975         i40e_reset_and_rebuild(pf, false, lock_acquired);
10976 }
10977
10978 /**
10979  * i40e_handle_mdd_event
10980  * @pf: pointer to the PF structure
10981  *
10982  * Called from the MDD irq handler to identify possibly malicious vfs
10983  **/
10984 static void i40e_handle_mdd_event(struct i40e_pf *pf)
10985 {
10986         struct i40e_hw *hw = &pf->hw;
10987         bool mdd_detected = false;
10988         struct i40e_vf *vf;
10989         u32 reg;
10990         int i;
10991
10992         if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
10993                 return;
10994
10995         /* find what triggered the MDD event */
10996         reg = rd32(hw, I40E_GL_MDET_TX);
10997         if (reg & I40E_GL_MDET_TX_VALID_MASK) {
10998                 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
10999                                 I40E_GL_MDET_TX_PF_NUM_SHIFT;
11000                 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
11001                                 I40E_GL_MDET_TX_VF_NUM_SHIFT;
11002                 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
11003                                 I40E_GL_MDET_TX_EVENT_SHIFT;
11004                 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
11005                                 I40E_GL_MDET_TX_QUEUE_SHIFT) -
11006                                 pf->hw.func_caps.base_queue;
11007                 if (netif_msg_tx_err(pf))
11008                         dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
11009                                  event, queue, pf_num, vf_num);
11010                 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
11011                 mdd_detected = true;
11012         }
11013         reg = rd32(hw, I40E_GL_MDET_RX);
11014         if (reg & I40E_GL_MDET_RX_VALID_MASK) {
11015                 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
11016                                 I40E_GL_MDET_RX_FUNCTION_SHIFT;
11017                 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
11018                                 I40E_GL_MDET_RX_EVENT_SHIFT;
11019                 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
11020                                 I40E_GL_MDET_RX_QUEUE_SHIFT) -
11021                                 pf->hw.func_caps.base_queue;
11022                 if (netif_msg_rx_err(pf))
11023                         dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
11024                                  event, queue, func);
11025                 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
11026                 mdd_detected = true;
11027         }
11028
11029         if (mdd_detected) {
11030                 reg = rd32(hw, I40E_PF_MDET_TX);
11031                 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
11032                         wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
11033                         dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n");
11034                 }
11035                 reg = rd32(hw, I40E_PF_MDET_RX);
11036                 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
11037                         wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
11038                         dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n");
11039                 }
11040         }
11041
11042         /* see if one of the VFs needs its hand slapped */
11043         for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
11044                 vf = &(pf->vf[i]);
11045                 reg = rd32(hw, I40E_VP_MDET_TX(i));
11046                 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
11047                         wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
11048                         vf->num_mdd_events++;
11049                         dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
11050                                  i);
11051                         dev_info(&pf->pdev->dev,
11052                                  "Use PF Control I/F to re-enable the VF\n");
11053                         set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
11054                 }
11055
11056                 reg = rd32(hw, I40E_VP_MDET_RX(i));
11057                 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
11058                         wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
11059                         vf->num_mdd_events++;
11060                         dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
11061                                  i);
11062                         dev_info(&pf->pdev->dev,
11063                                  "Use PF Control I/F to re-enable the VF\n");
11064                         set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
11065                 }
11066         }
11067
11068         /* re-enable mdd interrupt cause */
11069         clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
11070         reg = rd32(hw, I40E_PFINT_ICR0_ENA);
11071         reg |=  I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
11072         wr32(hw, I40E_PFINT_ICR0_ENA, reg);
11073         i40e_flush(hw);
11074 }
11075
11076 /**
11077  * i40e_service_task - Run the driver's async subtasks
11078  * @work: pointer to work_struct containing our data
11079  **/
11080 static void i40e_service_task(struct work_struct *work)
11081 {
11082         struct i40e_pf *pf = container_of(work,
11083                                           struct i40e_pf,
11084                                           service_task);
11085         unsigned long start_time = jiffies;
11086
11087         /* don't bother with service tasks if a reset is in progress */
11088         if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
11089             test_bit(__I40E_SUSPENDED, pf->state))
11090                 return;
11091
11092         if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
11093                 return;
11094
11095         if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) {
11096                 i40e_detect_recover_hung(pf->vsi[pf->lan_vsi]);
11097                 i40e_sync_filters_subtask(pf);
11098                 i40e_reset_subtask(pf);
11099                 i40e_handle_mdd_event(pf);
11100                 i40e_vc_process_vflr_event(pf);
11101                 i40e_watchdog_subtask(pf);
11102                 i40e_fdir_reinit_subtask(pf);
11103                 if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) {
11104                         /* Client subtask will reopen next time through. */
11105                         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi],
11106                                                            true);
11107                 } else {
11108                         i40e_client_subtask(pf);
11109                         if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE,
11110                                                pf->state))
11111                                 i40e_notify_client_of_l2_param_changes(
11112                                                                 pf->vsi[pf->lan_vsi]);
11113                 }
11114                 i40e_sync_filters_subtask(pf);
11115         } else {
11116                 i40e_reset_subtask(pf);
11117         }
11118
11119         i40e_clean_adminq_subtask(pf);
11120
11121         /* flush memory to make sure state is correct before next watchdog */
11122         smp_mb__before_atomic();
11123         clear_bit(__I40E_SERVICE_SCHED, pf->state);
11124
11125         /* If the tasks have taken longer than one timer cycle or there
11126          * is more work to be done, reschedule the service task now
11127          * rather than wait for the timer to tick again.
11128          */
11129         if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
11130             test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state)             ||
11131             test_bit(__I40E_MDD_EVENT_PENDING, pf->state)                ||
11132             test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
11133                 i40e_service_event_schedule(pf);
11134 }
11135
11136 /**
11137  * i40e_service_timer - timer callback
11138  * @t: timer list pointer
11139  **/
11140 static void i40e_service_timer(struct timer_list *t)
11141 {
11142         struct i40e_pf *pf = from_timer(pf, t, service_timer);
11143
11144         mod_timer(&pf->service_timer,
11145                   round_jiffies(jiffies + pf->service_timer_period));
11146         i40e_service_event_schedule(pf);
11147 }
11148
11149 /**
11150  * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
11151  * @vsi: the VSI being configured
11152  **/
11153 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
11154 {
11155         struct i40e_pf *pf = vsi->back;
11156
11157         switch (vsi->type) {
11158         case I40E_VSI_MAIN:
11159                 vsi->alloc_queue_pairs = pf->num_lan_qps;
11160                 if (!vsi->num_tx_desc)
11161                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11162                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11163                 if (!vsi->num_rx_desc)
11164                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11165                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11166                 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11167                         vsi->num_q_vectors = pf->num_lan_msix;
11168                 else
11169                         vsi->num_q_vectors = 1;
11170
11171                 break;
11172
11173         case I40E_VSI_FDIR:
11174                 vsi->alloc_queue_pairs = 1;
11175                 vsi->num_tx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11176                                          I40E_REQ_DESCRIPTOR_MULTIPLE);
11177                 vsi->num_rx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11178                                          I40E_REQ_DESCRIPTOR_MULTIPLE);
11179                 vsi->num_q_vectors = pf->num_fdsb_msix;
11180                 break;
11181
11182         case I40E_VSI_VMDQ2:
11183                 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
11184                 if (!vsi->num_tx_desc)
11185                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11186                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11187                 if (!vsi->num_rx_desc)
11188                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11189                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11190                 vsi->num_q_vectors = pf->num_vmdq_msix;
11191                 break;
11192
11193         case I40E_VSI_SRIOV:
11194                 vsi->alloc_queue_pairs = pf->num_vf_qps;
11195                 if (!vsi->num_tx_desc)
11196                         vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11197                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11198                 if (!vsi->num_rx_desc)
11199                         vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11200                                                  I40E_REQ_DESCRIPTOR_MULTIPLE);
11201                 break;
11202
11203         default:
11204                 WARN_ON(1);
11205                 return -ENODATA;
11206         }
11207
11208         if (is_kdump_kernel()) {
11209                 vsi->num_tx_desc = I40E_MIN_NUM_DESCRIPTORS;
11210                 vsi->num_rx_desc = I40E_MIN_NUM_DESCRIPTORS;
11211         }
11212
11213         return 0;
11214 }
11215
11216 /**
11217  * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
11218  * @vsi: VSI pointer
11219  * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
11220  *
11221  * On error: returns error code (negative)
11222  * On success: returns 0
11223  **/
11224 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
11225 {
11226         struct i40e_ring **next_rings;
11227         int size;
11228         int ret = 0;
11229
11230         /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
11231         size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
11232                (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
11233         vsi->tx_rings = kzalloc(size, GFP_KERNEL);
11234         if (!vsi->tx_rings)
11235                 return -ENOMEM;
11236         next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
11237         if (i40e_enabled_xdp_vsi(vsi)) {
11238                 vsi->xdp_rings = next_rings;
11239                 next_rings += vsi->alloc_queue_pairs;
11240         }
11241         vsi->rx_rings = next_rings;
11242
11243         if (alloc_qvectors) {
11244                 /* allocate memory for q_vector pointers */
11245                 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
11246                 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
11247                 if (!vsi->q_vectors) {
11248                         ret = -ENOMEM;
11249                         goto err_vectors;
11250                 }
11251         }
11252         return ret;
11253
11254 err_vectors:
11255         kfree(vsi->tx_rings);
11256         return ret;
11257 }
11258
11259 /**
11260  * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
11261  * @pf: board private structure
11262  * @type: type of VSI
11263  *
11264  * On error: returns error code (negative)
11265  * On success: returns vsi index in PF (positive)
11266  **/
11267 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
11268 {
11269         int ret = -ENODEV;
11270         struct i40e_vsi *vsi;
11271         int vsi_idx;
11272         int i;
11273
11274         /* Need to protect the allocation of the VSIs at the PF level */
11275         mutex_lock(&pf->switch_mutex);
11276
11277         /* VSI list may be fragmented if VSI creation/destruction has
11278          * been happening.  We can afford to do a quick scan to look
11279          * for any free VSIs in the list.
11280          *
11281          * find next empty vsi slot, looping back around if necessary
11282          */
11283         i = pf->next_vsi;
11284         while (i < pf->num_alloc_vsi && pf->vsi[i])
11285                 i++;
11286         if (i >= pf->num_alloc_vsi) {
11287                 i = 0;
11288                 while (i < pf->next_vsi && pf->vsi[i])
11289                         i++;
11290         }
11291
11292         if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
11293                 vsi_idx = i;             /* Found one! */
11294         } else {
11295                 ret = -ENODEV;
11296                 goto unlock_pf;  /* out of VSI slots! */
11297         }
11298         pf->next_vsi = ++i;
11299
11300         vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
11301         if (!vsi) {
11302                 ret = -ENOMEM;
11303                 goto unlock_pf;
11304         }
11305         vsi->type = type;
11306         vsi->back = pf;
11307         set_bit(__I40E_VSI_DOWN, vsi->state);
11308         vsi->flags = 0;
11309         vsi->idx = vsi_idx;
11310         vsi->int_rate_limit = 0;
11311         vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
11312                                 pf->rss_table_size : 64;
11313         vsi->netdev_registered = false;
11314         vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
11315         hash_init(vsi->mac_filter_hash);
11316         vsi->irqs_ready = false;
11317
11318         if (type == I40E_VSI_MAIN) {
11319                 vsi->af_xdp_zc_qps = bitmap_zalloc(pf->num_lan_qps, GFP_KERNEL);
11320                 if (!vsi->af_xdp_zc_qps)
11321                         goto err_rings;
11322         }
11323
11324         ret = i40e_set_num_rings_in_vsi(vsi);
11325         if (ret)
11326                 goto err_rings;
11327
11328         ret = i40e_vsi_alloc_arrays(vsi, true);
11329         if (ret)
11330                 goto err_rings;
11331
11332         /* Setup default MSIX irq handler for VSI */
11333         i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
11334
11335         /* Initialize VSI lock */
11336         spin_lock_init(&vsi->mac_filter_hash_lock);
11337         pf->vsi[vsi_idx] = vsi;
11338         ret = vsi_idx;
11339         goto unlock_pf;
11340
11341 err_rings:
11342         bitmap_free(vsi->af_xdp_zc_qps);
11343         pf->next_vsi = i - 1;
11344         kfree(vsi);
11345 unlock_pf:
11346         mutex_unlock(&pf->switch_mutex);
11347         return ret;
11348 }
11349
11350 /**
11351  * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
11352  * @vsi: VSI pointer
11353  * @free_qvectors: a bool to specify if q_vectors need to be freed.
11354  *
11355  * On error: returns error code (negative)
11356  * On success: returns 0
11357  **/
11358 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
11359 {
11360         /* free the ring and vector containers */
11361         if (free_qvectors) {
11362                 kfree(vsi->q_vectors);
11363                 vsi->q_vectors = NULL;
11364         }
11365         kfree(vsi->tx_rings);
11366         vsi->tx_rings = NULL;
11367         vsi->rx_rings = NULL;
11368         vsi->xdp_rings = NULL;
11369 }
11370
11371 /**
11372  * i40e_clear_rss_config_user - clear the user configured RSS hash keys
11373  * and lookup table
11374  * @vsi: Pointer to VSI structure
11375  */
11376 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
11377 {
11378         if (!vsi)
11379                 return;
11380
11381         kfree(vsi->rss_hkey_user);
11382         vsi->rss_hkey_user = NULL;
11383
11384         kfree(vsi->rss_lut_user);
11385         vsi->rss_lut_user = NULL;
11386 }
11387
11388 /**
11389  * i40e_vsi_clear - Deallocate the VSI provided
11390  * @vsi: the VSI being un-configured
11391  **/
11392 static int i40e_vsi_clear(struct i40e_vsi *vsi)
11393 {
11394         struct i40e_pf *pf;
11395
11396         if (!vsi)
11397                 return 0;
11398
11399         if (!vsi->back)
11400                 goto free_vsi;
11401         pf = vsi->back;
11402
11403         mutex_lock(&pf->switch_mutex);
11404         if (!pf->vsi[vsi->idx]) {
11405                 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
11406                         vsi->idx, vsi->idx, vsi->type);
11407                 goto unlock_vsi;
11408         }
11409
11410         if (pf->vsi[vsi->idx] != vsi) {
11411                 dev_err(&pf->pdev->dev,
11412                         "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
11413                         pf->vsi[vsi->idx]->idx,
11414                         pf->vsi[vsi->idx]->type,
11415                         vsi->idx, vsi->type);
11416                 goto unlock_vsi;
11417         }
11418
11419         /* updates the PF for this cleared vsi */
11420         i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
11421         i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
11422
11423         bitmap_free(vsi->af_xdp_zc_qps);
11424         i40e_vsi_free_arrays(vsi, true);
11425         i40e_clear_rss_config_user(vsi);
11426
11427         pf->vsi[vsi->idx] = NULL;
11428         if (vsi->idx < pf->next_vsi)
11429                 pf->next_vsi = vsi->idx;
11430
11431 unlock_vsi:
11432         mutex_unlock(&pf->switch_mutex);
11433 free_vsi:
11434         kfree(vsi);
11435
11436         return 0;
11437 }
11438
11439 /**
11440  * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
11441  * @vsi: the VSI being cleaned
11442  **/
11443 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
11444 {
11445         int i;
11446
11447         if (vsi->tx_rings && vsi->tx_rings[0]) {
11448                 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11449                         kfree_rcu(vsi->tx_rings[i], rcu);
11450                         WRITE_ONCE(vsi->tx_rings[i], NULL);
11451                         WRITE_ONCE(vsi->rx_rings[i], NULL);
11452                         if (vsi->xdp_rings)
11453                                 WRITE_ONCE(vsi->xdp_rings[i], NULL);
11454                 }
11455         }
11456 }
11457
11458 /**
11459  * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
11460  * @vsi: the VSI being configured
11461  **/
11462 static int i40e_alloc_rings(struct i40e_vsi *vsi)
11463 {
11464         int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
11465         struct i40e_pf *pf = vsi->back;
11466         struct i40e_ring *ring;
11467
11468         /* Set basic values in the rings to be used later during open() */
11469         for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11470                 /* allocate space for both Tx and Rx in one shot */
11471                 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
11472                 if (!ring)
11473                         goto err_out;
11474
11475                 ring->queue_index = i;
11476                 ring->reg_idx = vsi->base_queue + i;
11477                 ring->ring_active = false;
11478                 ring->vsi = vsi;
11479                 ring->netdev = vsi->netdev;
11480                 ring->dev = &pf->pdev->dev;
11481                 ring->count = vsi->num_tx_desc;
11482                 ring->size = 0;
11483                 ring->dcb_tc = 0;
11484                 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11485                         ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11486                 ring->itr_setting = pf->tx_itr_default;
11487                 WRITE_ONCE(vsi->tx_rings[i], ring++);
11488
11489                 if (!i40e_enabled_xdp_vsi(vsi))
11490                         goto setup_rx;
11491
11492                 ring->queue_index = vsi->alloc_queue_pairs + i;
11493                 ring->reg_idx = vsi->base_queue + ring->queue_index;
11494                 ring->ring_active = false;
11495                 ring->vsi = vsi;
11496                 ring->netdev = NULL;
11497                 ring->dev = &pf->pdev->dev;
11498                 ring->count = vsi->num_tx_desc;
11499                 ring->size = 0;
11500                 ring->dcb_tc = 0;
11501                 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11502                         ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11503                 set_ring_xdp(ring);
11504                 ring->itr_setting = pf->tx_itr_default;
11505                 WRITE_ONCE(vsi->xdp_rings[i], ring++);
11506
11507 setup_rx:
11508                 ring->queue_index = i;
11509                 ring->reg_idx = vsi->base_queue + i;
11510                 ring->ring_active = false;
11511                 ring->vsi = vsi;
11512                 ring->netdev = vsi->netdev;
11513                 ring->dev = &pf->pdev->dev;
11514                 ring->count = vsi->num_rx_desc;
11515                 ring->size = 0;
11516                 ring->dcb_tc = 0;
11517                 ring->itr_setting = pf->rx_itr_default;
11518                 WRITE_ONCE(vsi->rx_rings[i], ring);
11519         }
11520
11521         return 0;
11522
11523 err_out:
11524         i40e_vsi_clear_rings(vsi);
11525         return -ENOMEM;
11526 }
11527
11528 /**
11529  * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
11530  * @pf: board private structure
11531  * @vectors: the number of MSI-X vectors to request
11532  *
11533  * Returns the number of vectors reserved, or error
11534  **/
11535 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
11536 {
11537         vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
11538                                         I40E_MIN_MSIX, vectors);
11539         if (vectors < 0) {
11540                 dev_info(&pf->pdev->dev,
11541                          "MSI-X vector reservation failed: %d\n", vectors);
11542                 vectors = 0;
11543         }
11544
11545         return vectors;
11546 }
11547
11548 /**
11549  * i40e_init_msix - Setup the MSIX capability
11550  * @pf: board private structure
11551  *
11552  * Work with the OS to set up the MSIX vectors needed.
11553  *
11554  * Returns the number of vectors reserved or negative on failure
11555  **/
11556 static int i40e_init_msix(struct i40e_pf *pf)
11557 {
11558         struct i40e_hw *hw = &pf->hw;
11559         int cpus, extra_vectors;
11560         int vectors_left;
11561         int v_budget, i;
11562         int v_actual;
11563         int iwarp_requested = 0;
11564
11565         if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
11566                 return -ENODEV;
11567
11568         /* The number of vectors we'll request will be comprised of:
11569          *   - Add 1 for "other" cause for Admin Queue events, etc.
11570          *   - The number of LAN queue pairs
11571          *      - Queues being used for RSS.
11572          *              We don't need as many as max_rss_size vectors.
11573          *              use rss_size instead in the calculation since that
11574          *              is governed by number of cpus in the system.
11575          *      - assumes symmetric Tx/Rx pairing
11576          *   - The number of VMDq pairs
11577          *   - The CPU count within the NUMA node if iWARP is enabled
11578          * Once we count this up, try the request.
11579          *
11580          * If we can't get what we want, we'll simplify to nearly nothing
11581          * and try again.  If that still fails, we punt.
11582          */
11583         vectors_left = hw->func_caps.num_msix_vectors;
11584         v_budget = 0;
11585
11586         /* reserve one vector for miscellaneous handler */
11587         if (vectors_left) {
11588                 v_budget++;
11589                 vectors_left--;
11590         }
11591
11592         /* reserve some vectors for the main PF traffic queues. Initially we
11593          * only reserve at most 50% of the available vectors, in the case that
11594          * the number of online CPUs is large. This ensures that we can enable
11595          * extra features as well. Once we've enabled the other features, we
11596          * will use any remaining vectors to reach as close as we can to the
11597          * number of online CPUs.
11598          */
11599         cpus = num_online_cpus();
11600         pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
11601         vectors_left -= pf->num_lan_msix;
11602
11603         /* reserve one vector for sideband flow director */
11604         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11605                 if (vectors_left) {
11606                         pf->num_fdsb_msix = 1;
11607                         v_budget++;
11608                         vectors_left--;
11609                 } else {
11610                         pf->num_fdsb_msix = 0;
11611                 }
11612         }
11613
11614         /* can we reserve enough for iWARP? */
11615         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11616                 iwarp_requested = pf->num_iwarp_msix;
11617
11618                 if (!vectors_left)
11619                         pf->num_iwarp_msix = 0;
11620                 else if (vectors_left < pf->num_iwarp_msix)
11621                         pf->num_iwarp_msix = 1;
11622                 v_budget += pf->num_iwarp_msix;
11623                 vectors_left -= pf->num_iwarp_msix;
11624         }
11625
11626         /* any vectors left over go for VMDq support */
11627         if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
11628                 if (!vectors_left) {
11629                         pf->num_vmdq_msix = 0;
11630                         pf->num_vmdq_qps = 0;
11631                 } else {
11632                         int vmdq_vecs_wanted =
11633                                 pf->num_vmdq_vsis * pf->num_vmdq_qps;
11634                         int vmdq_vecs =
11635                                 min_t(int, vectors_left, vmdq_vecs_wanted);
11636
11637                         /* if we're short on vectors for what's desired, we limit
11638                          * the queues per vmdq.  If this is still more than are
11639                          * available, the user will need to change the number of
11640                          * queues/vectors used by the PF later with the ethtool
11641                          * channels command
11642                          */
11643                         if (vectors_left < vmdq_vecs_wanted) {
11644                                 pf->num_vmdq_qps = 1;
11645                                 vmdq_vecs_wanted = pf->num_vmdq_vsis;
11646                                 vmdq_vecs = min_t(int,
11647                                                   vectors_left,
11648                                                   vmdq_vecs_wanted);
11649                         }
11650                         pf->num_vmdq_msix = pf->num_vmdq_qps;
11651
11652                         v_budget += vmdq_vecs;
11653                         vectors_left -= vmdq_vecs;
11654                 }
11655         }
11656
11657         /* On systems with a large number of SMP cores, we previously limited
11658          * the number of vectors for num_lan_msix to be at most 50% of the
11659          * available vectors, to allow for other features. Now, we add back
11660          * the remaining vectors. However, we ensure that the total
11661          * num_lan_msix will not exceed num_online_cpus(). To do this, we
11662          * calculate the number of vectors we can add without going over the
11663          * cap of CPUs. For systems with a small number of CPUs this will be
11664          * zero.
11665          */
11666         extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
11667         pf->num_lan_msix += extra_vectors;
11668         vectors_left -= extra_vectors;
11669
11670         WARN(vectors_left < 0,
11671              "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
11672
11673         v_budget += pf->num_lan_msix;
11674         pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
11675                                    GFP_KERNEL);
11676         if (!pf->msix_entries)
11677                 return -ENOMEM;
11678
11679         for (i = 0; i < v_budget; i++)
11680                 pf->msix_entries[i].entry = i;
11681         v_actual = i40e_reserve_msix_vectors(pf, v_budget);
11682
11683         if (v_actual < I40E_MIN_MSIX) {
11684                 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
11685                 kfree(pf->msix_entries);
11686                 pf->msix_entries = NULL;
11687                 pci_disable_msix(pf->pdev);
11688                 return -ENODEV;
11689
11690         } else if (v_actual == I40E_MIN_MSIX) {
11691                 /* Adjust for minimal MSIX use */
11692                 pf->num_vmdq_vsis = 0;
11693                 pf->num_vmdq_qps = 0;
11694                 pf->num_lan_qps = 1;
11695                 pf->num_lan_msix = 1;
11696
11697         } else if (v_actual != v_budget) {
11698                 /* If we have limited resources, we will start with no vectors
11699                  * for the special features and then allocate vectors to some
11700                  * of these features based on the policy and at the end disable
11701                  * the features that did not get any vectors.
11702                  */
11703                 int vec;
11704
11705                 dev_info(&pf->pdev->dev,
11706                          "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
11707                          v_actual, v_budget);
11708                 /* reserve the misc vector */
11709                 vec = v_actual - 1;
11710
11711                 /* Scale vector usage down */
11712                 pf->num_vmdq_msix = 1;    /* force VMDqs to only one vector */
11713                 pf->num_vmdq_vsis = 1;
11714                 pf->num_vmdq_qps = 1;
11715
11716                 /* partition out the remaining vectors */
11717                 switch (vec) {
11718                 case 2:
11719                         pf->num_lan_msix = 1;
11720                         break;
11721                 case 3:
11722                         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11723                                 pf->num_lan_msix = 1;
11724                                 pf->num_iwarp_msix = 1;
11725                         } else {
11726                                 pf->num_lan_msix = 2;
11727                         }
11728                         break;
11729                 default:
11730                         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11731                                 pf->num_iwarp_msix = min_t(int, (vec / 3),
11732                                                  iwarp_requested);
11733                                 pf->num_vmdq_vsis = min_t(int, (vec / 3),
11734                                                   I40E_DEFAULT_NUM_VMDQ_VSI);
11735                         } else {
11736                                 pf->num_vmdq_vsis = min_t(int, (vec / 2),
11737                                                   I40E_DEFAULT_NUM_VMDQ_VSI);
11738                         }
11739                         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11740                                 pf->num_fdsb_msix = 1;
11741                                 vec--;
11742                         }
11743                         pf->num_lan_msix = min_t(int,
11744                                (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
11745                                                               pf->num_lan_msix);
11746                         pf->num_lan_qps = pf->num_lan_msix;
11747                         break;
11748                 }
11749         }
11750
11751         if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
11752             (pf->num_fdsb_msix == 0)) {
11753                 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
11754                 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
11755                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11756         }
11757         if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
11758             (pf->num_vmdq_msix == 0)) {
11759                 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
11760                 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
11761         }
11762
11763         if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
11764             (pf->num_iwarp_msix == 0)) {
11765                 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
11766                 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11767         }
11768         i40e_debug(&pf->hw, I40E_DEBUG_INIT,
11769                    "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
11770                    pf->num_lan_msix,
11771                    pf->num_vmdq_msix * pf->num_vmdq_vsis,
11772                    pf->num_fdsb_msix,
11773                    pf->num_iwarp_msix);
11774
11775         return v_actual;
11776 }
11777
11778 /**
11779  * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
11780  * @vsi: the VSI being configured
11781  * @v_idx: index of the vector in the vsi struct
11782  *
11783  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
11784  **/
11785 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
11786 {
11787         struct i40e_q_vector *q_vector;
11788
11789         /* allocate q_vector */
11790         q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
11791         if (!q_vector)
11792                 return -ENOMEM;
11793
11794         q_vector->vsi = vsi;
11795         q_vector->v_idx = v_idx;
11796         cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask);
11797
11798         if (vsi->netdev)
11799                 netif_napi_add(vsi->netdev, &q_vector->napi,
11800                                i40e_napi_poll, NAPI_POLL_WEIGHT);
11801
11802         /* tie q_vector and vsi together */
11803         vsi->q_vectors[v_idx] = q_vector;
11804
11805         return 0;
11806 }
11807
11808 /**
11809  * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
11810  * @vsi: the VSI being configured
11811  *
11812  * We allocate one q_vector per queue interrupt.  If allocation fails we
11813  * return -ENOMEM.
11814  **/
11815 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
11816 {
11817         struct i40e_pf *pf = vsi->back;
11818         int err, v_idx, num_q_vectors;
11819
11820         /* if not MSIX, give the one vector only to the LAN VSI */
11821         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11822                 num_q_vectors = vsi->num_q_vectors;
11823         else if (vsi == pf->vsi[pf->lan_vsi])
11824                 num_q_vectors = 1;
11825         else
11826                 return -EINVAL;
11827
11828         for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
11829                 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
11830                 if (err)
11831                         goto err_out;
11832         }
11833
11834         return 0;
11835
11836 err_out:
11837         while (v_idx--)
11838                 i40e_free_q_vector(vsi, v_idx);
11839
11840         return err;
11841 }
11842
11843 /**
11844  * i40e_init_interrupt_scheme - Determine proper interrupt scheme
11845  * @pf: board private structure to initialize
11846  **/
11847 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
11848 {
11849         int vectors = 0;
11850         ssize_t size;
11851
11852         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11853                 vectors = i40e_init_msix(pf);
11854                 if (vectors < 0) {
11855                         pf->flags &= ~(I40E_FLAG_MSIX_ENABLED   |
11856                                        I40E_FLAG_IWARP_ENABLED  |
11857                                        I40E_FLAG_RSS_ENABLED    |
11858                                        I40E_FLAG_DCB_CAPABLE    |
11859                                        I40E_FLAG_DCB_ENABLED    |
11860                                        I40E_FLAG_SRIOV_ENABLED  |
11861                                        I40E_FLAG_FD_SB_ENABLED  |
11862                                        I40E_FLAG_FD_ATR_ENABLED |
11863                                        I40E_FLAG_VMDQ_ENABLED);
11864                         pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11865
11866                         /* rework the queue expectations without MSIX */
11867                         i40e_determine_queue_usage(pf);
11868                 }
11869         }
11870
11871         if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11872             (pf->flags & I40E_FLAG_MSI_ENABLED)) {
11873                 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
11874                 vectors = pci_enable_msi(pf->pdev);
11875                 if (vectors < 0) {
11876                         dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
11877                                  vectors);
11878                         pf->flags &= ~I40E_FLAG_MSI_ENABLED;
11879                 }
11880                 vectors = 1;  /* one MSI or Legacy vector */
11881         }
11882
11883         if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
11884                 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
11885
11886         /* set up vector assignment tracking */
11887         size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
11888         pf->irq_pile = kzalloc(size, GFP_KERNEL);
11889         if (!pf->irq_pile)
11890                 return -ENOMEM;
11891
11892         pf->irq_pile->num_entries = vectors;
11893
11894         /* track first vector for misc interrupts, ignore return */
11895         (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
11896
11897         return 0;
11898 }
11899
11900 /**
11901  * i40e_restore_interrupt_scheme - Restore the interrupt scheme
11902  * @pf: private board data structure
11903  *
11904  * Restore the interrupt scheme that was cleared when we suspended the
11905  * device. This should be called during resume to re-allocate the q_vectors
11906  * and reacquire IRQs.
11907  */
11908 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
11909 {
11910         int err, i;
11911
11912         /* We cleared the MSI and MSI-X flags when disabling the old interrupt
11913          * scheme. We need to re-enabled them here in order to attempt to
11914          * re-acquire the MSI or MSI-X vectors
11915          */
11916         pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
11917
11918         err = i40e_init_interrupt_scheme(pf);
11919         if (err)
11920                 return err;
11921
11922         /* Now that we've re-acquired IRQs, we need to remap the vectors and
11923          * rings together again.
11924          */
11925         for (i = 0; i < pf->num_alloc_vsi; i++) {
11926                 if (pf->vsi[i]) {
11927                         err = i40e_vsi_alloc_q_vectors(pf->vsi[i]);
11928                         if (err)
11929                                 goto err_unwind;
11930                         i40e_vsi_map_rings_to_vectors(pf->vsi[i]);
11931                 }
11932         }
11933
11934         err = i40e_setup_misc_vector(pf);
11935         if (err)
11936                 goto err_unwind;
11937
11938         if (pf->flags & I40E_FLAG_IWARP_ENABLED)
11939                 i40e_client_update_msix_info(pf);
11940
11941         return 0;
11942
11943 err_unwind:
11944         while (i--) {
11945                 if (pf->vsi[i])
11946                         i40e_vsi_free_q_vectors(pf->vsi[i]);
11947         }
11948
11949         return err;
11950 }
11951
11952 /**
11953  * i40e_setup_misc_vector_for_recovery_mode - Setup the misc vector to handle
11954  * non queue events in recovery mode
11955  * @pf: board private structure
11956  *
11957  * This sets up the handler for MSIX 0 or MSI/legacy, which is used to manage
11958  * the non-queue interrupts, e.g. AdminQ and errors in recovery mode.
11959  * This is handled differently than in recovery mode since no Tx/Rx resources
11960  * are being allocated.
11961  **/
11962 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf)
11963 {
11964         int err;
11965
11966         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11967                 err = i40e_setup_misc_vector(pf);
11968
11969                 if (err) {
11970                         dev_info(&pf->pdev->dev,
11971                                  "MSI-X misc vector request failed, error %d\n",
11972                                  err);
11973                         return err;
11974                 }
11975         } else {
11976                 u32 flags = pf->flags & I40E_FLAG_MSI_ENABLED ? 0 : IRQF_SHARED;
11977
11978                 err = request_irq(pf->pdev->irq, i40e_intr, flags,
11979                                   pf->int_name, pf);
11980
11981                 if (err) {
11982                         dev_info(&pf->pdev->dev,
11983                                  "MSI/legacy misc vector request failed, error %d\n",
11984                                  err);
11985                         return err;
11986                 }
11987                 i40e_enable_misc_int_causes(pf);
11988                 i40e_irq_dynamic_enable_icr0(pf);
11989         }
11990
11991         return 0;
11992 }
11993
11994 /**
11995  * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
11996  * @pf: board private structure
11997  *
11998  * This sets up the handler for MSIX 0, which is used to manage the
11999  * non-queue interrupts, e.g. AdminQ and errors.  This is not used
12000  * when in MSI or Legacy interrupt mode.
12001  **/
12002 static int i40e_setup_misc_vector(struct i40e_pf *pf)
12003 {
12004         struct i40e_hw *hw = &pf->hw;
12005         int err = 0;
12006
12007         /* Only request the IRQ once, the first time through. */
12008         if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
12009                 err = request_irq(pf->msix_entries[0].vector,
12010                                   i40e_intr, 0, pf->int_name, pf);
12011                 if (err) {
12012                         clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
12013                         dev_info(&pf->pdev->dev,
12014                                  "request_irq for %s failed: %d\n",
12015                                  pf->int_name, err);
12016                         return -EFAULT;
12017                 }
12018         }
12019
12020         i40e_enable_misc_int_causes(pf);
12021
12022         /* associate no queues to the misc vector */
12023         wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
12024         wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K >> 1);
12025
12026         i40e_flush(hw);
12027
12028         i40e_irq_dynamic_enable_icr0(pf);
12029
12030         return err;
12031 }
12032
12033 /**
12034  * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
12035  * @vsi: Pointer to vsi structure
12036  * @seed: Buffter to store the hash keys
12037  * @lut: Buffer to store the lookup table entries
12038  * @lut_size: Size of buffer to store the lookup table entries
12039  *
12040  * Return 0 on success, negative on failure
12041  */
12042 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
12043                            u8 *lut, u16 lut_size)
12044 {
12045         struct i40e_pf *pf = vsi->back;
12046         struct i40e_hw *hw = &pf->hw;
12047         int ret = 0;
12048
12049         if (seed) {
12050                 ret = i40e_aq_get_rss_key(hw, vsi->id,
12051                         (struct i40e_aqc_get_set_rss_key_data *)seed);
12052                 if (ret) {
12053                         dev_info(&pf->pdev->dev,
12054                                  "Cannot get RSS key, err %s aq_err %s\n",
12055                                  i40e_stat_str(&pf->hw, ret),
12056                                  i40e_aq_str(&pf->hw,
12057                                              pf->hw.aq.asq_last_status));
12058                         return ret;
12059                 }
12060         }
12061
12062         if (lut) {
12063                 bool pf_lut = vsi->type == I40E_VSI_MAIN;
12064
12065                 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
12066                 if (ret) {
12067                         dev_info(&pf->pdev->dev,
12068                                  "Cannot get RSS lut, err %s aq_err %s\n",
12069                                  i40e_stat_str(&pf->hw, ret),
12070                                  i40e_aq_str(&pf->hw,
12071                                              pf->hw.aq.asq_last_status));
12072                         return ret;
12073                 }
12074         }
12075
12076         return ret;
12077 }
12078
12079 /**
12080  * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
12081  * @vsi: Pointer to vsi structure
12082  * @seed: RSS hash seed
12083  * @lut: Lookup table
12084  * @lut_size: Lookup table size
12085  *
12086  * Returns 0 on success, negative on failure
12087  **/
12088 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
12089                                const u8 *lut, u16 lut_size)
12090 {
12091         struct i40e_pf *pf = vsi->back;
12092         struct i40e_hw *hw = &pf->hw;
12093         u16 vf_id = vsi->vf_id;
12094         u8 i;
12095
12096         /* Fill out hash function seed */
12097         if (seed) {
12098                 u32 *seed_dw = (u32 *)seed;
12099
12100                 if (vsi->type == I40E_VSI_MAIN) {
12101                         for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12102                                 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
12103                 } else if (vsi->type == I40E_VSI_SRIOV) {
12104                         for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
12105                                 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
12106                 } else {
12107                         dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
12108                 }
12109         }
12110
12111         if (lut) {
12112                 u32 *lut_dw = (u32 *)lut;
12113
12114                 if (vsi->type == I40E_VSI_MAIN) {
12115                         if (lut_size != I40E_HLUT_ARRAY_SIZE)
12116                                 return -EINVAL;
12117                         for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12118                                 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
12119                 } else if (vsi->type == I40E_VSI_SRIOV) {
12120                         if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
12121                                 return -EINVAL;
12122                         for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12123                                 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
12124                 } else {
12125                         dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12126                 }
12127         }
12128         i40e_flush(hw);
12129
12130         return 0;
12131 }
12132
12133 /**
12134  * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
12135  * @vsi: Pointer to VSI structure
12136  * @seed: Buffer to store the keys
12137  * @lut: Buffer to store the lookup table entries
12138  * @lut_size: Size of buffer to store the lookup table entries
12139  *
12140  * Returns 0 on success, negative on failure
12141  */
12142 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
12143                             u8 *lut, u16 lut_size)
12144 {
12145         struct i40e_pf *pf = vsi->back;
12146         struct i40e_hw *hw = &pf->hw;
12147         u16 i;
12148
12149         if (seed) {
12150                 u32 *seed_dw = (u32 *)seed;
12151
12152                 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12153                         seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
12154         }
12155         if (lut) {
12156                 u32 *lut_dw = (u32 *)lut;
12157
12158                 if (lut_size != I40E_HLUT_ARRAY_SIZE)
12159                         return -EINVAL;
12160                 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12161                         lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
12162         }
12163
12164         return 0;
12165 }
12166
12167 /**
12168  * i40e_config_rss - Configure RSS keys and lut
12169  * @vsi: Pointer to VSI structure
12170  * @seed: RSS hash seed
12171  * @lut: Lookup table
12172  * @lut_size: Lookup table size
12173  *
12174  * Returns 0 on success, negative on failure
12175  */
12176 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12177 {
12178         struct i40e_pf *pf = vsi->back;
12179
12180         if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12181                 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
12182         else
12183                 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
12184 }
12185
12186 /**
12187  * i40e_get_rss - Get RSS keys and lut
12188  * @vsi: Pointer to VSI structure
12189  * @seed: Buffer to store the keys
12190  * @lut: Buffer to store the lookup table entries
12191  * @lut_size: Size of buffer to store the lookup table entries
12192  *
12193  * Returns 0 on success, negative on failure
12194  */
12195 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12196 {
12197         struct i40e_pf *pf = vsi->back;
12198
12199         if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12200                 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
12201         else
12202                 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
12203 }
12204
12205 /**
12206  * i40e_fill_rss_lut - Fill the RSS lookup table with default values
12207  * @pf: Pointer to board private structure
12208  * @lut: Lookup table
12209  * @rss_table_size: Lookup table size
12210  * @rss_size: Range of queue number for hashing
12211  */
12212 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
12213                        u16 rss_table_size, u16 rss_size)
12214 {
12215         u16 i;
12216
12217         for (i = 0; i < rss_table_size; i++)
12218                 lut[i] = i % rss_size;
12219 }
12220
12221 /**
12222  * i40e_pf_config_rss - Prepare for RSS if used
12223  * @pf: board private structure
12224  **/
12225 static int i40e_pf_config_rss(struct i40e_pf *pf)
12226 {
12227         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12228         u8 seed[I40E_HKEY_ARRAY_SIZE];
12229         u8 *lut;
12230         struct i40e_hw *hw = &pf->hw;
12231         u32 reg_val;
12232         u64 hena;
12233         int ret;
12234
12235         /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
12236         hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
12237                 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
12238         hena |= i40e_pf_get_default_rss_hena(pf);
12239
12240         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
12241         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
12242
12243         /* Determine the RSS table size based on the hardware capabilities */
12244         reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
12245         reg_val = (pf->rss_table_size == 512) ?
12246                         (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
12247                         (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
12248         i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
12249
12250         /* Determine the RSS size of the VSI */
12251         if (!vsi->rss_size) {
12252                 u16 qcount;
12253                 /* If the firmware does something weird during VSI init, we
12254                  * could end up with zero TCs. Check for that to avoid
12255                  * divide-by-zero. It probably won't pass traffic, but it also
12256                  * won't panic.
12257                  */
12258                 qcount = vsi->num_queue_pairs /
12259                          (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1);
12260                 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12261         }
12262         if (!vsi->rss_size)
12263                 return -EINVAL;
12264
12265         lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
12266         if (!lut)
12267                 return -ENOMEM;
12268
12269         /* Use user configured lut if there is one, otherwise use default */
12270         if (vsi->rss_lut_user)
12271                 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
12272         else
12273                 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
12274
12275         /* Use user configured hash key if there is one, otherwise
12276          * use default.
12277          */
12278         if (vsi->rss_hkey_user)
12279                 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
12280         else
12281                 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
12282         ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
12283         kfree(lut);
12284
12285         return ret;
12286 }
12287
12288 /**
12289  * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
12290  * @pf: board private structure
12291  * @queue_count: the requested queue count for rss.
12292  *
12293  * returns 0 if rss is not enabled, if enabled returns the final rss queue
12294  * count which may be different from the requested queue count.
12295  * Note: expects to be called while under rtnl_lock()
12296  **/
12297 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
12298 {
12299         struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12300         int new_rss_size;
12301
12302         if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
12303                 return 0;
12304
12305         queue_count = min_t(int, queue_count, num_online_cpus());
12306         new_rss_size = min_t(int, queue_count, pf->rss_size_max);
12307
12308         if (queue_count != vsi->num_queue_pairs) {
12309                 u16 qcount;
12310
12311                 vsi->req_queue_pairs = queue_count;
12312                 i40e_prep_for_reset(pf);
12313                 if (test_bit(__I40E_IN_REMOVE, pf->state))
12314                         return pf->alloc_rss_size;
12315
12316                 pf->alloc_rss_size = new_rss_size;
12317
12318                 i40e_reset_and_rebuild(pf, true, true);
12319
12320                 /* Discard the user configured hash keys and lut, if less
12321                  * queues are enabled.
12322                  */
12323                 if (queue_count < vsi->rss_size) {
12324                         i40e_clear_rss_config_user(vsi);
12325                         dev_dbg(&pf->pdev->dev,
12326                                 "discard user configured hash keys and lut\n");
12327                 }
12328
12329                 /* Reset vsi->rss_size, as number of enabled queues changed */
12330                 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
12331                 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12332
12333                 i40e_pf_config_rss(pf);
12334         }
12335         dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count:  %d/%d\n",
12336                  vsi->req_queue_pairs, pf->rss_size_max);
12337         return pf->alloc_rss_size;
12338 }
12339
12340 /**
12341  * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
12342  * @pf: board private structure
12343  **/
12344 i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf)
12345 {
12346         i40e_status status;
12347         bool min_valid, max_valid;
12348         u32 max_bw, min_bw;
12349
12350         status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
12351                                            &min_valid, &max_valid);
12352
12353         if (!status) {
12354                 if (min_valid)
12355                         pf->min_bw = min_bw;
12356                 if (max_valid)
12357                         pf->max_bw = max_bw;
12358         }
12359
12360         return status;
12361 }
12362
12363 /**
12364  * i40e_set_partition_bw_setting - Set BW settings for this PF partition
12365  * @pf: board private structure
12366  **/
12367 i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf)
12368 {
12369         struct i40e_aqc_configure_partition_bw_data bw_data;
12370         i40e_status status;
12371
12372         memset(&bw_data, 0, sizeof(bw_data));
12373
12374         /* Set the valid bit for this PF */
12375         bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
12376         bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
12377         bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
12378
12379         /* Set the new bandwidths */
12380         status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
12381
12382         return status;
12383 }
12384
12385 /**
12386  * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
12387  * @pf: board private structure
12388  **/
12389 i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf)
12390 {
12391         /* Commit temporary BW setting to permanent NVM image */
12392         enum i40e_admin_queue_err last_aq_status;
12393         i40e_status ret;
12394         u16 nvm_word;
12395
12396         if (pf->hw.partition_id != 1) {
12397                 dev_info(&pf->pdev->dev,
12398                          "Commit BW only works on partition 1! This is partition %d",
12399                          pf->hw.partition_id);
12400                 ret = I40E_NOT_SUPPORTED;
12401                 goto bw_commit_out;
12402         }
12403
12404         /* Acquire NVM for read access */
12405         ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
12406         last_aq_status = pf->hw.aq.asq_last_status;
12407         if (ret) {
12408                 dev_info(&pf->pdev->dev,
12409                          "Cannot acquire NVM for read access, err %s aq_err %s\n",
12410                          i40e_stat_str(&pf->hw, ret),
12411                          i40e_aq_str(&pf->hw, last_aq_status));
12412                 goto bw_commit_out;
12413         }
12414
12415         /* Read word 0x10 of NVM - SW compatibility word 1 */
12416         ret = i40e_aq_read_nvm(&pf->hw,
12417                                I40E_SR_NVM_CONTROL_WORD,
12418                                0x10, sizeof(nvm_word), &nvm_word,
12419                                false, NULL);
12420         /* Save off last admin queue command status before releasing
12421          * the NVM
12422          */
12423         last_aq_status = pf->hw.aq.asq_last_status;
12424         i40e_release_nvm(&pf->hw);
12425         if (ret) {
12426                 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
12427                          i40e_stat_str(&pf->hw, ret),
12428                          i40e_aq_str(&pf->hw, last_aq_status));
12429                 goto bw_commit_out;
12430         }
12431
12432         /* Wait a bit for NVM release to complete */
12433         msleep(50);
12434
12435         /* Acquire NVM for write access */
12436         ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
12437         last_aq_status = pf->hw.aq.asq_last_status;
12438         if (ret) {
12439                 dev_info(&pf->pdev->dev,
12440                          "Cannot acquire NVM for write access, err %s aq_err %s\n",
12441                          i40e_stat_str(&pf->hw, ret),
12442                          i40e_aq_str(&pf->hw, last_aq_status));
12443                 goto bw_commit_out;
12444         }
12445         /* Write it back out unchanged to initiate update NVM,
12446          * which will force a write of the shadow (alt) RAM to
12447          * the NVM - thus storing the bandwidth values permanently.
12448          */
12449         ret = i40e_aq_update_nvm(&pf->hw,
12450                                  I40E_SR_NVM_CONTROL_WORD,
12451                                  0x10, sizeof(nvm_word),
12452                                  &nvm_word, true, 0, NULL);
12453         /* Save off last admin queue command status before releasing
12454          * the NVM
12455          */
12456         last_aq_status = pf->hw.aq.asq_last_status;
12457         i40e_release_nvm(&pf->hw);
12458         if (ret)
12459                 dev_info(&pf->pdev->dev,
12460                          "BW settings NOT SAVED, err %s aq_err %s\n",
12461                          i40e_stat_str(&pf->hw, ret),
12462                          i40e_aq_str(&pf->hw, last_aq_status));
12463 bw_commit_out:
12464
12465         return ret;
12466 }
12467
12468 /**
12469  * i40e_is_total_port_shutdown_enabled - read NVM and return value
12470  * if total port shutdown feature is enabled for this PF
12471  * @pf: board private structure
12472  **/
12473 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf)
12474 {
12475 #define I40E_TOTAL_PORT_SHUTDOWN_ENABLED        BIT(4)
12476 #define I40E_FEATURES_ENABLE_PTR                0x2A
12477 #define I40E_CURRENT_SETTING_PTR                0x2B
12478 #define I40E_LINK_BEHAVIOR_WORD_OFFSET          0x2D
12479 #define I40E_LINK_BEHAVIOR_WORD_LENGTH          0x1
12480 #define I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED    BIT(0)
12481 #define I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH      4
12482         i40e_status read_status = I40E_SUCCESS;
12483         u16 sr_emp_sr_settings_ptr = 0;
12484         u16 features_enable = 0;
12485         u16 link_behavior = 0;
12486         bool ret = false;
12487
12488         read_status = i40e_read_nvm_word(&pf->hw,
12489                                          I40E_SR_EMP_SR_SETTINGS_PTR,
12490                                          &sr_emp_sr_settings_ptr);
12491         if (read_status)
12492                 goto err_nvm;
12493         read_status = i40e_read_nvm_word(&pf->hw,
12494                                          sr_emp_sr_settings_ptr +
12495                                          I40E_FEATURES_ENABLE_PTR,
12496                                          &features_enable);
12497         if (read_status)
12498                 goto err_nvm;
12499         if (I40E_TOTAL_PORT_SHUTDOWN_ENABLED & features_enable) {
12500                 read_status = i40e_read_nvm_module_data(&pf->hw,
12501                                                         I40E_SR_EMP_SR_SETTINGS_PTR,
12502                                                         I40E_CURRENT_SETTING_PTR,
12503                                                         I40E_LINK_BEHAVIOR_WORD_OFFSET,
12504                                                         I40E_LINK_BEHAVIOR_WORD_LENGTH,
12505                                                         &link_behavior);
12506                 if (read_status)
12507                         goto err_nvm;
12508                 link_behavior >>= (pf->hw.port * I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH);
12509                 ret = I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED & link_behavior;
12510         }
12511         return ret;
12512
12513 err_nvm:
12514         dev_warn(&pf->pdev->dev,
12515                  "total-port-shutdown feature is off due to read nvm error: %s\n",
12516                  i40e_stat_str(&pf->hw, read_status));
12517         return ret;
12518 }
12519
12520 /**
12521  * i40e_sw_init - Initialize general software structures (struct i40e_pf)
12522  * @pf: board private structure to initialize
12523  *
12524  * i40e_sw_init initializes the Adapter private data structure.
12525  * Fields are initialized based on PCI device information and
12526  * OS network device settings (MTU size).
12527  **/
12528 static int i40e_sw_init(struct i40e_pf *pf)
12529 {
12530         int err = 0;
12531         int size;
12532         u16 pow;
12533
12534         /* Set default capability flags */
12535         pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
12536                     I40E_FLAG_MSI_ENABLED     |
12537                     I40E_FLAG_MSIX_ENABLED;
12538
12539         /* Set default ITR */
12540         pf->rx_itr_default = I40E_ITR_RX_DEF;
12541         pf->tx_itr_default = I40E_ITR_TX_DEF;
12542
12543         /* Depending on PF configurations, it is possible that the RSS
12544          * maximum might end up larger than the available queues
12545          */
12546         pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
12547         pf->alloc_rss_size = 1;
12548         pf->rss_table_size = pf->hw.func_caps.rss_table_size;
12549         pf->rss_size_max = min_t(int, pf->rss_size_max,
12550                                  pf->hw.func_caps.num_tx_qp);
12551
12552         /* find the next higher power-of-2 of num cpus */
12553         pow = roundup_pow_of_two(num_online_cpus());
12554         pf->rss_size_max = min_t(int, pf->rss_size_max, pow);
12555
12556         if (pf->hw.func_caps.rss) {
12557                 pf->flags |= I40E_FLAG_RSS_ENABLED;
12558                 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
12559                                            num_online_cpus());
12560         }
12561
12562         /* MFP mode enabled */
12563         if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
12564                 pf->flags |= I40E_FLAG_MFP_ENABLED;
12565                 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
12566                 if (i40e_get_partition_bw_setting(pf)) {
12567                         dev_warn(&pf->pdev->dev,
12568                                  "Could not get partition bw settings\n");
12569                 } else {
12570                         dev_info(&pf->pdev->dev,
12571                                  "Partition BW Min = %8.8x, Max = %8.8x\n",
12572                                  pf->min_bw, pf->max_bw);
12573
12574                         /* nudge the Tx scheduler */
12575                         i40e_set_partition_bw_setting(pf);
12576                 }
12577         }
12578
12579         if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
12580             (pf->hw.func_caps.fd_filters_best_effort > 0)) {
12581                 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
12582                 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
12583                 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
12584                     pf->hw.num_partitions > 1)
12585                         dev_info(&pf->pdev->dev,
12586                                  "Flow Director Sideband mode Disabled in MFP mode\n");
12587                 else
12588                         pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12589                 pf->fdir_pf_filter_count =
12590                                  pf->hw.func_caps.fd_filters_guaranteed;
12591                 pf->hw.fdir_shared_filter_count =
12592                                  pf->hw.func_caps.fd_filters_best_effort;
12593         }
12594
12595         if (pf->hw.mac.type == I40E_MAC_X722) {
12596                 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE |
12597                                     I40E_HW_128_QP_RSS_CAPABLE |
12598                                     I40E_HW_ATR_EVICT_CAPABLE |
12599                                     I40E_HW_WB_ON_ITR_CAPABLE |
12600                                     I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE |
12601                                     I40E_HW_NO_PCI_LINK_CHECK |
12602                                     I40E_HW_USE_SET_LLDP_MIB |
12603                                     I40E_HW_GENEVE_OFFLOAD_CAPABLE |
12604                                     I40E_HW_PTP_L4_CAPABLE |
12605                                     I40E_HW_WOL_MC_MAGIC_PKT_WAKE |
12606                                     I40E_HW_OUTER_UDP_CSUM_CAPABLE);
12607
12608 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
12609                 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=
12610                     I40E_FDEVICT_PCTYPE_DEFAULT) {
12611                         dev_warn(&pf->pdev->dev,
12612                                  "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
12613                         pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE;
12614                 }
12615         } else if ((pf->hw.aq.api_maj_ver > 1) ||
12616                    ((pf->hw.aq.api_maj_ver == 1) &&
12617                     (pf->hw.aq.api_min_ver > 4))) {
12618                 /* Supported in FW API version higher than 1.4 */
12619                 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE;
12620         }
12621
12622         /* Enable HW ATR eviction if possible */
12623         if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)
12624                 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED;
12625
12626         if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12627             (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
12628             (pf->hw.aq.fw_maj_ver < 4))) {
12629                 pf->hw_features |= I40E_HW_RESTART_AUTONEG;
12630                 /* No DCB support  for FW < v4.33 */
12631                 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT;
12632         }
12633
12634         /* Disable FW LLDP if FW < v4.3 */
12635         if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12636             (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
12637             (pf->hw.aq.fw_maj_ver < 4)))
12638                 pf->hw_features |= I40E_HW_STOP_FW_LLDP;
12639
12640         /* Use the FW Set LLDP MIB API if FW > v4.40 */
12641         if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12642             (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
12643             (pf->hw.aq.fw_maj_ver >= 5)))
12644                 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB;
12645
12646         /* Enable PTP L4 if FW > v6.0 */
12647         if (pf->hw.mac.type == I40E_MAC_XL710 &&
12648             pf->hw.aq.fw_maj_ver >= 6)
12649                 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE;
12650
12651         if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
12652                 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
12653                 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
12654                 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
12655         }
12656
12657         if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
12658                 pf->flags |= I40E_FLAG_IWARP_ENABLED;
12659                 /* IWARP needs one extra vector for CQP just like MISC.*/
12660                 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
12661         }
12662         /* Stopping FW LLDP engine is supported on XL710 and X722
12663          * starting from FW versions determined in i40e_init_adminq.
12664          * Stopping the FW LLDP engine is not supported on XL710
12665          * if NPAR is functioning so unset this hw flag in this case.
12666          */
12667         if (pf->hw.mac.type == I40E_MAC_XL710 &&
12668             pf->hw.func_caps.npar_enable &&
12669             (pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))
12670                 pf->hw.flags &= ~I40E_HW_FLAG_FW_LLDP_STOPPABLE;
12671
12672 #ifdef CONFIG_PCI_IOV
12673         if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
12674                 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
12675                 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
12676                 pf->num_req_vfs = min_t(int,
12677                                         pf->hw.func_caps.num_vfs,
12678                                         I40E_MAX_VF_COUNT);
12679         }
12680 #endif /* CONFIG_PCI_IOV */
12681         pf->eeprom_version = 0xDEAD;
12682         pf->lan_veb = I40E_NO_VEB;
12683         pf->lan_vsi = I40E_NO_VSI;
12684
12685         /* By default FW has this off for performance reasons */
12686         pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
12687
12688         /* set up queue assignment tracking */
12689         size = sizeof(struct i40e_lump_tracking)
12690                 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
12691         pf->qp_pile = kzalloc(size, GFP_KERNEL);
12692         if (!pf->qp_pile) {
12693                 err = -ENOMEM;
12694                 goto sw_init_done;
12695         }
12696         pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12697
12698         pf->tx_timeout_recovery_level = 1;
12699
12700         if (pf->hw.mac.type != I40E_MAC_X722 &&
12701             i40e_is_total_port_shutdown_enabled(pf)) {
12702                 /* Link down on close must be on when total port shutdown
12703                  * is enabled for a given port
12704                  */
12705                 pf->flags |= (I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED |
12706                               I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED);
12707                 dev_info(&pf->pdev->dev,
12708                          "total-port-shutdown was enabled, link-down-on-close is forced on\n");
12709         }
12710         mutex_init(&pf->switch_mutex);
12711
12712 sw_init_done:
12713         return err;
12714 }
12715
12716 /**
12717  * i40e_set_ntuple - set the ntuple feature flag and take action
12718  * @pf: board private structure to initialize
12719  * @features: the feature set that the stack is suggesting
12720  *
12721  * returns a bool to indicate if reset needs to happen
12722  **/
12723 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
12724 {
12725         bool need_reset = false;
12726
12727         /* Check if Flow Director n-tuple support was enabled or disabled.  If
12728          * the state changed, we need to reset.
12729          */
12730         if (features & NETIF_F_NTUPLE) {
12731                 /* Enable filters and mark for reset */
12732                 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
12733                         need_reset = true;
12734                 /* enable FD_SB only if there is MSI-X vector and no cloud
12735                  * filters exist
12736                  */
12737                 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
12738                         pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12739                         pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
12740                 }
12741         } else {
12742                 /* turn off filters, mark for reset and clear SW filter list */
12743                 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
12744                         need_reset = true;
12745                         i40e_fdir_filter_exit(pf);
12746                 }
12747                 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
12748                 clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state);
12749                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
12750
12751                 /* reset fd counters */
12752                 pf->fd_add_err = 0;
12753                 pf->fd_atr_cnt = 0;
12754                 /* if ATR was auto disabled it can be re-enabled. */
12755                 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
12756                         if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
12757                             (I40E_DEBUG_FD & pf->hw.debug_mask))
12758                                 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
12759         }
12760         return need_reset;
12761 }
12762
12763 /**
12764  * i40e_clear_rss_lut - clear the rx hash lookup table
12765  * @vsi: the VSI being configured
12766  **/
12767 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
12768 {
12769         struct i40e_pf *pf = vsi->back;
12770         struct i40e_hw *hw = &pf->hw;
12771         u16 vf_id = vsi->vf_id;
12772         u8 i;
12773
12774         if (vsi->type == I40E_VSI_MAIN) {
12775                 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12776                         wr32(hw, I40E_PFQF_HLUT(i), 0);
12777         } else if (vsi->type == I40E_VSI_SRIOV) {
12778                 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12779                         i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
12780         } else {
12781                 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12782         }
12783 }
12784
12785 /**
12786  * i40e_set_features - set the netdev feature flags
12787  * @netdev: ptr to the netdev being adjusted
12788  * @features: the feature set that the stack is suggesting
12789  * Note: expects to be called while under rtnl_lock()
12790  **/
12791 static int i40e_set_features(struct net_device *netdev,
12792                              netdev_features_t features)
12793 {
12794         struct i40e_netdev_priv *np = netdev_priv(netdev);
12795         struct i40e_vsi *vsi = np->vsi;
12796         struct i40e_pf *pf = vsi->back;
12797         bool need_reset;
12798
12799         if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
12800                 i40e_pf_config_rss(pf);
12801         else if (!(features & NETIF_F_RXHASH) &&
12802                  netdev->features & NETIF_F_RXHASH)
12803                 i40e_clear_rss_lut(vsi);
12804
12805         if (features & NETIF_F_HW_VLAN_CTAG_RX)
12806                 i40e_vlan_stripping_enable(vsi);
12807         else
12808                 i40e_vlan_stripping_disable(vsi);
12809
12810         if (!(features & NETIF_F_HW_TC) &&
12811             (netdev->features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
12812                 dev_err(&pf->pdev->dev,
12813                         "Offloaded tc filters active, can't turn hw_tc_offload off");
12814                 return -EINVAL;
12815         }
12816
12817         if (!(features & NETIF_F_HW_L2FW_DOFFLOAD) && vsi->macvlan_cnt)
12818                 i40e_del_all_macvlans(vsi);
12819
12820         need_reset = i40e_set_ntuple(pf, features);
12821
12822         if (need_reset)
12823                 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
12824
12825         return 0;
12826 }
12827
12828 static int i40e_udp_tunnel_set_port(struct net_device *netdev,
12829                                     unsigned int table, unsigned int idx,
12830                                     struct udp_tunnel_info *ti)
12831 {
12832         struct i40e_netdev_priv *np = netdev_priv(netdev);
12833         struct i40e_hw *hw = &np->vsi->back->hw;
12834         u8 type, filter_index;
12835         i40e_status ret;
12836
12837         type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? I40E_AQC_TUNNEL_TYPE_VXLAN :
12838                                                    I40E_AQC_TUNNEL_TYPE_NGE;
12839
12840         ret = i40e_aq_add_udp_tunnel(hw, ntohs(ti->port), type, &filter_index,
12841                                      NULL);
12842         if (ret) {
12843                 netdev_info(netdev, "add UDP port failed, err %s aq_err %s\n",
12844                             i40e_stat_str(hw, ret),
12845                             i40e_aq_str(hw, hw->aq.asq_last_status));
12846                 return -EIO;
12847         }
12848
12849         udp_tunnel_nic_set_port_priv(netdev, table, idx, filter_index);
12850         return 0;
12851 }
12852
12853 static int i40e_udp_tunnel_unset_port(struct net_device *netdev,
12854                                       unsigned int table, unsigned int idx,
12855                                       struct udp_tunnel_info *ti)
12856 {
12857         struct i40e_netdev_priv *np = netdev_priv(netdev);
12858         struct i40e_hw *hw = &np->vsi->back->hw;
12859         i40e_status ret;
12860
12861         ret = i40e_aq_del_udp_tunnel(hw, ti->hw_priv, NULL);
12862         if (ret) {
12863                 netdev_info(netdev, "delete UDP port failed, err %s aq_err %s\n",
12864                             i40e_stat_str(hw, ret),
12865                             i40e_aq_str(hw, hw->aq.asq_last_status));
12866                 return -EIO;
12867         }
12868
12869         return 0;
12870 }
12871
12872 static int i40e_get_phys_port_id(struct net_device *netdev,
12873                                  struct netdev_phys_item_id *ppid)
12874 {
12875         struct i40e_netdev_priv *np = netdev_priv(netdev);
12876         struct i40e_pf *pf = np->vsi->back;
12877         struct i40e_hw *hw = &pf->hw;
12878
12879         if (!(pf->hw_features & I40E_HW_PORT_ID_VALID))
12880                 return -EOPNOTSUPP;
12881
12882         ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
12883         memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
12884
12885         return 0;
12886 }
12887
12888 /**
12889  * i40e_ndo_fdb_add - add an entry to the hardware database
12890  * @ndm: the input from the stack
12891  * @tb: pointer to array of nladdr (unused)
12892  * @dev: the net device pointer
12893  * @addr: the MAC address entry being added
12894  * @vid: VLAN ID
12895  * @flags: instructions from stack about fdb operation
12896  * @extack: netlink extended ack, unused currently
12897  */
12898 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
12899                             struct net_device *dev,
12900                             const unsigned char *addr, u16 vid,
12901                             u16 flags,
12902                             struct netlink_ext_ack *extack)
12903 {
12904         struct i40e_netdev_priv *np = netdev_priv(dev);
12905         struct i40e_pf *pf = np->vsi->back;
12906         int err = 0;
12907
12908         if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
12909                 return -EOPNOTSUPP;
12910
12911         if (vid) {
12912                 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
12913                 return -EINVAL;
12914         }
12915
12916         /* Hardware does not support aging addresses so if a
12917          * ndm_state is given only allow permanent addresses
12918          */
12919         if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
12920                 netdev_info(dev, "FDB only supports static addresses\n");
12921                 return -EINVAL;
12922         }
12923
12924         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
12925                 err = dev_uc_add_excl(dev, addr);
12926         else if (is_multicast_ether_addr(addr))
12927                 err = dev_mc_add_excl(dev, addr);
12928         else
12929                 err = -EINVAL;
12930
12931         /* Only return duplicate errors if NLM_F_EXCL is set */
12932         if (err == -EEXIST && !(flags & NLM_F_EXCL))
12933                 err = 0;
12934
12935         return err;
12936 }
12937
12938 /**
12939  * i40e_ndo_bridge_setlink - Set the hardware bridge mode
12940  * @dev: the netdev being configured
12941  * @nlh: RTNL message
12942  * @flags: bridge flags
12943  * @extack: netlink extended ack
12944  *
12945  * Inserts a new hardware bridge if not already created and
12946  * enables the bridging mode requested (VEB or VEPA). If the
12947  * hardware bridge has already been inserted and the request
12948  * is to change the mode then that requires a PF reset to
12949  * allow rebuild of the components with required hardware
12950  * bridge mode enabled.
12951  *
12952  * Note: expects to be called while under rtnl_lock()
12953  **/
12954 static int i40e_ndo_bridge_setlink(struct net_device *dev,
12955                                    struct nlmsghdr *nlh,
12956                                    u16 flags,
12957                                    struct netlink_ext_ack *extack)
12958 {
12959         struct i40e_netdev_priv *np = netdev_priv(dev);
12960         struct i40e_vsi *vsi = np->vsi;
12961         struct i40e_pf *pf = vsi->back;
12962         struct i40e_veb *veb = NULL;
12963         struct nlattr *attr, *br_spec;
12964         int i, rem;
12965
12966         /* Only for PF VSI for now */
12967         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
12968                 return -EOPNOTSUPP;
12969
12970         /* Find the HW bridge for PF VSI */
12971         for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12972                 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12973                         veb = pf->veb[i];
12974         }
12975
12976         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
12977
12978         nla_for_each_nested(attr, br_spec, rem) {
12979                 __u16 mode;
12980
12981                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
12982                         continue;
12983
12984                 mode = nla_get_u16(attr);
12985                 if ((mode != BRIDGE_MODE_VEPA) &&
12986                     (mode != BRIDGE_MODE_VEB))
12987                         return -EINVAL;
12988
12989                 /* Insert a new HW bridge */
12990                 if (!veb) {
12991                         veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
12992                                              vsi->tc_config.enabled_tc);
12993                         if (veb) {
12994                                 veb->bridge_mode = mode;
12995                                 i40e_config_bridge_mode(veb);
12996                         } else {
12997                                 /* No Bridge HW offload available */
12998                                 return -ENOENT;
12999                         }
13000                         break;
13001                 } else if (mode != veb->bridge_mode) {
13002                         /* Existing HW bridge but different mode needs reset */
13003                         veb->bridge_mode = mode;
13004                         /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
13005                         if (mode == BRIDGE_MODE_VEB)
13006                                 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
13007                         else
13008                                 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
13009                         i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
13010                         break;
13011                 }
13012         }
13013
13014         return 0;
13015 }
13016
13017 /**
13018  * i40e_ndo_bridge_getlink - Get the hardware bridge mode
13019  * @skb: skb buff
13020  * @pid: process id
13021  * @seq: RTNL message seq #
13022  * @dev: the netdev being configured
13023  * @filter_mask: unused
13024  * @nlflags: netlink flags passed in
13025  *
13026  * Return the mode in which the hardware bridge is operating in
13027  * i.e VEB or VEPA.
13028  **/
13029 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
13030                                    struct net_device *dev,
13031                                    u32 __always_unused filter_mask,
13032                                    int nlflags)
13033 {
13034         struct i40e_netdev_priv *np = netdev_priv(dev);
13035         struct i40e_vsi *vsi = np->vsi;
13036         struct i40e_pf *pf = vsi->back;
13037         struct i40e_veb *veb = NULL;
13038         int i;
13039
13040         /* Only for PF VSI for now */
13041         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
13042                 return -EOPNOTSUPP;
13043
13044         /* Find the HW bridge for the PF VSI */
13045         for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
13046                 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
13047                         veb = pf->veb[i];
13048         }
13049
13050         if (!veb)
13051                 return 0;
13052
13053         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
13054                                        0, 0, nlflags, filter_mask, NULL);
13055 }
13056
13057 /**
13058  * i40e_features_check - Validate encapsulated packet conforms to limits
13059  * @skb: skb buff
13060  * @dev: This physical port's netdev
13061  * @features: Offload features that the stack believes apply
13062  **/
13063 static netdev_features_t i40e_features_check(struct sk_buff *skb,
13064                                              struct net_device *dev,
13065                                              netdev_features_t features)
13066 {
13067         size_t len;
13068
13069         /* No point in doing any of this if neither checksum nor GSO are
13070          * being requested for this frame.  We can rule out both by just
13071          * checking for CHECKSUM_PARTIAL
13072          */
13073         if (skb->ip_summed != CHECKSUM_PARTIAL)
13074                 return features;
13075
13076         /* We cannot support GSO if the MSS is going to be less than
13077          * 64 bytes.  If it is then we need to drop support for GSO.
13078          */
13079         if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
13080                 features &= ~NETIF_F_GSO_MASK;
13081
13082         /* MACLEN can support at most 63 words */
13083         len = skb_network_header(skb) - skb->data;
13084         if (len & ~(63 * 2))
13085                 goto out_err;
13086
13087         /* IPLEN and EIPLEN can support at most 127 dwords */
13088         len = skb_transport_header(skb) - skb_network_header(skb);
13089         if (len & ~(127 * 4))
13090                 goto out_err;
13091
13092         if (skb->encapsulation) {
13093                 /* L4TUNLEN can support 127 words */
13094                 len = skb_inner_network_header(skb) - skb_transport_header(skb);
13095                 if (len & ~(127 * 2))
13096                         goto out_err;
13097
13098                 /* IPLEN can support at most 127 dwords */
13099                 len = skb_inner_transport_header(skb) -
13100                       skb_inner_network_header(skb);
13101                 if (len & ~(127 * 4))
13102                         goto out_err;
13103         }
13104
13105         /* No need to validate L4LEN as TCP is the only protocol with a
13106          * a flexible value and we support all possible values supported
13107          * by TCP, which is at most 15 dwords
13108          */
13109
13110         return features;
13111 out_err:
13112         return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
13113 }
13114
13115 /**
13116  * i40e_xdp_setup - add/remove an XDP program
13117  * @vsi: VSI to changed
13118  * @prog: XDP program
13119  * @extack: netlink extended ack
13120  **/
13121 static int i40e_xdp_setup(struct i40e_vsi *vsi, struct bpf_prog *prog,
13122                           struct netlink_ext_ack *extack)
13123 {
13124         int frame_size = vsi->netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
13125         struct i40e_pf *pf = vsi->back;
13126         struct bpf_prog *old_prog;
13127         bool need_reset;
13128         int i;
13129
13130         /* Don't allow frames that span over multiple buffers */
13131         if (frame_size > vsi->rx_buf_len) {
13132                 NL_SET_ERR_MSG_MOD(extack, "MTU too large to enable XDP");
13133                 return -EINVAL;
13134         }
13135
13136         /* When turning XDP on->off/off->on we reset and rebuild the rings. */
13137         need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
13138
13139         if (need_reset)
13140                 i40e_prep_for_reset(pf);
13141
13142         /* VSI shall be deleted in a moment, just return EINVAL */
13143         if (test_bit(__I40E_IN_REMOVE, pf->state))
13144                 return -EINVAL;
13145
13146         old_prog = xchg(&vsi->xdp_prog, prog);
13147
13148         if (need_reset) {
13149                 if (!prog)
13150                         /* Wait until ndo_xsk_wakeup completes. */
13151                         synchronize_rcu();
13152                 i40e_reset_and_rebuild(pf, true, true);
13153         }
13154
13155         for (i = 0; i < vsi->num_queue_pairs; i++)
13156                 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
13157
13158         if (old_prog)
13159                 bpf_prog_put(old_prog);
13160
13161         /* Kick start the NAPI context if there is an AF_XDP socket open
13162          * on that queue id. This so that receiving will start.
13163          */
13164         if (need_reset && prog)
13165                 for (i = 0; i < vsi->num_queue_pairs; i++)
13166                         if (vsi->xdp_rings[i]->xsk_pool)
13167                                 (void)i40e_xsk_wakeup(vsi->netdev, i,
13168                                                       XDP_WAKEUP_RX);
13169
13170         return 0;
13171 }
13172
13173 /**
13174  * i40e_enter_busy_conf - Enters busy config state
13175  * @vsi: vsi
13176  *
13177  * Returns 0 on success, <0 for failure.
13178  **/
13179 static int i40e_enter_busy_conf(struct i40e_vsi *vsi)
13180 {
13181         struct i40e_pf *pf = vsi->back;
13182         int timeout = 50;
13183
13184         while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
13185                 timeout--;
13186                 if (!timeout)
13187                         return -EBUSY;
13188                 usleep_range(1000, 2000);
13189         }
13190
13191         return 0;
13192 }
13193
13194 /**
13195  * i40e_exit_busy_conf - Exits busy config state
13196  * @vsi: vsi
13197  **/
13198 static void i40e_exit_busy_conf(struct i40e_vsi *vsi)
13199 {
13200         struct i40e_pf *pf = vsi->back;
13201
13202         clear_bit(__I40E_CONFIG_BUSY, pf->state);
13203 }
13204
13205 /**
13206  * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair
13207  * @vsi: vsi
13208  * @queue_pair: queue pair
13209  **/
13210 static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair)
13211 {
13212         memset(&vsi->rx_rings[queue_pair]->rx_stats, 0,
13213                sizeof(vsi->rx_rings[queue_pair]->rx_stats));
13214         memset(&vsi->tx_rings[queue_pair]->stats, 0,
13215                sizeof(vsi->tx_rings[queue_pair]->stats));
13216         if (i40e_enabled_xdp_vsi(vsi)) {
13217                 memset(&vsi->xdp_rings[queue_pair]->stats, 0,
13218                        sizeof(vsi->xdp_rings[queue_pair]->stats));
13219         }
13220 }
13221
13222 /**
13223  * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair
13224  * @vsi: vsi
13225  * @queue_pair: queue pair
13226  **/
13227 static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair)
13228 {
13229         i40e_clean_tx_ring(vsi->tx_rings[queue_pair]);
13230         if (i40e_enabled_xdp_vsi(vsi)) {
13231                 /* Make sure that in-progress ndo_xdp_xmit calls are
13232                  * completed.
13233                  */
13234                 synchronize_rcu();
13235                 i40e_clean_tx_ring(vsi->xdp_rings[queue_pair]);
13236         }
13237         i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
13238 }
13239
13240 /**
13241  * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair
13242  * @vsi: vsi
13243  * @queue_pair: queue pair
13244  * @enable: true for enable, false for disable
13245  **/
13246 static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair,
13247                                         bool enable)
13248 {
13249         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13250         struct i40e_q_vector *q_vector = rxr->q_vector;
13251
13252         if (!vsi->netdev)
13253                 return;
13254
13255         /* All rings in a qp belong to the same qvector. */
13256         if (q_vector->rx.ring || q_vector->tx.ring) {
13257                 if (enable)
13258                         napi_enable(&q_vector->napi);
13259                 else
13260                         napi_disable(&q_vector->napi);
13261         }
13262 }
13263
13264 /**
13265  * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair
13266  * @vsi: vsi
13267  * @queue_pair: queue pair
13268  * @enable: true for enable, false for disable
13269  *
13270  * Returns 0 on success, <0 on failure.
13271  **/
13272 static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair,
13273                                         bool enable)
13274 {
13275         struct i40e_pf *pf = vsi->back;
13276         int pf_q, ret = 0;
13277
13278         pf_q = vsi->base_queue + queue_pair;
13279         ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q,
13280                                      false /*is xdp*/, enable);
13281         if (ret) {
13282                 dev_info(&pf->pdev->dev,
13283                          "VSI seid %d Tx ring %d %sable timeout\n",
13284                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13285                 return ret;
13286         }
13287
13288         i40e_control_rx_q(pf, pf_q, enable);
13289         ret = i40e_pf_rxq_wait(pf, pf_q, enable);
13290         if (ret) {
13291                 dev_info(&pf->pdev->dev,
13292                          "VSI seid %d Rx ring %d %sable timeout\n",
13293                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13294                 return ret;
13295         }
13296
13297         /* Due to HW errata, on Rx disable only, the register can
13298          * indicate done before it really is. Needs 50ms to be sure
13299          */
13300         if (!enable)
13301                 mdelay(50);
13302
13303         if (!i40e_enabled_xdp_vsi(vsi))
13304                 return ret;
13305
13306         ret = i40e_control_wait_tx_q(vsi->seid, pf,
13307                                      pf_q + vsi->alloc_queue_pairs,
13308                                      true /*is xdp*/, enable);
13309         if (ret) {
13310                 dev_info(&pf->pdev->dev,
13311                          "VSI seid %d XDP Tx ring %d %sable timeout\n",
13312                          vsi->seid, pf_q, (enable ? "en" : "dis"));
13313         }
13314
13315         return ret;
13316 }
13317
13318 /**
13319  * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair
13320  * @vsi: vsi
13321  * @queue_pair: queue_pair
13322  **/
13323 static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair)
13324 {
13325         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13326         struct i40e_pf *pf = vsi->back;
13327         struct i40e_hw *hw = &pf->hw;
13328
13329         /* All rings in a qp belong to the same qvector. */
13330         if (pf->flags & I40E_FLAG_MSIX_ENABLED)
13331                 i40e_irq_dynamic_enable(vsi, rxr->q_vector->v_idx);
13332         else
13333                 i40e_irq_dynamic_enable_icr0(pf);
13334
13335         i40e_flush(hw);
13336 }
13337
13338 /**
13339  * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair
13340  * @vsi: vsi
13341  * @queue_pair: queue_pair
13342  **/
13343 static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair)
13344 {
13345         struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13346         struct i40e_pf *pf = vsi->back;
13347         struct i40e_hw *hw = &pf->hw;
13348
13349         /* For simplicity, instead of removing the qp interrupt causes
13350          * from the interrupt linked list, we simply disable the interrupt, and
13351          * leave the list intact.
13352          *
13353          * All rings in a qp belong to the same qvector.
13354          */
13355         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
13356                 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx;
13357
13358                 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0);
13359                 i40e_flush(hw);
13360                 synchronize_irq(pf->msix_entries[intpf].vector);
13361         } else {
13362                 /* Legacy and MSI mode - this stops all interrupt handling */
13363                 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
13364                 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
13365                 i40e_flush(hw);
13366                 synchronize_irq(pf->pdev->irq);
13367         }
13368 }
13369
13370 /**
13371  * i40e_queue_pair_disable - Disables a queue pair
13372  * @vsi: vsi
13373  * @queue_pair: queue pair
13374  *
13375  * Returns 0 on success, <0 on failure.
13376  **/
13377 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair)
13378 {
13379         int err;
13380
13381         err = i40e_enter_busy_conf(vsi);
13382         if (err)
13383                 return err;
13384
13385         i40e_queue_pair_disable_irq(vsi, queue_pair);
13386         err = i40e_queue_pair_toggle_rings(vsi, queue_pair, false /* off */);
13387         i40e_queue_pair_toggle_napi(vsi, queue_pair, false /* off */);
13388         i40e_queue_pair_clean_rings(vsi, queue_pair);
13389         i40e_queue_pair_reset_stats(vsi, queue_pair);
13390
13391         return err;
13392 }
13393
13394 /**
13395  * i40e_queue_pair_enable - Enables a queue pair
13396  * @vsi: vsi
13397  * @queue_pair: queue pair
13398  *
13399  * Returns 0 on success, <0 on failure.
13400  **/
13401 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair)
13402 {
13403         int err;
13404
13405         err = i40e_configure_tx_ring(vsi->tx_rings[queue_pair]);
13406         if (err)
13407                 return err;
13408
13409         if (i40e_enabled_xdp_vsi(vsi)) {
13410                 err = i40e_configure_tx_ring(vsi->xdp_rings[queue_pair]);
13411                 if (err)
13412                         return err;
13413         }
13414
13415         err = i40e_configure_rx_ring(vsi->rx_rings[queue_pair]);
13416         if (err)
13417                 return err;
13418
13419         err = i40e_queue_pair_toggle_rings(vsi, queue_pair, true /* on */);
13420         i40e_queue_pair_toggle_napi(vsi, queue_pair, true /* on */);
13421         i40e_queue_pair_enable_irq(vsi, queue_pair);
13422
13423         i40e_exit_busy_conf(vsi);
13424
13425         return err;
13426 }
13427
13428 /**
13429  * i40e_xdp - implements ndo_bpf for i40e
13430  * @dev: netdevice
13431  * @xdp: XDP command
13432  **/
13433 static int i40e_xdp(struct net_device *dev,
13434                     struct netdev_bpf *xdp)
13435 {
13436         struct i40e_netdev_priv *np = netdev_priv(dev);
13437         struct i40e_vsi *vsi = np->vsi;
13438
13439         if (vsi->type != I40E_VSI_MAIN)
13440                 return -EINVAL;
13441
13442         switch (xdp->command) {
13443         case XDP_SETUP_PROG:
13444                 return i40e_xdp_setup(vsi, xdp->prog, xdp->extack);
13445         case XDP_SETUP_XSK_POOL:
13446                 return i40e_xsk_pool_setup(vsi, xdp->xsk.pool,
13447                                            xdp->xsk.queue_id);
13448         default:
13449                 return -EINVAL;
13450         }
13451 }
13452
13453 static const struct net_device_ops i40e_netdev_ops = {
13454         .ndo_open               = i40e_open,
13455         .ndo_stop               = i40e_close,
13456         .ndo_start_xmit         = i40e_lan_xmit_frame,
13457         .ndo_get_stats64        = i40e_get_netdev_stats_struct,
13458         .ndo_set_rx_mode        = i40e_set_rx_mode,
13459         .ndo_validate_addr      = eth_validate_addr,
13460         .ndo_set_mac_address    = i40e_set_mac,
13461         .ndo_change_mtu         = i40e_change_mtu,
13462         .ndo_eth_ioctl          = i40e_ioctl,
13463         .ndo_tx_timeout         = i40e_tx_timeout,
13464         .ndo_vlan_rx_add_vid    = i40e_vlan_rx_add_vid,
13465         .ndo_vlan_rx_kill_vid   = i40e_vlan_rx_kill_vid,
13466 #ifdef CONFIG_NET_POLL_CONTROLLER
13467         .ndo_poll_controller    = i40e_netpoll,
13468 #endif
13469         .ndo_setup_tc           = __i40e_setup_tc,
13470         .ndo_select_queue       = i40e_lan_select_queue,
13471         .ndo_set_features       = i40e_set_features,
13472         .ndo_set_vf_mac         = i40e_ndo_set_vf_mac,
13473         .ndo_set_vf_vlan        = i40e_ndo_set_vf_port_vlan,
13474         .ndo_get_vf_stats       = i40e_get_vf_stats,
13475         .ndo_set_vf_rate        = i40e_ndo_set_vf_bw,
13476         .ndo_get_vf_config      = i40e_ndo_get_vf_config,
13477         .ndo_set_vf_link_state  = i40e_ndo_set_vf_link_state,
13478         .ndo_set_vf_spoofchk    = i40e_ndo_set_vf_spoofchk,
13479         .ndo_set_vf_trust       = i40e_ndo_set_vf_trust,
13480         .ndo_get_phys_port_id   = i40e_get_phys_port_id,
13481         .ndo_fdb_add            = i40e_ndo_fdb_add,
13482         .ndo_features_check     = i40e_features_check,
13483         .ndo_bridge_getlink     = i40e_ndo_bridge_getlink,
13484         .ndo_bridge_setlink     = i40e_ndo_bridge_setlink,
13485         .ndo_bpf                = i40e_xdp,
13486         .ndo_xdp_xmit           = i40e_xdp_xmit,
13487         .ndo_xsk_wakeup         = i40e_xsk_wakeup,
13488         .ndo_dfwd_add_station   = i40e_fwd_add,
13489         .ndo_dfwd_del_station   = i40e_fwd_del,
13490 };
13491
13492 /**
13493  * i40e_config_netdev - Setup the netdev flags
13494  * @vsi: the VSI being configured
13495  *
13496  * Returns 0 on success, negative value on failure
13497  **/
13498 static int i40e_config_netdev(struct i40e_vsi *vsi)
13499 {
13500         struct i40e_pf *pf = vsi->back;
13501         struct i40e_hw *hw = &pf->hw;
13502         struct i40e_netdev_priv *np;
13503         struct net_device *netdev;
13504         u8 broadcast[ETH_ALEN];
13505         u8 mac_addr[ETH_ALEN];
13506         int etherdev_size;
13507         netdev_features_t hw_enc_features;
13508         netdev_features_t hw_features;
13509
13510         etherdev_size = sizeof(struct i40e_netdev_priv);
13511         netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
13512         if (!netdev)
13513                 return -ENOMEM;
13514
13515         vsi->netdev = netdev;
13516         np = netdev_priv(netdev);
13517         np->vsi = vsi;
13518
13519         hw_enc_features = NETIF_F_SG                    |
13520                           NETIF_F_HW_CSUM               |
13521                           NETIF_F_HIGHDMA               |
13522                           NETIF_F_SOFT_FEATURES         |
13523                           NETIF_F_TSO                   |
13524                           NETIF_F_TSO_ECN               |
13525                           NETIF_F_TSO6                  |
13526                           NETIF_F_GSO_GRE               |
13527                           NETIF_F_GSO_GRE_CSUM          |
13528                           NETIF_F_GSO_PARTIAL           |
13529                           NETIF_F_GSO_IPXIP4            |
13530                           NETIF_F_GSO_IPXIP6            |
13531                           NETIF_F_GSO_UDP_TUNNEL        |
13532                           NETIF_F_GSO_UDP_TUNNEL_CSUM   |
13533                           NETIF_F_GSO_UDP_L4            |
13534                           NETIF_F_SCTP_CRC              |
13535                           NETIF_F_RXHASH                |
13536                           NETIF_F_RXCSUM                |
13537                           0;
13538
13539         if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE))
13540                 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
13541
13542         netdev->udp_tunnel_nic_info = &pf->udp_tunnel_nic;
13543
13544         netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
13545
13546         netdev->hw_enc_features |= hw_enc_features;
13547
13548         /* record features VLANs can make use of */
13549         netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
13550
13551 #define I40E_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE |            \
13552                                    NETIF_F_GSO_GRE_CSUM |       \
13553                                    NETIF_F_GSO_IPXIP4 |         \
13554                                    NETIF_F_GSO_IPXIP6 |         \
13555                                    NETIF_F_GSO_UDP_TUNNEL |     \
13556                                    NETIF_F_GSO_UDP_TUNNEL_CSUM)
13557
13558         netdev->gso_partial_features = I40E_GSO_PARTIAL_FEATURES;
13559         netdev->features |= NETIF_F_GSO_PARTIAL |
13560                             I40E_GSO_PARTIAL_FEATURES;
13561
13562         netdev->mpls_features |= NETIF_F_SG;
13563         netdev->mpls_features |= NETIF_F_HW_CSUM;
13564         netdev->mpls_features |= NETIF_F_TSO;
13565         netdev->mpls_features |= NETIF_F_TSO6;
13566         netdev->mpls_features |= I40E_GSO_PARTIAL_FEATURES;
13567
13568         /* enable macvlan offloads */
13569         netdev->hw_features |= NETIF_F_HW_L2FW_DOFFLOAD;
13570
13571         hw_features = hw_enc_features           |
13572                       NETIF_F_HW_VLAN_CTAG_TX   |
13573                       NETIF_F_HW_VLAN_CTAG_RX;
13574
13575         if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
13576                 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
13577
13578         netdev->hw_features |= hw_features;
13579
13580         netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
13581         netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
13582
13583         netdev->features &= ~NETIF_F_HW_TC;
13584
13585         if (vsi->type == I40E_VSI_MAIN) {
13586                 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
13587                 ether_addr_copy(mac_addr, hw->mac.perm_addr);
13588                 /* The following steps are necessary for two reasons. First,
13589                  * some older NVM configurations load a default MAC-VLAN
13590                  * filter that will accept any tagged packet, and we want to
13591                  * replace this with a normal filter. Additionally, it is
13592                  * possible our MAC address was provided by the platform using
13593                  * Open Firmware or similar.
13594                  *
13595                  * Thus, we need to remove the default filter and install one
13596                  * specific to the MAC address.
13597                  */
13598                 i40e_rm_default_mac_filter(vsi, mac_addr);
13599                 spin_lock_bh(&vsi->mac_filter_hash_lock);
13600                 i40e_add_mac_filter(vsi, mac_addr);
13601                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13602         } else {
13603                 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
13604                  * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
13605                  * the end, which is 4 bytes long, so force truncation of the
13606                  * original name by IFNAMSIZ - 4
13607                  */
13608                 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d",
13609                          IFNAMSIZ - 4,
13610                          pf->vsi[pf->lan_vsi]->netdev->name);
13611                 eth_random_addr(mac_addr);
13612
13613                 spin_lock_bh(&vsi->mac_filter_hash_lock);
13614                 i40e_add_mac_filter(vsi, mac_addr);
13615                 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13616         }
13617
13618         /* Add the broadcast filter so that we initially will receive
13619          * broadcast packets. Note that when a new VLAN is first added the
13620          * driver will convert all filters marked I40E_VLAN_ANY into VLAN
13621          * specific filters as part of transitioning into "vlan" operation.
13622          * When more VLANs are added, the driver will copy each existing MAC
13623          * filter and add it for the new VLAN.
13624          *
13625          * Broadcast filters are handled specially by
13626          * i40e_sync_filters_subtask, as the driver must to set the broadcast
13627          * promiscuous bit instead of adding this directly as a MAC/VLAN
13628          * filter. The subtask will update the correct broadcast promiscuous
13629          * bits as VLANs become active or inactive.
13630          */
13631         eth_broadcast_addr(broadcast);
13632         spin_lock_bh(&vsi->mac_filter_hash_lock);
13633         i40e_add_mac_filter(vsi, broadcast);
13634         spin_unlock_bh(&vsi->mac_filter_hash_lock);
13635
13636         eth_hw_addr_set(netdev, mac_addr);
13637         ether_addr_copy(netdev->perm_addr, mac_addr);
13638
13639         /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
13640         netdev->neigh_priv_len = sizeof(u32) * 4;
13641
13642         netdev->priv_flags |= IFF_UNICAST_FLT;
13643         netdev->priv_flags |= IFF_SUPP_NOFCS;
13644         /* Setup netdev TC information */
13645         i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
13646
13647         netdev->netdev_ops = &i40e_netdev_ops;
13648         netdev->watchdog_timeo = 5 * HZ;
13649         i40e_set_ethtool_ops(netdev);
13650
13651         /* MTU range: 68 - 9706 */
13652         netdev->min_mtu = ETH_MIN_MTU;
13653         netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
13654
13655         return 0;
13656 }
13657
13658 /**
13659  * i40e_vsi_delete - Delete a VSI from the switch
13660  * @vsi: the VSI being removed
13661  *
13662  * Returns 0 on success, negative value on failure
13663  **/
13664 static void i40e_vsi_delete(struct i40e_vsi *vsi)
13665 {
13666         /* remove default VSI is not allowed */
13667         if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
13668                 return;
13669
13670         i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
13671 }
13672
13673 /**
13674  * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
13675  * @vsi: the VSI being queried
13676  *
13677  * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
13678  **/
13679 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
13680 {
13681         struct i40e_veb *veb;
13682         struct i40e_pf *pf = vsi->back;
13683
13684         /* Uplink is not a bridge so default to VEB */
13685         if (vsi->veb_idx >= I40E_MAX_VEB)
13686                 return 1;
13687
13688         veb = pf->veb[vsi->veb_idx];
13689         if (!veb) {
13690                 dev_info(&pf->pdev->dev,
13691                          "There is no veb associated with the bridge\n");
13692                 return -ENOENT;
13693         }
13694
13695         /* Uplink is a bridge in VEPA mode */
13696         if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
13697                 return 0;
13698         } else {
13699                 /* Uplink is a bridge in VEB mode */
13700                 return 1;
13701         }
13702
13703         /* VEPA is now default bridge, so return 0 */
13704         return 0;
13705 }
13706
13707 /**
13708  * i40e_add_vsi - Add a VSI to the switch
13709  * @vsi: the VSI being configured
13710  *
13711  * This initializes a VSI context depending on the VSI type to be added and
13712  * passes it down to the add_vsi aq command.
13713  **/
13714 static int i40e_add_vsi(struct i40e_vsi *vsi)
13715 {
13716         int ret = -ENODEV;
13717         struct i40e_pf *pf = vsi->back;
13718         struct i40e_hw *hw = &pf->hw;
13719         struct i40e_vsi_context ctxt;
13720         struct i40e_mac_filter *f;
13721         struct hlist_node *h;
13722         int bkt;
13723
13724         u8 enabled_tc = 0x1; /* TC0 enabled */
13725         int f_count = 0;
13726
13727         memset(&ctxt, 0, sizeof(ctxt));
13728         switch (vsi->type) {
13729         case I40E_VSI_MAIN:
13730                 /* The PF's main VSI is already setup as part of the
13731                  * device initialization, so we'll not bother with
13732                  * the add_vsi call, but we will retrieve the current
13733                  * VSI context.
13734                  */
13735                 ctxt.seid = pf->main_vsi_seid;
13736                 ctxt.pf_num = pf->hw.pf_id;
13737                 ctxt.vf_num = 0;
13738                 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
13739                 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13740                 if (ret) {
13741                         dev_info(&pf->pdev->dev,
13742                                  "couldn't get PF vsi config, err %s aq_err %s\n",
13743                                  i40e_stat_str(&pf->hw, ret),
13744                                  i40e_aq_str(&pf->hw,
13745                                              pf->hw.aq.asq_last_status));
13746                         return -ENOENT;
13747                 }
13748                 vsi->info = ctxt.info;
13749                 vsi->info.valid_sections = 0;
13750
13751                 vsi->seid = ctxt.seid;
13752                 vsi->id = ctxt.vsi_number;
13753
13754                 enabled_tc = i40e_pf_get_tc_map(pf);
13755
13756                 /* Source pruning is enabled by default, so the flag is
13757                  * negative logic - if it's set, we need to fiddle with
13758                  * the VSI to disable source pruning.
13759                  */
13760                 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) {
13761                         memset(&ctxt, 0, sizeof(ctxt));
13762                         ctxt.seid = pf->main_vsi_seid;
13763                         ctxt.pf_num = pf->hw.pf_id;
13764                         ctxt.vf_num = 0;
13765                         ctxt.info.valid_sections |=
13766                                      cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13767                         ctxt.info.switch_id =
13768                                    cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
13769                         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13770                         if (ret) {
13771                                 dev_info(&pf->pdev->dev,
13772                                          "update vsi failed, err %s aq_err %s\n",
13773                                          i40e_stat_str(&pf->hw, ret),
13774                                          i40e_aq_str(&pf->hw,
13775                                                      pf->hw.aq.asq_last_status));
13776                                 ret = -ENOENT;
13777                                 goto err;
13778                         }
13779                 }
13780
13781                 /* MFP mode setup queue map and update VSI */
13782                 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
13783                     !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
13784                         memset(&ctxt, 0, sizeof(ctxt));
13785                         ctxt.seid = pf->main_vsi_seid;
13786                         ctxt.pf_num = pf->hw.pf_id;
13787                         ctxt.vf_num = 0;
13788                         i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
13789                         ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13790                         if (ret) {
13791                                 dev_info(&pf->pdev->dev,
13792                                          "update vsi failed, err %s aq_err %s\n",
13793                                          i40e_stat_str(&pf->hw, ret),
13794                                          i40e_aq_str(&pf->hw,
13795                                                     pf->hw.aq.asq_last_status));
13796                                 ret = -ENOENT;
13797                                 goto err;
13798                         }
13799                         /* update the local VSI info queue map */
13800                         i40e_vsi_update_queue_map(vsi, &ctxt);
13801                         vsi->info.valid_sections = 0;
13802                 } else {
13803                         /* Default/Main VSI is only enabled for TC0
13804                          * reconfigure it to enable all TCs that are
13805                          * available on the port in SFP mode.
13806                          * For MFP case the iSCSI PF would use this
13807                          * flow to enable LAN+iSCSI TC.
13808                          */
13809                         ret = i40e_vsi_config_tc(vsi, enabled_tc);
13810                         if (ret) {
13811                                 /* Single TC condition is not fatal,
13812                                  * message and continue
13813                                  */
13814                                 dev_info(&pf->pdev->dev,
13815                                          "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
13816                                          enabled_tc,
13817                                          i40e_stat_str(&pf->hw, ret),
13818                                          i40e_aq_str(&pf->hw,
13819                                                     pf->hw.aq.asq_last_status));
13820                         }
13821                 }
13822                 break;
13823
13824         case I40E_VSI_FDIR:
13825                 ctxt.pf_num = hw->pf_id;
13826                 ctxt.vf_num = 0;
13827                 ctxt.uplink_seid = vsi->uplink_seid;
13828                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13829                 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13830                 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
13831                     (i40e_is_vsi_uplink_mode_veb(vsi))) {
13832                         ctxt.info.valid_sections |=
13833                              cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13834                         ctxt.info.switch_id =
13835                            cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13836                 }
13837                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13838                 break;
13839
13840         case I40E_VSI_VMDQ2:
13841                 ctxt.pf_num = hw->pf_id;
13842                 ctxt.vf_num = 0;
13843                 ctxt.uplink_seid = vsi->uplink_seid;
13844                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13845                 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
13846
13847                 /* This VSI is connected to VEB so the switch_id
13848                  * should be set to zero by default.
13849                  */
13850                 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13851                         ctxt.info.valid_sections |=
13852                                 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13853                         ctxt.info.switch_id =
13854                                 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13855                 }
13856
13857                 /* Setup the VSI tx/rx queue map for TC0 only for now */
13858                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13859                 break;
13860
13861         case I40E_VSI_SRIOV:
13862                 ctxt.pf_num = hw->pf_id;
13863                 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
13864                 ctxt.uplink_seid = vsi->uplink_seid;
13865                 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13866                 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
13867
13868                 /* This VSI is connected to VEB so the switch_id
13869                  * should be set to zero by default.
13870                  */
13871                 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13872                         ctxt.info.valid_sections |=
13873                                 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13874                         ctxt.info.switch_id =
13875                                 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13876                 }
13877
13878                 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
13879                         ctxt.info.valid_sections |=
13880                                 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
13881                         ctxt.info.queueing_opt_flags |=
13882                                 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
13883                                  I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
13884                 }
13885
13886                 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
13887                 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
13888                 if (pf->vf[vsi->vf_id].spoofchk) {
13889                         ctxt.info.valid_sections |=
13890                                 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
13891                         ctxt.info.sec_flags |=
13892                                 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
13893                                  I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
13894                 }
13895                 /* Setup the VSI tx/rx queue map for TC0 only for now */
13896                 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13897                 break;
13898
13899         case I40E_VSI_IWARP:
13900                 /* send down message to iWARP */
13901                 break;
13902
13903         default:
13904                 return -ENODEV;
13905         }
13906
13907         if (vsi->type != I40E_VSI_MAIN) {
13908                 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
13909                 if (ret) {
13910                         dev_info(&vsi->back->pdev->dev,
13911                                  "add vsi failed, err %s aq_err %s\n",
13912                                  i40e_stat_str(&pf->hw, ret),
13913                                  i40e_aq_str(&pf->hw,
13914                                              pf->hw.aq.asq_last_status));
13915                         ret = -ENOENT;
13916                         goto err;
13917                 }
13918                 vsi->info = ctxt.info;
13919                 vsi->info.valid_sections = 0;
13920                 vsi->seid = ctxt.seid;
13921                 vsi->id = ctxt.vsi_number;
13922         }
13923
13924         vsi->active_filters = 0;
13925         clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
13926         spin_lock_bh(&vsi->mac_filter_hash_lock);
13927         /* If macvlan filters already exist, force them to get loaded */
13928         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
13929                 f->state = I40E_FILTER_NEW;
13930                 f_count++;
13931         }
13932         spin_unlock_bh(&vsi->mac_filter_hash_lock);
13933
13934         if (f_count) {
13935                 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
13936                 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
13937         }
13938
13939         /* Update VSI BW information */
13940         ret = i40e_vsi_get_bw_info(vsi);
13941         if (ret) {
13942                 dev_info(&pf->pdev->dev,
13943                          "couldn't get vsi bw info, err %s aq_err %s\n",
13944                          i40e_stat_str(&pf->hw, ret),
13945                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13946                 /* VSI is already added so not tearing that up */
13947                 ret = 0;
13948         }
13949
13950 err:
13951         return ret;
13952 }
13953
13954 /**
13955  * i40e_vsi_release - Delete a VSI and free its resources
13956  * @vsi: the VSI being removed
13957  *
13958  * Returns 0 on success or < 0 on error
13959  **/
13960 int i40e_vsi_release(struct i40e_vsi *vsi)
13961 {
13962         struct i40e_mac_filter *f;
13963         struct hlist_node *h;
13964         struct i40e_veb *veb = NULL;
13965         struct i40e_pf *pf;
13966         u16 uplink_seid;
13967         int i, n, bkt;
13968
13969         pf = vsi->back;
13970
13971         /* release of a VEB-owner or last VSI is not allowed */
13972         if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
13973                 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
13974                          vsi->seid, vsi->uplink_seid);
13975                 return -ENODEV;
13976         }
13977         if (vsi == pf->vsi[pf->lan_vsi] &&
13978             !test_bit(__I40E_DOWN, pf->state)) {
13979                 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
13980                 return -ENODEV;
13981         }
13982         set_bit(__I40E_VSI_RELEASING, vsi->state);
13983         uplink_seid = vsi->uplink_seid;
13984         if (vsi->type != I40E_VSI_SRIOV) {
13985                 if (vsi->netdev_registered) {
13986                         vsi->netdev_registered = false;
13987                         if (vsi->netdev) {
13988                                 /* results in a call to i40e_close() */
13989                                 unregister_netdev(vsi->netdev);
13990                         }
13991                 } else {
13992                         i40e_vsi_close(vsi);
13993                 }
13994                 i40e_vsi_disable_irq(vsi);
13995         }
13996
13997         spin_lock_bh(&vsi->mac_filter_hash_lock);
13998
13999         /* clear the sync flag on all filters */
14000         if (vsi->netdev) {
14001                 __dev_uc_unsync(vsi->netdev, NULL);
14002                 __dev_mc_unsync(vsi->netdev, NULL);
14003         }
14004
14005         /* make sure any remaining filters are marked for deletion */
14006         hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
14007                 __i40e_del_filter(vsi, f);
14008
14009         spin_unlock_bh(&vsi->mac_filter_hash_lock);
14010
14011         i40e_sync_vsi_filters(vsi);
14012
14013         i40e_vsi_delete(vsi);
14014         i40e_vsi_free_q_vectors(vsi);
14015         if (vsi->netdev) {
14016                 free_netdev(vsi->netdev);
14017                 vsi->netdev = NULL;
14018         }
14019         i40e_vsi_clear_rings(vsi);
14020         i40e_vsi_clear(vsi);
14021
14022         /* If this was the last thing on the VEB, except for the
14023          * controlling VSI, remove the VEB, which puts the controlling
14024          * VSI onto the next level down in the switch.
14025          *
14026          * Well, okay, there's one more exception here: don't remove
14027          * the orphan VEBs yet.  We'll wait for an explicit remove request
14028          * from up the network stack.
14029          */
14030         for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
14031                 if (pf->vsi[i] &&
14032                     pf->vsi[i]->uplink_seid == uplink_seid &&
14033                     (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14034                         n++;      /* count the VSIs */
14035                 }
14036         }
14037         for (i = 0; i < I40E_MAX_VEB; i++) {
14038                 if (!pf->veb[i])
14039                         continue;
14040                 if (pf->veb[i]->uplink_seid == uplink_seid)
14041                         n++;     /* count the VEBs */
14042                 if (pf->veb[i]->seid == uplink_seid)
14043                         veb = pf->veb[i];
14044         }
14045         if (n == 0 && veb && veb->uplink_seid != 0)
14046                 i40e_veb_release(veb);
14047
14048         return 0;
14049 }
14050
14051 /**
14052  * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
14053  * @vsi: ptr to the VSI
14054  *
14055  * This should only be called after i40e_vsi_mem_alloc() which allocates the
14056  * corresponding SW VSI structure and initializes num_queue_pairs for the
14057  * newly allocated VSI.
14058  *
14059  * Returns 0 on success or negative on failure
14060  **/
14061 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
14062 {
14063         int ret = -ENOENT;
14064         struct i40e_pf *pf = vsi->back;
14065
14066         if (vsi->q_vectors[0]) {
14067                 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
14068                          vsi->seid);
14069                 return -EEXIST;
14070         }
14071
14072         if (vsi->base_vector) {
14073                 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
14074                          vsi->seid, vsi->base_vector);
14075                 return -EEXIST;
14076         }
14077
14078         ret = i40e_vsi_alloc_q_vectors(vsi);
14079         if (ret) {
14080                 dev_info(&pf->pdev->dev,
14081                          "failed to allocate %d q_vector for VSI %d, ret=%d\n",
14082                          vsi->num_q_vectors, vsi->seid, ret);
14083                 vsi->num_q_vectors = 0;
14084                 goto vector_setup_out;
14085         }
14086
14087         /* In Legacy mode, we do not have to get any other vector since we
14088          * piggyback on the misc/ICR0 for queue interrupts.
14089         */
14090         if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
14091                 return ret;
14092         if (vsi->num_q_vectors)
14093                 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
14094                                                  vsi->num_q_vectors, vsi->idx);
14095         if (vsi->base_vector < 0) {
14096                 dev_info(&pf->pdev->dev,
14097                          "failed to get tracking for %d vectors for VSI %d, err=%d\n",
14098                          vsi->num_q_vectors, vsi->seid, vsi->base_vector);
14099                 i40e_vsi_free_q_vectors(vsi);
14100                 ret = -ENOENT;
14101                 goto vector_setup_out;
14102         }
14103
14104 vector_setup_out:
14105         return ret;
14106 }
14107
14108 /**
14109  * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
14110  * @vsi: pointer to the vsi.
14111  *
14112  * This re-allocates a vsi's queue resources.
14113  *
14114  * Returns pointer to the successfully allocated and configured VSI sw struct
14115  * on success, otherwise returns NULL on failure.
14116  **/
14117 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
14118 {
14119         u16 alloc_queue_pairs;
14120         struct i40e_pf *pf;
14121         u8 enabled_tc;
14122         int ret;
14123
14124         if (!vsi)
14125                 return NULL;
14126
14127         pf = vsi->back;
14128
14129         i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
14130         i40e_vsi_clear_rings(vsi);
14131
14132         i40e_vsi_free_arrays(vsi, false);
14133         i40e_set_num_rings_in_vsi(vsi);
14134         ret = i40e_vsi_alloc_arrays(vsi, false);
14135         if (ret)
14136                 goto err_vsi;
14137
14138         alloc_queue_pairs = vsi->alloc_queue_pairs *
14139                             (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14140
14141         ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14142         if (ret < 0) {
14143                 dev_info(&pf->pdev->dev,
14144                          "failed to get tracking for %d queues for VSI %d err %d\n",
14145                          alloc_queue_pairs, vsi->seid, ret);
14146                 goto err_vsi;
14147         }
14148         vsi->base_queue = ret;
14149
14150         /* Update the FW view of the VSI. Force a reset of TC and queue
14151          * layout configurations.
14152          */
14153         enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14154         pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14155         pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14156         i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14157         if (vsi->type == I40E_VSI_MAIN)
14158                 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
14159
14160         /* assign it some queues */
14161         ret = i40e_alloc_rings(vsi);
14162         if (ret)
14163                 goto err_rings;
14164
14165         /* map all of the rings to the q_vectors */
14166         i40e_vsi_map_rings_to_vectors(vsi);
14167         return vsi;
14168
14169 err_rings:
14170         i40e_vsi_free_q_vectors(vsi);
14171         if (vsi->netdev_registered) {
14172                 vsi->netdev_registered = false;
14173                 unregister_netdev(vsi->netdev);
14174                 free_netdev(vsi->netdev);
14175                 vsi->netdev = NULL;
14176         }
14177         i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14178 err_vsi:
14179         i40e_vsi_clear(vsi);
14180         return NULL;
14181 }
14182
14183 /**
14184  * i40e_vsi_setup - Set up a VSI by a given type
14185  * @pf: board private structure
14186  * @type: VSI type
14187  * @uplink_seid: the switch element to link to
14188  * @param1: usage depends upon VSI type. For VF types, indicates VF id
14189  *
14190  * This allocates the sw VSI structure and its queue resources, then add a VSI
14191  * to the identified VEB.
14192  *
14193  * Returns pointer to the successfully allocated and configure VSI sw struct on
14194  * success, otherwise returns NULL on failure.
14195  **/
14196 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
14197                                 u16 uplink_seid, u32 param1)
14198 {
14199         struct i40e_vsi *vsi = NULL;
14200         struct i40e_veb *veb = NULL;
14201         u16 alloc_queue_pairs;
14202         int ret, i;
14203         int v_idx;
14204
14205         /* The requested uplink_seid must be either
14206          *     - the PF's port seid
14207          *              no VEB is needed because this is the PF
14208          *              or this is a Flow Director special case VSI
14209          *     - seid of an existing VEB
14210          *     - seid of a VSI that owns an existing VEB
14211          *     - seid of a VSI that doesn't own a VEB
14212          *              a new VEB is created and the VSI becomes the owner
14213          *     - seid of the PF VSI, which is what creates the first VEB
14214          *              this is a special case of the previous
14215          *
14216          * Find which uplink_seid we were given and create a new VEB if needed
14217          */
14218         for (i = 0; i < I40E_MAX_VEB; i++) {
14219                 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
14220                         veb = pf->veb[i];
14221                         break;
14222                 }
14223         }
14224
14225         if (!veb && uplink_seid != pf->mac_seid) {
14226
14227                 for (i = 0; i < pf->num_alloc_vsi; i++) {
14228                         if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
14229                                 vsi = pf->vsi[i];
14230                                 break;
14231                         }
14232                 }
14233                 if (!vsi) {
14234                         dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
14235                                  uplink_seid);
14236                         return NULL;
14237                 }
14238
14239                 if (vsi->uplink_seid == pf->mac_seid)
14240                         veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
14241                                              vsi->tc_config.enabled_tc);
14242                 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
14243                         veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
14244                                              vsi->tc_config.enabled_tc);
14245                 if (veb) {
14246                         if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
14247                                 dev_info(&vsi->back->pdev->dev,
14248                                          "New VSI creation error, uplink seid of LAN VSI expected.\n");
14249                                 return NULL;
14250                         }
14251                         /* We come up by default in VEPA mode if SRIOV is not
14252                          * already enabled, in which case we can't force VEPA
14253                          * mode.
14254                          */
14255                         if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
14256                                 veb->bridge_mode = BRIDGE_MODE_VEPA;
14257                                 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
14258                         }
14259                         i40e_config_bridge_mode(veb);
14260                 }
14261                 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
14262                         if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
14263                                 veb = pf->veb[i];
14264                 }
14265                 if (!veb) {
14266                         dev_info(&pf->pdev->dev, "couldn't add VEB\n");
14267                         return NULL;
14268                 }
14269
14270                 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14271                 uplink_seid = veb->seid;
14272         }
14273
14274         /* get vsi sw struct */
14275         v_idx = i40e_vsi_mem_alloc(pf, type);
14276         if (v_idx < 0)
14277                 goto err_alloc;
14278         vsi = pf->vsi[v_idx];
14279         if (!vsi)
14280                 goto err_alloc;
14281         vsi->type = type;
14282         vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
14283
14284         if (type == I40E_VSI_MAIN)
14285                 pf->lan_vsi = v_idx;
14286         else if (type == I40E_VSI_SRIOV)
14287                 vsi->vf_id = param1;
14288         /* assign it some queues */
14289         alloc_queue_pairs = vsi->alloc_queue_pairs *
14290                             (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14291
14292         ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14293         if (ret < 0) {
14294                 dev_info(&pf->pdev->dev,
14295                          "failed to get tracking for %d queues for VSI %d err=%d\n",
14296                          alloc_queue_pairs, vsi->seid, ret);
14297                 goto err_vsi;
14298         }
14299         vsi->base_queue = ret;
14300
14301         /* get a VSI from the hardware */
14302         vsi->uplink_seid = uplink_seid;
14303         ret = i40e_add_vsi(vsi);
14304         if (ret)
14305                 goto err_vsi;
14306
14307         switch (vsi->type) {
14308         /* setup the netdev if needed */
14309         case I40E_VSI_MAIN:
14310         case I40E_VSI_VMDQ2:
14311                 ret = i40e_config_netdev(vsi);
14312                 if (ret)
14313                         goto err_netdev;
14314                 ret = i40e_netif_set_realnum_tx_rx_queues(vsi);
14315                 if (ret)
14316                         goto err_netdev;
14317                 ret = register_netdev(vsi->netdev);
14318                 if (ret)
14319                         goto err_netdev;
14320                 vsi->netdev_registered = true;
14321                 netif_carrier_off(vsi->netdev);
14322 #ifdef CONFIG_I40E_DCB
14323                 /* Setup DCB netlink interface */
14324                 i40e_dcbnl_setup(vsi);
14325 #endif /* CONFIG_I40E_DCB */
14326                 fallthrough;
14327         case I40E_VSI_FDIR:
14328                 /* set up vectors and rings if needed */
14329                 ret = i40e_vsi_setup_vectors(vsi);
14330                 if (ret)
14331                         goto err_msix;
14332
14333                 ret = i40e_alloc_rings(vsi);
14334                 if (ret)
14335                         goto err_rings;
14336
14337                 /* map all of the rings to the q_vectors */
14338                 i40e_vsi_map_rings_to_vectors(vsi);
14339
14340                 i40e_vsi_reset_stats(vsi);
14341                 break;
14342         default:
14343                 /* no netdev or rings for the other VSI types */
14344                 break;
14345         }
14346
14347         if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
14348             (vsi->type == I40E_VSI_VMDQ2)) {
14349                 ret = i40e_vsi_config_rss(vsi);
14350         }
14351         return vsi;
14352
14353 err_rings:
14354         i40e_vsi_free_q_vectors(vsi);
14355 err_msix:
14356         if (vsi->netdev_registered) {
14357                 vsi->netdev_registered = false;
14358                 unregister_netdev(vsi->netdev);
14359                 free_netdev(vsi->netdev);
14360                 vsi->netdev = NULL;
14361         }
14362 err_netdev:
14363         i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14364 err_vsi:
14365         i40e_vsi_clear(vsi);
14366 err_alloc:
14367         return NULL;
14368 }
14369
14370 /**
14371  * i40e_veb_get_bw_info - Query VEB BW information
14372  * @veb: the veb to query
14373  *
14374  * Query the Tx scheduler BW configuration data for given VEB
14375  **/
14376 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
14377 {
14378         struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
14379         struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
14380         struct i40e_pf *pf = veb->pf;
14381         struct i40e_hw *hw = &pf->hw;
14382         u32 tc_bw_max;
14383         int ret = 0;
14384         int i;
14385
14386         ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
14387                                                   &bw_data, NULL);
14388         if (ret) {
14389                 dev_info(&pf->pdev->dev,
14390                          "query veb bw config failed, err %s aq_err %s\n",
14391                          i40e_stat_str(&pf->hw, ret),
14392                          i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14393                 goto out;
14394         }
14395
14396         ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
14397                                                    &ets_data, NULL);
14398         if (ret) {
14399                 dev_info(&pf->pdev->dev,
14400                          "query veb bw ets config failed, err %s aq_err %s\n",
14401                          i40e_stat_str(&pf->hw, ret),
14402                          i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14403                 goto out;
14404         }
14405
14406         veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
14407         veb->bw_max_quanta = ets_data.tc_bw_max;
14408         veb->is_abs_credits = bw_data.absolute_credits_enable;
14409         veb->enabled_tc = ets_data.tc_valid_bits;
14410         tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
14411                     (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
14412         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
14413                 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
14414                 veb->bw_tc_limit_credits[i] =
14415                                         le16_to_cpu(bw_data.tc_bw_limits[i]);
14416                 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
14417         }
14418
14419 out:
14420         return ret;
14421 }
14422
14423 /**
14424  * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
14425  * @pf: board private structure
14426  *
14427  * On error: returns error code (negative)
14428  * On success: returns vsi index in PF (positive)
14429  **/
14430 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
14431 {
14432         int ret = -ENOENT;
14433         struct i40e_veb *veb;
14434         int i;
14435
14436         /* Need to protect the allocation of switch elements at the PF level */
14437         mutex_lock(&pf->switch_mutex);
14438
14439         /* VEB list may be fragmented if VEB creation/destruction has
14440          * been happening.  We can afford to do a quick scan to look
14441          * for any free slots in the list.
14442          *
14443          * find next empty veb slot, looping back around if necessary
14444          */
14445         i = 0;
14446         while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
14447                 i++;
14448         if (i >= I40E_MAX_VEB) {
14449                 ret = -ENOMEM;
14450                 goto err_alloc_veb;  /* out of VEB slots! */
14451         }
14452
14453         veb = kzalloc(sizeof(*veb), GFP_KERNEL);
14454         if (!veb) {
14455                 ret = -ENOMEM;
14456                 goto err_alloc_veb;
14457         }
14458         veb->pf = pf;
14459         veb->idx = i;
14460         veb->enabled_tc = 1;
14461
14462         pf->veb[i] = veb;
14463         ret = i;
14464 err_alloc_veb:
14465         mutex_unlock(&pf->switch_mutex);
14466         return ret;
14467 }
14468
14469 /**
14470  * i40e_switch_branch_release - Delete a branch of the switch tree
14471  * @branch: where to start deleting
14472  *
14473  * This uses recursion to find the tips of the branch to be
14474  * removed, deleting until we get back to and can delete this VEB.
14475  **/
14476 static void i40e_switch_branch_release(struct i40e_veb *branch)
14477 {
14478         struct i40e_pf *pf = branch->pf;
14479         u16 branch_seid = branch->seid;
14480         u16 veb_idx = branch->idx;
14481         int i;
14482
14483         /* release any VEBs on this VEB - RECURSION */
14484         for (i = 0; i < I40E_MAX_VEB; i++) {
14485                 if (!pf->veb[i])
14486                         continue;
14487                 if (pf->veb[i]->uplink_seid == branch->seid)
14488                         i40e_switch_branch_release(pf->veb[i]);
14489         }
14490
14491         /* Release the VSIs on this VEB, but not the owner VSI.
14492          *
14493          * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
14494          *       the VEB itself, so don't use (*branch) after this loop.
14495          */
14496         for (i = 0; i < pf->num_alloc_vsi; i++) {
14497                 if (!pf->vsi[i])
14498                         continue;
14499                 if (pf->vsi[i]->uplink_seid == branch_seid &&
14500                    (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14501                         i40e_vsi_release(pf->vsi[i]);
14502                 }
14503         }
14504
14505         /* There's one corner case where the VEB might not have been
14506          * removed, so double check it here and remove it if needed.
14507          * This case happens if the veb was created from the debugfs
14508          * commands and no VSIs were added to it.
14509          */
14510         if (pf->veb[veb_idx])
14511                 i40e_veb_release(pf->veb[veb_idx]);
14512 }
14513
14514 /**
14515  * i40e_veb_clear - remove veb struct
14516  * @veb: the veb to remove
14517  **/
14518 static void i40e_veb_clear(struct i40e_veb *veb)
14519 {
14520         if (!veb)
14521                 return;
14522
14523         if (veb->pf) {
14524                 struct i40e_pf *pf = veb->pf;
14525
14526                 mutex_lock(&pf->switch_mutex);
14527                 if (pf->veb[veb->idx] == veb)
14528                         pf->veb[veb->idx] = NULL;
14529                 mutex_unlock(&pf->switch_mutex);
14530         }
14531
14532         kfree(veb);
14533 }
14534
14535 /**
14536  * i40e_veb_release - Delete a VEB and free its resources
14537  * @veb: the VEB being removed
14538  **/
14539 void i40e_veb_release(struct i40e_veb *veb)
14540 {
14541         struct i40e_vsi *vsi = NULL;
14542         struct i40e_pf *pf;
14543         int i, n = 0;
14544
14545         pf = veb->pf;
14546
14547         /* find the remaining VSI and check for extras */
14548         for (i = 0; i < pf->num_alloc_vsi; i++) {
14549                 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
14550                         n++;
14551                         vsi = pf->vsi[i];
14552                 }
14553         }
14554         if (n != 1) {
14555                 dev_info(&pf->pdev->dev,
14556                          "can't remove VEB %d with %d VSIs left\n",
14557                          veb->seid, n);
14558                 return;
14559         }
14560
14561         /* move the remaining VSI to uplink veb */
14562         vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
14563         if (veb->uplink_seid) {
14564                 vsi->uplink_seid = veb->uplink_seid;
14565                 if (veb->uplink_seid == pf->mac_seid)
14566                         vsi->veb_idx = I40E_NO_VEB;
14567                 else
14568                         vsi->veb_idx = veb->veb_idx;
14569         } else {
14570                 /* floating VEB */
14571                 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
14572                 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
14573         }
14574
14575         i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14576         i40e_veb_clear(veb);
14577 }
14578
14579 /**
14580  * i40e_add_veb - create the VEB in the switch
14581  * @veb: the VEB to be instantiated
14582  * @vsi: the controlling VSI
14583  **/
14584 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
14585 {
14586         struct i40e_pf *pf = veb->pf;
14587         bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
14588         int ret;
14589
14590         ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
14591                               veb->enabled_tc, false,
14592                               &veb->seid, enable_stats, NULL);
14593
14594         /* get a VEB from the hardware */
14595         if (ret) {
14596                 dev_info(&pf->pdev->dev,
14597                          "couldn't add VEB, err %s aq_err %s\n",
14598                          i40e_stat_str(&pf->hw, ret),
14599                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14600                 return -EPERM;
14601         }
14602
14603         /* get statistics counter */
14604         ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
14605                                          &veb->stats_idx, NULL, NULL, NULL);
14606         if (ret) {
14607                 dev_info(&pf->pdev->dev,
14608                          "couldn't get VEB statistics idx, err %s aq_err %s\n",
14609                          i40e_stat_str(&pf->hw, ret),
14610                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14611                 return -EPERM;
14612         }
14613         ret = i40e_veb_get_bw_info(veb);
14614         if (ret) {
14615                 dev_info(&pf->pdev->dev,
14616                          "couldn't get VEB bw info, err %s aq_err %s\n",
14617                          i40e_stat_str(&pf->hw, ret),
14618                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14619                 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14620                 return -ENOENT;
14621         }
14622
14623         vsi->uplink_seid = veb->seid;
14624         vsi->veb_idx = veb->idx;
14625         vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14626
14627         return 0;
14628 }
14629
14630 /**
14631  * i40e_veb_setup - Set up a VEB
14632  * @pf: board private structure
14633  * @flags: VEB setup flags
14634  * @uplink_seid: the switch element to link to
14635  * @vsi_seid: the initial VSI seid
14636  * @enabled_tc: Enabled TC bit-map
14637  *
14638  * This allocates the sw VEB structure and links it into the switch
14639  * It is possible and legal for this to be a duplicate of an already
14640  * existing VEB.  It is also possible for both uplink and vsi seids
14641  * to be zero, in order to create a floating VEB.
14642  *
14643  * Returns pointer to the successfully allocated VEB sw struct on
14644  * success, otherwise returns NULL on failure.
14645  **/
14646 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
14647                                 u16 uplink_seid, u16 vsi_seid,
14648                                 u8 enabled_tc)
14649 {
14650         struct i40e_veb *veb, *uplink_veb = NULL;
14651         int vsi_idx, veb_idx;
14652         int ret;
14653
14654         /* if one seid is 0, the other must be 0 to create a floating relay */
14655         if ((uplink_seid == 0 || vsi_seid == 0) &&
14656             (uplink_seid + vsi_seid != 0)) {
14657                 dev_info(&pf->pdev->dev,
14658                          "one, not both seid's are 0: uplink=%d vsi=%d\n",
14659                          uplink_seid, vsi_seid);
14660                 return NULL;
14661         }
14662
14663         /* make sure there is such a vsi and uplink */
14664         for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
14665                 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
14666                         break;
14667         if (vsi_idx == pf->num_alloc_vsi && vsi_seid != 0) {
14668                 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
14669                          vsi_seid);
14670                 return NULL;
14671         }
14672
14673         if (uplink_seid && uplink_seid != pf->mac_seid) {
14674                 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
14675                         if (pf->veb[veb_idx] &&
14676                             pf->veb[veb_idx]->seid == uplink_seid) {
14677                                 uplink_veb = pf->veb[veb_idx];
14678                                 break;
14679                         }
14680                 }
14681                 if (!uplink_veb) {
14682                         dev_info(&pf->pdev->dev,
14683                                  "uplink seid %d not found\n", uplink_seid);
14684                         return NULL;
14685                 }
14686         }
14687
14688         /* get veb sw struct */
14689         veb_idx = i40e_veb_mem_alloc(pf);
14690         if (veb_idx < 0)
14691                 goto err_alloc;
14692         veb = pf->veb[veb_idx];
14693         veb->flags = flags;
14694         veb->uplink_seid = uplink_seid;
14695         veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
14696         veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
14697
14698         /* create the VEB in the switch */
14699         ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
14700         if (ret)
14701                 goto err_veb;
14702         if (vsi_idx == pf->lan_vsi)
14703                 pf->lan_veb = veb->idx;
14704
14705         return veb;
14706
14707 err_veb:
14708         i40e_veb_clear(veb);
14709 err_alloc:
14710         return NULL;
14711 }
14712
14713 /**
14714  * i40e_setup_pf_switch_element - set PF vars based on switch type
14715  * @pf: board private structure
14716  * @ele: element we are building info from
14717  * @num_reported: total number of elements
14718  * @printconfig: should we print the contents
14719  *
14720  * helper function to assist in extracting a few useful SEID values.
14721  **/
14722 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
14723                                 struct i40e_aqc_switch_config_element_resp *ele,
14724                                 u16 num_reported, bool printconfig)
14725 {
14726         u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
14727         u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
14728         u8 element_type = ele->element_type;
14729         u16 seid = le16_to_cpu(ele->seid);
14730
14731         if (printconfig)
14732                 dev_info(&pf->pdev->dev,
14733                          "type=%d seid=%d uplink=%d downlink=%d\n",
14734                          element_type, seid, uplink_seid, downlink_seid);
14735
14736         switch (element_type) {
14737         case I40E_SWITCH_ELEMENT_TYPE_MAC:
14738                 pf->mac_seid = seid;
14739                 break;
14740         case I40E_SWITCH_ELEMENT_TYPE_VEB:
14741                 /* Main VEB? */
14742                 if (uplink_seid != pf->mac_seid)
14743                         break;
14744                 if (pf->lan_veb >= I40E_MAX_VEB) {
14745                         int v;
14746
14747                         /* find existing or else empty VEB */
14748                         for (v = 0; v < I40E_MAX_VEB; v++) {
14749                                 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
14750                                         pf->lan_veb = v;
14751                                         break;
14752                                 }
14753                         }
14754                         if (pf->lan_veb >= I40E_MAX_VEB) {
14755                                 v = i40e_veb_mem_alloc(pf);
14756                                 if (v < 0)
14757                                         break;
14758                                 pf->lan_veb = v;
14759                         }
14760                 }
14761                 if (pf->lan_veb >= I40E_MAX_VEB)
14762                         break;
14763
14764                 pf->veb[pf->lan_veb]->seid = seid;
14765                 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
14766                 pf->veb[pf->lan_veb]->pf = pf;
14767                 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
14768                 break;
14769         case I40E_SWITCH_ELEMENT_TYPE_VSI:
14770                 if (num_reported != 1)
14771                         break;
14772                 /* This is immediately after a reset so we can assume this is
14773                  * the PF's VSI
14774                  */
14775                 pf->mac_seid = uplink_seid;
14776                 pf->pf_seid = downlink_seid;
14777                 pf->main_vsi_seid = seid;
14778                 if (printconfig)
14779                         dev_info(&pf->pdev->dev,
14780                                  "pf_seid=%d main_vsi_seid=%d\n",
14781                                  pf->pf_seid, pf->main_vsi_seid);
14782                 break;
14783         case I40E_SWITCH_ELEMENT_TYPE_PF:
14784         case I40E_SWITCH_ELEMENT_TYPE_VF:
14785         case I40E_SWITCH_ELEMENT_TYPE_EMP:
14786         case I40E_SWITCH_ELEMENT_TYPE_BMC:
14787         case I40E_SWITCH_ELEMENT_TYPE_PE:
14788         case I40E_SWITCH_ELEMENT_TYPE_PA:
14789                 /* ignore these for now */
14790                 break;
14791         default:
14792                 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
14793                          element_type, seid);
14794                 break;
14795         }
14796 }
14797
14798 /**
14799  * i40e_fetch_switch_configuration - Get switch config from firmware
14800  * @pf: board private structure
14801  * @printconfig: should we print the contents
14802  *
14803  * Get the current switch configuration from the device and
14804  * extract a few useful SEID values.
14805  **/
14806 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
14807 {
14808         struct i40e_aqc_get_switch_config_resp *sw_config;
14809         u16 next_seid = 0;
14810         int ret = 0;
14811         u8 *aq_buf;
14812         int i;
14813
14814         aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
14815         if (!aq_buf)
14816                 return -ENOMEM;
14817
14818         sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
14819         do {
14820                 u16 num_reported, num_total;
14821
14822                 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
14823                                                 I40E_AQ_LARGE_BUF,
14824                                                 &next_seid, NULL);
14825                 if (ret) {
14826                         dev_info(&pf->pdev->dev,
14827                                  "get switch config failed err %s aq_err %s\n",
14828                                  i40e_stat_str(&pf->hw, ret),
14829                                  i40e_aq_str(&pf->hw,
14830                                              pf->hw.aq.asq_last_status));
14831                         kfree(aq_buf);
14832                         return -ENOENT;
14833                 }
14834
14835                 num_reported = le16_to_cpu(sw_config->header.num_reported);
14836                 num_total = le16_to_cpu(sw_config->header.num_total);
14837
14838                 if (printconfig)
14839                         dev_info(&pf->pdev->dev,
14840                                  "header: %d reported %d total\n",
14841                                  num_reported, num_total);
14842
14843                 for (i = 0; i < num_reported; i++) {
14844                         struct i40e_aqc_switch_config_element_resp *ele =
14845                                 &sw_config->element[i];
14846
14847                         i40e_setup_pf_switch_element(pf, ele, num_reported,
14848                                                      printconfig);
14849                 }
14850         } while (next_seid != 0);
14851
14852         kfree(aq_buf);
14853         return ret;
14854 }
14855
14856 /**
14857  * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
14858  * @pf: board private structure
14859  * @reinit: if the Main VSI needs to re-initialized.
14860  * @lock_acquired: indicates whether or not the lock has been acquired
14861  *
14862  * Returns 0 on success, negative value on failure
14863  **/
14864 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired)
14865 {
14866         u16 flags = 0;
14867         int ret;
14868
14869         /* find out what's out there already */
14870         ret = i40e_fetch_switch_configuration(pf, false);
14871         if (ret) {
14872                 dev_info(&pf->pdev->dev,
14873                          "couldn't fetch switch config, err %s aq_err %s\n",
14874                          i40e_stat_str(&pf->hw, ret),
14875                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14876                 return ret;
14877         }
14878         i40e_pf_reset_stats(pf);
14879
14880         /* set the switch config bit for the whole device to
14881          * support limited promisc or true promisc
14882          * when user requests promisc. The default is limited
14883          * promisc.
14884         */
14885
14886         if ((pf->hw.pf_id == 0) &&
14887             !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
14888                 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14889                 pf->last_sw_conf_flags = flags;
14890         }
14891
14892         if (pf->hw.pf_id == 0) {
14893                 u16 valid_flags;
14894
14895                 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14896                 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
14897                                                 NULL);
14898                 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
14899                         dev_info(&pf->pdev->dev,
14900                                  "couldn't set switch config bits, err %s aq_err %s\n",
14901                                  i40e_stat_str(&pf->hw, ret),
14902                                  i40e_aq_str(&pf->hw,
14903                                              pf->hw.aq.asq_last_status));
14904                         /* not a fatal problem, just keep going */
14905                 }
14906                 pf->last_sw_conf_valid_flags = valid_flags;
14907         }
14908
14909         /* first time setup */
14910         if (pf->lan_vsi == I40E_NO_VSI || reinit) {
14911                 struct i40e_vsi *vsi = NULL;
14912                 u16 uplink_seid;
14913
14914                 /* Set up the PF VSI associated with the PF's main VSI
14915                  * that is already in the HW switch
14916                  */
14917                 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
14918                         uplink_seid = pf->veb[pf->lan_veb]->seid;
14919                 else
14920                         uplink_seid = pf->mac_seid;
14921                 if (pf->lan_vsi == I40E_NO_VSI)
14922                         vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
14923                 else if (reinit)
14924                         vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
14925                 if (!vsi) {
14926                         dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
14927                         i40e_cloud_filter_exit(pf);
14928                         i40e_fdir_teardown(pf);
14929                         return -EAGAIN;
14930                 }
14931         } else {
14932                 /* force a reset of TC and queue layout configurations */
14933                 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14934
14935                 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14936                 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14937                 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14938         }
14939         i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
14940
14941         i40e_fdir_sb_setup(pf);
14942
14943         /* Setup static PF queue filter control settings */
14944         ret = i40e_setup_pf_filter_control(pf);
14945         if (ret) {
14946                 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
14947                          ret);
14948                 /* Failure here should not stop continuing other steps */
14949         }
14950
14951         /* enable RSS in the HW, even for only one queue, as the stack can use
14952          * the hash
14953          */
14954         if ((pf->flags & I40E_FLAG_RSS_ENABLED))
14955                 i40e_pf_config_rss(pf);
14956
14957         /* fill in link information and enable LSE reporting */
14958         i40e_link_event(pf);
14959
14960         /* Initialize user-specific link properties */
14961         pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
14962                                   I40E_AQ_AN_COMPLETED) ? true : false);
14963
14964         i40e_ptp_init(pf);
14965
14966         if (!lock_acquired)
14967                 rtnl_lock();
14968
14969         /* repopulate tunnel port filters */
14970         udp_tunnel_nic_reset_ntf(pf->vsi[pf->lan_vsi]->netdev);
14971
14972         if (!lock_acquired)
14973                 rtnl_unlock();
14974
14975         return ret;
14976 }
14977
14978 /**
14979  * i40e_determine_queue_usage - Work out queue distribution
14980  * @pf: board private structure
14981  **/
14982 static void i40e_determine_queue_usage(struct i40e_pf *pf)
14983 {
14984         int queues_left;
14985         int q_max;
14986
14987         pf->num_lan_qps = 0;
14988
14989         /* Find the max queues to be put into basic use.  We'll always be
14990          * using TC0, whether or not DCB is running, and TC0 will get the
14991          * big RSS set.
14992          */
14993         queues_left = pf->hw.func_caps.num_tx_qp;
14994
14995         if ((queues_left == 1) ||
14996             !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
14997                 /* one qp for PF, no queues for anything else */
14998                 queues_left = 0;
14999                 pf->alloc_rss_size = pf->num_lan_qps = 1;
15000
15001                 /* make sure all the fancies are disabled */
15002                 pf->flags &= ~(I40E_FLAG_RSS_ENABLED    |
15003                                I40E_FLAG_IWARP_ENABLED  |
15004                                I40E_FLAG_FD_SB_ENABLED  |
15005                                I40E_FLAG_FD_ATR_ENABLED |
15006                                I40E_FLAG_DCB_CAPABLE    |
15007                                I40E_FLAG_DCB_ENABLED    |
15008                                I40E_FLAG_SRIOV_ENABLED  |
15009                                I40E_FLAG_VMDQ_ENABLED);
15010                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15011         } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
15012                                   I40E_FLAG_FD_SB_ENABLED |
15013                                   I40E_FLAG_FD_ATR_ENABLED |
15014                                   I40E_FLAG_DCB_CAPABLE))) {
15015                 /* one qp for PF */
15016                 pf->alloc_rss_size = pf->num_lan_qps = 1;
15017                 queues_left -= pf->num_lan_qps;
15018
15019                 pf->flags &= ~(I40E_FLAG_RSS_ENABLED    |
15020                                I40E_FLAG_IWARP_ENABLED  |
15021                                I40E_FLAG_FD_SB_ENABLED  |
15022                                I40E_FLAG_FD_ATR_ENABLED |
15023                                I40E_FLAG_DCB_ENABLED    |
15024                                I40E_FLAG_VMDQ_ENABLED);
15025                 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15026         } else {
15027                 /* Not enough queues for all TCs */
15028                 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
15029                     (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
15030                         pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
15031                                         I40E_FLAG_DCB_ENABLED);
15032                         dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
15033                 }
15034
15035                 /* limit lan qps to the smaller of qps, cpus or msix */
15036                 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
15037                 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
15038                 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
15039                 pf->num_lan_qps = q_max;
15040
15041                 queues_left -= pf->num_lan_qps;
15042         }
15043
15044         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
15045                 if (queues_left > 1) {
15046                         queues_left -= 1; /* save 1 queue for FD */
15047                 } else {
15048                         pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
15049                         pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15050                         dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
15051                 }
15052         }
15053
15054         if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15055             pf->num_vf_qps && pf->num_req_vfs && queues_left) {
15056                 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
15057                                         (queues_left / pf->num_vf_qps));
15058                 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
15059         }
15060
15061         if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
15062             pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
15063                 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
15064                                           (queues_left / pf->num_vmdq_qps));
15065                 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
15066         }
15067
15068         pf->queues_left = queues_left;
15069         dev_dbg(&pf->pdev->dev,
15070                 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
15071                 pf->hw.func_caps.num_tx_qp,
15072                 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
15073                 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
15074                 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
15075                 queues_left);
15076 }
15077
15078 /**
15079  * i40e_setup_pf_filter_control - Setup PF static filter control
15080  * @pf: PF to be setup
15081  *
15082  * i40e_setup_pf_filter_control sets up a PF's initial filter control
15083  * settings. If PE/FCoE are enabled then it will also set the per PF
15084  * based filter sizes required for them. It also enables Flow director,
15085  * ethertype and macvlan type filter settings for the pf.
15086  *
15087  * Returns 0 on success, negative on failure
15088  **/
15089 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
15090 {
15091         struct i40e_filter_control_settings *settings = &pf->filter_settings;
15092
15093         settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
15094
15095         /* Flow Director is enabled */
15096         if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
15097                 settings->enable_fdir = true;
15098
15099         /* Ethtype and MACVLAN filters enabled for PF */
15100         settings->enable_ethtype = true;
15101         settings->enable_macvlan = true;
15102
15103         if (i40e_set_filter_control(&pf->hw, settings))
15104                 return -ENOENT;
15105
15106         return 0;
15107 }
15108
15109 #define INFO_STRING_LEN 255
15110 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
15111 static void i40e_print_features(struct i40e_pf *pf)
15112 {
15113         struct i40e_hw *hw = &pf->hw;
15114         char *buf;
15115         int i;
15116
15117         buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
15118         if (!buf)
15119                 return;
15120
15121         i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
15122 #ifdef CONFIG_PCI_IOV
15123         i += scnprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
15124 #endif
15125         i += scnprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
15126                       pf->hw.func_caps.num_vsis,
15127                       pf->vsi[pf->lan_vsi]->num_queue_pairs);
15128         if (pf->flags & I40E_FLAG_RSS_ENABLED)
15129                 i += scnprintf(&buf[i], REMAIN(i), " RSS");
15130         if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
15131                 i += scnprintf(&buf[i], REMAIN(i), " FD_ATR");
15132         if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
15133                 i += scnprintf(&buf[i], REMAIN(i), " FD_SB");
15134                 i += scnprintf(&buf[i], REMAIN(i), " NTUPLE");
15135         }
15136         if (pf->flags & I40E_FLAG_DCB_CAPABLE)
15137                 i += scnprintf(&buf[i], REMAIN(i), " DCB");
15138         i += scnprintf(&buf[i], REMAIN(i), " VxLAN");
15139         i += scnprintf(&buf[i], REMAIN(i), " Geneve");
15140         if (pf->flags & I40E_FLAG_PTP)
15141                 i += scnprintf(&buf[i], REMAIN(i), " PTP");
15142         if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
15143                 i += scnprintf(&buf[i], REMAIN(i), " VEB");
15144         else
15145                 i += scnprintf(&buf[i], REMAIN(i), " VEPA");
15146
15147         dev_info(&pf->pdev->dev, "%s\n", buf);
15148         kfree(buf);
15149         WARN_ON(i > INFO_STRING_LEN);
15150 }
15151
15152 /**
15153  * i40e_get_platform_mac_addr - get platform-specific MAC address
15154  * @pdev: PCI device information struct
15155  * @pf: board private structure
15156  *
15157  * Look up the MAC address for the device. First we'll try
15158  * eth_platform_get_mac_address, which will check Open Firmware, or arch
15159  * specific fallback. Otherwise, we'll default to the stored value in
15160  * firmware.
15161  **/
15162 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
15163 {
15164         if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
15165                 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
15166 }
15167
15168 /**
15169  * i40e_set_fec_in_flags - helper function for setting FEC options in flags
15170  * @fec_cfg: FEC option to set in flags
15171  * @flags: ptr to flags in which we set FEC option
15172  **/
15173 void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags)
15174 {
15175         if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
15176                 *flags |= I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC;
15177         if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_RS) ||
15178             (fec_cfg & I40E_AQ_SET_FEC_ABILITY_RS)) {
15179                 *flags |= I40E_FLAG_RS_FEC;
15180                 *flags &= ~I40E_FLAG_BASE_R_FEC;
15181         }
15182         if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_KR) ||
15183             (fec_cfg & I40E_AQ_SET_FEC_ABILITY_KR)) {
15184                 *flags |= I40E_FLAG_BASE_R_FEC;
15185                 *flags &= ~I40E_FLAG_RS_FEC;
15186         }
15187         if (fec_cfg == 0)
15188                 *flags &= ~(I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC);
15189 }
15190
15191 /**
15192  * i40e_check_recovery_mode - check if we are running transition firmware
15193  * @pf: board private structure
15194  *
15195  * Check registers indicating the firmware runs in recovery mode. Sets the
15196  * appropriate driver state.
15197  *
15198  * Returns true if the recovery mode was detected, false otherwise
15199  **/
15200 static bool i40e_check_recovery_mode(struct i40e_pf *pf)
15201 {
15202         u32 val = rd32(&pf->hw, I40E_GL_FWSTS);
15203
15204         if (val & I40E_GL_FWSTS_FWS1B_MASK) {
15205                 dev_crit(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n");
15206                 dev_crit(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
15207                 set_bit(__I40E_RECOVERY_MODE, pf->state);
15208
15209                 return true;
15210         }
15211         if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15212                 dev_info(&pf->pdev->dev, "Please do Power-On Reset to initialize adapter in normal mode with full functionality.\n");
15213
15214         return false;
15215 }
15216
15217 /**
15218  * i40e_pf_loop_reset - perform reset in a loop.
15219  * @pf: board private structure
15220  *
15221  * This function is useful when a NIC is about to enter recovery mode.
15222  * When a NIC's internal data structures are corrupted the NIC's
15223  * firmware is going to enter recovery mode.
15224  * Right after a POR it takes about 7 minutes for firmware to enter
15225  * recovery mode. Until that time a NIC is in some kind of intermediate
15226  * state. After that time period the NIC almost surely enters
15227  * recovery mode. The only way for a driver to detect intermediate
15228  * state is to issue a series of pf-resets and check a return value.
15229  * If a PF reset returns success then the firmware could be in recovery
15230  * mode so the caller of this code needs to check for recovery mode
15231  * if this function returns success. There is a little chance that
15232  * firmware will hang in intermediate state forever.
15233  * Since waiting 7 minutes is quite a lot of time this function waits
15234  * 10 seconds and then gives up by returning an error.
15235  *
15236  * Return 0 on success, negative on failure.
15237  **/
15238 static i40e_status i40e_pf_loop_reset(struct i40e_pf *pf)
15239 {
15240         /* wait max 10 seconds for PF reset to succeed */
15241         const unsigned long time_end = jiffies + 10 * HZ;
15242
15243         struct i40e_hw *hw = &pf->hw;
15244         i40e_status ret;
15245
15246         ret = i40e_pf_reset(hw);
15247         while (ret != I40E_SUCCESS && time_before(jiffies, time_end)) {
15248                 usleep_range(10000, 20000);
15249                 ret = i40e_pf_reset(hw);
15250         }
15251
15252         if (ret == I40E_SUCCESS)
15253                 pf->pfr_count++;
15254         else
15255                 dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret);
15256
15257         return ret;
15258 }
15259
15260 /**
15261  * i40e_check_fw_empr - check if FW issued unexpected EMP Reset
15262  * @pf: board private structure
15263  *
15264  * Check FW registers to determine if FW issued unexpected EMP Reset.
15265  * Every time when unexpected EMP Reset occurs the FW increments
15266  * a counter of unexpected EMP Resets. When the counter reaches 10
15267  * the FW should enter the Recovery mode
15268  *
15269  * Returns true if FW issued unexpected EMP Reset
15270  **/
15271 static bool i40e_check_fw_empr(struct i40e_pf *pf)
15272 {
15273         const u32 fw_sts = rd32(&pf->hw, I40E_GL_FWSTS) &
15274                            I40E_GL_FWSTS_FWS1B_MASK;
15275         return (fw_sts > I40E_GL_FWSTS_FWS1B_EMPR_0) &&
15276                (fw_sts <= I40E_GL_FWSTS_FWS1B_EMPR_10);
15277 }
15278
15279 /**
15280  * i40e_handle_resets - handle EMP resets and PF resets
15281  * @pf: board private structure
15282  *
15283  * Handle both EMP resets and PF resets and conclude whether there are
15284  * any issues regarding these resets. If there are any issues then
15285  * generate log entry.
15286  *
15287  * Return 0 if NIC is healthy or negative value when there are issues
15288  * with resets
15289  **/
15290 static i40e_status i40e_handle_resets(struct i40e_pf *pf)
15291 {
15292         const i40e_status pfr = i40e_pf_loop_reset(pf);
15293         const bool is_empr = i40e_check_fw_empr(pf);
15294
15295         if (is_empr || pfr != I40E_SUCCESS)
15296                 dev_crit(&pf->pdev->dev, "Entering recovery mode due to repeated FW resets. This may take several minutes. Refer to the Intel(R) Ethernet Adapters and Devices User Guide.\n");
15297
15298         return is_empr ? I40E_ERR_RESET_FAILED : pfr;
15299 }
15300
15301 /**
15302  * i40e_init_recovery_mode - initialize subsystems needed in recovery mode
15303  * @pf: board private structure
15304  * @hw: ptr to the hardware info
15305  *
15306  * This function does a minimal setup of all subsystems needed for running
15307  * recovery mode.
15308  *
15309  * Returns 0 on success, negative on failure
15310  **/
15311 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
15312 {
15313         struct i40e_vsi *vsi;
15314         int err;
15315         int v_idx;
15316
15317         pci_save_state(pf->pdev);
15318
15319         /* set up periodic task facility */
15320         timer_setup(&pf->service_timer, i40e_service_timer, 0);
15321         pf->service_timer_period = HZ;
15322
15323         INIT_WORK(&pf->service_task, i40e_service_task);
15324         clear_bit(__I40E_SERVICE_SCHED, pf->state);
15325
15326         err = i40e_init_interrupt_scheme(pf);
15327         if (err)
15328                 goto err_switch_setup;
15329
15330         /* The number of VSIs reported by the FW is the minimum guaranteed
15331          * to us; HW supports far more and we share the remaining pool with
15332          * the other PFs. We allocate space for more than the guarantee with
15333          * the understanding that we might not get them all later.
15334          */
15335         if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15336                 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15337         else
15338                 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15339
15340         /* Set up the vsi struct and our local tracking of the MAIN PF vsi. */
15341         pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15342                           GFP_KERNEL);
15343         if (!pf->vsi) {
15344                 err = -ENOMEM;
15345                 goto err_switch_setup;
15346         }
15347
15348         /* We allocate one VSI which is needed as absolute minimum
15349          * in order to register the netdev
15350          */
15351         v_idx = i40e_vsi_mem_alloc(pf, I40E_VSI_MAIN);
15352         if (v_idx < 0) {
15353                 err = v_idx;
15354                 goto err_switch_setup;
15355         }
15356         pf->lan_vsi = v_idx;
15357         vsi = pf->vsi[v_idx];
15358         if (!vsi) {
15359                 err = -EFAULT;
15360                 goto err_switch_setup;
15361         }
15362         vsi->alloc_queue_pairs = 1;
15363         err = i40e_config_netdev(vsi);
15364         if (err)
15365                 goto err_switch_setup;
15366         err = register_netdev(vsi->netdev);
15367         if (err)
15368                 goto err_switch_setup;
15369         vsi->netdev_registered = true;
15370         i40e_dbg_pf_init(pf);
15371
15372         err = i40e_setup_misc_vector_for_recovery_mode(pf);
15373         if (err)
15374                 goto err_switch_setup;
15375
15376         /* tell the firmware that we're starting */
15377         i40e_send_version(pf);
15378
15379         /* since everything's happy, start the service_task timer */
15380         mod_timer(&pf->service_timer,
15381                   round_jiffies(jiffies + pf->service_timer_period));
15382
15383         return 0;
15384
15385 err_switch_setup:
15386         i40e_reset_interrupt_capability(pf);
15387         del_timer_sync(&pf->service_timer);
15388         i40e_shutdown_adminq(hw);
15389         iounmap(hw->hw_addr);
15390         pci_disable_pcie_error_reporting(pf->pdev);
15391         pci_release_mem_regions(pf->pdev);
15392         pci_disable_device(pf->pdev);
15393         kfree(pf);
15394
15395         return err;
15396 }
15397
15398 /**
15399  * i40e_set_subsystem_device_id - set subsystem device id
15400  * @hw: pointer to the hardware info
15401  *
15402  * Set PCI subsystem device id either from a pci_dev structure or
15403  * a specific FW register.
15404  **/
15405 static inline void i40e_set_subsystem_device_id(struct i40e_hw *hw)
15406 {
15407         struct pci_dev *pdev = ((struct i40e_pf *)hw->back)->pdev;
15408
15409         hw->subsystem_device_id = pdev->subsystem_device ?
15410                 pdev->subsystem_device :
15411                 (ushort)(rd32(hw, I40E_PFPCI_SUBSYSID) & USHRT_MAX);
15412 }
15413
15414 /**
15415  * i40e_probe - Device initialization routine
15416  * @pdev: PCI device information struct
15417  * @ent: entry in i40e_pci_tbl
15418  *
15419  * i40e_probe initializes a PF identified by a pci_dev structure.
15420  * The OS initialization, configuring of the PF private structure,
15421  * and a hardware reset occur.
15422  *
15423  * Returns 0 on success, negative on failure
15424  **/
15425 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
15426 {
15427         struct i40e_aq_get_phy_abilities_resp abilities;
15428 #ifdef CONFIG_I40E_DCB
15429         enum i40e_get_fw_lldp_status_resp lldp_status;
15430         i40e_status status;
15431 #endif /* CONFIG_I40E_DCB */
15432         struct i40e_pf *pf;
15433         struct i40e_hw *hw;
15434         static u16 pfs_found;
15435         u16 wol_nvm_bits;
15436         u16 link_status;
15437         int err;
15438         u32 val;
15439         u32 i;
15440
15441         err = pci_enable_device_mem(pdev);
15442         if (err)
15443                 return err;
15444
15445         /* set up for high or low dma */
15446         err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
15447         if (err) {
15448                 dev_err(&pdev->dev,
15449                         "DMA configuration failed: 0x%x\n", err);
15450                 goto err_dma;
15451         }
15452
15453         /* set up pci connections */
15454         err = pci_request_mem_regions(pdev, i40e_driver_name);
15455         if (err) {
15456                 dev_info(&pdev->dev,
15457                          "pci_request_selected_regions failed %d\n", err);
15458                 goto err_pci_reg;
15459         }
15460
15461         pci_enable_pcie_error_reporting(pdev);
15462         pci_set_master(pdev);
15463
15464         /* Now that we have a PCI connection, we need to do the
15465          * low level device setup.  This is primarily setting up
15466          * the Admin Queue structures and then querying for the
15467          * device's current profile information.
15468          */
15469         pf = kzalloc(sizeof(*pf), GFP_KERNEL);
15470         if (!pf) {
15471                 err = -ENOMEM;
15472                 goto err_pf_alloc;
15473         }
15474         pf->next_vsi = 0;
15475         pf->pdev = pdev;
15476         set_bit(__I40E_DOWN, pf->state);
15477
15478         hw = &pf->hw;
15479         hw->back = pf;
15480
15481         pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
15482                                 I40E_MAX_CSR_SPACE);
15483         /* We believe that the highest register to read is
15484          * I40E_GLGEN_STAT_CLEAR, so we check if the BAR size
15485          * is not less than that before mapping to prevent a
15486          * kernel panic.
15487          */
15488         if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) {
15489                 dev_err(&pdev->dev, "Cannot map registers, bar size 0x%X too small, aborting\n",
15490                         pf->ioremap_len);
15491                 err = -ENOMEM;
15492                 goto err_ioremap;
15493         }
15494         hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
15495         if (!hw->hw_addr) {
15496                 err = -EIO;
15497                 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
15498                          (unsigned int)pci_resource_start(pdev, 0),
15499                          pf->ioremap_len, err);
15500                 goto err_ioremap;
15501         }
15502         hw->vendor_id = pdev->vendor;
15503         hw->device_id = pdev->device;
15504         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
15505         hw->subsystem_vendor_id = pdev->subsystem_vendor;
15506         i40e_set_subsystem_device_id(hw);
15507         hw->bus.device = PCI_SLOT(pdev->devfn);
15508         hw->bus.func = PCI_FUNC(pdev->devfn);
15509         hw->bus.bus_id = pdev->bus->number;
15510         pf->instance = pfs_found;
15511
15512         /* Select something other than the 802.1ad ethertype for the
15513          * switch to use internally and drop on ingress.
15514          */
15515         hw->switch_tag = 0xffff;
15516         hw->first_tag = ETH_P_8021AD;
15517         hw->second_tag = ETH_P_8021Q;
15518
15519         INIT_LIST_HEAD(&pf->l3_flex_pit_list);
15520         INIT_LIST_HEAD(&pf->l4_flex_pit_list);
15521         INIT_LIST_HEAD(&pf->ddp_old_prof);
15522
15523         /* set up the locks for the AQ, do this only once in probe
15524          * and destroy them only once in remove
15525          */
15526         mutex_init(&hw->aq.asq_mutex);
15527         mutex_init(&hw->aq.arq_mutex);
15528
15529         pf->msg_enable = netif_msg_init(debug,
15530                                         NETIF_MSG_DRV |
15531                                         NETIF_MSG_PROBE |
15532                                         NETIF_MSG_LINK);
15533         if (debug < -1)
15534                 pf->hw.debug_mask = debug;
15535
15536         /* do a special CORER for clearing PXE mode once at init */
15537         if (hw->revision_id == 0 &&
15538             (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
15539                 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
15540                 i40e_flush(hw);
15541                 msleep(200);
15542                 pf->corer_count++;
15543
15544                 i40e_clear_pxe_mode(hw);
15545         }
15546
15547         /* Reset here to make sure all is clean and to define PF 'n' */
15548         i40e_clear_hw(hw);
15549
15550         err = i40e_set_mac_type(hw);
15551         if (err) {
15552                 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15553                          err);
15554                 goto err_pf_reset;
15555         }
15556
15557         err = i40e_handle_resets(pf);
15558         if (err)
15559                 goto err_pf_reset;
15560
15561         i40e_check_recovery_mode(pf);
15562
15563         if (is_kdump_kernel()) {
15564                 hw->aq.num_arq_entries = I40E_MIN_ARQ_LEN;
15565                 hw->aq.num_asq_entries = I40E_MIN_ASQ_LEN;
15566         } else {
15567                 hw->aq.num_arq_entries = I40E_AQ_LEN;
15568                 hw->aq.num_asq_entries = I40E_AQ_LEN;
15569         }
15570         hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15571         hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15572         pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
15573
15574         snprintf(pf->int_name, sizeof(pf->int_name) - 1,
15575                  "%s-%s:misc",
15576                  dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
15577
15578         err = i40e_init_shared_code(hw);
15579         if (err) {
15580                 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15581                          err);
15582                 goto err_pf_reset;
15583         }
15584
15585         /* set up a default setting for link flow control */
15586         pf->hw.fc.requested_mode = I40E_FC_NONE;
15587
15588         err = i40e_init_adminq(hw);
15589         if (err) {
15590                 if (err == I40E_ERR_FIRMWARE_API_VERSION)
15591                         dev_info(&pdev->dev,
15592                                  "The driver for the device stopped because the NVM image v%u.%u is newer than expected v%u.%u. You must install the most recent version of the network driver.\n",
15593                                  hw->aq.api_maj_ver,
15594                                  hw->aq.api_min_ver,
15595                                  I40E_FW_API_VERSION_MAJOR,
15596                                  I40E_FW_MINOR_VERSION(hw));
15597                 else
15598                         dev_info(&pdev->dev,
15599                                  "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
15600
15601                 goto err_pf_reset;
15602         }
15603         i40e_get_oem_version(hw);
15604
15605         /* provide nvm, fw, api versions, vendor:device id, subsys vendor:device id */
15606         dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s [%04x:%04x] [%04x:%04x]\n",
15607                  hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
15608                  hw->aq.api_maj_ver, hw->aq.api_min_ver,
15609                  i40e_nvm_version_str(hw), hw->vendor_id, hw->device_id,
15610                  hw->subsystem_vendor_id, hw->subsystem_device_id);
15611
15612         if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
15613             hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw))
15614                 dev_dbg(&pdev->dev,
15615                         "The driver for the device detected a newer version of the NVM image v%u.%u than v%u.%u.\n",
15616                          hw->aq.api_maj_ver,
15617                          hw->aq.api_min_ver,
15618                          I40E_FW_API_VERSION_MAJOR,
15619                          I40E_FW_MINOR_VERSION(hw));
15620         else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4)
15621                 dev_info(&pdev->dev,
15622                          "The driver for the device detected an older version of the NVM image v%u.%u than expected v%u.%u. Please update the NVM image.\n",
15623                          hw->aq.api_maj_ver,
15624                          hw->aq.api_min_ver,
15625                          I40E_FW_API_VERSION_MAJOR,
15626                          I40E_FW_MINOR_VERSION(hw));
15627
15628         i40e_verify_eeprom(pf);
15629
15630         /* Rev 0 hardware was never productized */
15631         if (hw->revision_id < 1)
15632                 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
15633
15634         i40e_clear_pxe_mode(hw);
15635
15636         err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
15637         if (err)
15638                 goto err_adminq_setup;
15639
15640         err = i40e_sw_init(pf);
15641         if (err) {
15642                 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
15643                 goto err_sw_init;
15644         }
15645
15646         if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15647                 return i40e_init_recovery_mode(pf, hw);
15648
15649         err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
15650                                 hw->func_caps.num_rx_qp, 0, 0);
15651         if (err) {
15652                 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
15653                 goto err_init_lan_hmc;
15654         }
15655
15656         err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
15657         if (err) {
15658                 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
15659                 err = -ENOENT;
15660                 goto err_configure_lan_hmc;
15661         }
15662
15663         /* Disable LLDP for NICs that have firmware versions lower than v4.3.
15664          * Ignore error return codes because if it was already disabled via
15665          * hardware settings this will fail
15666          */
15667         if (pf->hw_features & I40E_HW_STOP_FW_LLDP) {
15668                 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
15669                 i40e_aq_stop_lldp(hw, true, false, NULL);
15670         }
15671
15672         /* allow a platform config to override the HW addr */
15673         i40e_get_platform_mac_addr(pdev, pf);
15674
15675         if (!is_valid_ether_addr(hw->mac.addr)) {
15676                 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
15677                 err = -EIO;
15678                 goto err_mac_addr;
15679         }
15680         dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
15681         ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
15682         i40e_get_port_mac_addr(hw, hw->mac.port_addr);
15683         if (is_valid_ether_addr(hw->mac.port_addr))
15684                 pf->hw_features |= I40E_HW_PORT_ID_VALID;
15685
15686         i40e_ptp_alloc_pins(pf);
15687         pci_set_drvdata(pdev, pf);
15688         pci_save_state(pdev);
15689
15690 #ifdef CONFIG_I40E_DCB
15691         status = i40e_get_fw_lldp_status(&pf->hw, &lldp_status);
15692         (!status &&
15693          lldp_status == I40E_GET_FW_LLDP_STATUS_ENABLED) ?
15694                 (pf->flags &= ~I40E_FLAG_DISABLE_FW_LLDP) :
15695                 (pf->flags |= I40E_FLAG_DISABLE_FW_LLDP);
15696         dev_info(&pdev->dev,
15697                  (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) ?
15698                         "FW LLDP is disabled\n" :
15699                         "FW LLDP is enabled\n");
15700
15701         /* Enable FW to write default DCB config on link-up */
15702         i40e_aq_set_dcb_parameters(hw, true, NULL);
15703
15704         err = i40e_init_pf_dcb(pf);
15705         if (err) {
15706                 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
15707                 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
15708                 /* Continue without DCB enabled */
15709         }
15710 #endif /* CONFIG_I40E_DCB */
15711
15712         /* set up periodic task facility */
15713         timer_setup(&pf->service_timer, i40e_service_timer, 0);
15714         pf->service_timer_period = HZ;
15715
15716         INIT_WORK(&pf->service_task, i40e_service_task);
15717         clear_bit(__I40E_SERVICE_SCHED, pf->state);
15718
15719         /* NVM bit on means WoL disabled for the port */
15720         i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
15721         if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
15722                 pf->wol_en = false;
15723         else
15724                 pf->wol_en = true;
15725         device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
15726
15727         /* set up the main switch operations */
15728         i40e_determine_queue_usage(pf);
15729         err = i40e_init_interrupt_scheme(pf);
15730         if (err)
15731                 goto err_switch_setup;
15732
15733         /* Reduce Tx and Rx pairs for kdump
15734          * When MSI-X is enabled, it's not allowed to use more TC queue
15735          * pairs than MSI-X vectors (pf->num_lan_msix) exist. Thus
15736          * vsi->num_queue_pairs will be equal to pf->num_lan_msix, i.e., 1.
15737          */
15738         if (is_kdump_kernel())
15739                 pf->num_lan_msix = 1;
15740
15741         pf->udp_tunnel_nic.set_port = i40e_udp_tunnel_set_port;
15742         pf->udp_tunnel_nic.unset_port = i40e_udp_tunnel_unset_port;
15743         pf->udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;
15744         pf->udp_tunnel_nic.shared = &pf->udp_tunnel_shared;
15745         pf->udp_tunnel_nic.tables[0].n_entries = I40E_MAX_PF_UDP_OFFLOAD_PORTS;
15746         pf->udp_tunnel_nic.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN |
15747                                                     UDP_TUNNEL_TYPE_GENEVE;
15748
15749         /* The number of VSIs reported by the FW is the minimum guaranteed
15750          * to us; HW supports far more and we share the remaining pool with
15751          * the other PFs. We allocate space for more than the guarantee with
15752          * the understanding that we might not get them all later.
15753          */
15754         if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15755                 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15756         else
15757                 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15758         if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) {
15759                 dev_warn(&pf->pdev->dev,
15760                          "limiting the VSI count due to UDP tunnel limitation %d > %d\n",
15761                          pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES);
15762                 pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES;
15763         }
15764
15765         /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
15766         pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15767                           GFP_KERNEL);
15768         if (!pf->vsi) {
15769                 err = -ENOMEM;
15770                 goto err_switch_setup;
15771         }
15772
15773 #ifdef CONFIG_PCI_IOV
15774         /* prep for VF support */
15775         if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15776             (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15777             !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15778                 if (pci_num_vf(pdev))
15779                         pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
15780         }
15781 #endif
15782         err = i40e_setup_pf_switch(pf, false, false);
15783         if (err) {
15784                 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
15785                 goto err_vsis;
15786         }
15787         INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
15788
15789         /* if FDIR VSI was set up, start it now */
15790         for (i = 0; i < pf->num_alloc_vsi; i++) {
15791                 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
15792                         i40e_vsi_open(pf->vsi[i]);
15793                         break;
15794                 }
15795         }
15796
15797         /* The driver only wants link up/down and module qualification
15798          * reports from firmware.  Note the negative logic.
15799          */
15800         err = i40e_aq_set_phy_int_mask(&pf->hw,
15801                                        ~(I40E_AQ_EVENT_LINK_UPDOWN |
15802                                          I40E_AQ_EVENT_MEDIA_NA |
15803                                          I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
15804         if (err)
15805                 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
15806                          i40e_stat_str(&pf->hw, err),
15807                          i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15808
15809         /* Reconfigure hardware for allowing smaller MSS in the case
15810          * of TSO, so that we avoid the MDD being fired and causing
15811          * a reset in the case of small MSS+TSO.
15812          */
15813         val = rd32(hw, I40E_REG_MSS);
15814         if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
15815                 val &= ~I40E_REG_MSS_MIN_MASK;
15816                 val |= I40E_64BYTE_MSS;
15817                 wr32(hw, I40E_REG_MSS, val);
15818         }
15819
15820         if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
15821                 msleep(75);
15822                 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
15823                 if (err)
15824                         dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
15825                                  i40e_stat_str(&pf->hw, err),
15826                                  i40e_aq_str(&pf->hw,
15827                                              pf->hw.aq.asq_last_status));
15828         }
15829         /* The main driver is (mostly) up and happy. We need to set this state
15830          * before setting up the misc vector or we get a race and the vector
15831          * ends up disabled forever.
15832          */
15833         clear_bit(__I40E_DOWN, pf->state);
15834
15835         /* In case of MSIX we are going to setup the misc vector right here
15836          * to handle admin queue events etc. In case of legacy and MSI
15837          * the misc functionality and queue processing is combined in
15838          * the same vector and that gets setup at open.
15839          */
15840         if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
15841                 err = i40e_setup_misc_vector(pf);
15842                 if (err) {
15843                         dev_info(&pdev->dev,
15844                                  "setup of misc vector failed: %d\n", err);
15845                         i40e_cloud_filter_exit(pf);
15846                         i40e_fdir_teardown(pf);
15847                         goto err_vsis;
15848                 }
15849         }
15850
15851 #ifdef CONFIG_PCI_IOV
15852         /* prep for VF support */
15853         if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15854             (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15855             !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15856                 /* disable link interrupts for VFs */
15857                 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
15858                 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
15859                 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
15860                 i40e_flush(hw);
15861
15862                 if (pci_num_vf(pdev)) {
15863                         dev_info(&pdev->dev,
15864                                  "Active VFs found, allocating resources.\n");
15865                         err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
15866                         if (err)
15867                                 dev_info(&pdev->dev,
15868                                          "Error %d allocating resources for existing VFs\n",
15869                                          err);
15870                 }
15871         }
15872 #endif /* CONFIG_PCI_IOV */
15873
15874         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15875                 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
15876                                                       pf->num_iwarp_msix,
15877                                                       I40E_IWARP_IRQ_PILE_ID);
15878                 if (pf->iwarp_base_vector < 0) {
15879                         dev_info(&pdev->dev,
15880                                  "failed to get tracking for %d vectors for IWARP err=%d\n",
15881                                  pf->num_iwarp_msix, pf->iwarp_base_vector);
15882                         pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
15883                 }
15884         }
15885
15886         i40e_dbg_pf_init(pf);
15887
15888         /* tell the firmware that we're starting */
15889         i40e_send_version(pf);
15890
15891         /* since everything's happy, start the service_task timer */
15892         mod_timer(&pf->service_timer,
15893                   round_jiffies(jiffies + pf->service_timer_period));
15894
15895         /* add this PF to client device list and launch a client service task */
15896         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15897                 err = i40e_lan_add_device(pf);
15898                 if (err)
15899                         dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
15900                                  err);
15901         }
15902
15903 #define PCI_SPEED_SIZE 8
15904 #define PCI_WIDTH_SIZE 8
15905         /* Devices on the IOSF bus do not have this information
15906          * and will report PCI Gen 1 x 1 by default so don't bother
15907          * checking them.
15908          */
15909         if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) {
15910                 char speed[PCI_SPEED_SIZE] = "Unknown";
15911                 char width[PCI_WIDTH_SIZE] = "Unknown";
15912
15913                 /* Get the negotiated link width and speed from PCI config
15914                  * space
15915                  */
15916                 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
15917                                           &link_status);
15918
15919                 i40e_set_pci_config_data(hw, link_status);
15920
15921                 switch (hw->bus.speed) {
15922                 case i40e_bus_speed_8000:
15923                         strlcpy(speed, "8.0", PCI_SPEED_SIZE); break;
15924                 case i40e_bus_speed_5000:
15925                         strlcpy(speed, "5.0", PCI_SPEED_SIZE); break;
15926                 case i40e_bus_speed_2500:
15927                         strlcpy(speed, "2.5", PCI_SPEED_SIZE); break;
15928                 default:
15929                         break;
15930                 }
15931                 switch (hw->bus.width) {
15932                 case i40e_bus_width_pcie_x8:
15933                         strlcpy(width, "8", PCI_WIDTH_SIZE); break;
15934                 case i40e_bus_width_pcie_x4:
15935                         strlcpy(width, "4", PCI_WIDTH_SIZE); break;
15936                 case i40e_bus_width_pcie_x2:
15937                         strlcpy(width, "2", PCI_WIDTH_SIZE); break;
15938                 case i40e_bus_width_pcie_x1:
15939                         strlcpy(width, "1", PCI_WIDTH_SIZE); break;
15940                 default:
15941                         break;
15942                 }
15943
15944                 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
15945                          speed, width);
15946
15947                 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
15948                     hw->bus.speed < i40e_bus_speed_8000) {
15949                         dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
15950                         dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
15951                 }
15952         }
15953
15954         /* get the requested speeds from the fw */
15955         err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
15956         if (err)
15957                 dev_dbg(&pf->pdev->dev, "get requested speeds ret =  %s last_status =  %s\n",
15958                         i40e_stat_str(&pf->hw, err),
15959                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15960         pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
15961
15962         /* set the FEC config due to the board capabilities */
15963         i40e_set_fec_in_flags(abilities.fec_cfg_curr_mod_ext_info, &pf->flags);
15964
15965         /* get the supported phy types from the fw */
15966         err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
15967         if (err)
15968                 dev_dbg(&pf->pdev->dev, "get supported phy types ret =  %s last_status =  %s\n",
15969                         i40e_stat_str(&pf->hw, err),
15970                         i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15971
15972         /* make sure the MFS hasn't been set lower than the default */
15973 #define MAX_FRAME_SIZE_DEFAULT 0x2600
15974         val = (rd32(&pf->hw, I40E_PRTGL_SAH) &
15975                I40E_PRTGL_SAH_MFS_MASK) >> I40E_PRTGL_SAH_MFS_SHIFT;
15976         if (val < MAX_FRAME_SIZE_DEFAULT)
15977                 dev_warn(&pdev->dev, "MFS for port %x has been set below the default: %x\n",
15978                          i, val);
15979
15980         /* Add a filter to drop all Flow control frames from any VSI from being
15981          * transmitted. By doing so we stop a malicious VF from sending out
15982          * PAUSE or PFC frames and potentially controlling traffic for other
15983          * PF/VF VSIs.
15984          * The FW can still send Flow control frames if enabled.
15985          */
15986         i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
15987                                                        pf->main_vsi_seid);
15988
15989         if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
15990                 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
15991                 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS;
15992         if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
15993                 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER;
15994         /* print a string summarizing features */
15995         i40e_print_features(pf);
15996
15997         return 0;
15998
15999         /* Unwind what we've done if something failed in the setup */
16000 err_vsis:
16001         set_bit(__I40E_DOWN, pf->state);
16002         i40e_clear_interrupt_scheme(pf);
16003         kfree(pf->vsi);
16004 err_switch_setup:
16005         i40e_reset_interrupt_capability(pf);
16006         del_timer_sync(&pf->service_timer);
16007 err_mac_addr:
16008 err_configure_lan_hmc:
16009         (void)i40e_shutdown_lan_hmc(hw);
16010 err_init_lan_hmc:
16011         kfree(pf->qp_pile);
16012 err_sw_init:
16013 err_adminq_setup:
16014 err_pf_reset:
16015         iounmap(hw->hw_addr);
16016 err_ioremap:
16017         kfree(pf);
16018 err_pf_alloc:
16019         pci_disable_pcie_error_reporting(pdev);
16020         pci_release_mem_regions(pdev);
16021 err_pci_reg:
16022 err_dma:
16023         pci_disable_device(pdev);
16024         return err;
16025 }
16026
16027 /**
16028  * i40e_remove - Device removal routine
16029  * @pdev: PCI device information struct
16030  *
16031  * i40e_remove is called by the PCI subsystem to alert the driver
16032  * that is should release a PCI device.  This could be caused by a
16033  * Hot-Plug event, or because the driver is going to be removed from
16034  * memory.
16035  **/
16036 static void i40e_remove(struct pci_dev *pdev)
16037 {
16038         struct i40e_pf *pf = pci_get_drvdata(pdev);
16039         struct i40e_hw *hw = &pf->hw;
16040         i40e_status ret_code;
16041         int i;
16042
16043         i40e_dbg_pf_exit(pf);
16044
16045         i40e_ptp_stop(pf);
16046
16047         /* Disable RSS in hw */
16048         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
16049         i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
16050
16051         /* Grab __I40E_RESET_RECOVERY_PENDING and set __I40E_IN_REMOVE
16052          * flags, once they are set, i40e_rebuild should not be called as
16053          * i40e_prep_for_reset always returns early.
16054          */
16055         while (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
16056                 usleep_range(1000, 2000);
16057         set_bit(__I40E_IN_REMOVE, pf->state);
16058
16059         if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
16060                 set_bit(__I40E_VF_RESETS_DISABLED, pf->state);
16061                 i40e_free_vfs(pf);
16062                 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
16063         }
16064         /* no more scheduling of any task */
16065         set_bit(__I40E_SUSPENDED, pf->state);
16066         set_bit(__I40E_DOWN, pf->state);
16067         if (pf->service_timer.function)
16068                 del_timer_sync(&pf->service_timer);
16069         if (pf->service_task.func)
16070                 cancel_work_sync(&pf->service_task);
16071
16072         if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
16073                 struct i40e_vsi *vsi = pf->vsi[0];
16074
16075                 /* We know that we have allocated only one vsi for this PF,
16076                  * it was just for registering netdevice, so the interface
16077                  * could be visible in the 'ifconfig' output
16078                  */
16079                 unregister_netdev(vsi->netdev);
16080                 free_netdev(vsi->netdev);
16081
16082                 goto unmap;
16083         }
16084
16085         /* Client close must be called explicitly here because the timer
16086          * has been stopped.
16087          */
16088         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16089
16090         i40e_fdir_teardown(pf);
16091
16092         /* If there is a switch structure or any orphans, remove them.
16093          * This will leave only the PF's VSI remaining.
16094          */
16095         for (i = 0; i < I40E_MAX_VEB; i++) {
16096                 if (!pf->veb[i])
16097                         continue;
16098
16099                 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
16100                     pf->veb[i]->uplink_seid == 0)
16101                         i40e_switch_branch_release(pf->veb[i]);
16102         }
16103
16104         /* Now we can shutdown the PF's VSI, just before we kill
16105          * adminq and hmc.
16106          */
16107         if (pf->vsi[pf->lan_vsi])
16108                 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
16109
16110         i40e_cloud_filter_exit(pf);
16111
16112         /* remove attached clients */
16113         if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
16114                 ret_code = i40e_lan_del_device(pf);
16115                 if (ret_code)
16116                         dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
16117                                  ret_code);
16118         }
16119
16120         /* shutdown and destroy the HMC */
16121         if (hw->hmc.hmc_obj) {
16122                 ret_code = i40e_shutdown_lan_hmc(hw);
16123                 if (ret_code)
16124                         dev_warn(&pdev->dev,
16125                                  "Failed to destroy the HMC resources: %d\n",
16126                                  ret_code);
16127         }
16128
16129 unmap:
16130         /* Free MSI/legacy interrupt 0 when in recovery mode. */
16131         if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16132             !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16133                 free_irq(pf->pdev->irq, pf);
16134
16135         /* shutdown the adminq */
16136         i40e_shutdown_adminq(hw);
16137
16138         /* destroy the locks only once, here */
16139         mutex_destroy(&hw->aq.arq_mutex);
16140         mutex_destroy(&hw->aq.asq_mutex);
16141
16142         /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
16143         rtnl_lock();
16144         i40e_clear_interrupt_scheme(pf);
16145         for (i = 0; i < pf->num_alloc_vsi; i++) {
16146                 if (pf->vsi[i]) {
16147                         if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
16148                                 i40e_vsi_clear_rings(pf->vsi[i]);
16149                         i40e_vsi_clear(pf->vsi[i]);
16150                         pf->vsi[i] = NULL;
16151                 }
16152         }
16153         rtnl_unlock();
16154
16155         for (i = 0; i < I40E_MAX_VEB; i++) {
16156                 kfree(pf->veb[i]);
16157                 pf->veb[i] = NULL;
16158         }
16159
16160         kfree(pf->qp_pile);
16161         kfree(pf->vsi);
16162
16163         iounmap(hw->hw_addr);
16164         kfree(pf);
16165         pci_release_mem_regions(pdev);
16166
16167         pci_disable_pcie_error_reporting(pdev);
16168         pci_disable_device(pdev);
16169 }
16170
16171 /**
16172  * i40e_pci_error_detected - warning that something funky happened in PCI land
16173  * @pdev: PCI device information struct
16174  * @error: the type of PCI error
16175  *
16176  * Called to warn that something happened and the error handling steps
16177  * are in progress.  Allows the driver to quiesce things, be ready for
16178  * remediation.
16179  **/
16180 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
16181                                                 pci_channel_state_t error)
16182 {
16183         struct i40e_pf *pf = pci_get_drvdata(pdev);
16184
16185         dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
16186
16187         if (!pf) {
16188                 dev_info(&pdev->dev,
16189                          "Cannot recover - error happened during device probe\n");
16190                 return PCI_ERS_RESULT_DISCONNECT;
16191         }
16192
16193         /* shutdown all operations */
16194         if (!test_bit(__I40E_SUSPENDED, pf->state))
16195                 i40e_prep_for_reset(pf);
16196
16197         /* Request a slot reset */
16198         return PCI_ERS_RESULT_NEED_RESET;
16199 }
16200
16201 /**
16202  * i40e_pci_error_slot_reset - a PCI slot reset just happened
16203  * @pdev: PCI device information struct
16204  *
16205  * Called to find if the driver can work with the device now that
16206  * the pci slot has been reset.  If a basic connection seems good
16207  * (registers are readable and have sane content) then return a
16208  * happy little PCI_ERS_RESULT_xxx.
16209  **/
16210 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
16211 {
16212         struct i40e_pf *pf = pci_get_drvdata(pdev);
16213         pci_ers_result_t result;
16214         u32 reg;
16215
16216         dev_dbg(&pdev->dev, "%s\n", __func__);
16217         if (pci_enable_device_mem(pdev)) {
16218                 dev_info(&pdev->dev,
16219                          "Cannot re-enable PCI device after reset.\n");
16220                 result = PCI_ERS_RESULT_DISCONNECT;
16221         } else {
16222                 pci_set_master(pdev);
16223                 pci_restore_state(pdev);
16224                 pci_save_state(pdev);
16225                 pci_wake_from_d3(pdev, false);
16226
16227                 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
16228                 if (reg == 0)
16229                         result = PCI_ERS_RESULT_RECOVERED;
16230                 else
16231                         result = PCI_ERS_RESULT_DISCONNECT;
16232         }
16233
16234         return result;
16235 }
16236
16237 /**
16238  * i40e_pci_error_reset_prepare - prepare device driver for pci reset
16239  * @pdev: PCI device information struct
16240  */
16241 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
16242 {
16243         struct i40e_pf *pf = pci_get_drvdata(pdev);
16244
16245         i40e_prep_for_reset(pf);
16246 }
16247
16248 /**
16249  * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
16250  * @pdev: PCI device information struct
16251  */
16252 static void i40e_pci_error_reset_done(struct pci_dev *pdev)
16253 {
16254         struct i40e_pf *pf = pci_get_drvdata(pdev);
16255
16256         if (test_bit(__I40E_IN_REMOVE, pf->state))
16257                 return;
16258
16259         i40e_reset_and_rebuild(pf, false, false);
16260 }
16261
16262 /**
16263  * i40e_pci_error_resume - restart operations after PCI error recovery
16264  * @pdev: PCI device information struct
16265  *
16266  * Called to allow the driver to bring things back up after PCI error
16267  * and/or reset recovery has finished.
16268  **/
16269 static void i40e_pci_error_resume(struct pci_dev *pdev)
16270 {
16271         struct i40e_pf *pf = pci_get_drvdata(pdev);
16272
16273         dev_dbg(&pdev->dev, "%s\n", __func__);
16274         if (test_bit(__I40E_SUSPENDED, pf->state))
16275                 return;
16276
16277         i40e_handle_reset_warning(pf, false);
16278 }
16279
16280 /**
16281  * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
16282  * using the mac_address_write admin q function
16283  * @pf: pointer to i40e_pf struct
16284  **/
16285 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
16286 {
16287         struct i40e_hw *hw = &pf->hw;
16288         i40e_status ret;
16289         u8 mac_addr[6];
16290         u16 flags = 0;
16291
16292         /* Get current MAC address in case it's an LAA */
16293         if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
16294                 ether_addr_copy(mac_addr,
16295                                 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
16296         } else {
16297                 dev_err(&pf->pdev->dev,
16298                         "Failed to retrieve MAC address; using default\n");
16299                 ether_addr_copy(mac_addr, hw->mac.addr);
16300         }
16301
16302         /* The FW expects the mac address write cmd to first be called with
16303          * one of these flags before calling it again with the multicast
16304          * enable flags.
16305          */
16306         flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
16307
16308         if (hw->func_caps.flex10_enable && hw->partition_id != 1)
16309                 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
16310
16311         ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16312         if (ret) {
16313                 dev_err(&pf->pdev->dev,
16314                         "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
16315                 return;
16316         }
16317
16318         flags = I40E_AQC_MC_MAG_EN
16319                         | I40E_AQC_WOL_PRESERVE_ON_PFR
16320                         | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
16321         ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16322         if (ret)
16323                 dev_err(&pf->pdev->dev,
16324                         "Failed to enable Multicast Magic Packet wake up\n");
16325 }
16326
16327 /**
16328  * i40e_shutdown - PCI callback for shutting down
16329  * @pdev: PCI device information struct
16330  **/
16331 static void i40e_shutdown(struct pci_dev *pdev)
16332 {
16333         struct i40e_pf *pf = pci_get_drvdata(pdev);
16334         struct i40e_hw *hw = &pf->hw;
16335
16336         set_bit(__I40E_SUSPENDED, pf->state);
16337         set_bit(__I40E_DOWN, pf->state);
16338
16339         del_timer_sync(&pf->service_timer);
16340         cancel_work_sync(&pf->service_task);
16341         i40e_cloud_filter_exit(pf);
16342         i40e_fdir_teardown(pf);
16343
16344         /* Client close must be called explicitly here because the timer
16345          * has been stopped.
16346          */
16347         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16348
16349         if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16350                 i40e_enable_mc_magic_wake(pf);
16351
16352         i40e_prep_for_reset(pf);
16353
16354         wr32(hw, I40E_PFPM_APM,
16355              (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16356         wr32(hw, I40E_PFPM_WUFC,
16357              (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16358
16359         /* Free MSI/legacy interrupt 0 when in recovery mode. */
16360         if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16361             !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16362                 free_irq(pf->pdev->irq, pf);
16363
16364         /* Since we're going to destroy queues during the
16365          * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16366          * whole section
16367          */
16368         rtnl_lock();
16369         i40e_clear_interrupt_scheme(pf);
16370         rtnl_unlock();
16371
16372         if (system_state == SYSTEM_POWER_OFF) {
16373                 pci_wake_from_d3(pdev, pf->wol_en);
16374                 pci_set_power_state(pdev, PCI_D3hot);
16375         }
16376 }
16377
16378 /**
16379  * i40e_suspend - PM callback for moving to D3
16380  * @dev: generic device information structure
16381  **/
16382 static int __maybe_unused i40e_suspend(struct device *dev)
16383 {
16384         struct i40e_pf *pf = dev_get_drvdata(dev);
16385         struct i40e_hw *hw = &pf->hw;
16386
16387         /* If we're already suspended, then there is nothing to do */
16388         if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
16389                 return 0;
16390
16391         set_bit(__I40E_DOWN, pf->state);
16392
16393         /* Ensure service task will not be running */
16394         del_timer_sync(&pf->service_timer);
16395         cancel_work_sync(&pf->service_task);
16396
16397         /* Client close must be called explicitly here because the timer
16398          * has been stopped.
16399          */
16400         i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16401
16402         if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16403                 i40e_enable_mc_magic_wake(pf);
16404
16405         /* Since we're going to destroy queues during the
16406          * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16407          * whole section
16408          */
16409         rtnl_lock();
16410
16411         i40e_prep_for_reset(pf);
16412
16413         wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16414         wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16415
16416         /* Clear the interrupt scheme and release our IRQs so that the system
16417          * can safely hibernate even when there are a large number of CPUs.
16418          * Otherwise hibernation might fail when mapping all the vectors back
16419          * to CPU0.
16420          */
16421         i40e_clear_interrupt_scheme(pf);
16422
16423         rtnl_unlock();
16424
16425         return 0;
16426 }
16427
16428 /**
16429  * i40e_resume - PM callback for waking up from D3
16430  * @dev: generic device information structure
16431  **/
16432 static int __maybe_unused i40e_resume(struct device *dev)
16433 {
16434         struct i40e_pf *pf = dev_get_drvdata(dev);
16435         int err;
16436
16437         /* If we're not suspended, then there is nothing to do */
16438         if (!test_bit(__I40E_SUSPENDED, pf->state))
16439                 return 0;
16440
16441         /* We need to hold the RTNL lock prior to restoring interrupt schemes,
16442          * since we're going to be restoring queues
16443          */
16444         rtnl_lock();
16445
16446         /* We cleared the interrupt scheme when we suspended, so we need to
16447          * restore it now to resume device functionality.
16448          */
16449         err = i40e_restore_interrupt_scheme(pf);
16450         if (err) {
16451                 dev_err(dev, "Cannot restore interrupt scheme: %d\n",
16452                         err);
16453         }
16454
16455         clear_bit(__I40E_DOWN, pf->state);
16456         i40e_reset_and_rebuild(pf, false, true);
16457
16458         rtnl_unlock();
16459
16460         /* Clear suspended state last after everything is recovered */
16461         clear_bit(__I40E_SUSPENDED, pf->state);
16462
16463         /* Restart the service task */
16464         mod_timer(&pf->service_timer,
16465                   round_jiffies(jiffies + pf->service_timer_period));
16466
16467         return 0;
16468 }
16469
16470 static const struct pci_error_handlers i40e_err_handler = {
16471         .error_detected = i40e_pci_error_detected,
16472         .slot_reset = i40e_pci_error_slot_reset,
16473         .reset_prepare = i40e_pci_error_reset_prepare,
16474         .reset_done = i40e_pci_error_reset_done,
16475         .resume = i40e_pci_error_resume,
16476 };
16477
16478 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
16479
16480 static struct pci_driver i40e_driver = {
16481         .name     = i40e_driver_name,
16482         .id_table = i40e_pci_tbl,
16483         .probe    = i40e_probe,
16484         .remove   = i40e_remove,
16485         .driver   = {
16486                 .pm = &i40e_pm_ops,
16487         },
16488         .shutdown = i40e_shutdown,
16489         .err_handler = &i40e_err_handler,
16490         .sriov_configure = i40e_pci_sriov_configure,
16491 };
16492
16493 /**
16494  * i40e_init_module - Driver registration routine
16495  *
16496  * i40e_init_module is the first routine called when the driver is
16497  * loaded. All it does is register with the PCI subsystem.
16498  **/
16499 static int __init i40e_init_module(void)
16500 {
16501         pr_info("%s: %s\n", i40e_driver_name, i40e_driver_string);
16502         pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
16503
16504         /* There is no need to throttle the number of active tasks because
16505          * each device limits its own task using a state bit for scheduling
16506          * the service task, and the device tasks do not interfere with each
16507          * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
16508          * since we need to be able to guarantee forward progress even under
16509          * memory pressure.
16510          */
16511         i40e_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, i40e_driver_name);
16512         if (!i40e_wq) {
16513                 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
16514                 return -ENOMEM;
16515         }
16516
16517         i40e_dbg_init();
16518         return pci_register_driver(&i40e_driver);
16519 }
16520 module_init(i40e_init_module);
16521
16522 /**
16523  * i40e_exit_module - Driver exit cleanup routine
16524  *
16525  * i40e_exit_module is called just before the driver is removed
16526  * from memory.
16527  **/
16528 static void __exit i40e_exit_module(void)
16529 {
16530         pci_unregister_driver(&i40e_driver);
16531         destroy_workqueue(i40e_wq);
16532         ida_destroy(&i40e_client_ida);
16533         i40e_dbg_exit();
16534 }
16535 module_exit(i40e_exit_module);