1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
4 #include <linux/etherdevice.h>
5 #include <linux/of_net.h>
8 #include <generated/utsrelease.h>
9 #include <linux/crash_dump.h>
13 #include "i40e_diag.h"
15 #include <net/udp_tunnel.h>
16 #include <net/xdp_sock_drv.h>
17 /* All i40e tracepoints are defined by the include below, which
18 * must be included exactly once across the whole kernel with
19 * CREATE_TRACE_POINTS defined
21 #define CREATE_TRACE_POINTS
22 #include "i40e_trace.h"
24 const char i40e_driver_name[] = "i40e";
25 static const char i40e_driver_string[] =
26 "Intel(R) Ethernet Connection XL710 Network Driver";
28 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
30 /* a bit of forward declarations */
31 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
32 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
33 static int i40e_add_vsi(struct i40e_vsi *vsi);
34 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
35 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired);
36 static int i40e_setup_misc_vector(struct i40e_pf *pf);
37 static void i40e_determine_queue_usage(struct i40e_pf *pf);
38 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
39 static void i40e_prep_for_reset(struct i40e_pf *pf);
40 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
42 static int i40e_reset(struct i40e_pf *pf);
43 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
44 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf);
45 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf);
46 static bool i40e_check_recovery_mode(struct i40e_pf *pf);
47 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw);
48 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
49 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
50 static int i40e_get_capabilities(struct i40e_pf *pf,
51 enum i40e_admin_queue_opc list_type);
52 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf);
54 /* i40e_pci_tbl - PCI Device ID Table
56 * Last entry must be all 0s
58 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
59 * Class, Class Mask, private data (not used) }
61 static const struct pci_device_id i40e_pci_tbl[] = {
62 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
63 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
64 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
65 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
66 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
67 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
68 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_SFP), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_B), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722_A), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_X710_N3000), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_XXV710_N3000), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
87 /* required last entry */
90 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
92 #define I40E_MAX_VF_COUNT 128
93 static int debug = -1;
94 module_param(debug, uint, 0);
95 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
97 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
98 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
99 MODULE_LICENSE("GPL v2");
101 static struct workqueue_struct *i40e_wq;
103 static void netdev_hw_addr_refcnt(struct i40e_mac_filter *f,
104 struct net_device *netdev, int delta)
106 struct netdev_hw_addr *ha;
111 netdev_for_each_mc_addr(ha, netdev) {
112 if (ether_addr_equal(ha->addr, f->macaddr)) {
113 ha->refcount += delta;
114 if (ha->refcount <= 0)
122 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
123 * @hw: pointer to the HW structure
124 * @mem: ptr to mem struct to fill out
125 * @size: size of memory requested
126 * @alignment: what to align the allocation to
128 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
129 u64 size, u32 alignment)
131 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
133 mem->size = ALIGN(size, alignment);
134 mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
143 * i40e_free_dma_mem_d - OS specific memory free for shared code
144 * @hw: pointer to the HW structure
145 * @mem: ptr to mem struct to free
147 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
149 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
151 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
160 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
161 * @hw: pointer to the HW structure
162 * @mem: ptr to mem struct to fill out
163 * @size: size of memory requested
165 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
169 mem->va = kzalloc(size, GFP_KERNEL);
178 * i40e_free_virt_mem_d - OS specific memory free for shared code
179 * @hw: pointer to the HW structure
180 * @mem: ptr to mem struct to free
182 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
184 /* it's ok to kfree a NULL pointer */
193 * i40e_get_lump - find a lump of free generic resource
194 * @pf: board private structure
195 * @pile: the pile of resource to search
196 * @needed: the number of items needed
197 * @id: an owner id to stick on the items assigned
199 * Returns the base item index of the lump, or negative for error
201 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
207 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
208 dev_info(&pf->pdev->dev,
209 "param err: pile=%s needed=%d id=0x%04x\n",
210 pile ? "<valid>" : "<null>", needed, id);
214 /* Allocate last queue in the pile for FDIR VSI queue
215 * so it doesn't fragment the qp_pile
217 if (pile == pf->qp_pile && pf->vsi[id]->type == I40E_VSI_FDIR) {
218 if (pile->list[pile->num_entries - 1] & I40E_PILE_VALID_BIT) {
219 dev_err(&pf->pdev->dev,
220 "Cannot allocate queue %d for I40E_VSI_FDIR\n",
221 pile->num_entries - 1);
224 pile->list[pile->num_entries - 1] = id | I40E_PILE_VALID_BIT;
225 return pile->num_entries - 1;
229 while (i < pile->num_entries) {
230 /* skip already allocated entries */
231 if (pile->list[i] & I40E_PILE_VALID_BIT) {
236 /* do we have enough in this lump? */
237 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
238 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
243 /* there was enough, so assign it to the requestor */
244 for (j = 0; j < needed; j++)
245 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
250 /* not enough, so skip over it and continue looking */
258 * i40e_put_lump - return a lump of generic resource
259 * @pile: the pile of resource to search
260 * @index: the base item index
261 * @id: the owner id of the items assigned
263 * Returns the count of items in the lump
265 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
267 int valid_id = (id | I40E_PILE_VALID_BIT);
271 if (!pile || index >= pile->num_entries)
275 i < pile->num_entries && pile->list[i] == valid_id;
286 * i40e_find_vsi_from_id - searches for the vsi with the given id
287 * @pf: the pf structure to search for the vsi
288 * @id: id of the vsi it is searching for
290 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
294 for (i = 0; i < pf->num_alloc_vsi; i++)
295 if (pf->vsi[i] && (pf->vsi[i]->id == id))
302 * i40e_service_event_schedule - Schedule the service task to wake up
303 * @pf: board private structure
305 * If not already scheduled, this puts the task into the work queue
307 void i40e_service_event_schedule(struct i40e_pf *pf)
309 if ((!test_bit(__I40E_DOWN, pf->state) &&
310 !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) ||
311 test_bit(__I40E_RECOVERY_MODE, pf->state))
312 queue_work(i40e_wq, &pf->service_task);
316 * i40e_tx_timeout - Respond to a Tx Hang
317 * @netdev: network interface device structure
318 * @txqueue: queue number timing out
320 * If any port has noticed a Tx timeout, it is likely that the whole
321 * device is munged, not just the one netdev port, so go for the full
324 static void i40e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
326 struct i40e_netdev_priv *np = netdev_priv(netdev);
327 struct i40e_vsi *vsi = np->vsi;
328 struct i40e_pf *pf = vsi->back;
329 struct i40e_ring *tx_ring = NULL;
333 pf->tx_timeout_count++;
335 /* with txqueue index, find the tx_ring struct */
336 for (i = 0; i < vsi->num_queue_pairs; i++) {
337 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
339 vsi->tx_rings[i]->queue_index) {
340 tx_ring = vsi->tx_rings[i];
346 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
347 pf->tx_timeout_recovery_level = 1; /* reset after some time */
348 else if (time_before(jiffies,
349 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
350 return; /* don't do any new action before the next timeout */
352 /* don't kick off another recovery if one is already pending */
353 if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
357 head = i40e_get_head(tx_ring);
358 /* Read interrupt register */
359 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
361 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
362 tx_ring->vsi->base_vector - 1));
364 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
366 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
367 vsi->seid, txqueue, tx_ring->next_to_clean,
368 head, tx_ring->next_to_use,
369 readl(tx_ring->tail), val);
372 pf->tx_timeout_last_recovery = jiffies;
373 netdev_info(netdev, "tx_timeout recovery level %d, txqueue %d\n",
374 pf->tx_timeout_recovery_level, txqueue);
376 switch (pf->tx_timeout_recovery_level) {
378 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
381 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
384 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
387 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
391 i40e_service_event_schedule(pf);
392 pf->tx_timeout_recovery_level++;
396 * i40e_get_vsi_stats_struct - Get System Network Statistics
397 * @vsi: the VSI we care about
399 * Returns the address of the device statistics structure.
400 * The statistics are actually updated from the service task.
402 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
404 return &vsi->net_stats;
408 * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
409 * @ring: Tx ring to get statistics from
410 * @stats: statistics entry to be updated
412 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
413 struct rtnl_link_stats64 *stats)
419 start = u64_stats_fetch_begin_irq(&ring->syncp);
420 packets = ring->stats.packets;
421 bytes = ring->stats.bytes;
422 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
424 stats->tx_packets += packets;
425 stats->tx_bytes += bytes;
429 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
430 * @netdev: network interface device structure
431 * @stats: data structure to store statistics
433 * Returns the address of the device statistics structure.
434 * The statistics are actually updated from the service task.
436 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
437 struct rtnl_link_stats64 *stats)
439 struct i40e_netdev_priv *np = netdev_priv(netdev);
440 struct i40e_vsi *vsi = np->vsi;
441 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
442 struct i40e_ring *ring;
445 if (test_bit(__I40E_VSI_DOWN, vsi->state))
452 for (i = 0; i < vsi->num_queue_pairs; i++) {
456 ring = READ_ONCE(vsi->tx_rings[i]);
459 i40e_get_netdev_stats_struct_tx(ring, stats);
461 if (i40e_enabled_xdp_vsi(vsi)) {
462 ring = READ_ONCE(vsi->xdp_rings[i]);
465 i40e_get_netdev_stats_struct_tx(ring, stats);
468 ring = READ_ONCE(vsi->rx_rings[i]);
472 start = u64_stats_fetch_begin_irq(&ring->syncp);
473 packets = ring->stats.packets;
474 bytes = ring->stats.bytes;
475 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
477 stats->rx_packets += packets;
478 stats->rx_bytes += bytes;
483 /* following stats updated by i40e_watchdog_subtask() */
484 stats->multicast = vsi_stats->multicast;
485 stats->tx_errors = vsi_stats->tx_errors;
486 stats->tx_dropped = vsi_stats->tx_dropped;
487 stats->rx_errors = vsi_stats->rx_errors;
488 stats->rx_dropped = vsi_stats->rx_dropped;
489 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
490 stats->rx_length_errors = vsi_stats->rx_length_errors;
494 * i40e_vsi_reset_stats - Resets all stats of the given vsi
495 * @vsi: the VSI to have its stats reset
497 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
499 struct rtnl_link_stats64 *ns;
505 ns = i40e_get_vsi_stats_struct(vsi);
506 memset(ns, 0, sizeof(*ns));
507 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
508 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
509 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
510 if (vsi->rx_rings && vsi->rx_rings[0]) {
511 for (i = 0; i < vsi->num_queue_pairs; i++) {
512 memset(&vsi->rx_rings[i]->stats, 0,
513 sizeof(vsi->rx_rings[i]->stats));
514 memset(&vsi->rx_rings[i]->rx_stats, 0,
515 sizeof(vsi->rx_rings[i]->rx_stats));
516 memset(&vsi->tx_rings[i]->stats, 0,
517 sizeof(vsi->tx_rings[i]->stats));
518 memset(&vsi->tx_rings[i]->tx_stats, 0,
519 sizeof(vsi->tx_rings[i]->tx_stats));
522 vsi->stat_offsets_loaded = false;
526 * i40e_pf_reset_stats - Reset all of the stats for the given PF
527 * @pf: the PF to be reset
529 void i40e_pf_reset_stats(struct i40e_pf *pf)
533 memset(&pf->stats, 0, sizeof(pf->stats));
534 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
535 pf->stat_offsets_loaded = false;
537 for (i = 0; i < I40E_MAX_VEB; i++) {
539 memset(&pf->veb[i]->stats, 0,
540 sizeof(pf->veb[i]->stats));
541 memset(&pf->veb[i]->stats_offsets, 0,
542 sizeof(pf->veb[i]->stats_offsets));
543 memset(&pf->veb[i]->tc_stats, 0,
544 sizeof(pf->veb[i]->tc_stats));
545 memset(&pf->veb[i]->tc_stats_offsets, 0,
546 sizeof(pf->veb[i]->tc_stats_offsets));
547 pf->veb[i]->stat_offsets_loaded = false;
550 pf->hw_csum_rx_error = 0;
554 * i40e_compute_pci_to_hw_id - compute index form PCI function.
555 * @vsi: ptr to the VSI to read from.
556 * @hw: ptr to the hardware info.
558 static u32 i40e_compute_pci_to_hw_id(struct i40e_vsi *vsi, struct i40e_hw *hw)
560 int pf_count = i40e_get_pf_count(hw);
562 if (vsi->type == I40E_VSI_SRIOV)
563 return (hw->port * BIT(7)) / pf_count + vsi->vf_id;
565 return hw->port + BIT(7);
569 * i40e_stat_update64 - read and update a 64 bit stat from the chip.
570 * @hw: ptr to the hardware info.
571 * @hireg: the high 32 bit reg to read.
572 * @loreg: the low 32 bit reg to read.
573 * @offset_loaded: has the initial offset been loaded yet.
574 * @offset: ptr to current offset value.
575 * @stat: ptr to the stat.
577 * Since the device stats are not reset at PFReset, they will not
578 * be zeroed when the driver starts. We'll save the first values read
579 * and use them as offsets to be subtracted from the raw values in order
580 * to report stats that count from zero.
582 static void i40e_stat_update64(struct i40e_hw *hw, u32 hireg, u32 loreg,
583 bool offset_loaded, u64 *offset, u64 *stat)
587 new_data = rd64(hw, loreg);
589 if (!offset_loaded || new_data < *offset)
591 *stat = new_data - *offset;
595 * i40e_stat_update48 - read and update a 48 bit stat from the chip
596 * @hw: ptr to the hardware info
597 * @hireg: the high 32 bit reg to read
598 * @loreg: the low 32 bit reg to read
599 * @offset_loaded: has the initial offset been loaded yet
600 * @offset: ptr to current offset value
601 * @stat: ptr to the stat
603 * Since the device stats are not reset at PFReset, they likely will not
604 * be zeroed when the driver starts. We'll save the first values read
605 * and use them as offsets to be subtracted from the raw values in order
606 * to report stats that count from zero. In the process, we also manage
607 * the potential roll-over.
609 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
610 bool offset_loaded, u64 *offset, u64 *stat)
614 if (hw->device_id == I40E_DEV_ID_QEMU) {
615 new_data = rd32(hw, loreg);
616 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
618 new_data = rd64(hw, loreg);
622 if (likely(new_data >= *offset))
623 *stat = new_data - *offset;
625 *stat = (new_data + BIT_ULL(48)) - *offset;
626 *stat &= 0xFFFFFFFFFFFFULL;
630 * i40e_stat_update32 - read and update a 32 bit stat from the chip
631 * @hw: ptr to the hardware info
632 * @reg: the hw reg to read
633 * @offset_loaded: has the initial offset been loaded yet
634 * @offset: ptr to current offset value
635 * @stat: ptr to the stat
637 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
638 bool offset_loaded, u64 *offset, u64 *stat)
642 new_data = rd32(hw, reg);
645 if (likely(new_data >= *offset))
646 *stat = (u32)(new_data - *offset);
648 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
652 * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
653 * @hw: ptr to the hardware info
654 * @reg: the hw reg to read and clear
655 * @stat: ptr to the stat
657 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
659 u32 new_data = rd32(hw, reg);
661 wr32(hw, reg, 1); /* must write a nonzero value to clear register */
666 * i40e_stats_update_rx_discards - update rx_discards.
667 * @vsi: ptr to the VSI to be updated.
668 * @hw: ptr to the hardware info.
669 * @stat_idx: VSI's stat_counter_idx.
670 * @offset_loaded: ptr to the VSI's stat_offsets_loaded.
671 * @stat_offset: ptr to stat_offset to store first read of specific register.
672 * @stat: ptr to VSI's stat to be updated.
675 i40e_stats_update_rx_discards(struct i40e_vsi *vsi, struct i40e_hw *hw,
676 int stat_idx, bool offset_loaded,
677 struct i40e_eth_stats *stat_offset,
678 struct i40e_eth_stats *stat)
680 u64 rx_rdpc, rx_rxerr;
682 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), offset_loaded,
683 &stat_offset->rx_discards, &rx_rdpc);
684 i40e_stat_update64(hw,
685 I40E_GL_RXERR1H(i40e_compute_pci_to_hw_id(vsi, hw)),
686 I40E_GL_RXERR1L(i40e_compute_pci_to_hw_id(vsi, hw)),
687 offset_loaded, &stat_offset->rx_discards_other,
690 stat->rx_discards = rx_rdpc + rx_rxerr;
694 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
695 * @vsi: the VSI to be updated
697 void i40e_update_eth_stats(struct i40e_vsi *vsi)
699 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
700 struct i40e_pf *pf = vsi->back;
701 struct i40e_hw *hw = &pf->hw;
702 struct i40e_eth_stats *oes;
703 struct i40e_eth_stats *es; /* device's eth stats */
705 es = &vsi->eth_stats;
706 oes = &vsi->eth_stats_offsets;
708 /* Gather up the stats that the hw collects */
709 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
710 vsi->stat_offsets_loaded,
711 &oes->tx_errors, &es->tx_errors);
712 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
713 vsi->stat_offsets_loaded,
714 &oes->rx_discards, &es->rx_discards);
715 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
716 vsi->stat_offsets_loaded,
717 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
719 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
720 I40E_GLV_GORCL(stat_idx),
721 vsi->stat_offsets_loaded,
722 &oes->rx_bytes, &es->rx_bytes);
723 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
724 I40E_GLV_UPRCL(stat_idx),
725 vsi->stat_offsets_loaded,
726 &oes->rx_unicast, &es->rx_unicast);
727 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
728 I40E_GLV_MPRCL(stat_idx),
729 vsi->stat_offsets_loaded,
730 &oes->rx_multicast, &es->rx_multicast);
731 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
732 I40E_GLV_BPRCL(stat_idx),
733 vsi->stat_offsets_loaded,
734 &oes->rx_broadcast, &es->rx_broadcast);
736 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
737 I40E_GLV_GOTCL(stat_idx),
738 vsi->stat_offsets_loaded,
739 &oes->tx_bytes, &es->tx_bytes);
740 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
741 I40E_GLV_UPTCL(stat_idx),
742 vsi->stat_offsets_loaded,
743 &oes->tx_unicast, &es->tx_unicast);
744 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
745 I40E_GLV_MPTCL(stat_idx),
746 vsi->stat_offsets_loaded,
747 &oes->tx_multicast, &es->tx_multicast);
748 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
749 I40E_GLV_BPTCL(stat_idx),
750 vsi->stat_offsets_loaded,
751 &oes->tx_broadcast, &es->tx_broadcast);
753 i40e_stats_update_rx_discards(vsi, hw, stat_idx,
754 vsi->stat_offsets_loaded, oes, es);
756 vsi->stat_offsets_loaded = true;
760 * i40e_update_veb_stats - Update Switch component statistics
761 * @veb: the VEB being updated
763 void i40e_update_veb_stats(struct i40e_veb *veb)
765 struct i40e_pf *pf = veb->pf;
766 struct i40e_hw *hw = &pf->hw;
767 struct i40e_eth_stats *oes;
768 struct i40e_eth_stats *es; /* device's eth stats */
769 struct i40e_veb_tc_stats *veb_oes;
770 struct i40e_veb_tc_stats *veb_es;
773 idx = veb->stats_idx;
775 oes = &veb->stats_offsets;
776 veb_es = &veb->tc_stats;
777 veb_oes = &veb->tc_stats_offsets;
779 /* Gather up the stats that the hw collects */
780 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
781 veb->stat_offsets_loaded,
782 &oes->tx_discards, &es->tx_discards);
783 if (hw->revision_id > 0)
784 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
785 veb->stat_offsets_loaded,
786 &oes->rx_unknown_protocol,
787 &es->rx_unknown_protocol);
788 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
789 veb->stat_offsets_loaded,
790 &oes->rx_bytes, &es->rx_bytes);
791 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
792 veb->stat_offsets_loaded,
793 &oes->rx_unicast, &es->rx_unicast);
794 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
795 veb->stat_offsets_loaded,
796 &oes->rx_multicast, &es->rx_multicast);
797 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
798 veb->stat_offsets_loaded,
799 &oes->rx_broadcast, &es->rx_broadcast);
801 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
802 veb->stat_offsets_loaded,
803 &oes->tx_bytes, &es->tx_bytes);
804 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
805 veb->stat_offsets_loaded,
806 &oes->tx_unicast, &es->tx_unicast);
807 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
808 veb->stat_offsets_loaded,
809 &oes->tx_multicast, &es->tx_multicast);
810 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
811 veb->stat_offsets_loaded,
812 &oes->tx_broadcast, &es->tx_broadcast);
813 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
814 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
815 I40E_GLVEBTC_RPCL(i, idx),
816 veb->stat_offsets_loaded,
817 &veb_oes->tc_rx_packets[i],
818 &veb_es->tc_rx_packets[i]);
819 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
820 I40E_GLVEBTC_RBCL(i, idx),
821 veb->stat_offsets_loaded,
822 &veb_oes->tc_rx_bytes[i],
823 &veb_es->tc_rx_bytes[i]);
824 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
825 I40E_GLVEBTC_TPCL(i, idx),
826 veb->stat_offsets_loaded,
827 &veb_oes->tc_tx_packets[i],
828 &veb_es->tc_tx_packets[i]);
829 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
830 I40E_GLVEBTC_TBCL(i, idx),
831 veb->stat_offsets_loaded,
832 &veb_oes->tc_tx_bytes[i],
833 &veb_es->tc_tx_bytes[i]);
835 veb->stat_offsets_loaded = true;
839 * i40e_update_vsi_stats - Update the vsi statistics counters.
840 * @vsi: the VSI to be updated
842 * There are a few instances where we store the same stat in a
843 * couple of different structs. This is partly because we have
844 * the netdev stats that need to be filled out, which is slightly
845 * different from the "eth_stats" defined by the chip and used in
846 * VF communications. We sort it out here.
848 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
850 u64 rx_page, rx_buf, rx_reuse, rx_alloc, rx_waive, rx_busy;
851 struct i40e_pf *pf = vsi->back;
852 struct rtnl_link_stats64 *ons;
853 struct rtnl_link_stats64 *ns; /* netdev stats */
854 struct i40e_eth_stats *oes;
855 struct i40e_eth_stats *es; /* device's eth stats */
856 u64 tx_restart, tx_busy;
867 if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
868 test_bit(__I40E_CONFIG_BUSY, pf->state))
871 ns = i40e_get_vsi_stats_struct(vsi);
872 ons = &vsi->net_stats_offsets;
873 es = &vsi->eth_stats;
874 oes = &vsi->eth_stats_offsets;
876 /* Gather up the netdev and vsi stats that the driver collects
877 * on the fly during packet processing
881 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
890 for (q = 0; q < vsi->num_queue_pairs; q++) {
892 p = READ_ONCE(vsi->tx_rings[q]);
897 start = u64_stats_fetch_begin_irq(&p->syncp);
898 packets = p->stats.packets;
899 bytes = p->stats.bytes;
900 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
903 tx_restart += p->tx_stats.restart_queue;
904 tx_busy += p->tx_stats.tx_busy;
905 tx_linearize += p->tx_stats.tx_linearize;
906 tx_force_wb += p->tx_stats.tx_force_wb;
907 tx_stopped += p->tx_stats.tx_stopped;
910 p = READ_ONCE(vsi->rx_rings[q]);
915 start = u64_stats_fetch_begin_irq(&p->syncp);
916 packets = p->stats.packets;
917 bytes = p->stats.bytes;
918 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
921 rx_buf += p->rx_stats.alloc_buff_failed;
922 rx_page += p->rx_stats.alloc_page_failed;
923 rx_reuse += p->rx_stats.page_reuse_count;
924 rx_alloc += p->rx_stats.page_alloc_count;
925 rx_waive += p->rx_stats.page_waive_count;
926 rx_busy += p->rx_stats.page_busy_count;
928 if (i40e_enabled_xdp_vsi(vsi)) {
929 /* locate XDP ring */
930 p = READ_ONCE(vsi->xdp_rings[q]);
935 start = u64_stats_fetch_begin_irq(&p->syncp);
936 packets = p->stats.packets;
937 bytes = p->stats.bytes;
938 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
941 tx_restart += p->tx_stats.restart_queue;
942 tx_busy += p->tx_stats.tx_busy;
943 tx_linearize += p->tx_stats.tx_linearize;
944 tx_force_wb += p->tx_stats.tx_force_wb;
948 vsi->tx_restart = tx_restart;
949 vsi->tx_busy = tx_busy;
950 vsi->tx_linearize = tx_linearize;
951 vsi->tx_force_wb = tx_force_wb;
952 vsi->tx_stopped = tx_stopped;
953 vsi->rx_page_failed = rx_page;
954 vsi->rx_buf_failed = rx_buf;
955 vsi->rx_page_reuse = rx_reuse;
956 vsi->rx_page_alloc = rx_alloc;
957 vsi->rx_page_waive = rx_waive;
958 vsi->rx_page_busy = rx_busy;
960 ns->rx_packets = rx_p;
962 ns->tx_packets = tx_p;
965 /* update netdev stats from eth stats */
966 i40e_update_eth_stats(vsi);
967 ons->tx_errors = oes->tx_errors;
968 ns->tx_errors = es->tx_errors;
969 ons->multicast = oes->rx_multicast;
970 ns->multicast = es->rx_multicast;
971 ons->rx_dropped = oes->rx_discards;
972 ns->rx_dropped = es->rx_discards;
973 ons->tx_dropped = oes->tx_discards;
974 ns->tx_dropped = es->tx_discards;
976 /* pull in a couple PF stats if this is the main vsi */
977 if (vsi == pf->vsi[pf->lan_vsi]) {
978 ns->rx_crc_errors = pf->stats.crc_errors;
979 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
980 ns->rx_length_errors = pf->stats.rx_length_errors;
985 * i40e_update_pf_stats - Update the PF statistics counters.
986 * @pf: the PF to be updated
988 static void i40e_update_pf_stats(struct i40e_pf *pf)
990 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
991 struct i40e_hw_port_stats *nsd = &pf->stats;
992 struct i40e_hw *hw = &pf->hw;
996 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
997 I40E_GLPRT_GORCL(hw->port),
998 pf->stat_offsets_loaded,
999 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
1000 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
1001 I40E_GLPRT_GOTCL(hw->port),
1002 pf->stat_offsets_loaded,
1003 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
1004 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
1005 pf->stat_offsets_loaded,
1006 &osd->eth.rx_discards,
1007 &nsd->eth.rx_discards);
1008 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
1009 I40E_GLPRT_UPRCL(hw->port),
1010 pf->stat_offsets_loaded,
1011 &osd->eth.rx_unicast,
1012 &nsd->eth.rx_unicast);
1013 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
1014 I40E_GLPRT_MPRCL(hw->port),
1015 pf->stat_offsets_loaded,
1016 &osd->eth.rx_multicast,
1017 &nsd->eth.rx_multicast);
1018 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
1019 I40E_GLPRT_BPRCL(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->eth.rx_broadcast,
1022 &nsd->eth.rx_broadcast);
1023 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1024 I40E_GLPRT_UPTCL(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->eth.tx_unicast,
1027 &nsd->eth.tx_unicast);
1028 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1029 I40E_GLPRT_MPTCL(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->eth.tx_multicast,
1032 &nsd->eth.tx_multicast);
1033 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1034 I40E_GLPRT_BPTCL(hw->port),
1035 pf->stat_offsets_loaded,
1036 &osd->eth.tx_broadcast,
1037 &nsd->eth.tx_broadcast);
1039 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1040 pf->stat_offsets_loaded,
1041 &osd->tx_dropped_link_down,
1042 &nsd->tx_dropped_link_down);
1044 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1045 pf->stat_offsets_loaded,
1046 &osd->crc_errors, &nsd->crc_errors);
1048 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1049 pf->stat_offsets_loaded,
1050 &osd->illegal_bytes, &nsd->illegal_bytes);
1052 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->mac_local_faults,
1055 &nsd->mac_local_faults);
1056 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1057 pf->stat_offsets_loaded,
1058 &osd->mac_remote_faults,
1059 &nsd->mac_remote_faults);
1061 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1062 pf->stat_offsets_loaded,
1063 &osd->rx_length_errors,
1064 &nsd->rx_length_errors);
1066 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1067 pf->stat_offsets_loaded,
1068 &osd->link_xon_rx, &nsd->link_xon_rx);
1069 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1070 pf->stat_offsets_loaded,
1071 &osd->link_xon_tx, &nsd->link_xon_tx);
1072 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
1073 pf->stat_offsets_loaded,
1074 &osd->link_xoff_rx, &nsd->link_xoff_rx);
1075 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1076 pf->stat_offsets_loaded,
1077 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1079 for (i = 0; i < 8; i++) {
1080 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
1081 pf->stat_offsets_loaded,
1082 &osd->priority_xoff_rx[i],
1083 &nsd->priority_xoff_rx[i]);
1084 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1085 pf->stat_offsets_loaded,
1086 &osd->priority_xon_rx[i],
1087 &nsd->priority_xon_rx[i]);
1088 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1089 pf->stat_offsets_loaded,
1090 &osd->priority_xon_tx[i],
1091 &nsd->priority_xon_tx[i]);
1092 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1093 pf->stat_offsets_loaded,
1094 &osd->priority_xoff_tx[i],
1095 &nsd->priority_xoff_tx[i]);
1096 i40e_stat_update32(hw,
1097 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1098 pf->stat_offsets_loaded,
1099 &osd->priority_xon_2_xoff[i],
1100 &nsd->priority_xon_2_xoff[i]);
1103 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1104 I40E_GLPRT_PRC64L(hw->port),
1105 pf->stat_offsets_loaded,
1106 &osd->rx_size_64, &nsd->rx_size_64);
1107 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1108 I40E_GLPRT_PRC127L(hw->port),
1109 pf->stat_offsets_loaded,
1110 &osd->rx_size_127, &nsd->rx_size_127);
1111 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1112 I40E_GLPRT_PRC255L(hw->port),
1113 pf->stat_offsets_loaded,
1114 &osd->rx_size_255, &nsd->rx_size_255);
1115 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1116 I40E_GLPRT_PRC511L(hw->port),
1117 pf->stat_offsets_loaded,
1118 &osd->rx_size_511, &nsd->rx_size_511);
1119 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1120 I40E_GLPRT_PRC1023L(hw->port),
1121 pf->stat_offsets_loaded,
1122 &osd->rx_size_1023, &nsd->rx_size_1023);
1123 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1124 I40E_GLPRT_PRC1522L(hw->port),
1125 pf->stat_offsets_loaded,
1126 &osd->rx_size_1522, &nsd->rx_size_1522);
1127 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1128 I40E_GLPRT_PRC9522L(hw->port),
1129 pf->stat_offsets_loaded,
1130 &osd->rx_size_big, &nsd->rx_size_big);
1132 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1133 I40E_GLPRT_PTC64L(hw->port),
1134 pf->stat_offsets_loaded,
1135 &osd->tx_size_64, &nsd->tx_size_64);
1136 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1137 I40E_GLPRT_PTC127L(hw->port),
1138 pf->stat_offsets_loaded,
1139 &osd->tx_size_127, &nsd->tx_size_127);
1140 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1141 I40E_GLPRT_PTC255L(hw->port),
1142 pf->stat_offsets_loaded,
1143 &osd->tx_size_255, &nsd->tx_size_255);
1144 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1145 I40E_GLPRT_PTC511L(hw->port),
1146 pf->stat_offsets_loaded,
1147 &osd->tx_size_511, &nsd->tx_size_511);
1148 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1149 I40E_GLPRT_PTC1023L(hw->port),
1150 pf->stat_offsets_loaded,
1151 &osd->tx_size_1023, &nsd->tx_size_1023);
1152 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1153 I40E_GLPRT_PTC1522L(hw->port),
1154 pf->stat_offsets_loaded,
1155 &osd->tx_size_1522, &nsd->tx_size_1522);
1156 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1157 I40E_GLPRT_PTC9522L(hw->port),
1158 pf->stat_offsets_loaded,
1159 &osd->tx_size_big, &nsd->tx_size_big);
1161 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1162 pf->stat_offsets_loaded,
1163 &osd->rx_undersize, &nsd->rx_undersize);
1164 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1165 pf->stat_offsets_loaded,
1166 &osd->rx_fragments, &nsd->rx_fragments);
1167 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1168 pf->stat_offsets_loaded,
1169 &osd->rx_oversize, &nsd->rx_oversize);
1170 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1171 pf->stat_offsets_loaded,
1172 &osd->rx_jabber, &nsd->rx_jabber);
1175 i40e_stat_update_and_clear32(hw,
1176 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1177 &nsd->fd_atr_match);
1178 i40e_stat_update_and_clear32(hw,
1179 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1181 i40e_stat_update_and_clear32(hw,
1182 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1183 &nsd->fd_atr_tunnel_match);
1185 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1186 nsd->tx_lpi_status =
1187 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1188 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1189 nsd->rx_lpi_status =
1190 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1191 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1192 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1193 pf->stat_offsets_loaded,
1194 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1195 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1196 pf->stat_offsets_loaded,
1197 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1199 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1200 !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1201 nsd->fd_sb_status = true;
1203 nsd->fd_sb_status = false;
1205 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1206 !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1207 nsd->fd_atr_status = true;
1209 nsd->fd_atr_status = false;
1211 pf->stat_offsets_loaded = true;
1215 * i40e_update_stats - Update the various statistics counters.
1216 * @vsi: the VSI to be updated
1218 * Update the various stats for this VSI and its related entities.
1220 void i40e_update_stats(struct i40e_vsi *vsi)
1222 struct i40e_pf *pf = vsi->back;
1224 if (vsi == pf->vsi[pf->lan_vsi])
1225 i40e_update_pf_stats(pf);
1227 i40e_update_vsi_stats(vsi);
1231 * i40e_count_filters - counts VSI mac filters
1232 * @vsi: the VSI to be searched
1234 * Returns count of mac filters
1236 int i40e_count_filters(struct i40e_vsi *vsi)
1238 struct i40e_mac_filter *f;
1239 struct hlist_node *h;
1243 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
1250 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1251 * @vsi: the VSI to be searched
1252 * @macaddr: the MAC address
1255 * Returns ptr to the filter object or NULL
1257 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1258 const u8 *macaddr, s16 vlan)
1260 struct i40e_mac_filter *f;
1263 if (!vsi || !macaddr)
1266 key = i40e_addr_to_hkey(macaddr);
1267 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1268 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1276 * i40e_find_mac - Find a mac addr in the macvlan filters list
1277 * @vsi: the VSI to be searched
1278 * @macaddr: the MAC address we are searching for
1280 * Returns the first filter with the provided MAC address or NULL if
1281 * MAC address was not found
1283 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1285 struct i40e_mac_filter *f;
1288 if (!vsi || !macaddr)
1291 key = i40e_addr_to_hkey(macaddr);
1292 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1293 if ((ether_addr_equal(macaddr, f->macaddr)))
1300 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1301 * @vsi: the VSI to be searched
1303 * Returns true if VSI is in vlan mode or false otherwise
1305 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1307 /* If we have a PVID, always operate in VLAN mode */
1311 /* We need to operate in VLAN mode whenever we have any filters with
1312 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1313 * time, incurring search cost repeatedly. However, we can notice two
1316 * 1) the only place where we can gain a VLAN filter is in
1319 * 2) the only place where filters are actually removed is in
1320 * i40e_sync_filters_subtask.
1322 * Thus, we can simply use a boolean value, has_vlan_filters which we
1323 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1324 * we have to perform the full search after deleting filters in
1325 * i40e_sync_filters_subtask, but we already have to search
1326 * filters here and can perform the check at the same time. This
1327 * results in avoiding embedding a loop for VLAN mode inside another
1328 * loop over all the filters, and should maintain correctness as noted
1331 return vsi->has_vlan_filter;
1335 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1336 * @vsi: the VSI to configure
1337 * @tmp_add_list: list of filters ready to be added
1338 * @tmp_del_list: list of filters ready to be deleted
1339 * @vlan_filters: the number of active VLAN filters
1341 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1342 * behave as expected. If we have any active VLAN filters remaining or about
1343 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1344 * so that they only match against untagged traffic. If we no longer have any
1345 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1346 * so that they match against both tagged and untagged traffic. In this way,
1347 * we ensure that we correctly receive the desired traffic. This ensures that
1348 * when we have an active VLAN we will receive only untagged traffic and
1349 * traffic matching active VLANs. If we have no active VLANs then we will
1350 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1352 * Finally, in a similar fashion, this function also corrects filters when
1353 * there is an active PVID assigned to this VSI.
1355 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1357 * This function is only expected to be called from within
1358 * i40e_sync_vsi_filters.
1360 * NOTE: This function expects to be called while under the
1361 * mac_filter_hash_lock
1363 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1364 struct hlist_head *tmp_add_list,
1365 struct hlist_head *tmp_del_list,
1368 s16 pvid = le16_to_cpu(vsi->info.pvid);
1369 struct i40e_mac_filter *f, *add_head;
1370 struct i40e_new_mac_filter *new;
1371 struct hlist_node *h;
1374 /* To determine if a particular filter needs to be replaced we
1375 * have the three following conditions:
1377 * a) if we have a PVID assigned, then all filters which are
1378 * not marked as VLAN=PVID must be replaced with filters that
1380 * b) otherwise, if we have any active VLANS, all filters
1381 * which are marked as VLAN=-1 must be replaced with
1382 * filters marked as VLAN=0
1383 * c) finally, if we do not have any active VLANS, all filters
1384 * which are marked as VLAN=0 must be replaced with filters
1388 /* Update the filters about to be added in place */
1389 hlist_for_each_entry(new, tmp_add_list, hlist) {
1390 if (pvid && new->f->vlan != pvid)
1391 new->f->vlan = pvid;
1392 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1394 else if (!vlan_filters && new->f->vlan == 0)
1395 new->f->vlan = I40E_VLAN_ANY;
1398 /* Update the remaining active filters */
1399 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1400 /* Combine the checks for whether a filter needs to be changed
1401 * and then determine the new VLAN inside the if block, in
1402 * order to avoid duplicating code for adding the new filter
1403 * then deleting the old filter.
1405 if ((pvid && f->vlan != pvid) ||
1406 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1407 (!vlan_filters && f->vlan == 0)) {
1408 /* Determine the new vlan we will be adding */
1411 else if (vlan_filters)
1414 new_vlan = I40E_VLAN_ANY;
1416 /* Create the new filter */
1417 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1421 /* Create a temporary i40e_new_mac_filter */
1422 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1427 new->state = add_head->state;
1429 /* Add the new filter to the tmp list */
1430 hlist_add_head(&new->hlist, tmp_add_list);
1432 /* Put the original filter into the delete list */
1433 f->state = I40E_FILTER_REMOVE;
1434 hash_del(&f->hlist);
1435 hlist_add_head(&f->hlist, tmp_del_list);
1439 vsi->has_vlan_filter = !!vlan_filters;
1445 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1446 * @vsi: the PF Main VSI - inappropriate for any other VSI
1447 * @macaddr: the MAC address
1449 * Remove whatever filter the firmware set up so the driver can manage
1450 * its own filtering intelligently.
1452 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1454 struct i40e_aqc_remove_macvlan_element_data element;
1455 struct i40e_pf *pf = vsi->back;
1457 /* Only appropriate for the PF main VSI */
1458 if (vsi->type != I40E_VSI_MAIN)
1461 memset(&element, 0, sizeof(element));
1462 ether_addr_copy(element.mac_addr, macaddr);
1463 element.vlan_tag = 0;
1464 /* Ignore error returns, some firmware does it this way... */
1465 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1466 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1468 memset(&element, 0, sizeof(element));
1469 ether_addr_copy(element.mac_addr, macaddr);
1470 element.vlan_tag = 0;
1471 /* ...and some firmware does it this way. */
1472 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1473 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1474 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1478 * i40e_add_filter - Add a mac/vlan filter to the VSI
1479 * @vsi: the VSI to be searched
1480 * @macaddr: the MAC address
1483 * Returns ptr to the filter object or NULL when no memory available.
1485 * NOTE: This function is expected to be called with mac_filter_hash_lock
1488 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1489 const u8 *macaddr, s16 vlan)
1491 struct i40e_mac_filter *f;
1494 if (!vsi || !macaddr)
1497 f = i40e_find_filter(vsi, macaddr, vlan);
1499 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1503 /* Update the boolean indicating if we need to function in
1507 vsi->has_vlan_filter = true;
1509 ether_addr_copy(f->macaddr, macaddr);
1511 f->state = I40E_FILTER_NEW;
1512 INIT_HLIST_NODE(&f->hlist);
1514 key = i40e_addr_to_hkey(macaddr);
1515 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1517 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1518 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1521 /* If we're asked to add a filter that has been marked for removal, it
1522 * is safe to simply restore it to active state. __i40e_del_filter
1523 * will have simply deleted any filters which were previously marked
1524 * NEW or FAILED, so if it is currently marked REMOVE it must have
1525 * previously been ACTIVE. Since we haven't yet run the sync filters
1526 * task, just restore this filter to the ACTIVE state so that the
1527 * sync task leaves it in place
1529 if (f->state == I40E_FILTER_REMOVE)
1530 f->state = I40E_FILTER_ACTIVE;
1536 * __i40e_del_filter - Remove a specific filter from the VSI
1537 * @vsi: VSI to remove from
1538 * @f: the filter to remove from the list
1540 * This function should be called instead of i40e_del_filter only if you know
1541 * the exact filter you will remove already, such as via i40e_find_filter or
1544 * NOTE: This function is expected to be called with mac_filter_hash_lock
1546 * ANOTHER NOTE: This function MUST be called from within the context of
1547 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1548 * instead of list_for_each_entry().
1550 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1555 /* If the filter was never added to firmware then we can just delete it
1556 * directly and we don't want to set the status to remove or else an
1557 * admin queue command will unnecessarily fire.
1559 if ((f->state == I40E_FILTER_FAILED) ||
1560 (f->state == I40E_FILTER_NEW)) {
1561 hash_del(&f->hlist);
1564 f->state = I40E_FILTER_REMOVE;
1567 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1568 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1572 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1573 * @vsi: the VSI to be searched
1574 * @macaddr: the MAC address
1577 * NOTE: This function is expected to be called with mac_filter_hash_lock
1579 * ANOTHER NOTE: This function MUST be called from within the context of
1580 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1581 * instead of list_for_each_entry().
1583 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1585 struct i40e_mac_filter *f;
1587 if (!vsi || !macaddr)
1590 f = i40e_find_filter(vsi, macaddr, vlan);
1591 __i40e_del_filter(vsi, f);
1595 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1596 * @vsi: the VSI to be searched
1597 * @macaddr: the mac address to be filtered
1599 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1600 * go through all the macvlan filters and add a macvlan filter for each
1601 * unique vlan that already exists. If a PVID has been assigned, instead only
1602 * add the macaddr to that VLAN.
1604 * Returns last filter added on success, else NULL
1606 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1609 struct i40e_mac_filter *f, *add = NULL;
1610 struct hlist_node *h;
1614 return i40e_add_filter(vsi, macaddr,
1615 le16_to_cpu(vsi->info.pvid));
1617 if (!i40e_is_vsi_in_vlan(vsi))
1618 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1620 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1621 if (f->state == I40E_FILTER_REMOVE)
1623 add = i40e_add_filter(vsi, macaddr, f->vlan);
1632 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1633 * @vsi: the VSI to be searched
1634 * @macaddr: the mac address to be removed
1636 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1639 * Returns 0 for success, or error
1641 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1643 struct i40e_mac_filter *f;
1644 struct hlist_node *h;
1648 lockdep_assert_held(&vsi->mac_filter_hash_lock);
1649 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1650 if (ether_addr_equal(macaddr, f->macaddr)) {
1651 __i40e_del_filter(vsi, f);
1663 * i40e_set_mac - NDO callback to set mac address
1664 * @netdev: network interface device structure
1665 * @p: pointer to an address structure
1667 * Returns 0 on success, negative on failure
1669 static int i40e_set_mac(struct net_device *netdev, void *p)
1671 struct i40e_netdev_priv *np = netdev_priv(netdev);
1672 struct i40e_vsi *vsi = np->vsi;
1673 struct i40e_pf *pf = vsi->back;
1674 struct i40e_hw *hw = &pf->hw;
1675 struct sockaddr *addr = p;
1677 if (!is_valid_ether_addr(addr->sa_data))
1678 return -EADDRNOTAVAIL;
1680 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1681 netdev_info(netdev, "already using mac address %pM\n",
1686 if (test_bit(__I40E_DOWN, pf->state) ||
1687 test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1688 return -EADDRNOTAVAIL;
1690 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1691 netdev_info(netdev, "returning to hw mac address %pM\n",
1694 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1696 /* Copy the address first, so that we avoid a possible race with
1698 * - Remove old address from MAC filter
1699 * - Copy new address
1700 * - Add new address to MAC filter
1702 spin_lock_bh(&vsi->mac_filter_hash_lock);
1703 i40e_del_mac_filter(vsi, netdev->dev_addr);
1704 eth_hw_addr_set(netdev, addr->sa_data);
1705 i40e_add_mac_filter(vsi, netdev->dev_addr);
1706 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1708 if (vsi->type == I40E_VSI_MAIN) {
1711 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL,
1712 addr->sa_data, NULL);
1714 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1715 i40e_stat_str(hw, ret),
1716 i40e_aq_str(hw, hw->aq.asq_last_status));
1719 /* schedule our worker thread which will take care of
1720 * applying the new filter changes
1722 i40e_service_event_schedule(pf);
1727 * i40e_config_rss_aq - Prepare for RSS using AQ commands
1728 * @vsi: vsi structure
1729 * @seed: RSS hash seed
1730 * @lut: pointer to lookup table of lut_size
1731 * @lut_size: size of the lookup table
1733 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1734 u8 *lut, u16 lut_size)
1736 struct i40e_pf *pf = vsi->back;
1737 struct i40e_hw *hw = &pf->hw;
1741 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1742 (struct i40e_aqc_get_set_rss_key_data *)seed;
1743 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
1745 dev_info(&pf->pdev->dev,
1746 "Cannot set RSS key, err %s aq_err %s\n",
1747 i40e_stat_str(hw, ret),
1748 i40e_aq_str(hw, hw->aq.asq_last_status));
1753 bool pf_lut = vsi->type == I40E_VSI_MAIN;
1755 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1757 dev_info(&pf->pdev->dev,
1758 "Cannot set RSS lut, err %s aq_err %s\n",
1759 i40e_stat_str(hw, ret),
1760 i40e_aq_str(hw, hw->aq.asq_last_status));
1768 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1769 * @vsi: VSI structure
1771 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1773 struct i40e_pf *pf = vsi->back;
1774 u8 seed[I40E_HKEY_ARRAY_SIZE];
1778 if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))
1781 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1782 vsi->num_queue_pairs);
1785 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1789 /* Use the user configured hash keys and lookup table if there is one,
1790 * otherwise use default
1792 if (vsi->rss_lut_user)
1793 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1795 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
1796 if (vsi->rss_hkey_user)
1797 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1799 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
1800 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
1806 * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1807 * @vsi: the VSI being configured,
1808 * @ctxt: VSI context structure
1809 * @enabled_tc: number of traffic classes to enable
1811 * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1813 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1814 struct i40e_vsi_context *ctxt,
1817 u16 qcount = 0, max_qcount, qmap, sections = 0;
1818 int i, override_q, pow, num_qps, ret;
1819 u8 netdev_tc = 0, offset = 0;
1821 if (vsi->type != I40E_VSI_MAIN)
1823 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1824 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1825 vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1826 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1827 num_qps = vsi->mqprio_qopt.qopt.count[0];
1829 /* find the next higher power-of-2 of num queue pairs */
1830 pow = ilog2(num_qps);
1831 if (!is_power_of_2(num_qps))
1833 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1834 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1836 /* Setup queue offset/count for all TCs for given VSI */
1837 max_qcount = vsi->mqprio_qopt.qopt.count[0];
1838 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1839 /* See if the given TC is enabled for the given VSI */
1840 if (vsi->tc_config.enabled_tc & BIT(i)) {
1841 offset = vsi->mqprio_qopt.qopt.offset[i];
1842 qcount = vsi->mqprio_qopt.qopt.count[i];
1843 if (qcount > max_qcount)
1844 max_qcount = qcount;
1845 vsi->tc_config.tc_info[i].qoffset = offset;
1846 vsi->tc_config.tc_info[i].qcount = qcount;
1847 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1849 /* TC is not enabled so set the offset to
1850 * default queue and allocate one queue
1853 vsi->tc_config.tc_info[i].qoffset = 0;
1854 vsi->tc_config.tc_info[i].qcount = 1;
1855 vsi->tc_config.tc_info[i].netdev_tc = 0;
1859 /* Set actual Tx/Rx queue pairs */
1860 vsi->num_queue_pairs = offset + qcount;
1862 /* Setup queue TC[0].qmap for given VSI context */
1863 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1864 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1865 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1866 ctxt->info.valid_sections |= cpu_to_le16(sections);
1868 /* Reconfigure RSS for main VSI with max queue count */
1869 vsi->rss_size = max_qcount;
1870 ret = i40e_vsi_config_rss(vsi);
1872 dev_info(&vsi->back->pdev->dev,
1873 "Failed to reconfig rss for num_queues (%u)\n",
1877 vsi->reconfig_rss = true;
1878 dev_dbg(&vsi->back->pdev->dev,
1879 "Reconfigured rss with num_queues (%u)\n", max_qcount);
1881 /* Find queue count available for channel VSIs and starting offset
1884 override_q = vsi->mqprio_qopt.qopt.count[0];
1885 if (override_q && override_q < vsi->num_queue_pairs) {
1886 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
1887 vsi->next_base_queue = override_q;
1893 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1894 * @vsi: the VSI being setup
1895 * @ctxt: VSI context structure
1896 * @enabled_tc: Enabled TCs bitmap
1897 * @is_add: True if called before Add VSI
1899 * Setup VSI queue mapping for enabled traffic classes.
1901 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1902 struct i40e_vsi_context *ctxt,
1906 struct i40e_pf *pf = vsi->back;
1916 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1918 /* zero out queue mapping, it will get updated on the end of the function */
1919 memset(ctxt->info.queue_mapping, 0, sizeof(ctxt->info.queue_mapping));
1921 if (vsi->type == I40E_VSI_MAIN) {
1922 /* This code helps add more queue to the VSI if we have
1923 * more cores than RSS can support, the higher cores will
1924 * be served by ATR or other filters. Furthermore, the
1925 * non-zero req_queue_pairs says that user requested a new
1926 * queue count via ethtool's set_channels, so use this
1927 * value for queues distribution across traffic classes
1928 * We need at least one queue pair for the interface
1929 * to be usable as we see in else statement.
1931 if (vsi->req_queue_pairs > 0)
1932 vsi->num_queue_pairs = vsi->req_queue_pairs;
1933 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1934 vsi->num_queue_pairs = pf->num_lan_msix;
1936 vsi->num_queue_pairs = 1;
1939 /* Number of queues per enabled TC */
1940 if (vsi->type == I40E_VSI_MAIN ||
1941 (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs != 0))
1942 num_tc_qps = vsi->num_queue_pairs;
1944 num_tc_qps = vsi->alloc_queue_pairs;
1946 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1947 /* Find numtc from enabled TC bitmap */
1948 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1949 if (enabled_tc & BIT(i)) /* TC is enabled */
1953 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1956 num_tc_qps = num_tc_qps / numtc;
1957 num_tc_qps = min_t(int, num_tc_qps,
1958 i40e_pf_get_max_q_per_tc(pf));
1961 vsi->tc_config.numtc = numtc;
1962 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1964 /* Do not allow use more TC queue pairs than MSI-X vectors exist */
1965 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1966 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
1968 /* Setup queue offset/count for all TCs for given VSI */
1969 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1970 /* See if the given TC is enabled for the given VSI */
1971 if (vsi->tc_config.enabled_tc & BIT(i)) {
1975 switch (vsi->type) {
1977 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED |
1978 I40E_FLAG_FD_ATR_ENABLED)) ||
1979 vsi->tc_config.enabled_tc != 1) {
1980 qcount = min_t(int, pf->alloc_rss_size,
1986 case I40E_VSI_SRIOV:
1987 case I40E_VSI_VMDQ2:
1989 qcount = num_tc_qps;
1993 vsi->tc_config.tc_info[i].qoffset = offset;
1994 vsi->tc_config.tc_info[i].qcount = qcount;
1996 /* find the next higher power-of-2 of num queue pairs */
1999 while (num_qps && (BIT_ULL(pow) < qcount)) {
2004 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
2006 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
2007 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
2011 /* TC is not enabled so set the offset to
2012 * default queue and allocate one queue
2015 vsi->tc_config.tc_info[i].qoffset = 0;
2016 vsi->tc_config.tc_info[i].qcount = 1;
2017 vsi->tc_config.tc_info[i].netdev_tc = 0;
2021 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
2023 /* Do not change previously set num_queue_pairs for PFs and VFs*/
2024 if ((vsi->type == I40E_VSI_MAIN && numtc != 1) ||
2025 (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs == 0) ||
2026 (vsi->type != I40E_VSI_MAIN && vsi->type != I40E_VSI_SRIOV))
2027 vsi->num_queue_pairs = offset;
2029 /* Scheduler section valid can only be set for ADD VSI */
2031 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
2033 ctxt->info.up_enable_bits = enabled_tc;
2035 if (vsi->type == I40E_VSI_SRIOV) {
2036 ctxt->info.mapping_flags |=
2037 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
2038 for (i = 0; i < vsi->num_queue_pairs; i++)
2039 ctxt->info.queue_mapping[i] =
2040 cpu_to_le16(vsi->base_queue + i);
2042 ctxt->info.mapping_flags |=
2043 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
2044 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
2046 ctxt->info.valid_sections |= cpu_to_le16(sections);
2050 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
2051 * @netdev: the netdevice
2052 * @addr: address to add
2054 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
2055 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2057 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
2059 struct i40e_netdev_priv *np = netdev_priv(netdev);
2060 struct i40e_vsi *vsi = np->vsi;
2062 if (i40e_add_mac_filter(vsi, addr))
2069 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
2070 * @netdev: the netdevice
2071 * @addr: address to add
2073 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
2074 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2076 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
2078 struct i40e_netdev_priv *np = netdev_priv(netdev);
2079 struct i40e_vsi *vsi = np->vsi;
2081 /* Under some circumstances, we might receive a request to delete
2082 * our own device address from our uc list. Because we store the
2083 * device address in the VSI's MAC/VLAN filter list, we need to ignore
2084 * such requests and not delete our device address from this list.
2086 if (ether_addr_equal(addr, netdev->dev_addr))
2089 i40e_del_mac_filter(vsi, addr);
2095 * i40e_set_rx_mode - NDO callback to set the netdev filters
2096 * @netdev: network interface device structure
2098 static void i40e_set_rx_mode(struct net_device *netdev)
2100 struct i40e_netdev_priv *np = netdev_priv(netdev);
2101 struct i40e_vsi *vsi = np->vsi;
2103 spin_lock_bh(&vsi->mac_filter_hash_lock);
2105 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
2106 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
2108 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2110 /* check for other flag changes */
2111 if (vsi->current_netdev_flags != vsi->netdev->flags) {
2112 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2113 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
2118 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
2119 * @vsi: Pointer to VSI struct
2120 * @from: Pointer to list which contains MAC filter entries - changes to
2121 * those entries needs to be undone.
2123 * MAC filter entries from this list were slated for deletion.
2125 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
2126 struct hlist_head *from)
2128 struct i40e_mac_filter *f;
2129 struct hlist_node *h;
2131 hlist_for_each_entry_safe(f, h, from, hlist) {
2132 u64 key = i40e_addr_to_hkey(f->macaddr);
2134 /* Move the element back into MAC filter list*/
2135 hlist_del(&f->hlist);
2136 hash_add(vsi->mac_filter_hash, &f->hlist, key);
2141 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
2142 * @vsi: Pointer to vsi struct
2143 * @from: Pointer to list which contains MAC filter entries - changes to
2144 * those entries needs to be undone.
2146 * MAC filter entries from this list were slated for addition.
2148 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
2149 struct hlist_head *from)
2151 struct i40e_new_mac_filter *new;
2152 struct hlist_node *h;
2154 hlist_for_each_entry_safe(new, h, from, hlist) {
2155 /* We can simply free the wrapper structure */
2156 hlist_del(&new->hlist);
2157 netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
2163 * i40e_next_filter - Get the next non-broadcast filter from a list
2164 * @next: pointer to filter in list
2166 * Returns the next non-broadcast filter in the list. Required so that we
2167 * ignore broadcast filters within the list, since these are not handled via
2168 * the normal firmware update path.
2171 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2173 hlist_for_each_entry_continue(next, hlist) {
2174 if (!is_broadcast_ether_addr(next->f->macaddr))
2182 * i40e_update_filter_state - Update filter state based on return data
2184 * @count: Number of filters added
2185 * @add_list: return data from fw
2186 * @add_head: pointer to first filter in current batch
2188 * MAC filter entries from list were slated to be added to device. Returns
2189 * number of successful filters. Note that 0 does NOT mean success!
2192 i40e_update_filter_state(int count,
2193 struct i40e_aqc_add_macvlan_element_data *add_list,
2194 struct i40e_new_mac_filter *add_head)
2199 for (i = 0; i < count; i++) {
2200 /* Always check status of each filter. We don't need to check
2201 * the firmware return status because we pre-set the filter
2202 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2203 * request to the adminq. Thus, if it no longer matches then
2204 * we know the filter is active.
2206 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2207 add_head->state = I40E_FILTER_FAILED;
2209 add_head->state = I40E_FILTER_ACTIVE;
2213 add_head = i40e_next_filter(add_head);
2222 * i40e_aqc_del_filters - Request firmware to delete a set of filters
2223 * @vsi: ptr to the VSI
2224 * @vsi_name: name to display in messages
2225 * @list: the list of filters to send to firmware
2226 * @num_del: the number of filters to delete
2227 * @retval: Set to -EIO on failure to delete
2229 * Send a request to firmware via AdminQ to delete a set of filters. Uses
2230 * *retval instead of a return value so that success does not force ret_val to
2231 * be set to 0. This ensures that a sequence of calls to this function
2232 * preserve the previous value of *retval on successful delete.
2235 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2236 struct i40e_aqc_remove_macvlan_element_data *list,
2237 int num_del, int *retval)
2239 struct i40e_hw *hw = &vsi->back->hw;
2240 enum i40e_admin_queue_err aq_status;
2243 aq_ret = i40e_aq_remove_macvlan_v2(hw, vsi->seid, list, num_del, NULL,
2246 /* Explicitly ignore and do not report when firmware returns ENOENT */
2247 if (aq_ret && !(aq_status == I40E_AQ_RC_ENOENT)) {
2249 dev_info(&vsi->back->pdev->dev,
2250 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
2251 vsi_name, i40e_stat_str(hw, aq_ret),
2252 i40e_aq_str(hw, aq_status));
2257 * i40e_aqc_add_filters - Request firmware to add a set of filters
2258 * @vsi: ptr to the VSI
2259 * @vsi_name: name to display in messages
2260 * @list: the list of filters to send to firmware
2261 * @add_head: Position in the add hlist
2262 * @num_add: the number of filters to add
2264 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2265 * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2266 * space for more filters.
2269 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2270 struct i40e_aqc_add_macvlan_element_data *list,
2271 struct i40e_new_mac_filter *add_head,
2274 struct i40e_hw *hw = &vsi->back->hw;
2275 enum i40e_admin_queue_err aq_status;
2278 i40e_aq_add_macvlan_v2(hw, vsi->seid, list, num_add, NULL, &aq_status);
2279 fcnt = i40e_update_filter_state(num_add, list, add_head);
2281 if (fcnt != num_add) {
2282 if (vsi->type == I40E_VSI_MAIN) {
2283 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2284 dev_warn(&vsi->back->pdev->dev,
2285 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2286 i40e_aq_str(hw, aq_status), vsi_name);
2287 } else if (vsi->type == I40E_VSI_SRIOV ||
2288 vsi->type == I40E_VSI_VMDQ1 ||
2289 vsi->type == I40E_VSI_VMDQ2) {
2290 dev_warn(&vsi->back->pdev->dev,
2291 "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n",
2292 i40e_aq_str(hw, aq_status), vsi_name,
2295 dev_warn(&vsi->back->pdev->dev,
2296 "Error %s adding RX filters on %s, incorrect VSI type: %i.\n",
2297 i40e_aq_str(hw, aq_status), vsi_name,
2304 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2305 * @vsi: pointer to the VSI
2306 * @vsi_name: the VSI name
2309 * This function sets or clears the promiscuous broadcast flags for VLAN
2310 * filters in order to properly receive broadcast frames. Assumes that only
2311 * broadcast filters are passed.
2313 * Returns status indicating success or failure;
2316 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2317 struct i40e_mac_filter *f)
2319 bool enable = f->state == I40E_FILTER_NEW;
2320 struct i40e_hw *hw = &vsi->back->hw;
2323 if (f->vlan == I40E_VLAN_ANY) {
2324 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2329 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2337 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2338 dev_warn(&vsi->back->pdev->dev,
2339 "Error %s, forcing overflow promiscuous on %s\n",
2340 i40e_aq_str(hw, hw->aq.asq_last_status),
2348 * i40e_set_promiscuous - set promiscuous mode
2349 * @pf: board private structure
2350 * @promisc: promisc on or off
2352 * There are different ways of setting promiscuous mode on a PF depending on
2353 * what state/environment we're in. This identifies and sets it appropriately.
2354 * Returns 0 on success.
2356 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2358 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2359 struct i40e_hw *hw = &pf->hw;
2362 if (vsi->type == I40E_VSI_MAIN &&
2363 pf->lan_veb != I40E_NO_VEB &&
2364 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2365 /* set defport ON for Main VSI instead of true promisc
2366 * this way we will get all unicast/multicast and VLAN
2367 * promisc behavior but will not get VF or VMDq traffic
2368 * replicated on the Main VSI.
2371 aq_ret = i40e_aq_set_default_vsi(hw,
2375 aq_ret = i40e_aq_clear_default_vsi(hw,
2379 dev_info(&pf->pdev->dev,
2380 "Set default VSI failed, err %s, aq_err %s\n",
2381 i40e_stat_str(hw, aq_ret),
2382 i40e_aq_str(hw, hw->aq.asq_last_status));
2385 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2391 dev_info(&pf->pdev->dev,
2392 "set unicast promisc failed, err %s, aq_err %s\n",
2393 i40e_stat_str(hw, aq_ret),
2394 i40e_aq_str(hw, hw->aq.asq_last_status));
2396 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2401 dev_info(&pf->pdev->dev,
2402 "set multicast promisc failed, err %s, aq_err %s\n",
2403 i40e_stat_str(hw, aq_ret),
2404 i40e_aq_str(hw, hw->aq.asq_last_status));
2409 pf->cur_promisc = promisc;
2415 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2416 * @vsi: ptr to the VSI
2418 * Push any outstanding VSI filter changes through the AdminQ.
2420 * Returns 0 or error value
2422 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2424 struct hlist_head tmp_add_list, tmp_del_list;
2425 struct i40e_mac_filter *f;
2426 struct i40e_new_mac_filter *new, *add_head = NULL;
2427 struct i40e_hw *hw = &vsi->back->hw;
2428 bool old_overflow, new_overflow;
2429 unsigned int failed_filters = 0;
2430 unsigned int vlan_filters = 0;
2431 char vsi_name[16] = "PF";
2432 int filter_list_len = 0;
2433 i40e_status aq_ret = 0;
2434 u32 changed_flags = 0;
2435 struct hlist_node *h;
2444 /* empty array typed pointers, kcalloc later */
2445 struct i40e_aqc_add_macvlan_element_data *add_list;
2446 struct i40e_aqc_remove_macvlan_element_data *del_list;
2448 while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state))
2449 usleep_range(1000, 2000);
2452 old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2455 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2456 vsi->current_netdev_flags = vsi->netdev->flags;
2459 INIT_HLIST_HEAD(&tmp_add_list);
2460 INIT_HLIST_HEAD(&tmp_del_list);
2462 if (vsi->type == I40E_VSI_SRIOV)
2463 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2464 else if (vsi->type != I40E_VSI_MAIN)
2465 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2467 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2468 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2470 spin_lock_bh(&vsi->mac_filter_hash_lock);
2471 /* Create a list of filters to delete. */
2472 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2473 if (f->state == I40E_FILTER_REMOVE) {
2474 /* Move the element into temporary del_list */
2475 hash_del(&f->hlist);
2476 hlist_add_head(&f->hlist, &tmp_del_list);
2478 /* Avoid counting removed filters */
2481 if (f->state == I40E_FILTER_NEW) {
2482 /* Create a temporary i40e_new_mac_filter */
2483 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2485 goto err_no_memory_locked;
2487 /* Store pointer to the real filter */
2489 new->state = f->state;
2491 /* Add it to the hash list */
2492 hlist_add_head(&new->hlist, &tmp_add_list);
2495 /* Count the number of active (current and new) VLAN
2496 * filters we have now. Does not count filters which
2497 * are marked for deletion.
2503 retval = i40e_correct_mac_vlan_filters(vsi,
2508 hlist_for_each_entry(new, &tmp_add_list, hlist)
2509 netdev_hw_addr_refcnt(new->f, vsi->netdev, 1);
2512 goto err_no_memory_locked;
2514 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2517 /* Now process 'del_list' outside the lock */
2518 if (!hlist_empty(&tmp_del_list)) {
2519 filter_list_len = hw->aq.asq_buf_size /
2520 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2521 list_size = filter_list_len *
2522 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2523 del_list = kzalloc(list_size, GFP_ATOMIC);
2527 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2530 /* handle broadcast filters by updating the broadcast
2531 * promiscuous flag and release filter list.
2533 if (is_broadcast_ether_addr(f->macaddr)) {
2534 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2536 hlist_del(&f->hlist);
2541 /* add to delete list */
2542 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2543 if (f->vlan == I40E_VLAN_ANY) {
2544 del_list[num_del].vlan_tag = 0;
2545 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2547 del_list[num_del].vlan_tag =
2548 cpu_to_le16((u16)(f->vlan));
2551 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2552 del_list[num_del].flags = cmd_flags;
2555 /* flush a full buffer */
2556 if (num_del == filter_list_len) {
2557 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2559 memset(del_list, 0, list_size);
2562 /* Release memory for MAC filter entries which were
2563 * synced up with HW.
2565 hlist_del(&f->hlist);
2570 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2578 if (!hlist_empty(&tmp_add_list)) {
2579 /* Do all the adds now. */
2580 filter_list_len = hw->aq.asq_buf_size /
2581 sizeof(struct i40e_aqc_add_macvlan_element_data);
2582 list_size = filter_list_len *
2583 sizeof(struct i40e_aqc_add_macvlan_element_data);
2584 add_list = kzalloc(list_size, GFP_ATOMIC);
2589 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2590 /* handle broadcast filters by updating the broadcast
2591 * promiscuous flag instead of adding a MAC filter.
2593 if (is_broadcast_ether_addr(new->f->macaddr)) {
2594 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2596 new->state = I40E_FILTER_FAILED;
2598 new->state = I40E_FILTER_ACTIVE;
2602 /* add to add array */
2606 ether_addr_copy(add_list[num_add].mac_addr,
2608 if (new->f->vlan == I40E_VLAN_ANY) {
2609 add_list[num_add].vlan_tag = 0;
2610 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2612 add_list[num_add].vlan_tag =
2613 cpu_to_le16((u16)(new->f->vlan));
2615 add_list[num_add].queue_number = 0;
2616 /* set invalid match method for later detection */
2617 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2618 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2619 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2622 /* flush a full buffer */
2623 if (num_add == filter_list_len) {
2624 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2626 memset(add_list, 0, list_size);
2631 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2634 /* Now move all of the filters from the temp add list back to
2637 spin_lock_bh(&vsi->mac_filter_hash_lock);
2638 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2639 /* Only update the state if we're still NEW */
2640 if (new->f->state == I40E_FILTER_NEW)
2641 new->f->state = new->state;
2642 hlist_del(&new->hlist);
2643 netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
2646 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2651 /* Determine the number of active and failed filters. */
2652 spin_lock_bh(&vsi->mac_filter_hash_lock);
2653 vsi->active_filters = 0;
2654 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2655 if (f->state == I40E_FILTER_ACTIVE)
2656 vsi->active_filters++;
2657 else if (f->state == I40E_FILTER_FAILED)
2660 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2662 /* Check if we are able to exit overflow promiscuous mode. We can
2663 * safely exit if we didn't just enter, we no longer have any failed
2664 * filters, and we have reduced filters below the threshold value.
2666 if (old_overflow && !failed_filters &&
2667 vsi->active_filters < vsi->promisc_threshold) {
2668 dev_info(&pf->pdev->dev,
2669 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2671 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2672 vsi->promisc_threshold = 0;
2675 /* if the VF is not trusted do not do promisc */
2676 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2677 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2681 new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2683 /* If we are entering overflow promiscuous, we need to calculate a new
2684 * threshold for when we are safe to exit
2686 if (!old_overflow && new_overflow)
2687 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2689 /* check for changes in promiscuous modes */
2690 if (changed_flags & IFF_ALLMULTI) {
2691 bool cur_multipromisc;
2693 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2694 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2699 retval = i40e_aq_rc_to_posix(aq_ret,
2700 hw->aq.asq_last_status);
2701 dev_info(&pf->pdev->dev,
2702 "set multi promisc failed on %s, err %s aq_err %s\n",
2704 i40e_stat_str(hw, aq_ret),
2705 i40e_aq_str(hw, hw->aq.asq_last_status));
2707 dev_info(&pf->pdev->dev, "%s allmulti mode.\n",
2708 cur_multipromisc ? "entering" : "leaving");
2712 if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) {
2715 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2717 aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2719 retval = i40e_aq_rc_to_posix(aq_ret,
2720 hw->aq.asq_last_status);
2721 dev_info(&pf->pdev->dev,
2722 "Setting promiscuous %s failed on %s, err %s aq_err %s\n",
2723 cur_promisc ? "on" : "off",
2725 i40e_stat_str(hw, aq_ret),
2726 i40e_aq_str(hw, hw->aq.asq_last_status));
2730 /* if something went wrong then set the changed flag so we try again */
2732 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2734 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2738 /* Restore elements on the temporary add and delete lists */
2739 spin_lock_bh(&vsi->mac_filter_hash_lock);
2740 err_no_memory_locked:
2741 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2742 i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2743 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2745 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2746 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2751 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2752 * @pf: board private structure
2754 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2760 if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
2762 if (test_bit(__I40E_VF_DISABLE, pf->state)) {
2763 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
2767 for (v = 0; v < pf->num_alloc_vsi; v++) {
2769 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED) &&
2770 !test_bit(__I40E_VSI_RELEASING, pf->vsi[v]->state)) {
2771 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2774 /* come back and try again later */
2775 set_bit(__I40E_MACVLAN_SYNC_PENDING,
2784 * i40e_max_xdp_frame_size - returns the maximum allowed frame size for XDP
2787 static int i40e_max_xdp_frame_size(struct i40e_vsi *vsi)
2789 if (PAGE_SIZE >= 8192 || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
2790 return I40E_RXBUFFER_2048;
2792 return I40E_RXBUFFER_3072;
2796 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2797 * @netdev: network interface device structure
2798 * @new_mtu: new value for maximum frame size
2800 * Returns 0 on success, negative on failure
2802 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2804 struct i40e_netdev_priv *np = netdev_priv(netdev);
2805 struct i40e_vsi *vsi = np->vsi;
2806 struct i40e_pf *pf = vsi->back;
2808 if (i40e_enabled_xdp_vsi(vsi)) {
2809 int frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2811 if (frame_size > i40e_max_xdp_frame_size(vsi))
2815 netdev_dbg(netdev, "changing MTU from %d to %d\n",
2816 netdev->mtu, new_mtu);
2817 netdev->mtu = new_mtu;
2818 if (netif_running(netdev))
2819 i40e_vsi_reinit_locked(vsi);
2820 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
2821 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
2826 * i40e_ioctl - Access the hwtstamp interface
2827 * @netdev: network interface device structure
2828 * @ifr: interface request data
2829 * @cmd: ioctl command
2831 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2833 struct i40e_netdev_priv *np = netdev_priv(netdev);
2834 struct i40e_pf *pf = np->vsi->back;
2838 return i40e_ptp_get_ts_config(pf, ifr);
2840 return i40e_ptp_set_ts_config(pf, ifr);
2847 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2848 * @vsi: the vsi being adjusted
2850 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2852 struct i40e_vsi_context ctxt;
2855 /* Don't modify stripping options if a port VLAN is active */
2859 if ((vsi->info.valid_sections &
2860 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2861 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2862 return; /* already enabled */
2864 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2865 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2866 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2868 ctxt.seid = vsi->seid;
2869 ctxt.info = vsi->info;
2870 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2872 dev_info(&vsi->back->pdev->dev,
2873 "update vlan stripping failed, err %s aq_err %s\n",
2874 i40e_stat_str(&vsi->back->hw, ret),
2875 i40e_aq_str(&vsi->back->hw,
2876 vsi->back->hw.aq.asq_last_status));
2881 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2882 * @vsi: the vsi being adjusted
2884 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2886 struct i40e_vsi_context ctxt;
2889 /* Don't modify stripping options if a port VLAN is active */
2893 if ((vsi->info.valid_sections &
2894 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2895 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2896 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2897 return; /* already disabled */
2899 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2900 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2901 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2903 ctxt.seid = vsi->seid;
2904 ctxt.info = vsi->info;
2905 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2907 dev_info(&vsi->back->pdev->dev,
2908 "update vlan stripping failed, err %s aq_err %s\n",
2909 i40e_stat_str(&vsi->back->hw, ret),
2910 i40e_aq_str(&vsi->back->hw,
2911 vsi->back->hw.aq.asq_last_status));
2916 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2917 * @vsi: the vsi being configured
2918 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2920 * This is a helper function for adding a new MAC/VLAN filter with the
2921 * specified VLAN for each existing MAC address already in the hash table.
2922 * This function does *not* perform any accounting to update filters based on
2925 * NOTE: this function expects to be called while under the
2926 * mac_filter_hash_lock
2928 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2930 struct i40e_mac_filter *f, *add_f;
2931 struct hlist_node *h;
2934 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2935 if (f->state == I40E_FILTER_REMOVE)
2937 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2939 dev_info(&vsi->back->pdev->dev,
2940 "Could not add vlan filter %d for %pM\n",
2950 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2951 * @vsi: the VSI being configured
2952 * @vid: VLAN id to be added
2954 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2961 /* The network stack will attempt to add VID=0, with the intention to
2962 * receive priority tagged packets with a VLAN of 0. Our HW receives
2963 * these packets by default when configured to receive untagged
2964 * packets, so we don't need to add a filter for this case.
2965 * Additionally, HW interprets adding a VID=0 filter as meaning to
2966 * receive *only* tagged traffic and stops receiving untagged traffic.
2967 * Thus, we do not want to actually add a filter for VID=0
2972 /* Locked once because all functions invoked below iterates list*/
2973 spin_lock_bh(&vsi->mac_filter_hash_lock);
2974 err = i40e_add_vlan_all_mac(vsi, vid);
2975 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2979 /* schedule our worker thread which will take care of
2980 * applying the new filter changes
2982 i40e_service_event_schedule(vsi->back);
2987 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2988 * @vsi: the vsi being configured
2989 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2991 * This function should be used to remove all VLAN filters which match the
2992 * given VID. It does not schedule the service event and does not take the
2993 * mac_filter_hash_lock so it may be combined with other operations under
2994 * a single invocation of the mac_filter_hash_lock.
2996 * NOTE: this function expects to be called while under the
2997 * mac_filter_hash_lock
2999 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
3001 struct i40e_mac_filter *f;
3002 struct hlist_node *h;
3005 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
3007 __i40e_del_filter(vsi, f);
3012 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
3013 * @vsi: the VSI being configured
3014 * @vid: VLAN id to be removed
3016 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
3018 if (!vid || vsi->info.pvid)
3021 spin_lock_bh(&vsi->mac_filter_hash_lock);
3022 i40e_rm_vlan_all_mac(vsi, vid);
3023 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3025 /* schedule our worker thread which will take care of
3026 * applying the new filter changes
3028 i40e_service_event_schedule(vsi->back);
3032 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
3033 * @netdev: network interface to be adjusted
3034 * @proto: unused protocol value
3035 * @vid: vlan id to be added
3037 * net_device_ops implementation for adding vlan ids
3039 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
3040 __always_unused __be16 proto, u16 vid)
3042 struct i40e_netdev_priv *np = netdev_priv(netdev);
3043 struct i40e_vsi *vsi = np->vsi;
3046 if (vid >= VLAN_N_VID)
3049 ret = i40e_vsi_add_vlan(vsi, vid);
3051 set_bit(vid, vsi->active_vlans);
3057 * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
3058 * @netdev: network interface to be adjusted
3059 * @proto: unused protocol value
3060 * @vid: vlan id to be added
3062 static void i40e_vlan_rx_add_vid_up(struct net_device *netdev,
3063 __always_unused __be16 proto, u16 vid)
3065 struct i40e_netdev_priv *np = netdev_priv(netdev);
3066 struct i40e_vsi *vsi = np->vsi;
3068 if (vid >= VLAN_N_VID)
3070 set_bit(vid, vsi->active_vlans);
3074 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
3075 * @netdev: network interface to be adjusted
3076 * @proto: unused protocol value
3077 * @vid: vlan id to be removed
3079 * net_device_ops implementation for removing vlan ids
3081 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
3082 __always_unused __be16 proto, u16 vid)
3084 struct i40e_netdev_priv *np = netdev_priv(netdev);
3085 struct i40e_vsi *vsi = np->vsi;
3087 /* return code is ignored as there is nothing a user
3088 * can do about failure to remove and a log message was
3089 * already printed from the other function
3091 i40e_vsi_kill_vlan(vsi, vid);
3093 clear_bit(vid, vsi->active_vlans);
3099 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
3100 * @vsi: the vsi being brought back up
3102 static void i40e_restore_vlan(struct i40e_vsi *vsi)
3109 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3110 i40e_vlan_stripping_enable(vsi);
3112 i40e_vlan_stripping_disable(vsi);
3114 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
3115 i40e_vlan_rx_add_vid_up(vsi->netdev, htons(ETH_P_8021Q),
3120 * i40e_vsi_add_pvid - Add pvid for the VSI
3121 * @vsi: the vsi being adjusted
3122 * @vid: the vlan id to set as a PVID
3124 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
3126 struct i40e_vsi_context ctxt;
3129 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3130 vsi->info.pvid = cpu_to_le16(vid);
3131 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
3132 I40E_AQ_VSI_PVLAN_INSERT_PVID |
3133 I40E_AQ_VSI_PVLAN_EMOD_STR;
3135 ctxt.seid = vsi->seid;
3136 ctxt.info = vsi->info;
3137 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3139 dev_info(&vsi->back->pdev->dev,
3140 "add pvid failed, err %s aq_err %s\n",
3141 i40e_stat_str(&vsi->back->hw, ret),
3142 i40e_aq_str(&vsi->back->hw,
3143 vsi->back->hw.aq.asq_last_status));
3151 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
3152 * @vsi: the vsi being adjusted
3154 * Just use the vlan_rx_register() service to put it back to normal
3156 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
3160 i40e_vlan_stripping_disable(vsi);
3164 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
3165 * @vsi: ptr to the VSI
3167 * If this function returns with an error, then it's possible one or
3168 * more of the rings is populated (while the rest are not). It is the
3169 * callers duty to clean those orphaned rings.
3171 * Return 0 on success, negative on failure
3173 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
3177 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3178 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
3180 if (!i40e_enabled_xdp_vsi(vsi))
3183 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3184 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]);
3190 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
3191 * @vsi: ptr to the VSI
3193 * Free VSI's transmit software resources
3195 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
3199 if (vsi->tx_rings) {
3200 for (i = 0; i < vsi->num_queue_pairs; i++)
3201 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
3202 i40e_free_tx_resources(vsi->tx_rings[i]);
3205 if (vsi->xdp_rings) {
3206 for (i = 0; i < vsi->num_queue_pairs; i++)
3207 if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3208 i40e_free_tx_resources(vsi->xdp_rings[i]);
3213 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3214 * @vsi: ptr to the VSI
3216 * If this function returns with an error, then it's possible one or
3217 * more of the rings is populated (while the rest are not). It is the
3218 * callers duty to clean those orphaned rings.
3220 * Return 0 on success, negative on failure
3222 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3226 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3227 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
3232 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3233 * @vsi: ptr to the VSI
3235 * Free all receive software resources
3237 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3244 for (i = 0; i < vsi->num_queue_pairs; i++)
3245 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3246 i40e_free_rx_resources(vsi->rx_rings[i]);
3250 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3251 * @ring: The Tx ring to configure
3253 * This enables/disables XPS for a given Tx descriptor ring
3254 * based on the TCs enabled for the VSI that ring belongs to.
3256 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3260 if (!ring->q_vector || !ring->netdev || ring->ch)
3263 /* We only initialize XPS once, so as not to overwrite user settings */
3264 if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state))
3267 cpu = cpumask_local_spread(ring->q_vector->v_idx, -1);
3268 netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu),
3273 * i40e_xsk_pool - Retrieve the AF_XDP buffer pool if XDP and ZC is enabled
3274 * @ring: The Tx or Rx ring
3276 * Returns the AF_XDP buffer pool or NULL.
3278 static struct xsk_buff_pool *i40e_xsk_pool(struct i40e_ring *ring)
3280 bool xdp_on = i40e_enabled_xdp_vsi(ring->vsi);
3281 int qid = ring->queue_index;
3283 if (ring_is_xdp(ring))
3284 qid -= ring->vsi->alloc_queue_pairs;
3286 if (!xdp_on || !test_bit(qid, ring->vsi->af_xdp_zc_qps))
3289 return xsk_get_pool_from_qid(ring->vsi->netdev, qid);
3293 * i40e_configure_tx_ring - Configure a transmit ring context and rest
3294 * @ring: The Tx ring to configure
3296 * Configure the Tx descriptor ring in the HMC context.
3298 static int i40e_configure_tx_ring(struct i40e_ring *ring)
3300 struct i40e_vsi *vsi = ring->vsi;
3301 u16 pf_q = vsi->base_queue + ring->queue_index;
3302 struct i40e_hw *hw = &vsi->back->hw;
3303 struct i40e_hmc_obj_txq tx_ctx;
3304 i40e_status err = 0;
3307 if (ring_is_xdp(ring))
3308 ring->xsk_pool = i40e_xsk_pool(ring);
3310 /* some ATR related tx ring init */
3311 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3312 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3313 ring->atr_count = 0;
3315 ring->atr_sample_rate = 0;
3319 i40e_config_xps_tx_ring(ring);
3321 /* clear the context structure first */
3322 memset(&tx_ctx, 0, sizeof(tx_ctx));
3324 tx_ctx.new_context = 1;
3325 tx_ctx.base = (ring->dma / 128);
3326 tx_ctx.qlen = ring->count;
3327 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3328 I40E_FLAG_FD_ATR_ENABLED));
3329 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3330 /* FDIR VSI tx ring can still use RS bit and writebacks */
3331 if (vsi->type != I40E_VSI_FDIR)
3332 tx_ctx.head_wb_ena = 1;
3333 tx_ctx.head_wb_addr = ring->dma +
3334 (ring->count * sizeof(struct i40e_tx_desc));
3336 /* As part of VSI creation/update, FW allocates certain
3337 * Tx arbitration queue sets for each TC enabled for
3338 * the VSI. The FW returns the handles to these queue
3339 * sets as part of the response buffer to Add VSI,
3340 * Update VSI, etc. AQ commands. It is expected that
3341 * these queue set handles be associated with the Tx
3342 * queues by the driver as part of the TX queue context
3343 * initialization. This has to be done regardless of
3344 * DCB as by default everything is mapped to TC0.
3349 le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3352 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3354 tx_ctx.rdylist_act = 0;
3356 /* clear the context in the HMC */
3357 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3359 dev_info(&vsi->back->pdev->dev,
3360 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3361 ring->queue_index, pf_q, err);
3365 /* set the context in the HMC */
3366 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3368 dev_info(&vsi->back->pdev->dev,
3369 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3370 ring->queue_index, pf_q, err);
3374 /* Now associate this queue with this PCI function */
3376 if (ring->ch->type == I40E_VSI_VMDQ2)
3377 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3381 qtx_ctl |= (ring->ch->vsi_number <<
3382 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3383 I40E_QTX_CTL_VFVM_INDX_MASK;
3385 if (vsi->type == I40E_VSI_VMDQ2) {
3386 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3387 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3388 I40E_QTX_CTL_VFVM_INDX_MASK;
3390 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3394 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3395 I40E_QTX_CTL_PF_INDX_MASK);
3396 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3399 /* cache tail off for easier writes later */
3400 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3406 * i40e_rx_offset - Return expected offset into page to access data
3407 * @rx_ring: Ring we are requesting offset of
3409 * Returns the offset value for ring into the data buffer.
3411 static unsigned int i40e_rx_offset(struct i40e_ring *rx_ring)
3413 return ring_uses_build_skb(rx_ring) ? I40E_SKB_PAD : 0;
3417 * i40e_configure_rx_ring - Configure a receive ring context
3418 * @ring: The Rx ring to configure
3420 * Configure the Rx descriptor ring in the HMC context.
3422 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3424 struct i40e_vsi *vsi = ring->vsi;
3425 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3426 u16 pf_q = vsi->base_queue + ring->queue_index;
3427 struct i40e_hw *hw = &vsi->back->hw;
3428 struct i40e_hmc_obj_rxq rx_ctx;
3429 i40e_status err = 0;
3433 bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
3435 /* clear the context structure first */
3436 memset(&rx_ctx, 0, sizeof(rx_ctx));
3438 if (ring->vsi->type == I40E_VSI_MAIN)
3439 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
3442 ring->xsk_pool = i40e_xsk_pool(ring);
3443 if (ring->xsk_pool) {
3444 ret = i40e_alloc_rx_bi_zc(ring);
3448 xsk_pool_get_rx_frame_size(ring->xsk_pool);
3449 /* For AF_XDP ZC, we disallow packets to span on
3450 * multiple buffers, thus letting us skip that
3451 * handling in the fast-path.
3454 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3455 MEM_TYPE_XSK_BUFF_POOL,
3459 dev_info(&vsi->back->pdev->dev,
3460 "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
3464 ret = i40e_alloc_rx_bi(ring);
3467 ring->rx_buf_len = vsi->rx_buf_len;
3468 if (ring->vsi->type == I40E_VSI_MAIN) {
3469 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3470 MEM_TYPE_PAGE_SHARED,
3477 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3478 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3480 rx_ctx.base = (ring->dma / 128);
3481 rx_ctx.qlen = ring->count;
3483 /* use 16 byte descriptors */
3486 /* descriptor type is always zero
3489 rx_ctx.hsplit_0 = 0;
3491 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3492 if (hw->revision_id == 0)
3493 rx_ctx.lrxqthresh = 0;
3495 rx_ctx.lrxqthresh = 1;
3496 rx_ctx.crcstrip = 1;
3498 /* this controls whether VLAN is stripped from inner headers */
3500 /* set the prefena field to 1 because the manual says to */
3503 /* clear the context in the HMC */
3504 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3506 dev_info(&vsi->back->pdev->dev,
3507 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3508 ring->queue_index, pf_q, err);
3512 /* set the context in the HMC */
3513 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3515 dev_info(&vsi->back->pdev->dev,
3516 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3517 ring->queue_index, pf_q, err);
3521 /* configure Rx buffer alignment */
3522 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
3523 clear_ring_build_skb_enabled(ring);
3525 set_ring_build_skb_enabled(ring);
3527 ring->rx_offset = i40e_rx_offset(ring);
3529 /* cache tail for quicker writes, and clear the reg before use */
3530 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3531 writel(0, ring->tail);
3533 if (ring->xsk_pool) {
3534 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq);
3535 ok = i40e_alloc_rx_buffers_zc(ring, I40E_DESC_UNUSED(ring));
3537 ok = !i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3540 /* Log this in case the user has forgotten to give the kernel
3541 * any buffers, even later in the application.
3543 dev_info(&vsi->back->pdev->dev,
3544 "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n",
3545 ring->xsk_pool ? "AF_XDP ZC enabled " : "",
3546 ring->queue_index, pf_q);
3553 * i40e_vsi_configure_tx - Configure the VSI for Tx
3554 * @vsi: VSI structure describing this set of rings and resources
3556 * Configure the Tx VSI for operation.
3558 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3563 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3564 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3566 if (err || !i40e_enabled_xdp_vsi(vsi))
3569 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3570 err = i40e_configure_tx_ring(vsi->xdp_rings[i]);
3576 * i40e_vsi_configure_rx - Configure the VSI for Rx
3577 * @vsi: the VSI being configured
3579 * Configure the Rx VSI for operation.
3581 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3586 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3587 vsi->max_frame = I40E_MAX_RXBUFFER;
3588 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3589 #if (PAGE_SIZE < 8192)
3590 } else if (!I40E_2K_TOO_SMALL_WITH_PADDING &&
3591 (vsi->netdev->mtu <= ETH_DATA_LEN)) {
3592 vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3593 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3596 vsi->max_frame = I40E_MAX_RXBUFFER;
3597 vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 :
3601 /* set up individual rings */
3602 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3603 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3609 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3610 * @vsi: ptr to the VSI
3612 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3614 struct i40e_ring *tx_ring, *rx_ring;
3615 u16 qoffset, qcount;
3618 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3619 /* Reset the TC information */
3620 for (i = 0; i < vsi->num_queue_pairs; i++) {
3621 rx_ring = vsi->rx_rings[i];
3622 tx_ring = vsi->tx_rings[i];
3623 rx_ring->dcb_tc = 0;
3624 tx_ring->dcb_tc = 0;
3629 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3630 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3633 qoffset = vsi->tc_config.tc_info[n].qoffset;
3634 qcount = vsi->tc_config.tc_info[n].qcount;
3635 for (i = qoffset; i < (qoffset + qcount); i++) {
3636 rx_ring = vsi->rx_rings[i];
3637 tx_ring = vsi->tx_rings[i];
3638 rx_ring->dcb_tc = n;
3639 tx_ring->dcb_tc = n;
3645 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3646 * @vsi: ptr to the VSI
3648 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3651 i40e_set_rx_mode(vsi->netdev);
3655 * i40e_reset_fdir_filter_cnt - Reset flow director filter counters
3656 * @pf: Pointer to the targeted PF
3658 * Set all flow director counters to 0.
3660 static void i40e_reset_fdir_filter_cnt(struct i40e_pf *pf)
3662 pf->fd_tcp4_filter_cnt = 0;
3663 pf->fd_udp4_filter_cnt = 0;
3664 pf->fd_sctp4_filter_cnt = 0;
3665 pf->fd_ip4_filter_cnt = 0;
3666 pf->fd_tcp6_filter_cnt = 0;
3667 pf->fd_udp6_filter_cnt = 0;
3668 pf->fd_sctp6_filter_cnt = 0;
3669 pf->fd_ip6_filter_cnt = 0;
3673 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3674 * @vsi: Pointer to the targeted VSI
3676 * This function replays the hlist on the hw where all the SB Flow Director
3677 * filters were saved.
3679 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3681 struct i40e_fdir_filter *filter;
3682 struct i40e_pf *pf = vsi->back;
3683 struct hlist_node *node;
3685 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3688 /* Reset FDir counters as we're replaying all existing filters */
3689 i40e_reset_fdir_filter_cnt(pf);
3691 hlist_for_each_entry_safe(filter, node,
3692 &pf->fdir_filter_list, fdir_node) {
3693 i40e_add_del_fdir(vsi, filter, true);
3698 * i40e_vsi_configure - Set up the VSI for action
3699 * @vsi: the VSI being configured
3701 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3705 i40e_set_vsi_rx_mode(vsi);
3706 i40e_restore_vlan(vsi);
3707 i40e_vsi_config_dcb_rings(vsi);
3708 err = i40e_vsi_configure_tx(vsi);
3710 err = i40e_vsi_configure_rx(vsi);
3716 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3717 * @vsi: the VSI being configured
3719 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3721 bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3722 struct i40e_pf *pf = vsi->back;
3723 struct i40e_hw *hw = &pf->hw;
3728 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3729 * and PFINT_LNKLSTn registers, e.g.:
3730 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3732 qp = vsi->base_queue;
3733 vector = vsi->base_vector;
3734 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3735 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3737 q_vector->rx.next_update = jiffies + 1;
3738 q_vector->rx.target_itr =
3739 ITR_TO_REG(vsi->rx_rings[i]->itr_setting);
3740 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3741 q_vector->rx.target_itr >> 1);
3742 q_vector->rx.current_itr = q_vector->rx.target_itr;
3744 q_vector->tx.next_update = jiffies + 1;
3745 q_vector->tx.target_itr =
3746 ITR_TO_REG(vsi->tx_rings[i]->itr_setting);
3747 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3748 q_vector->tx.target_itr >> 1);
3749 q_vector->tx.current_itr = q_vector->tx.target_itr;
3751 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3752 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3754 /* Linked list for the queuepairs assigned to this vector */
3755 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3756 for (q = 0; q < q_vector->num_ringpairs; q++) {
3757 u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3760 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3761 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3762 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3763 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3764 (I40E_QUEUE_TYPE_TX <<
3765 I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3767 wr32(hw, I40E_QINT_RQCTL(qp), val);
3770 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3771 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3772 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3773 (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3774 (I40E_QUEUE_TYPE_TX <<
3775 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3777 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3780 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3781 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3782 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3783 ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3784 (I40E_QUEUE_TYPE_RX <<
3785 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3787 /* Terminate the linked list */
3788 if (q == (q_vector->num_ringpairs - 1))
3789 val |= (I40E_QUEUE_END_OF_LIST <<
3790 I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3792 wr32(hw, I40E_QINT_TQCTL(qp), val);
3801 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3802 * @pf: pointer to private device data structure
3804 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3806 struct i40e_hw *hw = &pf->hw;
3809 /* clear things first */
3810 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3811 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3813 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3814 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3815 I40E_PFINT_ICR0_ENA_GRST_MASK |
3816 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3817 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3818 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3819 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3820 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3822 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3823 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3825 if (pf->flags & I40E_FLAG_PTP)
3826 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3828 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3830 /* SW_ITR_IDX = 0, but don't change INTENA */
3831 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3832 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3834 /* OTHER_ITR_IDX = 0 */
3835 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3839 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3840 * @vsi: the VSI being configured
3842 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3844 u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
3845 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3846 struct i40e_pf *pf = vsi->back;
3847 struct i40e_hw *hw = &pf->hw;
3850 /* set the ITR configuration */
3851 q_vector->rx.next_update = jiffies + 1;
3852 q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting);
3853 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1);
3854 q_vector->rx.current_itr = q_vector->rx.target_itr;
3855 q_vector->tx.next_update = jiffies + 1;
3856 q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting);
3857 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr >> 1);
3858 q_vector->tx.current_itr = q_vector->tx.target_itr;
3860 i40e_enable_misc_int_causes(pf);
3862 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3863 wr32(hw, I40E_PFINT_LNKLST0, 0);
3865 /* Associate the queue pair to the vector and enable the queue int */
3866 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3867 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3868 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3869 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3871 wr32(hw, I40E_QINT_RQCTL(0), val);
3873 if (i40e_enabled_xdp_vsi(vsi)) {
3874 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3875 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT)|
3877 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3879 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3882 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3883 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3884 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3886 wr32(hw, I40E_QINT_TQCTL(0), val);
3891 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3892 * @pf: board private structure
3894 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3896 struct i40e_hw *hw = &pf->hw;
3898 wr32(hw, I40E_PFINT_DYN_CTL0,
3899 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3904 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3905 * @pf: board private structure
3907 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3909 struct i40e_hw *hw = &pf->hw;
3912 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3913 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3914 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3916 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3921 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3922 * @irq: interrupt number
3923 * @data: pointer to a q_vector
3925 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3927 struct i40e_q_vector *q_vector = data;
3929 if (!q_vector->tx.ring && !q_vector->rx.ring)
3932 napi_schedule_irqoff(&q_vector->napi);
3938 * i40e_irq_affinity_notify - Callback for affinity changes
3939 * @notify: context as to what irq was changed
3940 * @mask: the new affinity mask
3942 * This is a callback function used by the irq_set_affinity_notifier function
3943 * so that we may register to receive changes to the irq affinity masks.
3945 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3946 const cpumask_t *mask)
3948 struct i40e_q_vector *q_vector =
3949 container_of(notify, struct i40e_q_vector, affinity_notify);
3951 cpumask_copy(&q_vector->affinity_mask, mask);
3955 * i40e_irq_affinity_release - Callback for affinity notifier release
3956 * @ref: internal core kernel usage
3958 * This is a callback function used by the irq_set_affinity_notifier function
3959 * to inform the current notification subscriber that they will no longer
3960 * receive notifications.
3962 static void i40e_irq_affinity_release(struct kref *ref) {}
3965 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3966 * @vsi: the VSI being configured
3967 * @basename: name for the vector
3969 * Allocates MSI-X vectors and requests interrupts from the kernel.
3971 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3973 int q_vectors = vsi->num_q_vectors;
3974 struct i40e_pf *pf = vsi->back;
3975 int base = vsi->base_vector;
3982 for (vector = 0; vector < q_vectors; vector++) {
3983 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3985 irq_num = pf->msix_entries[base + vector].vector;
3987 if (q_vector->tx.ring && q_vector->rx.ring) {
3988 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3989 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3991 } else if (q_vector->rx.ring) {
3992 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3993 "%s-%s-%d", basename, "rx", rx_int_idx++);
3994 } else if (q_vector->tx.ring) {
3995 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3996 "%s-%s-%d", basename, "tx", tx_int_idx++);
3998 /* skip this unused q_vector */
4001 err = request_irq(irq_num,
4007 dev_info(&pf->pdev->dev,
4008 "MSIX request_irq failed, error: %d\n", err);
4009 goto free_queue_irqs;
4012 /* register for affinity change notifications */
4013 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
4014 q_vector->affinity_notify.release = i40e_irq_affinity_release;
4015 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
4016 /* Spread affinity hints out across online CPUs.
4018 * get_cpu_mask returns a static constant mask with
4019 * a permanent lifetime so it's ok to pass to
4020 * irq_update_affinity_hint without making a copy.
4022 cpu = cpumask_local_spread(q_vector->v_idx, -1);
4023 irq_update_affinity_hint(irq_num, get_cpu_mask(cpu));
4026 vsi->irqs_ready = true;
4032 irq_num = pf->msix_entries[base + vector].vector;
4033 irq_set_affinity_notifier(irq_num, NULL);
4034 irq_update_affinity_hint(irq_num, NULL);
4035 free_irq(irq_num, &vsi->q_vectors[vector]);
4041 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
4042 * @vsi: the VSI being un-configured
4044 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
4046 struct i40e_pf *pf = vsi->back;
4047 struct i40e_hw *hw = &pf->hw;
4048 int base = vsi->base_vector;
4051 /* disable interrupt causation from each queue */
4052 for (i = 0; i < vsi->num_queue_pairs; i++) {
4055 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
4056 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
4057 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
4059 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
4060 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
4061 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
4063 if (!i40e_enabled_xdp_vsi(vsi))
4065 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
4068 /* disable each interrupt */
4069 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4070 for (i = vsi->base_vector;
4071 i < (vsi->num_q_vectors + vsi->base_vector); i++)
4072 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
4075 for (i = 0; i < vsi->num_q_vectors; i++)
4076 synchronize_irq(pf->msix_entries[i + base].vector);
4078 /* Legacy and MSI mode - this stops all interrupt handling */
4079 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
4080 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
4082 synchronize_irq(pf->pdev->irq);
4087 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
4088 * @vsi: the VSI being configured
4090 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
4092 struct i40e_pf *pf = vsi->back;
4095 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4096 for (i = 0; i < vsi->num_q_vectors; i++)
4097 i40e_irq_dynamic_enable(vsi, i);
4099 i40e_irq_dynamic_enable_icr0(pf);
4102 i40e_flush(&pf->hw);
4107 * i40e_free_misc_vector - Free the vector that handles non-queue events
4108 * @pf: board private structure
4110 static void i40e_free_misc_vector(struct i40e_pf *pf)
4113 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
4114 i40e_flush(&pf->hw);
4116 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4117 synchronize_irq(pf->msix_entries[0].vector);
4118 free_irq(pf->msix_entries[0].vector, pf);
4119 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
4124 * i40e_intr - MSI/Legacy and non-queue interrupt handler
4125 * @irq: interrupt number
4126 * @data: pointer to a q_vector
4128 * This is the handler used for all MSI/Legacy interrupts, and deals
4129 * with both queue and non-queue interrupts. This is also used in
4130 * MSIX mode to handle the non-queue interrupts.
4132 static irqreturn_t i40e_intr(int irq, void *data)
4134 struct i40e_pf *pf = (struct i40e_pf *)data;
4135 struct i40e_hw *hw = &pf->hw;
4136 irqreturn_t ret = IRQ_NONE;
4137 u32 icr0, icr0_remaining;
4140 icr0 = rd32(hw, I40E_PFINT_ICR0);
4141 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
4143 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
4144 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
4147 /* if interrupt but no bits showing, must be SWINT */
4148 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
4149 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
4152 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
4153 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
4154 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
4155 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
4156 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
4159 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
4160 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
4161 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
4162 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
4164 /* We do not have a way to disarm Queue causes while leaving
4165 * interrupt enabled for all other causes, ideally
4166 * interrupt should be disabled while we are in NAPI but
4167 * this is not a performance path and napi_schedule()
4168 * can deal with rescheduling.
4170 if (!test_bit(__I40E_DOWN, pf->state))
4171 napi_schedule_irqoff(&q_vector->napi);
4174 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
4175 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4176 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
4177 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
4180 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
4181 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
4182 set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
4185 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
4186 /* disable any further VFLR event notifications */
4187 if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state)) {
4188 u32 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
4190 reg &= ~I40E_PFINT_ICR0_VFLR_MASK;
4191 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
4193 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
4194 set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
4198 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
4199 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4200 set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
4201 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
4202 val = rd32(hw, I40E_GLGEN_RSTAT);
4203 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
4204 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
4205 if (val == I40E_RESET_CORER) {
4207 } else if (val == I40E_RESET_GLOBR) {
4209 } else if (val == I40E_RESET_EMPR) {
4211 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
4215 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
4216 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
4217 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
4218 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
4219 rd32(hw, I40E_PFHMC_ERRORINFO),
4220 rd32(hw, I40E_PFHMC_ERRORDATA));
4223 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
4224 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
4226 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_EVENT0_MASK)
4227 schedule_work(&pf->ptp_extts0_work);
4229 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK)
4230 i40e_ptp_tx_hwtstamp(pf);
4232 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4235 /* If a critical error is pending we have no choice but to reset the
4237 * Report and mask out any remaining unexpected interrupts.
4239 icr0_remaining = icr0 & ena_mask;
4240 if (icr0_remaining) {
4241 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
4243 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
4244 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
4245 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
4246 dev_info(&pf->pdev->dev, "device will be reset\n");
4247 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
4248 i40e_service_event_schedule(pf);
4250 ena_mask &= ~icr0_remaining;
4255 /* re-enable interrupt causes */
4256 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
4257 if (!test_bit(__I40E_DOWN, pf->state) ||
4258 test_bit(__I40E_RECOVERY_MODE, pf->state)) {
4259 i40e_service_event_schedule(pf);
4260 i40e_irq_dynamic_enable_icr0(pf);
4267 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
4268 * @tx_ring: tx ring to clean
4269 * @budget: how many cleans we're allowed
4271 * Returns true if there's any budget left (e.g. the clean is finished)
4273 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
4275 struct i40e_vsi *vsi = tx_ring->vsi;
4276 u16 i = tx_ring->next_to_clean;
4277 struct i40e_tx_buffer *tx_buf;
4278 struct i40e_tx_desc *tx_desc;
4280 tx_buf = &tx_ring->tx_bi[i];
4281 tx_desc = I40E_TX_DESC(tx_ring, i);
4282 i -= tx_ring->count;
4285 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
4287 /* if next_to_watch is not set then there is no work pending */
4291 /* prevent any other reads prior to eop_desc */
4294 /* if the descriptor isn't done, no work yet to do */
4295 if (!(eop_desc->cmd_type_offset_bsz &
4296 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
4299 /* clear next_to_watch to prevent false hangs */
4300 tx_buf->next_to_watch = NULL;
4302 tx_desc->buffer_addr = 0;
4303 tx_desc->cmd_type_offset_bsz = 0;
4304 /* move past filter desc */
4309 i -= tx_ring->count;
4310 tx_buf = tx_ring->tx_bi;
4311 tx_desc = I40E_TX_DESC(tx_ring, 0);
4313 /* unmap skb header data */
4314 dma_unmap_single(tx_ring->dev,
4315 dma_unmap_addr(tx_buf, dma),
4316 dma_unmap_len(tx_buf, len),
4318 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4319 kfree(tx_buf->raw_buf);
4321 tx_buf->raw_buf = NULL;
4322 tx_buf->tx_flags = 0;
4323 tx_buf->next_to_watch = NULL;
4324 dma_unmap_len_set(tx_buf, len, 0);
4325 tx_desc->buffer_addr = 0;
4326 tx_desc->cmd_type_offset_bsz = 0;
4328 /* move us past the eop_desc for start of next FD desc */
4333 i -= tx_ring->count;
4334 tx_buf = tx_ring->tx_bi;
4335 tx_desc = I40E_TX_DESC(tx_ring, 0);
4338 /* update budget accounting */
4340 } while (likely(budget));
4342 i += tx_ring->count;
4343 tx_ring->next_to_clean = i;
4345 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
4346 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
4352 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4353 * @irq: interrupt number
4354 * @data: pointer to a q_vector
4356 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4358 struct i40e_q_vector *q_vector = data;
4359 struct i40e_vsi *vsi;
4361 if (!q_vector->tx.ring)
4364 vsi = q_vector->tx.ring->vsi;
4365 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
4371 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4372 * @vsi: the VSI being configured
4373 * @v_idx: vector index
4374 * @qp_idx: queue pair index
4376 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4378 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4379 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4380 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4382 tx_ring->q_vector = q_vector;
4383 tx_ring->next = q_vector->tx.ring;
4384 q_vector->tx.ring = tx_ring;
4385 q_vector->tx.count++;
4387 /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4388 if (i40e_enabled_xdp_vsi(vsi)) {
4389 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4391 xdp_ring->q_vector = q_vector;
4392 xdp_ring->next = q_vector->tx.ring;
4393 q_vector->tx.ring = xdp_ring;
4394 q_vector->tx.count++;
4397 rx_ring->q_vector = q_vector;
4398 rx_ring->next = q_vector->rx.ring;
4399 q_vector->rx.ring = rx_ring;
4400 q_vector->rx.count++;
4404 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4405 * @vsi: the VSI being configured
4407 * This function maps descriptor rings to the queue-specific vectors
4408 * we were allotted through the MSI-X enabling code. Ideally, we'd have
4409 * one vector per queue pair, but on a constrained vector budget, we
4410 * group the queue pairs as "efficiently" as possible.
4412 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4414 int qp_remaining = vsi->num_queue_pairs;
4415 int q_vectors = vsi->num_q_vectors;
4420 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4421 * group them so there are multiple queues per vector.
4422 * It is also important to go through all the vectors available to be
4423 * sure that if we don't use all the vectors, that the remaining vectors
4424 * are cleared. This is especially important when decreasing the
4425 * number of queues in use.
4427 for (; v_start < q_vectors; v_start++) {
4428 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4430 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4432 q_vector->num_ringpairs = num_ringpairs;
4433 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1;
4435 q_vector->rx.count = 0;
4436 q_vector->tx.count = 0;
4437 q_vector->rx.ring = NULL;
4438 q_vector->tx.ring = NULL;
4440 while (num_ringpairs--) {
4441 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
4449 * i40e_vsi_request_irq - Request IRQ from the OS
4450 * @vsi: the VSI being configured
4451 * @basename: name for the vector
4453 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4455 struct i40e_pf *pf = vsi->back;
4458 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4459 err = i40e_vsi_request_irq_msix(vsi, basename);
4460 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
4461 err = request_irq(pf->pdev->irq, i40e_intr, 0,
4464 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4468 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4473 #ifdef CONFIG_NET_POLL_CONTROLLER
4475 * i40e_netpoll - A Polling 'interrupt' handler
4476 * @netdev: network interface device structure
4478 * This is used by netconsole to send skbs without having to re-enable
4479 * interrupts. It's not called while the normal interrupt routine is executing.
4481 static void i40e_netpoll(struct net_device *netdev)
4483 struct i40e_netdev_priv *np = netdev_priv(netdev);
4484 struct i40e_vsi *vsi = np->vsi;
4485 struct i40e_pf *pf = vsi->back;
4488 /* if interface is down do nothing */
4489 if (test_bit(__I40E_VSI_DOWN, vsi->state))
4492 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4493 for (i = 0; i < vsi->num_q_vectors; i++)
4494 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4496 i40e_intr(pf->pdev->irq, netdev);
4501 #define I40E_QTX_ENA_WAIT_COUNT 50
4504 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4505 * @pf: the PF being configured
4506 * @pf_q: the PF queue
4507 * @enable: enable or disable state of the queue
4509 * This routine will wait for the given Tx queue of the PF to reach the
4510 * enabled or disabled state.
4511 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4512 * multiple retries; else will return 0 in case of success.
4514 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4519 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4520 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4521 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4524 usleep_range(10, 20);
4526 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4533 * i40e_control_tx_q - Start or stop a particular Tx queue
4534 * @pf: the PF structure
4535 * @pf_q: the PF queue to configure
4536 * @enable: start or stop the queue
4538 * This function enables or disables a single queue. Note that any delay
4539 * required after the operation is expected to be handled by the caller of
4542 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4544 struct i40e_hw *hw = &pf->hw;
4548 /* warn the TX unit of coming changes */
4549 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4551 usleep_range(10, 20);
4553 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4554 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4555 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4556 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4558 usleep_range(1000, 2000);
4561 /* Skip if the queue is already in the requested state */
4562 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4565 /* turn on/off the queue */
4567 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4568 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4570 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4573 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4577 * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4579 * @pf: the PF structure
4580 * @pf_q: the PF queue to configure
4581 * @is_xdp: true if the queue is used for XDP
4582 * @enable: start or stop the queue
4584 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4585 bool is_xdp, bool enable)
4589 i40e_control_tx_q(pf, pf_q, enable);
4591 /* wait for the change to finish */
4592 ret = i40e_pf_txq_wait(pf, pf_q, enable);
4594 dev_info(&pf->pdev->dev,
4595 "VSI seid %d %sTx ring %d %sable timeout\n",
4596 seid, (is_xdp ? "XDP " : ""), pf_q,
4597 (enable ? "en" : "dis"));
4604 * i40e_vsi_enable_tx - Start a VSI's rings
4605 * @vsi: the VSI being configured
4607 static int i40e_vsi_enable_tx(struct i40e_vsi *vsi)
4609 struct i40e_pf *pf = vsi->back;
4610 int i, pf_q, ret = 0;
4612 pf_q = vsi->base_queue;
4613 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4614 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4616 false /*is xdp*/, true);
4620 if (!i40e_enabled_xdp_vsi(vsi))
4623 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4624 pf_q + vsi->alloc_queue_pairs,
4625 true /*is xdp*/, true);
4633 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4634 * @pf: the PF being configured
4635 * @pf_q: the PF queue
4636 * @enable: enable or disable state of the queue
4638 * This routine will wait for the given Rx queue of the PF to reach the
4639 * enabled or disabled state.
4640 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4641 * multiple retries; else will return 0 in case of success.
4643 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4648 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4649 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4650 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4653 usleep_range(10, 20);
4655 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4662 * i40e_control_rx_q - Start or stop a particular Rx queue
4663 * @pf: the PF structure
4664 * @pf_q: the PF queue to configure
4665 * @enable: start or stop the queue
4667 * This function enables or disables a single queue. Note that
4668 * any delay required after the operation is expected to be
4669 * handled by the caller of this function.
4671 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4673 struct i40e_hw *hw = &pf->hw;
4677 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4678 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4679 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4680 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4682 usleep_range(1000, 2000);
4685 /* Skip if the queue is already in the requested state */
4686 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4689 /* turn on/off the queue */
4691 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4693 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4695 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4699 * i40e_control_wait_rx_q
4700 * @pf: the PF structure
4701 * @pf_q: queue being configured
4702 * @enable: start or stop the rings
4704 * This function enables or disables a single queue along with waiting
4705 * for the change to finish. The caller of this function should handle
4706 * the delays needed in the case of disabling queues.
4708 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4712 i40e_control_rx_q(pf, pf_q, enable);
4714 /* wait for the change to finish */
4715 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4723 * i40e_vsi_enable_rx - Start a VSI's rings
4724 * @vsi: the VSI being configured
4726 static int i40e_vsi_enable_rx(struct i40e_vsi *vsi)
4728 struct i40e_pf *pf = vsi->back;
4729 int i, pf_q, ret = 0;
4731 pf_q = vsi->base_queue;
4732 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4733 ret = i40e_control_wait_rx_q(pf, pf_q, true);
4735 dev_info(&pf->pdev->dev,
4736 "VSI seid %d Rx ring %d enable timeout\n",
4746 * i40e_vsi_start_rings - Start a VSI's rings
4747 * @vsi: the VSI being configured
4749 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4753 /* do rx first for enable and last for disable */
4754 ret = i40e_vsi_enable_rx(vsi);
4757 ret = i40e_vsi_enable_tx(vsi);
4762 #define I40E_DISABLE_TX_GAP_MSEC 50
4765 * i40e_vsi_stop_rings - Stop a VSI's rings
4766 * @vsi: the VSI being configured
4768 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4770 struct i40e_pf *pf = vsi->back;
4771 int pf_q, err, q_end;
4773 /* When port TX is suspended, don't wait */
4774 if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4775 return i40e_vsi_stop_rings_no_wait(vsi);
4777 q_end = vsi->base_queue + vsi->num_queue_pairs;
4778 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4779 i40e_pre_tx_queue_cfg(&pf->hw, (u32)pf_q, false);
4781 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++) {
4782 err = i40e_control_wait_rx_q(pf, pf_q, false);
4784 dev_info(&pf->pdev->dev,
4785 "VSI seid %d Rx ring %d disable timeout\n",
4789 msleep(I40E_DISABLE_TX_GAP_MSEC);
4790 pf_q = vsi->base_queue;
4791 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4792 wr32(&pf->hw, I40E_QTX_ENA(pf_q), 0);
4794 i40e_vsi_wait_queues_disabled(vsi);
4798 * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4799 * @vsi: the VSI being shutdown
4801 * This function stops all the rings for a VSI but does not delay to verify
4802 * that rings have been disabled. It is expected that the caller is shutting
4803 * down multiple VSIs at once and will delay together for all the VSIs after
4804 * initiating the shutdown. This is particularly useful for shutting down lots
4805 * of VFs together. Otherwise, a large delay can be incurred while configuring
4806 * each VSI in serial.
4808 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4810 struct i40e_pf *pf = vsi->back;
4813 pf_q = vsi->base_queue;
4814 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4815 i40e_control_tx_q(pf, pf_q, false);
4816 i40e_control_rx_q(pf, pf_q, false);
4821 * i40e_vsi_free_irq - Free the irq association with the OS
4822 * @vsi: the VSI being configured
4824 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4826 struct i40e_pf *pf = vsi->back;
4827 struct i40e_hw *hw = &pf->hw;
4828 int base = vsi->base_vector;
4832 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4833 if (!vsi->q_vectors)
4836 if (!vsi->irqs_ready)
4839 vsi->irqs_ready = false;
4840 for (i = 0; i < vsi->num_q_vectors; i++) {
4845 irq_num = pf->msix_entries[vector].vector;
4847 /* free only the irqs that were actually requested */
4848 if (!vsi->q_vectors[i] ||
4849 !vsi->q_vectors[i]->num_ringpairs)
4852 /* clear the affinity notifier in the IRQ descriptor */
4853 irq_set_affinity_notifier(irq_num, NULL);
4854 /* remove our suggested affinity mask for this IRQ */
4855 irq_update_affinity_hint(irq_num, NULL);
4856 synchronize_irq(irq_num);
4857 free_irq(irq_num, vsi->q_vectors[i]);
4859 /* Tear down the interrupt queue link list
4861 * We know that they come in pairs and always
4862 * the Rx first, then the Tx. To clear the
4863 * link list, stick the EOL value into the
4864 * next_q field of the registers.
4866 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4867 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4868 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4869 val |= I40E_QUEUE_END_OF_LIST
4870 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4871 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4873 while (qp != I40E_QUEUE_END_OF_LIST) {
4876 val = rd32(hw, I40E_QINT_RQCTL(qp));
4878 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4879 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4880 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4881 I40E_QINT_RQCTL_INTEVENT_MASK);
4883 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4884 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4886 wr32(hw, I40E_QINT_RQCTL(qp), val);
4888 val = rd32(hw, I40E_QINT_TQCTL(qp));
4890 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4891 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4893 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4894 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4895 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4896 I40E_QINT_TQCTL_INTEVENT_MASK);
4898 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4899 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4901 wr32(hw, I40E_QINT_TQCTL(qp), val);
4906 free_irq(pf->pdev->irq, pf);
4908 val = rd32(hw, I40E_PFINT_LNKLST0);
4909 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4910 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4911 val |= I40E_QUEUE_END_OF_LIST
4912 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4913 wr32(hw, I40E_PFINT_LNKLST0, val);
4915 val = rd32(hw, I40E_QINT_RQCTL(qp));
4916 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4917 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4918 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4919 I40E_QINT_RQCTL_INTEVENT_MASK);
4921 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4922 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4924 wr32(hw, I40E_QINT_RQCTL(qp), val);
4926 val = rd32(hw, I40E_QINT_TQCTL(qp));
4928 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4929 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4930 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4931 I40E_QINT_TQCTL_INTEVENT_MASK);
4933 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4934 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4936 wr32(hw, I40E_QINT_TQCTL(qp), val);
4941 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4942 * @vsi: the VSI being configured
4943 * @v_idx: Index of vector to be freed
4945 * This function frees the memory allocated to the q_vector. In addition if
4946 * NAPI is enabled it will delete any references to the NAPI struct prior
4947 * to freeing the q_vector.
4949 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4951 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4952 struct i40e_ring *ring;
4957 /* disassociate q_vector from rings */
4958 i40e_for_each_ring(ring, q_vector->tx)
4959 ring->q_vector = NULL;
4961 i40e_for_each_ring(ring, q_vector->rx)
4962 ring->q_vector = NULL;
4964 /* only VSI w/ an associated netdev is set up w/ NAPI */
4966 netif_napi_del(&q_vector->napi);
4968 vsi->q_vectors[v_idx] = NULL;
4970 kfree_rcu(q_vector, rcu);
4974 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4975 * @vsi: the VSI being un-configured
4977 * This frees the memory allocated to the q_vectors and
4978 * deletes references to the NAPI struct.
4980 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4984 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4985 i40e_free_q_vector(vsi, v_idx);
4989 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4990 * @pf: board private structure
4992 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4994 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4995 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4996 pci_disable_msix(pf->pdev);
4997 kfree(pf->msix_entries);
4998 pf->msix_entries = NULL;
4999 kfree(pf->irq_pile);
5000 pf->irq_pile = NULL;
5001 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
5002 pci_disable_msi(pf->pdev);
5004 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
5008 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
5009 * @pf: board private structure
5011 * We go through and clear interrupt specific resources and reset the structure
5012 * to pre-load conditions
5014 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
5018 if (test_bit(__I40E_MISC_IRQ_REQUESTED, pf->state))
5019 i40e_free_misc_vector(pf);
5021 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
5022 I40E_IWARP_IRQ_PILE_ID);
5024 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
5025 for (i = 0; i < pf->num_alloc_vsi; i++)
5027 i40e_vsi_free_q_vectors(pf->vsi[i]);
5028 i40e_reset_interrupt_capability(pf);
5032 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
5033 * @vsi: the VSI being configured
5035 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
5042 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5043 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5045 if (q_vector->rx.ring || q_vector->tx.ring)
5046 napi_enable(&q_vector->napi);
5051 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
5052 * @vsi: the VSI being configured
5054 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
5061 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5062 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5064 if (q_vector->rx.ring || q_vector->tx.ring)
5065 napi_disable(&q_vector->napi);
5070 * i40e_vsi_close - Shut down a VSI
5071 * @vsi: the vsi to be quelled
5073 static void i40e_vsi_close(struct i40e_vsi *vsi)
5075 struct i40e_pf *pf = vsi->back;
5076 if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state))
5078 i40e_vsi_free_irq(vsi);
5079 i40e_vsi_free_tx_resources(vsi);
5080 i40e_vsi_free_rx_resources(vsi);
5081 vsi->current_netdev_flags = 0;
5082 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
5083 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
5084 set_bit(__I40E_CLIENT_RESET, pf->state);
5088 * i40e_quiesce_vsi - Pause a given VSI
5089 * @vsi: the VSI being paused
5091 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
5093 if (test_bit(__I40E_VSI_DOWN, vsi->state))
5096 set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state);
5097 if (vsi->netdev && netif_running(vsi->netdev))
5098 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
5100 i40e_vsi_close(vsi);
5104 * i40e_unquiesce_vsi - Resume a given VSI
5105 * @vsi: the VSI being resumed
5107 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
5109 if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state))
5112 if (vsi->netdev && netif_running(vsi->netdev))
5113 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
5115 i40e_vsi_open(vsi); /* this clears the DOWN bit */
5119 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
5122 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
5126 for (v = 0; v < pf->num_alloc_vsi; v++) {
5128 i40e_quiesce_vsi(pf->vsi[v]);
5133 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
5136 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
5140 for (v = 0; v < pf->num_alloc_vsi; v++) {
5142 i40e_unquiesce_vsi(pf->vsi[v]);
5147 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
5148 * @vsi: the VSI being configured
5150 * Wait until all queues on a given VSI have been disabled.
5152 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
5154 struct i40e_pf *pf = vsi->back;
5157 pf_q = vsi->base_queue;
5158 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
5159 /* Check and wait for the Tx queue */
5160 ret = i40e_pf_txq_wait(pf, pf_q, false);
5162 dev_info(&pf->pdev->dev,
5163 "VSI seid %d Tx ring %d disable timeout\n",
5168 if (!i40e_enabled_xdp_vsi(vsi))
5171 /* Check and wait for the XDP Tx queue */
5172 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
5175 dev_info(&pf->pdev->dev,
5176 "VSI seid %d XDP Tx ring %d disable timeout\n",
5181 /* Check and wait for the Rx queue */
5182 ret = i40e_pf_rxq_wait(pf, pf_q, false);
5184 dev_info(&pf->pdev->dev,
5185 "VSI seid %d Rx ring %d disable timeout\n",
5194 #ifdef CONFIG_I40E_DCB
5196 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
5199 * This function waits for the queues to be in disabled state for all the
5200 * VSIs that are managed by this PF.
5202 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
5206 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5208 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
5220 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
5221 * @pf: pointer to PF
5223 * Get TC map for ISCSI PF type that will include iSCSI TC
5226 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
5228 struct i40e_dcb_app_priority_table app;
5229 struct i40e_hw *hw = &pf->hw;
5230 u8 enabled_tc = 1; /* TC0 is always enabled */
5232 /* Get the iSCSI APP TLV */
5233 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5235 for (i = 0; i < dcbcfg->numapps; i++) {
5236 app = dcbcfg->app[i];
5237 if (app.selector == I40E_APP_SEL_TCPIP &&
5238 app.protocolid == I40E_APP_PROTOID_ISCSI) {
5239 tc = dcbcfg->etscfg.prioritytable[app.priority];
5240 enabled_tc |= BIT(tc);
5249 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
5250 * @dcbcfg: the corresponding DCBx configuration structure
5252 * Return the number of TCs from given DCBx configuration
5254 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
5256 int i, tc_unused = 0;
5260 /* Scan the ETS Config Priority Table to find
5261 * traffic class enabled for a given priority
5262 * and create a bitmask of enabled TCs
5264 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5265 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
5267 /* Now scan the bitmask to check for
5268 * contiguous TCs starting with TC0
5270 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5271 if (num_tc & BIT(i)) {
5275 pr_err("Non-contiguous TC - Disabling DCB\n");
5283 /* There is always at least TC0 */
5291 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5292 * @dcbcfg: the corresponding DCBx configuration structure
5294 * Query the current DCB configuration and return the number of
5295 * traffic classes enabled from the given DCBX config
5297 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5299 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5303 for (i = 0; i < num_tc; i++)
5304 enabled_tc |= BIT(i);
5310 * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5311 * @pf: PF being queried
5313 * Query the current MQPRIO configuration and return the number of
5314 * traffic classes enabled.
5316 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5318 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5319 u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5320 u8 enabled_tc = 1, i;
5322 for (i = 1; i < num_tc; i++)
5323 enabled_tc |= BIT(i);
5328 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5329 * @pf: PF being queried
5331 * Return number of traffic classes enabled for the given PF
5333 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5335 struct i40e_hw *hw = &pf->hw;
5336 u8 i, enabled_tc = 1;
5338 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5340 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5341 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;
5343 /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5344 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5347 /* SFP mode will be enabled for all TCs on port */
5348 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5349 return i40e_dcb_get_num_tc(dcbcfg);
5351 /* MFP mode return count of enabled TCs for this PF */
5352 if (pf->hw.func_caps.iscsi)
5353 enabled_tc = i40e_get_iscsi_tc_map(pf);
5355 return 1; /* Only TC0 */
5357 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5358 if (enabled_tc & BIT(i))
5365 * i40e_pf_get_tc_map - Get bitmap for enabled traffic classes
5366 * @pf: PF being queried
5368 * Return a bitmap for enabled traffic classes for this PF.
5370 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5372 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5373 return i40e_mqprio_get_enabled_tc(pf);
5375 /* If neither MQPRIO nor DCB is enabled for this PF then just return
5378 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5379 return I40E_DEFAULT_TRAFFIC_CLASS;
5381 /* SFP mode we want PF to be enabled for all TCs */
5382 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5383 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5385 /* MFP enabled and iSCSI PF type */
5386 if (pf->hw.func_caps.iscsi)
5387 return i40e_get_iscsi_tc_map(pf);
5389 return I40E_DEFAULT_TRAFFIC_CLASS;
5393 * i40e_vsi_get_bw_info - Query VSI BW Information
5394 * @vsi: the VSI being queried
5396 * Returns 0 on success, negative value on failure
5398 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5400 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5401 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5402 struct i40e_pf *pf = vsi->back;
5403 struct i40e_hw *hw = &pf->hw;
5408 /* Get the VSI level BW configuration */
5409 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
5411 dev_info(&pf->pdev->dev,
5412 "couldn't get PF vsi bw config, err %s aq_err %s\n",
5413 i40e_stat_str(&pf->hw, ret),
5414 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5418 /* Get the VSI level BW configuration per TC */
5419 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
5422 dev_info(&pf->pdev->dev,
5423 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
5424 i40e_stat_str(&pf->hw, ret),
5425 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5429 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5430 dev_info(&pf->pdev->dev,
5431 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5432 bw_config.tc_valid_bits,
5433 bw_ets_config.tc_valid_bits);
5434 /* Still continuing */
5437 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5438 vsi->bw_max_quanta = bw_config.max_bw;
5439 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5440 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5441 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5442 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5443 vsi->bw_ets_limit_credits[i] =
5444 le16_to_cpu(bw_ets_config.credits[i]);
5445 /* 3 bits out of 4 for each TC */
5446 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5453 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5454 * @vsi: the VSI being configured
5455 * @enabled_tc: TC bitmap
5456 * @bw_share: BW shared credits per TC
5458 * Returns 0 on success, negative value on failure
5460 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5463 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5464 struct i40e_pf *pf = vsi->back;
5468 /* There is no need to reset BW when mqprio mode is on. */
5469 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5471 if (!vsi->mqprio_qopt.qopt.hw && !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5472 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5474 dev_info(&pf->pdev->dev,
5475 "Failed to reset tx rate for vsi->seid %u\n",
5479 memset(&bw_data, 0, sizeof(bw_data));
5480 bw_data.tc_valid_bits = enabled_tc;
5481 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5482 bw_data.tc_bw_credits[i] = bw_share[i];
5484 ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL);
5486 dev_info(&pf->pdev->dev,
5487 "AQ command Config VSI BW allocation per TC failed = %d\n",
5488 pf->hw.aq.asq_last_status);
5492 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5493 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5499 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5500 * @vsi: the VSI being configured
5501 * @enabled_tc: TC map to be enabled
5504 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5506 struct net_device *netdev = vsi->netdev;
5507 struct i40e_pf *pf = vsi->back;
5508 struct i40e_hw *hw = &pf->hw;
5511 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5517 netdev_reset_tc(netdev);
5521 /* Set up actual enabled TCs on the VSI */
5522 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5525 /* set per TC queues for the VSI */
5526 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5527 /* Only set TC queues for enabled tcs
5529 * e.g. For a VSI that has TC0 and TC3 enabled the
5530 * enabled_tc bitmap would be 0x00001001; the driver
5531 * will set the numtc for netdev as 2 that will be
5532 * referenced by the netdev layer as TC 0 and 1.
5534 if (vsi->tc_config.enabled_tc & BIT(i))
5535 netdev_set_tc_queue(netdev,
5536 vsi->tc_config.tc_info[i].netdev_tc,
5537 vsi->tc_config.tc_info[i].qcount,
5538 vsi->tc_config.tc_info[i].qoffset);
5541 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5544 /* Assign UP2TC map for the VSI */
5545 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5546 /* Get the actual TC# for the UP */
5547 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5548 /* Get the mapped netdev TC# for the UP */
5549 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
5550 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5555 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5556 * @vsi: the VSI being configured
5557 * @ctxt: the ctxt buffer returned from AQ VSI update param command
5559 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5560 struct i40e_vsi_context *ctxt)
5562 /* copy just the sections touched not the entire info
5563 * since not all sections are valid as returned by
5566 vsi->info.mapping_flags = ctxt->info.mapping_flags;
5567 memcpy(&vsi->info.queue_mapping,
5568 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5569 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5570 sizeof(vsi->info.tc_mapping));
5574 * i40e_update_adq_vsi_queues - update queue mapping for ADq VSI
5575 * @vsi: the VSI being reconfigured
5576 * @vsi_offset: offset from main VF VSI
5578 int i40e_update_adq_vsi_queues(struct i40e_vsi *vsi, int vsi_offset)
5580 struct i40e_vsi_context ctxt = {};
5586 return I40E_ERR_PARAM;
5590 ctxt.seid = vsi->seid;
5591 ctxt.pf_num = hw->pf_id;
5592 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id + vsi_offset;
5593 ctxt.uplink_seid = vsi->uplink_seid;
5594 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5595 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
5596 ctxt.info = vsi->info;
5598 i40e_vsi_setup_queue_map(vsi, &ctxt, vsi->tc_config.enabled_tc,
5600 if (vsi->reconfig_rss) {
5601 vsi->rss_size = min_t(int, pf->alloc_rss_size,
5602 vsi->num_queue_pairs);
5603 ret = i40e_vsi_config_rss(vsi);
5605 dev_info(&pf->pdev->dev, "Failed to reconfig rss for num_queues\n");
5608 vsi->reconfig_rss = false;
5611 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5613 dev_info(&pf->pdev->dev, "Update vsi config failed, err %s aq_err %s\n",
5614 i40e_stat_str(hw, ret),
5615 i40e_aq_str(hw, hw->aq.asq_last_status));
5618 /* update the local VSI info with updated queue map */
5619 i40e_vsi_update_queue_map(vsi, &ctxt);
5620 vsi->info.valid_sections = 0;
5626 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5627 * @vsi: VSI to be configured
5628 * @enabled_tc: TC bitmap
5630 * This configures a particular VSI for TCs that are mapped to the
5631 * given TC bitmap. It uses default bandwidth share for TCs across
5632 * VSIs to configure TC for a particular VSI.
5635 * It is expected that the VSI queues have been quisced before calling
5638 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5640 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5641 struct i40e_pf *pf = vsi->back;
5642 struct i40e_hw *hw = &pf->hw;
5643 struct i40e_vsi_context ctxt;
5647 /* Check if enabled_tc is same as existing or new TCs */
5648 if (vsi->tc_config.enabled_tc == enabled_tc &&
5649 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5652 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5653 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5654 if (enabled_tc & BIT(i))
5658 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5660 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5662 dev_info(&pf->pdev->dev,
5663 "Failed configuring TC map %d for VSI %d\n",
5664 enabled_tc, vsi->seid);
5665 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid,
5668 dev_info(&pf->pdev->dev,
5669 "Failed querying vsi bw info, err %s aq_err %s\n",
5670 i40e_stat_str(hw, ret),
5671 i40e_aq_str(hw, hw->aq.asq_last_status));
5674 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) {
5675 u8 valid_tc = bw_config.tc_valid_bits & enabled_tc;
5678 valid_tc = bw_config.tc_valid_bits;
5679 /* Always enable TC0, no matter what */
5681 dev_info(&pf->pdev->dev,
5682 "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5683 enabled_tc, bw_config.tc_valid_bits, valid_tc);
5684 enabled_tc = valid_tc;
5687 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5689 dev_err(&pf->pdev->dev,
5690 "Unable to configure TC map %d for VSI %d\n",
5691 enabled_tc, vsi->seid);
5696 /* Update Queue Pairs Mapping for currently enabled UPs */
5697 ctxt.seid = vsi->seid;
5698 ctxt.pf_num = vsi->back->hw.pf_id;
5700 ctxt.uplink_seid = vsi->uplink_seid;
5701 ctxt.info = vsi->info;
5702 if (vsi->back->flags & I40E_FLAG_TC_MQPRIO) {
5703 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);
5707 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5710 /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5713 if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5714 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5715 vsi->num_queue_pairs);
5716 ret = i40e_vsi_config_rss(vsi);
5718 dev_info(&vsi->back->pdev->dev,
5719 "Failed to reconfig rss for num_queues\n");
5722 vsi->reconfig_rss = false;
5724 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5725 ctxt.info.valid_sections |=
5726 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5727 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5730 /* Update the VSI after updating the VSI queue-mapping
5733 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5735 dev_info(&pf->pdev->dev,
5736 "Update vsi tc config failed, err %s aq_err %s\n",
5737 i40e_stat_str(hw, ret),
5738 i40e_aq_str(hw, hw->aq.asq_last_status));
5741 /* update the local VSI info with updated queue map */
5742 i40e_vsi_update_queue_map(vsi, &ctxt);
5743 vsi->info.valid_sections = 0;
5745 /* Update current VSI BW information */
5746 ret = i40e_vsi_get_bw_info(vsi);
5748 dev_info(&pf->pdev->dev,
5749 "Failed updating vsi bw info, err %s aq_err %s\n",
5750 i40e_stat_str(hw, ret),
5751 i40e_aq_str(hw, hw->aq.asq_last_status));
5755 /* Update the netdev TC setup */
5756 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5762 * i40e_get_link_speed - Returns link speed for the interface
5763 * @vsi: VSI to be configured
5766 static int i40e_get_link_speed(struct i40e_vsi *vsi)
5768 struct i40e_pf *pf = vsi->back;
5770 switch (pf->hw.phy.link_info.link_speed) {
5771 case I40E_LINK_SPEED_40GB:
5773 case I40E_LINK_SPEED_25GB:
5775 case I40E_LINK_SPEED_20GB:
5777 case I40E_LINK_SPEED_10GB:
5779 case I40E_LINK_SPEED_1GB:
5787 * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5788 * @vsi: VSI to be configured
5789 * @seid: seid of the channel/VSI
5790 * @max_tx_rate: max TX rate to be configured as BW limit
5792 * Helper function to set BW limit for a given VSI
5794 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5796 struct i40e_pf *pf = vsi->back;
5801 speed = i40e_get_link_speed(vsi);
5802 if (max_tx_rate > speed) {
5803 dev_err(&pf->pdev->dev,
5804 "Invalid max tx rate %llu specified for VSI seid %d.",
5808 if (max_tx_rate && max_tx_rate < 50) {
5809 dev_warn(&pf->pdev->dev,
5810 "Setting max tx rate to minimum usable value of 50Mbps.\n");
5814 /* Tx rate credits are in values of 50Mbps, 0 is disabled */
5815 credits = max_tx_rate;
5816 do_div(credits, I40E_BW_CREDIT_DIVISOR);
5817 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
5818 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
5820 dev_err(&pf->pdev->dev,
5821 "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %s aq_err %s\n",
5822 max_tx_rate, seid, i40e_stat_str(&pf->hw, ret),
5823 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5828 * i40e_remove_queue_channels - Remove queue channels for the TCs
5829 * @vsi: VSI to be configured
5831 * Remove queue channels for the TCs
5833 static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
5835 enum i40e_admin_queue_err last_aq_status;
5836 struct i40e_cloud_filter *cfilter;
5837 struct i40e_channel *ch, *ch_tmp;
5838 struct i40e_pf *pf = vsi->back;
5839 struct hlist_node *node;
5842 /* Reset rss size that was stored when reconfiguring rss for
5843 * channel VSIs with non-power-of-2 queue count.
5845 vsi->current_rss_size = 0;
5847 /* perform cleanup for channels if they exist */
5848 if (list_empty(&vsi->ch_list))
5851 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5852 struct i40e_vsi *p_vsi;
5854 list_del(&ch->list);
5855 p_vsi = ch->parent_vsi;
5856 if (!p_vsi || !ch->initialized) {
5860 /* Reset queue contexts */
5861 for (i = 0; i < ch->num_queue_pairs; i++) {
5862 struct i40e_ring *tx_ring, *rx_ring;
5865 pf_q = ch->base_queue + i;
5866 tx_ring = vsi->tx_rings[pf_q];
5869 rx_ring = vsi->rx_rings[pf_q];
5873 /* Reset BW configured for this VSI via mqprio */
5874 ret = i40e_set_bw_limit(vsi, ch->seid, 0);
5876 dev_info(&vsi->back->pdev->dev,
5877 "Failed to reset tx rate for ch->seid %u\n",
5880 /* delete cloud filters associated with this channel */
5881 hlist_for_each_entry_safe(cfilter, node,
5882 &pf->cloud_filter_list, cloud_node) {
5883 if (cfilter->seid != ch->seid)
5886 hash_del(&cfilter->cloud_node);
5887 if (cfilter->dst_port)
5888 ret = i40e_add_del_cloud_filter_big_buf(vsi,
5892 ret = i40e_add_del_cloud_filter(vsi, cfilter,
5894 last_aq_status = pf->hw.aq.asq_last_status;
5896 dev_info(&pf->pdev->dev,
5897 "Failed to delete cloud filter, err %s aq_err %s\n",
5898 i40e_stat_str(&pf->hw, ret),
5899 i40e_aq_str(&pf->hw, last_aq_status));
5903 /* delete VSI from FW */
5904 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
5907 dev_err(&vsi->back->pdev->dev,
5908 "unable to remove channel (%d) for parent VSI(%d)\n",
5909 ch->seid, p_vsi->seid);
5912 INIT_LIST_HEAD(&vsi->ch_list);
5916 * i40e_get_max_queues_for_channel
5917 * @vsi: ptr to VSI to which channels are associated with
5919 * Helper function which returns max value among the queue counts set on the
5920 * channels/TCs created.
5922 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
5924 struct i40e_channel *ch, *ch_tmp;
5927 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5928 if (!ch->initialized)
5930 if (ch->num_queue_pairs > max)
5931 max = ch->num_queue_pairs;
5938 * i40e_validate_num_queues - validate num_queues w.r.t channel
5939 * @pf: ptr to PF device
5940 * @num_queues: number of queues
5941 * @vsi: the parent VSI
5942 * @reconfig_rss: indicates should the RSS be reconfigured or not
5944 * This function validates number of queues in the context of new channel
5945 * which is being established and determines if RSS should be reconfigured
5946 * or not for parent VSI.
5948 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
5949 struct i40e_vsi *vsi, bool *reconfig_rss)
5956 *reconfig_rss = false;
5957 if (vsi->current_rss_size) {
5958 if (num_queues > vsi->current_rss_size) {
5959 dev_dbg(&pf->pdev->dev,
5960 "Error: num_queues (%d) > vsi's current_size(%d)\n",
5961 num_queues, vsi->current_rss_size);
5963 } else if ((num_queues < vsi->current_rss_size) &&
5964 (!is_power_of_2(num_queues))) {
5965 dev_dbg(&pf->pdev->dev,
5966 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
5967 num_queues, vsi->current_rss_size);
5972 if (!is_power_of_2(num_queues)) {
5973 /* Find the max num_queues configured for channel if channel
5975 * if channel exist, then enforce 'num_queues' to be more than
5976 * max ever queues configured for channel.
5978 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
5979 if (num_queues < max_ch_queues) {
5980 dev_dbg(&pf->pdev->dev,
5981 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
5982 num_queues, max_ch_queues);
5985 *reconfig_rss = true;
5992 * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
5993 * @vsi: the VSI being setup
5994 * @rss_size: size of RSS, accordingly LUT gets reprogrammed
5996 * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
5998 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
6000 struct i40e_pf *pf = vsi->back;
6001 u8 seed[I40E_HKEY_ARRAY_SIZE];
6002 struct i40e_hw *hw = &pf->hw;
6010 if (rss_size > vsi->rss_size)
6013 local_rss_size = min_t(int, vsi->rss_size, rss_size);
6014 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
6018 /* Ignoring user configured lut if there is one */
6019 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
6021 /* Use user configured hash key if there is one, otherwise
6024 if (vsi->rss_hkey_user)
6025 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
6027 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
6029 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
6031 dev_info(&pf->pdev->dev,
6032 "Cannot set RSS lut, err %s aq_err %s\n",
6033 i40e_stat_str(hw, ret),
6034 i40e_aq_str(hw, hw->aq.asq_last_status));
6040 /* Do the update w.r.t. storing rss_size */
6041 if (!vsi->orig_rss_size)
6042 vsi->orig_rss_size = vsi->rss_size;
6043 vsi->current_rss_size = local_rss_size;
6049 * i40e_channel_setup_queue_map - Setup a channel queue map
6050 * @pf: ptr to PF device
6051 * @ctxt: VSI context structure
6052 * @ch: ptr to channel structure
6054 * Setup queue map for a specific channel
6056 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
6057 struct i40e_vsi_context *ctxt,
6058 struct i40e_channel *ch)
6060 u16 qcount, qmap, sections = 0;
6064 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
6065 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
6067 qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
6068 ch->num_queue_pairs = qcount;
6070 /* find the next higher power-of-2 of num queue pairs */
6071 pow = ilog2(qcount);
6072 if (!is_power_of_2(qcount))
6075 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
6076 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
6078 /* Setup queue TC[0].qmap for given VSI context */
6079 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
6081 ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
6082 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
6083 ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
6084 ctxt->info.valid_sections |= cpu_to_le16(sections);
6088 * i40e_add_channel - add a channel by adding VSI
6089 * @pf: ptr to PF device
6090 * @uplink_seid: underlying HW switching element (VEB) ID
6091 * @ch: ptr to channel structure
6093 * Add a channel (VSI) using add_vsi and queue_map
6095 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
6096 struct i40e_channel *ch)
6098 struct i40e_hw *hw = &pf->hw;
6099 struct i40e_vsi_context ctxt;
6100 u8 enabled_tc = 0x1; /* TC0 enabled */
6103 if (ch->type != I40E_VSI_VMDQ2) {
6104 dev_info(&pf->pdev->dev,
6105 "add new vsi failed, ch->type %d\n", ch->type);
6109 memset(&ctxt, 0, sizeof(ctxt));
6110 ctxt.pf_num = hw->pf_id;
6112 ctxt.uplink_seid = uplink_seid;
6113 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
6114 if (ch->type == I40E_VSI_VMDQ2)
6115 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
6117 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) {
6118 ctxt.info.valid_sections |=
6119 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6120 ctxt.info.switch_id =
6121 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6124 /* Set queue map for a given VSI context */
6125 i40e_channel_setup_queue_map(pf, &ctxt, ch);
6127 /* Now time to create VSI */
6128 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
6130 dev_info(&pf->pdev->dev,
6131 "add new vsi failed, err %s aq_err %s\n",
6132 i40e_stat_str(&pf->hw, ret),
6133 i40e_aq_str(&pf->hw,
6134 pf->hw.aq.asq_last_status));
6138 /* Success, update channel, set enabled_tc only if the channel
6141 ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
6142 ch->seid = ctxt.seid;
6143 ch->vsi_number = ctxt.vsi_number;
6144 ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx);
6146 /* copy just the sections touched not the entire info
6147 * since not all sections are valid as returned by
6150 ch->info.mapping_flags = ctxt.info.mapping_flags;
6151 memcpy(&ch->info.queue_mapping,
6152 &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
6153 memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
6154 sizeof(ctxt.info.tc_mapping));
6159 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
6162 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
6166 memset(&bw_data, 0, sizeof(bw_data));
6167 bw_data.tc_valid_bits = ch->enabled_tc;
6168 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6169 bw_data.tc_bw_credits[i] = bw_share[i];
6171 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid,
6174 dev_info(&vsi->back->pdev->dev,
6175 "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
6176 vsi->back->hw.aq.asq_last_status, ch->seid);
6180 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6181 ch->info.qs_handle[i] = bw_data.qs_handles[i];
6187 * i40e_channel_config_tx_ring - config TX ring associated with new channel
6188 * @pf: ptr to PF device
6189 * @vsi: the VSI being setup
6190 * @ch: ptr to channel structure
6192 * Configure TX rings associated with channel (VSI) since queues are being
6195 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
6196 struct i40e_vsi *vsi,
6197 struct i40e_channel *ch)
6201 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
6203 /* Enable ETS TCs with equal BW Share for now across all VSIs */
6204 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6205 if (ch->enabled_tc & BIT(i))
6209 /* configure BW for new VSI */
6210 ret = i40e_channel_config_bw(vsi, ch, bw_share);
6212 dev_info(&vsi->back->pdev->dev,
6213 "Failed configuring TC map %d for channel (seid %u)\n",
6214 ch->enabled_tc, ch->seid);
6218 for (i = 0; i < ch->num_queue_pairs; i++) {
6219 struct i40e_ring *tx_ring, *rx_ring;
6222 pf_q = ch->base_queue + i;
6224 /* Get to TX ring ptr of main VSI, for re-setup TX queue
6227 tx_ring = vsi->tx_rings[pf_q];
6230 /* Get the RX ring ptr */
6231 rx_ring = vsi->rx_rings[pf_q];
6239 * i40e_setup_hw_channel - setup new channel
6240 * @pf: ptr to PF device
6241 * @vsi: the VSI being setup
6242 * @ch: ptr to channel structure
6243 * @uplink_seid: underlying HW switching element (VEB) ID
6244 * @type: type of channel to be created (VMDq2/VF)
6246 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6247 * and configures TX rings accordingly
6249 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
6250 struct i40e_vsi *vsi,
6251 struct i40e_channel *ch,
6252 u16 uplink_seid, u8 type)
6256 ch->initialized = false;
6257 ch->base_queue = vsi->next_base_queue;
6260 /* Proceed with creation of channel (VMDq2) VSI */
6261 ret = i40e_add_channel(pf, uplink_seid, ch);
6263 dev_info(&pf->pdev->dev,
6264 "failed to add_channel using uplink_seid %u\n",
6269 /* Mark the successful creation of channel */
6270 ch->initialized = true;
6272 /* Reconfigure TX queues using QTX_CTL register */
6273 ret = i40e_channel_config_tx_ring(pf, vsi, ch);
6275 dev_info(&pf->pdev->dev,
6276 "failed to configure TX rings for channel %u\n",
6281 /* update 'next_base_queue' */
6282 vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
6283 dev_dbg(&pf->pdev->dev,
6284 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
6285 ch->seid, ch->vsi_number, ch->stat_counter_idx,
6286 ch->num_queue_pairs,
6287 vsi->next_base_queue);
6292 * i40e_setup_channel - setup new channel using uplink element
6293 * @pf: ptr to PF device
6294 * @vsi: pointer to the VSI to set up the channel within
6295 * @ch: ptr to channel structure
6297 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6298 * and uplink switching element (uplink_seid)
6300 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
6301 struct i40e_channel *ch)
6307 if (vsi->type == I40E_VSI_MAIN) {
6308 vsi_type = I40E_VSI_VMDQ2;
6310 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6315 /* underlying switching element */
6316 seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6318 /* create channel (VSI), configure TX rings */
6319 ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
6321 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6325 return ch->initialized ? true : false;
6329 * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6330 * @vsi: ptr to VSI which has PF backing
6332 * Sets up switch mode correctly if it needs to be changed and perform
6333 * what are allowed modes.
6335 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6338 struct i40e_pf *pf = vsi->back;
6339 struct i40e_hw *hw = &pf->hw;
6342 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6346 if (hw->dev_caps.switch_mode) {
6347 /* if switch mode is set, support mode2 (non-tunneled for
6348 * cloud filter) for now
6350 u32 switch_mode = hw->dev_caps.switch_mode &
6351 I40E_SWITCH_MODE_MASK;
6352 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6353 if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6355 dev_err(&pf->pdev->dev,
6356 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6357 hw->dev_caps.switch_mode);
6362 /* Set Bit 7 to be valid */
6363 mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6365 /* Set L4type for TCP support */
6366 mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6368 /* Set cloud filter mode */
6369 mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6371 /* Prep mode field for set_switch_config */
6372 ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6373 pf->last_sw_conf_valid_flags,
6375 if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)
6376 dev_err(&pf->pdev->dev,
6377 "couldn't set switch config bits, err %s aq_err %s\n",
6378 i40e_stat_str(hw, ret),
6380 hw->aq.asq_last_status));
6386 * i40e_create_queue_channel - function to create channel
6387 * @vsi: VSI to be configured
6388 * @ch: ptr to channel (it contains channel specific params)
6390 * This function creates channel (VSI) using num_queues specified by user,
6391 * reconfigs RSS if needed.
6393 int i40e_create_queue_channel(struct i40e_vsi *vsi,
6394 struct i40e_channel *ch)
6396 struct i40e_pf *pf = vsi->back;
6403 if (!ch->num_queue_pairs) {
6404 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6405 ch->num_queue_pairs);
6409 /* validate user requested num_queues for channel */
6410 err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6413 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6414 ch->num_queue_pairs);
6418 /* By default we are in VEPA mode, if this is the first VF/VMDq
6419 * VSI to be added switch to VEB mode.
6422 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
6423 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
6425 if (vsi->type == I40E_VSI_MAIN) {
6426 if (pf->flags & I40E_FLAG_TC_MQPRIO)
6427 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
6429 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
6431 /* now onwards for main VSI, number of queues will be value
6432 * of TC0's queue count
6436 /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6437 * it should be more than num_queues
6439 if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6440 dev_dbg(&pf->pdev->dev,
6441 "Error: cnt_q_avail (%u) less than num_queues %d\n",
6442 vsi->cnt_q_avail, ch->num_queue_pairs);
6446 /* reconfig_rss only if vsi type is MAIN_VSI */
6447 if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6448 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs);
6450 dev_info(&pf->pdev->dev,
6451 "Error: unable to reconfig rss for num_queues (%u)\n",
6452 ch->num_queue_pairs);
6457 if (!i40e_setup_channel(pf, vsi, ch)) {
6458 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6462 dev_info(&pf->pdev->dev,
6463 "Setup channel (id:%u) utilizing num_queues %d\n",
6464 ch->seid, ch->num_queue_pairs);
6466 /* configure VSI for BW limit */
6467 if (ch->max_tx_rate) {
6468 u64 credits = ch->max_tx_rate;
6470 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate))
6473 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6474 dev_dbg(&pf->pdev->dev,
6475 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6481 /* in case of VF, this will be main SRIOV VSI */
6482 ch->parent_vsi = vsi;
6484 /* and update main_vsi's count for queue_available to use */
6485 vsi->cnt_q_avail -= ch->num_queue_pairs;
6491 * i40e_configure_queue_channels - Add queue channel for the given TCs
6492 * @vsi: VSI to be configured
6494 * Configures queue channel mapping to the given TCs
6496 static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6498 struct i40e_channel *ch;
6502 /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6503 vsi->tc_seid_map[0] = vsi->seid;
6504 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6505 if (vsi->tc_config.enabled_tc & BIT(i)) {
6506 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6512 INIT_LIST_HEAD(&ch->list);
6513 ch->num_queue_pairs =
6514 vsi->tc_config.tc_info[i].qcount;
6516 vsi->tc_config.tc_info[i].qoffset;
6518 /* Bandwidth limit through tc interface is in bytes/s,
6521 max_rate = vsi->mqprio_qopt.max_rate[i];
6522 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6523 ch->max_tx_rate = max_rate;
6525 list_add_tail(&ch->list, &vsi->ch_list);
6527 ret = i40e_create_queue_channel(vsi, ch);
6529 dev_err(&vsi->back->pdev->dev,
6530 "Failed creating queue channel with TC%d: queues %d\n",
6531 i, ch->num_queue_pairs);
6534 vsi->tc_seid_map[i] = ch->seid;
6540 i40e_remove_queue_channels(vsi);
6545 * i40e_veb_config_tc - Configure TCs for given VEB
6547 * @enabled_tc: TC bitmap
6549 * Configures given TC bitmap for VEB (switching) element
6551 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6553 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6554 struct i40e_pf *pf = veb->pf;
6558 /* No TCs or already enabled TCs just return */
6559 if (!enabled_tc || veb->enabled_tc == enabled_tc)
6562 bw_data.tc_valid_bits = enabled_tc;
6563 /* bw_data.absolute_credits is not set (relative) */
6565 /* Enable ETS TCs with equal BW Share for now */
6566 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6567 if (enabled_tc & BIT(i))
6568 bw_data.tc_bw_share_credits[i] = 1;
6571 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6574 dev_info(&pf->pdev->dev,
6575 "VEB bw config failed, err %s aq_err %s\n",
6576 i40e_stat_str(&pf->hw, ret),
6577 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6581 /* Update the BW information */
6582 ret = i40e_veb_get_bw_info(veb);
6584 dev_info(&pf->pdev->dev,
6585 "Failed getting veb bw config, err %s aq_err %s\n",
6586 i40e_stat_str(&pf->hw, ret),
6587 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6594 #ifdef CONFIG_I40E_DCB
6596 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6599 * Reconfigure VEB/VSIs on a given PF; it is assumed that
6600 * the caller would've quiesce all the VSIs before calling
6603 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6609 /* Enable the TCs available on PF to all VEBs */
6610 tc_map = i40e_pf_get_tc_map(pf);
6611 if (tc_map == I40E_DEFAULT_TRAFFIC_CLASS)
6614 for (v = 0; v < I40E_MAX_VEB; v++) {
6617 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
6619 dev_info(&pf->pdev->dev,
6620 "Failed configuring TC for VEB seid=%d\n",
6622 /* Will try to configure as many components */
6626 /* Update each VSI */
6627 for (v = 0; v < pf->num_alloc_vsi; v++) {
6631 /* - Enable all TCs for the LAN VSI
6632 * - For all others keep them at TC0 for now
6634 if (v == pf->lan_vsi)
6635 tc_map = i40e_pf_get_tc_map(pf);
6637 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6639 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
6641 dev_info(&pf->pdev->dev,
6642 "Failed configuring TC for VSI seid=%d\n",
6644 /* Will try to configure as many components */
6646 /* Re-configure VSI vectors based on updated TC map */
6647 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
6648 if (pf->vsi[v]->netdev)
6649 i40e_dcbnl_set_all(pf->vsi[v]);
6655 * i40e_resume_port_tx - Resume port Tx
6658 * Resume a port's Tx and issue a PF reset in case of failure to
6661 static int i40e_resume_port_tx(struct i40e_pf *pf)
6663 struct i40e_hw *hw = &pf->hw;
6666 ret = i40e_aq_resume_port_tx(hw, NULL);
6668 dev_info(&pf->pdev->dev,
6669 "Resume Port Tx failed, err %s aq_err %s\n",
6670 i40e_stat_str(&pf->hw, ret),
6671 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6672 /* Schedule PF reset to recover */
6673 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6674 i40e_service_event_schedule(pf);
6681 * i40e_suspend_port_tx - Suspend port Tx
6684 * Suspend a port's Tx and issue a PF reset in case of failure.
6686 static int i40e_suspend_port_tx(struct i40e_pf *pf)
6688 struct i40e_hw *hw = &pf->hw;
6691 ret = i40e_aq_suspend_port_tx(hw, pf->mac_seid, NULL);
6693 dev_info(&pf->pdev->dev,
6694 "Suspend Port Tx failed, err %s aq_err %s\n",
6695 i40e_stat_str(&pf->hw, ret),
6696 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6697 /* Schedule PF reset to recover */
6698 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6699 i40e_service_event_schedule(pf);
6706 * i40e_hw_set_dcb_config - Program new DCBX settings into HW
6707 * @pf: PF being configured
6708 * @new_cfg: New DCBX configuration
6710 * Program DCB settings into HW and reconfigure VEB/VSIs on
6711 * given PF. Uses "Set LLDP MIB" AQC to program the hardware.
6713 static int i40e_hw_set_dcb_config(struct i40e_pf *pf,
6714 struct i40e_dcbx_config *new_cfg)
6716 struct i40e_dcbx_config *old_cfg = &pf->hw.local_dcbx_config;
6719 /* Check if need reconfiguration */
6720 if (!memcmp(&new_cfg, &old_cfg, sizeof(new_cfg))) {
6721 dev_dbg(&pf->pdev->dev, "No Change in DCB Config required.\n");
6725 /* Config change disable all VSIs */
6726 i40e_pf_quiesce_all_vsi(pf);
6728 /* Copy the new config to the current config */
6729 *old_cfg = *new_cfg;
6730 old_cfg->etsrec = old_cfg->etscfg;
6731 ret = i40e_set_dcb_config(&pf->hw);
6733 dev_info(&pf->pdev->dev,
6734 "Set DCB Config failed, err %s aq_err %s\n",
6735 i40e_stat_str(&pf->hw, ret),
6736 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6740 /* Changes in configuration update VEB/VSI */
6741 i40e_dcb_reconfigure(pf);
6743 /* In case of reset do not try to resume anything */
6744 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) {
6745 /* Re-start the VSIs if disabled */
6746 ret = i40e_resume_port_tx(pf);
6747 /* In case of error no point in resuming VSIs */
6750 i40e_pf_unquiesce_all_vsi(pf);
6757 * i40e_hw_dcb_config - Program new DCBX settings into HW
6758 * @pf: PF being configured
6759 * @new_cfg: New DCBX configuration
6761 * Program DCB settings into HW and reconfigure VEB/VSIs on
6764 int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)
6766 struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6767 u8 prio_type[I40E_MAX_TRAFFIC_CLASS] = {0};
6768 u32 mfs_tc[I40E_MAX_TRAFFIC_CLASS];
6769 struct i40e_dcbx_config *old_cfg;
6770 u8 mode[I40E_MAX_TRAFFIC_CLASS];
6771 struct i40e_rx_pb_config pb_cfg;
6772 struct i40e_hw *hw = &pf->hw;
6773 u8 num_ports = hw->num_ports;
6781 dev_dbg(&pf->pdev->dev, "Configuring DCB registers directly\n");
6782 /* Un-pack information to Program ETS HW via shared API
6785 * ETS/NON-ETS arbiter mode
6786 * max exponent (credit refills)
6787 * Total number of ports
6788 * PFC priority bit-map
6791 * Arbiter mode between UPs sharing same TC
6792 * TSA table (ETS or non-ETS)
6793 * EEE enabled or not
6797 new_numtc = i40e_dcb_get_num_tc(new_cfg);
6799 memset(&ets_data, 0, sizeof(ets_data));
6800 for (i = 0; i < new_numtc; i++) {
6802 switch (new_cfg->etscfg.tsatable[i]) {
6803 case I40E_IEEE_TSA_ETS:
6804 prio_type[i] = I40E_DCB_PRIO_TYPE_ETS;
6805 ets_data.tc_bw_share_credits[i] =
6806 new_cfg->etscfg.tcbwtable[i];
6808 case I40E_IEEE_TSA_STRICT:
6809 prio_type[i] = I40E_DCB_PRIO_TYPE_STRICT;
6811 ets_data.tc_bw_share_credits[i] =
6812 I40E_DCB_STRICT_PRIO_CREDITS;
6815 /* Invalid TSA type */
6816 need_reconfig = false;
6821 old_cfg = &hw->local_dcbx_config;
6822 /* Check if need reconfiguration */
6823 need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg, new_cfg);
6825 /* If needed, enable/disable frame tagging, disable all VSIs
6826 * and suspend port tx
6828 if (need_reconfig) {
6829 /* Enable DCB tagging only when more than one TC */
6831 pf->flags |= I40E_FLAG_DCB_ENABLED;
6833 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6835 set_bit(__I40E_PORT_SUSPENDED, pf->state);
6836 /* Reconfiguration needed quiesce all VSIs */
6837 i40e_pf_quiesce_all_vsi(pf);
6838 ret = i40e_suspend_port_tx(pf);
6843 /* Configure Port ETS Tx Scheduler */
6844 ets_data.tc_valid_bits = tc_map;
6845 ets_data.tc_strict_priority_flags = lltc_map;
6846 ret = i40e_aq_config_switch_comp_ets
6847 (hw, pf->mac_seid, &ets_data,
6848 i40e_aqc_opc_modify_switching_comp_ets, NULL);
6850 dev_info(&pf->pdev->dev,
6851 "Modify Port ETS failed, err %s aq_err %s\n",
6852 i40e_stat_str(&pf->hw, ret),
6853 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6857 /* Configure Rx ETS HW */
6858 memset(&mode, I40E_DCB_ARB_MODE_ROUND_ROBIN, sizeof(mode));
6859 i40e_dcb_hw_set_num_tc(hw, new_numtc);
6860 i40e_dcb_hw_rx_fifo_config(hw, I40E_DCB_ARB_MODE_ROUND_ROBIN,
6861 I40E_DCB_ARB_MODE_STRICT_PRIORITY,
6862 I40E_DCB_DEFAULT_MAX_EXPONENT,
6864 i40e_dcb_hw_rx_cmd_monitor_config(hw, new_numtc, num_ports);
6865 i40e_dcb_hw_rx_ets_bw_config(hw, new_cfg->etscfg.tcbwtable, mode,
6867 i40e_dcb_hw_pfc_config(hw, new_cfg->pfc.pfcenable,
6868 new_cfg->etscfg.prioritytable);
6869 i40e_dcb_hw_rx_up2tc_config(hw, new_cfg->etscfg.prioritytable);
6871 /* Configure Rx Packet Buffers in HW */
6872 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6873 mfs_tc[i] = pf->vsi[pf->lan_vsi]->netdev->mtu;
6874 mfs_tc[i] += I40E_PACKET_HDR_PAD;
6877 i40e_dcb_hw_calculate_pool_sizes(hw, num_ports,
6878 false, new_cfg->pfc.pfcenable,
6880 i40e_dcb_hw_rx_pb_config(hw, &pf->pb_cfg, &pb_cfg);
6882 /* Update the local Rx Packet buffer config */
6883 pf->pb_cfg = pb_cfg;
6885 /* Inform the FW about changes to DCB configuration */
6886 ret = i40e_aq_dcb_updated(&pf->hw, NULL);
6888 dev_info(&pf->pdev->dev,
6889 "DCB Updated failed, err %s aq_err %s\n",
6890 i40e_stat_str(&pf->hw, ret),
6891 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6895 /* Update the port DCBx configuration */
6896 *old_cfg = *new_cfg;
6898 /* Changes in configuration update VEB/VSI */
6899 i40e_dcb_reconfigure(pf);
6901 /* Re-start the VSIs if disabled */
6902 if (need_reconfig) {
6903 ret = i40e_resume_port_tx(pf);
6905 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
6906 /* In case of error no point in resuming VSIs */
6910 /* Wait for the PF's queues to be disabled */
6911 ret = i40e_pf_wait_queues_disabled(pf);
6913 /* Schedule PF reset to recover */
6914 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6915 i40e_service_event_schedule(pf);
6918 i40e_pf_unquiesce_all_vsi(pf);
6919 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
6920 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
6922 /* registers are set, lets apply */
6923 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB)
6924 ret = i40e_hw_set_dcb_config(pf, new_cfg);
6932 * i40e_dcb_sw_default_config - Set default DCB configuration when DCB in SW
6933 * @pf: PF being queried
6935 * Set default DCB configuration in case DCB is to be done in SW.
6937 int i40e_dcb_sw_default_config(struct i40e_pf *pf)
6939 struct i40e_dcbx_config *dcb_cfg = &pf->hw.local_dcbx_config;
6940 struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6941 struct i40e_hw *hw = &pf->hw;
6944 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB) {
6945 /* Update the local cached instance with TC0 ETS */
6946 memset(&pf->tmp_cfg, 0, sizeof(struct i40e_dcbx_config));
6947 pf->tmp_cfg.etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
6948 pf->tmp_cfg.etscfg.maxtcs = 0;
6949 pf->tmp_cfg.etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
6950 pf->tmp_cfg.etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
6951 pf->tmp_cfg.pfc.willing = I40E_IEEE_DEFAULT_PFC_WILLING;
6952 pf->tmp_cfg.pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
6953 /* FW needs one App to configure HW */
6954 pf->tmp_cfg.numapps = I40E_IEEE_DEFAULT_NUM_APPS;
6955 pf->tmp_cfg.app[0].selector = I40E_APP_SEL_ETHTYPE;
6956 pf->tmp_cfg.app[0].priority = I40E_IEEE_DEFAULT_APP_PRIO;
6957 pf->tmp_cfg.app[0].protocolid = I40E_APP_PROTOID_FCOE;
6959 return i40e_hw_set_dcb_config(pf, &pf->tmp_cfg);
6962 memset(&ets_data, 0, sizeof(ets_data));
6963 ets_data.tc_valid_bits = I40E_DEFAULT_TRAFFIC_CLASS; /* TC0 only */
6964 ets_data.tc_strict_priority_flags = 0; /* ETS */
6965 ets_data.tc_bw_share_credits[0] = I40E_IEEE_DEFAULT_ETS_TCBW; /* 100% to TC0 */
6967 /* Enable ETS on the Physical port */
6968 err = i40e_aq_config_switch_comp_ets
6969 (hw, pf->mac_seid, &ets_data,
6970 i40e_aqc_opc_enable_switching_comp_ets, NULL);
6972 dev_info(&pf->pdev->dev,
6973 "Enable Port ETS failed, err %s aq_err %s\n",
6974 i40e_stat_str(&pf->hw, err),
6975 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6980 /* Update the local cached instance with TC0 ETS */
6981 dcb_cfg->etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
6982 dcb_cfg->etscfg.cbs = 0;
6983 dcb_cfg->etscfg.maxtcs = I40E_MAX_TRAFFIC_CLASS;
6984 dcb_cfg->etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
6991 * i40e_init_pf_dcb - Initialize DCB configuration
6992 * @pf: PF being configured
6994 * Query the current DCB configuration and cache it
6995 * in the hardware structure
6997 static int i40e_init_pf_dcb(struct i40e_pf *pf)
6999 struct i40e_hw *hw = &pf->hw;
7002 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
7003 * Also do not enable DCBx if FW LLDP agent is disabled
7005 if (pf->hw_features & I40E_HW_NO_DCB_SUPPORT) {
7006 dev_info(&pf->pdev->dev, "DCB is not supported.\n");
7007 err = I40E_NOT_SUPPORTED;
7010 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) {
7011 dev_info(&pf->pdev->dev, "FW LLDP is disabled, attempting SW DCB\n");
7012 err = i40e_dcb_sw_default_config(pf);
7014 dev_info(&pf->pdev->dev, "Could not initialize SW DCB\n");
7017 dev_info(&pf->pdev->dev, "SW DCB initialization succeeded.\n");
7018 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
7019 DCB_CAP_DCBX_VER_IEEE;
7020 /* at init capable but disabled */
7021 pf->flags |= I40E_FLAG_DCB_CAPABLE;
7022 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7025 err = i40e_init_dcb(hw, true);
7027 /* Device/Function is not DCBX capable */
7028 if ((!hw->func_caps.dcb) ||
7029 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
7030 dev_info(&pf->pdev->dev,
7031 "DCBX offload is not supported or is disabled for this PF.\n");
7033 /* When status is not DISABLED then DCBX in FW */
7034 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
7035 DCB_CAP_DCBX_VER_IEEE;
7037 pf->flags |= I40E_FLAG_DCB_CAPABLE;
7038 /* Enable DCB tagging only when more than one TC
7039 * or explicitly disable if only one TC
7041 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
7042 pf->flags |= I40E_FLAG_DCB_ENABLED;
7044 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7045 dev_dbg(&pf->pdev->dev,
7046 "DCBX offload is supported for this PF.\n");
7048 } else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {
7049 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
7050 pf->flags |= I40E_FLAG_DISABLE_FW_LLDP;
7052 dev_info(&pf->pdev->dev,
7053 "Query for DCB configuration failed, err %s aq_err %s\n",
7054 i40e_stat_str(&pf->hw, err),
7055 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7061 #endif /* CONFIG_I40E_DCB */
7064 * i40e_print_link_message - print link up or down
7065 * @vsi: the VSI for which link needs a message
7066 * @isup: true of link is up, false otherwise
7068 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
7070 enum i40e_aq_link_speed new_speed;
7071 struct i40e_pf *pf = vsi->back;
7072 char *speed = "Unknown";
7073 char *fc = "Unknown";
7079 new_speed = pf->hw.phy.link_info.link_speed;
7081 new_speed = I40E_LINK_SPEED_UNKNOWN;
7083 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
7085 vsi->current_isup = isup;
7086 vsi->current_speed = new_speed;
7088 netdev_info(vsi->netdev, "NIC Link is Down\n");
7092 /* Warn user if link speed on NPAR enabled partition is not at
7095 if (pf->hw.func_caps.npar_enable &&
7096 (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
7097 pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
7098 netdev_warn(vsi->netdev,
7099 "The partition detected link speed that is less than 10Gbps\n");
7101 switch (pf->hw.phy.link_info.link_speed) {
7102 case I40E_LINK_SPEED_40GB:
7105 case I40E_LINK_SPEED_20GB:
7108 case I40E_LINK_SPEED_25GB:
7111 case I40E_LINK_SPEED_10GB:
7114 case I40E_LINK_SPEED_5GB:
7117 case I40E_LINK_SPEED_2_5GB:
7120 case I40E_LINK_SPEED_1GB:
7123 case I40E_LINK_SPEED_100MB:
7130 switch (pf->hw.fc.current_mode) {
7134 case I40E_FC_TX_PAUSE:
7137 case I40E_FC_RX_PAUSE:
7145 if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
7150 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7153 if (pf->hw.phy.link_info.fec_info &
7154 I40E_AQ_CONFIG_FEC_KR_ENA)
7155 fec = "CL74 FC-FEC/BASE-R";
7156 else if (pf->hw.phy.link_info.fec_info &
7157 I40E_AQ_CONFIG_FEC_RS_ENA)
7158 fec = "CL108 RS-FEC";
7160 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
7161 * both RS and FC are requested
7163 if (vsi->back->hw.phy.link_info.req_fec_info &
7164 (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
7165 if (vsi->back->hw.phy.link_info.req_fec_info &
7166 I40E_AQ_REQUEST_FEC_RS)
7167 req_fec = "CL108 RS-FEC";
7169 req_fec = "CL74 FC-FEC/BASE-R";
7171 netdev_info(vsi->netdev,
7172 "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7173 speed, req_fec, fec, an, fc);
7174 } else if (pf->hw.device_id == I40E_DEV_ID_KX_X722) {
7179 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7182 if (pf->hw.phy.link_info.fec_info &
7183 I40E_AQ_CONFIG_FEC_KR_ENA)
7184 fec = "CL74 FC-FEC/BASE-R";
7186 if (pf->hw.phy.link_info.req_fec_info &
7187 I40E_AQ_REQUEST_FEC_KR)
7188 req_fec = "CL74 FC-FEC/BASE-R";
7190 netdev_info(vsi->netdev,
7191 "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7192 speed, req_fec, fec, an, fc);
7194 netdev_info(vsi->netdev,
7195 "NIC Link is Up, %sbps Full Duplex, Flow Control: %s\n",
7202 * i40e_up_complete - Finish the last steps of bringing up a connection
7203 * @vsi: the VSI being configured
7205 static int i40e_up_complete(struct i40e_vsi *vsi)
7207 struct i40e_pf *pf = vsi->back;
7210 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7211 i40e_vsi_configure_msix(vsi);
7213 i40e_configure_msi_and_legacy(vsi);
7216 err = i40e_vsi_start_rings(vsi);
7220 clear_bit(__I40E_VSI_DOWN, vsi->state);
7221 i40e_napi_enable_all(vsi);
7222 i40e_vsi_enable_irq(vsi);
7224 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
7226 i40e_print_link_message(vsi, true);
7227 netif_tx_start_all_queues(vsi->netdev);
7228 netif_carrier_on(vsi->netdev);
7231 /* replay FDIR SB filters */
7232 if (vsi->type == I40E_VSI_FDIR) {
7233 /* reset fd counters */
7236 i40e_fdir_filter_restore(vsi);
7239 /* On the next run of the service_task, notify any clients of the new
7242 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7243 i40e_service_event_schedule(pf);
7249 * i40e_vsi_reinit_locked - Reset the VSI
7250 * @vsi: the VSI being configured
7252 * Rebuild the ring structs after some configuration
7253 * has changed, e.g. MTU size.
7255 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
7257 struct i40e_pf *pf = vsi->back;
7259 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
7260 usleep_range(1000, 2000);
7264 clear_bit(__I40E_CONFIG_BUSY, pf->state);
7268 * i40e_force_link_state - Force the link status
7269 * @pf: board private structure
7270 * @is_up: whether the link state should be forced up or down
7272 static i40e_status i40e_force_link_state(struct i40e_pf *pf, bool is_up)
7274 struct i40e_aq_get_phy_abilities_resp abilities;
7275 struct i40e_aq_set_phy_config config = {0};
7276 bool non_zero_phy_type = is_up;
7277 struct i40e_hw *hw = &pf->hw;
7282 /* Card might've been put in an unstable state by other drivers
7283 * and applications, which causes incorrect speed values being
7284 * set on startup. In order to clear speed registers, we call
7285 * get_phy_capabilities twice, once to get initial state of
7286 * available speeds, and once to get current PHY config.
7288 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
7291 dev_err(&pf->pdev->dev,
7292 "failed to get phy cap., ret = %s last_status = %s\n",
7293 i40e_stat_str(hw, err),
7294 i40e_aq_str(hw, hw->aq.asq_last_status));
7297 speed = abilities.link_speed;
7299 /* Get the current phy config */
7300 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
7303 dev_err(&pf->pdev->dev,
7304 "failed to get phy cap., ret = %s last_status = %s\n",
7305 i40e_stat_str(hw, err),
7306 i40e_aq_str(hw, hw->aq.asq_last_status));
7310 /* If link needs to go up, but was not forced to go down,
7311 * and its speed values are OK, no need for a flap
7312 * if non_zero_phy_type was set, still need to force up
7314 if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)
7315 non_zero_phy_type = true;
7316 else if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0)
7317 return I40E_SUCCESS;
7319 /* To force link we need to set bits for all supported PHY types,
7320 * but there are now more than 32, so we need to split the bitmap
7321 * across two fields.
7323 mask = I40E_PHY_TYPES_BITMASK;
7325 non_zero_phy_type ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
7326 config.phy_type_ext =
7327 non_zero_phy_type ? (u8)((mask >> 32) & 0xff) : 0;
7328 /* Copy the old settings, except of phy_type */
7329 config.abilities = abilities.abilities;
7330 if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED) {
7332 config.abilities |= I40E_AQ_PHY_ENABLE_LINK;
7334 config.abilities &= ~(I40E_AQ_PHY_ENABLE_LINK);
7336 if (abilities.link_speed != 0)
7337 config.link_speed = abilities.link_speed;
7339 config.link_speed = speed;
7340 config.eee_capability = abilities.eee_capability;
7341 config.eeer = abilities.eeer_val;
7342 config.low_power_ctrl = abilities.d3_lpan;
7343 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
7344 I40E_AQ_PHY_FEC_CONFIG_MASK;
7345 err = i40e_aq_set_phy_config(hw, &config, NULL);
7348 dev_err(&pf->pdev->dev,
7349 "set phy config ret = %s last_status = %s\n",
7350 i40e_stat_str(&pf->hw, err),
7351 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7355 /* Update the link info */
7356 err = i40e_update_link_info(hw);
7358 /* Wait a little bit (on 40G cards it sometimes takes a really
7359 * long time for link to come back from the atomic reset)
7363 i40e_update_link_info(hw);
7366 i40e_aq_set_link_restart_an(hw, is_up, NULL);
7368 return I40E_SUCCESS;
7372 * i40e_up - Bring the connection back up after being down
7373 * @vsi: the VSI being configured
7375 int i40e_up(struct i40e_vsi *vsi)
7379 if (vsi->type == I40E_VSI_MAIN &&
7380 (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7381 vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7382 i40e_force_link_state(vsi->back, true);
7384 err = i40e_vsi_configure(vsi);
7386 err = i40e_up_complete(vsi);
7392 * i40e_down - Shutdown the connection processing
7393 * @vsi: the VSI being stopped
7395 void i40e_down(struct i40e_vsi *vsi)
7399 /* It is assumed that the caller of this function
7400 * sets the vsi->state __I40E_VSI_DOWN bit.
7403 netif_carrier_off(vsi->netdev);
7404 netif_tx_disable(vsi->netdev);
7406 i40e_vsi_disable_irq(vsi);
7407 i40e_vsi_stop_rings(vsi);
7408 if (vsi->type == I40E_VSI_MAIN &&
7409 (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7410 vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7411 i40e_force_link_state(vsi->back, false);
7412 i40e_napi_disable_all(vsi);
7414 for (i = 0; i < vsi->num_queue_pairs; i++) {
7415 i40e_clean_tx_ring(vsi->tx_rings[i]);
7416 if (i40e_enabled_xdp_vsi(vsi)) {
7417 /* Make sure that in-progress ndo_xdp_xmit and
7418 * ndo_xsk_wakeup calls are completed.
7421 i40e_clean_tx_ring(vsi->xdp_rings[i]);
7423 i40e_clean_rx_ring(vsi->rx_rings[i]);
7429 * i40e_validate_mqprio_qopt- validate queue mapping info
7430 * @vsi: the VSI being configured
7431 * @mqprio_qopt: queue parametrs
7433 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
7434 struct tc_mqprio_qopt_offload *mqprio_qopt)
7436 u64 sum_max_rate = 0;
7440 if (mqprio_qopt->qopt.offset[0] != 0 ||
7441 mqprio_qopt->qopt.num_tc < 1 ||
7442 mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
7444 for (i = 0; ; i++) {
7445 if (!mqprio_qopt->qopt.count[i])
7447 if (mqprio_qopt->min_rate[i]) {
7448 dev_err(&vsi->back->pdev->dev,
7449 "Invalid min tx rate (greater than 0) specified\n");
7452 max_rate = mqprio_qopt->max_rate[i];
7453 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
7454 sum_max_rate += max_rate;
7456 if (i >= mqprio_qopt->qopt.num_tc - 1)
7458 if (mqprio_qopt->qopt.offset[i + 1] !=
7459 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
7462 if (vsi->num_queue_pairs <
7463 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
7464 dev_err(&vsi->back->pdev->dev,
7465 "Failed to create traffic channel, insufficient number of queues.\n");
7468 if (sum_max_rate > i40e_get_link_speed(vsi)) {
7469 dev_err(&vsi->back->pdev->dev,
7470 "Invalid max tx rate specified\n");
7477 * i40e_vsi_set_default_tc_config - set default values for tc configuration
7478 * @vsi: the VSI being configured
7480 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
7485 /* Only TC0 is enabled */
7486 vsi->tc_config.numtc = 1;
7487 vsi->tc_config.enabled_tc = 1;
7488 qcount = min_t(int, vsi->alloc_queue_pairs,
7489 i40e_pf_get_max_q_per_tc(vsi->back));
7490 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7491 /* For the TC that is not enabled set the offset to default
7492 * queue and allocate one queue for the given TC.
7494 vsi->tc_config.tc_info[i].qoffset = 0;
7496 vsi->tc_config.tc_info[i].qcount = qcount;
7498 vsi->tc_config.tc_info[i].qcount = 1;
7499 vsi->tc_config.tc_info[i].netdev_tc = 0;
7504 * i40e_del_macvlan_filter
7505 * @hw: pointer to the HW structure
7506 * @seid: seid of the channel VSI
7507 * @macaddr: the mac address to apply as a filter
7508 * @aq_err: store the admin Q error
7510 * This function deletes a mac filter on the channel VSI which serves as the
7511 * macvlan. Returns 0 on success.
7513 static i40e_status i40e_del_macvlan_filter(struct i40e_hw *hw, u16 seid,
7514 const u8 *macaddr, int *aq_err)
7516 struct i40e_aqc_remove_macvlan_element_data element;
7519 memset(&element, 0, sizeof(element));
7520 ether_addr_copy(element.mac_addr, macaddr);
7521 element.vlan_tag = 0;
7522 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
7523 status = i40e_aq_remove_macvlan(hw, seid, &element, 1, NULL);
7524 *aq_err = hw->aq.asq_last_status;
7530 * i40e_add_macvlan_filter
7531 * @hw: pointer to the HW structure
7532 * @seid: seid of the channel VSI
7533 * @macaddr: the mac address to apply as a filter
7534 * @aq_err: store the admin Q error
7536 * This function adds a mac filter on the channel VSI which serves as the
7537 * macvlan. Returns 0 on success.
7539 static i40e_status i40e_add_macvlan_filter(struct i40e_hw *hw, u16 seid,
7540 const u8 *macaddr, int *aq_err)
7542 struct i40e_aqc_add_macvlan_element_data element;
7546 ether_addr_copy(element.mac_addr, macaddr);
7547 element.vlan_tag = 0;
7548 element.queue_number = 0;
7549 element.match_method = I40E_AQC_MM_ERR_NO_RES;
7550 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
7551 element.flags = cpu_to_le16(cmd_flags);
7552 status = i40e_aq_add_macvlan(hw, seid, &element, 1, NULL);
7553 *aq_err = hw->aq.asq_last_status;
7559 * i40e_reset_ch_rings - Reset the queue contexts in a channel
7560 * @vsi: the VSI we want to access
7561 * @ch: the channel we want to access
7563 static void i40e_reset_ch_rings(struct i40e_vsi *vsi, struct i40e_channel *ch)
7565 struct i40e_ring *tx_ring, *rx_ring;
7569 for (i = 0; i < ch->num_queue_pairs; i++) {
7570 pf_q = ch->base_queue + i;
7571 tx_ring = vsi->tx_rings[pf_q];
7573 rx_ring = vsi->rx_rings[pf_q];
7579 * i40e_free_macvlan_channels
7580 * @vsi: the VSI we want to access
7582 * This function frees the Qs of the channel VSI from
7583 * the stack and also deletes the channel VSIs which
7584 * serve as macvlans.
7586 static void i40e_free_macvlan_channels(struct i40e_vsi *vsi)
7588 struct i40e_channel *ch, *ch_tmp;
7591 if (list_empty(&vsi->macvlan_list))
7594 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7595 struct i40e_vsi *parent_vsi;
7597 if (i40e_is_channel_macvlan(ch)) {
7598 i40e_reset_ch_rings(vsi, ch);
7599 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7600 netdev_unbind_sb_channel(vsi->netdev, ch->fwd->netdev);
7601 netdev_set_sb_channel(ch->fwd->netdev, 0);
7606 list_del(&ch->list);
7607 parent_vsi = ch->parent_vsi;
7608 if (!parent_vsi || !ch->initialized) {
7613 /* remove the VSI */
7614 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
7617 dev_err(&vsi->back->pdev->dev,
7618 "unable to remove channel (%d) for parent VSI(%d)\n",
7619 ch->seid, parent_vsi->seid);
7622 vsi->macvlan_cnt = 0;
7626 * i40e_fwd_ring_up - bring the macvlan device up
7627 * @vsi: the VSI we want to access
7628 * @vdev: macvlan netdevice
7629 * @fwd: the private fwd structure
7631 static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,
7632 struct i40e_fwd_adapter *fwd)
7634 struct i40e_channel *ch = NULL, *ch_tmp, *iter;
7635 int ret = 0, num_tc = 1, i, aq_err;
7636 struct i40e_pf *pf = vsi->back;
7637 struct i40e_hw *hw = &pf->hw;
7639 /* Go through the list and find an available channel */
7640 list_for_each_entry_safe(iter, ch_tmp, &vsi->macvlan_list, list) {
7641 if (!i40e_is_channel_macvlan(iter)) {
7643 /* record configuration for macvlan interface in vdev */
7644 for (i = 0; i < num_tc; i++)
7645 netdev_bind_sb_channel_queue(vsi->netdev, vdev,
7647 iter->num_queue_pairs,
7649 for (i = 0; i < iter->num_queue_pairs; i++) {
7650 struct i40e_ring *tx_ring, *rx_ring;
7653 pf_q = iter->base_queue + i;
7655 /* Get to TX ring ptr */
7656 tx_ring = vsi->tx_rings[pf_q];
7659 /* Get the RX ring ptr */
7660 rx_ring = vsi->rx_rings[pf_q];
7671 /* Guarantee all rings are updated before we update the
7672 * MAC address filter.
7676 /* Add a mac filter */
7677 ret = i40e_add_macvlan_filter(hw, ch->seid, vdev->dev_addr, &aq_err);
7679 /* if we cannot add the MAC rule then disable the offload */
7680 macvlan_release_l2fw_offload(vdev);
7681 for (i = 0; i < ch->num_queue_pairs; i++) {
7682 struct i40e_ring *rx_ring;
7685 pf_q = ch->base_queue + i;
7686 rx_ring = vsi->rx_rings[pf_q];
7687 rx_ring->netdev = NULL;
7689 dev_info(&pf->pdev->dev,
7690 "Error adding mac filter on macvlan err %s, aq_err %s\n",
7691 i40e_stat_str(hw, ret),
7692 i40e_aq_str(hw, aq_err));
7693 netdev_err(vdev, "L2fwd offload disabled to L2 filter error\n");
7700 * i40e_setup_macvlans - create the channels which will be macvlans
7701 * @vsi: the VSI we want to access
7702 * @macvlan_cnt: no. of macvlans to be setup
7703 * @qcnt: no. of Qs per macvlan
7704 * @vdev: macvlan netdevice
7706 static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt,
7707 struct net_device *vdev)
7709 struct i40e_pf *pf = vsi->back;
7710 struct i40e_hw *hw = &pf->hw;
7711 struct i40e_vsi_context ctxt;
7712 u16 sections, qmap, num_qps;
7713 struct i40e_channel *ch;
7714 int i, pow, ret = 0;
7717 if (vsi->type != I40E_VSI_MAIN || !macvlan_cnt)
7720 num_qps = vsi->num_queue_pairs - (macvlan_cnt * qcnt);
7722 /* find the next higher power-of-2 of num queue pairs */
7723 pow = fls(roundup_pow_of_two(num_qps) - 1);
7725 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
7726 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
7728 /* Setup context bits for the main VSI */
7729 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
7730 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
7731 memset(&ctxt, 0, sizeof(ctxt));
7732 ctxt.seid = vsi->seid;
7733 ctxt.pf_num = vsi->back->hw.pf_id;
7735 ctxt.uplink_seid = vsi->uplink_seid;
7736 ctxt.info = vsi->info;
7737 ctxt.info.tc_mapping[0] = cpu_to_le16(qmap);
7738 ctxt.info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
7739 ctxt.info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
7740 ctxt.info.valid_sections |= cpu_to_le16(sections);
7742 /* Reconfigure RSS for main VSI with new max queue count */
7743 vsi->rss_size = max_t(u16, num_qps, qcnt);
7744 ret = i40e_vsi_config_rss(vsi);
7746 dev_info(&pf->pdev->dev,
7747 "Failed to reconfig RSS for num_queues (%u)\n",
7751 vsi->reconfig_rss = true;
7752 dev_dbg(&vsi->back->pdev->dev,
7753 "Reconfigured RSS with num_queues (%u)\n", vsi->rss_size);
7754 vsi->next_base_queue = num_qps;
7755 vsi->cnt_q_avail = vsi->num_queue_pairs - num_qps;
7757 /* Update the VSI after updating the VSI queue-mapping
7760 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7762 dev_info(&pf->pdev->dev,
7763 "Update vsi tc config failed, err %s aq_err %s\n",
7764 i40e_stat_str(hw, ret),
7765 i40e_aq_str(hw, hw->aq.asq_last_status));
7768 /* update the local VSI info with updated queue map */
7769 i40e_vsi_update_queue_map(vsi, &ctxt);
7770 vsi->info.valid_sections = 0;
7772 /* Create channels for macvlans */
7773 INIT_LIST_HEAD(&vsi->macvlan_list);
7774 for (i = 0; i < macvlan_cnt; i++) {
7775 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
7780 INIT_LIST_HEAD(&ch->list);
7781 ch->num_queue_pairs = qcnt;
7782 if (!i40e_setup_channel(pf, vsi, ch)) {
7787 ch->parent_vsi = vsi;
7788 vsi->cnt_q_avail -= ch->num_queue_pairs;
7790 list_add_tail(&ch->list, &vsi->macvlan_list);
7796 dev_info(&pf->pdev->dev, "Failed to setup macvlans\n");
7797 i40e_free_macvlan_channels(vsi);
7803 * i40e_fwd_add - configure macvlans
7804 * @netdev: net device to configure
7805 * @vdev: macvlan netdevice
7807 static void *i40e_fwd_add(struct net_device *netdev, struct net_device *vdev)
7809 struct i40e_netdev_priv *np = netdev_priv(netdev);
7810 u16 q_per_macvlan = 0, macvlan_cnt = 0, vectors;
7811 struct i40e_vsi *vsi = np->vsi;
7812 struct i40e_pf *pf = vsi->back;
7813 struct i40e_fwd_adapter *fwd;
7814 int avail_macvlan, ret;
7816 if ((pf->flags & I40E_FLAG_DCB_ENABLED)) {
7817 netdev_info(netdev, "Macvlans are not supported when DCB is enabled\n");
7818 return ERR_PTR(-EINVAL);
7820 if ((pf->flags & I40E_FLAG_TC_MQPRIO)) {
7821 netdev_info(netdev, "Macvlans are not supported when HW TC offload is on\n");
7822 return ERR_PTR(-EINVAL);
7824 if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) {
7825 netdev_info(netdev, "Not enough vectors available to support macvlans\n");
7826 return ERR_PTR(-EINVAL);
7829 /* The macvlan device has to be a single Q device so that the
7830 * tc_to_txq field can be reused to pick the tx queue.
7832 if (netif_is_multiqueue(vdev))
7833 return ERR_PTR(-ERANGE);
7835 if (!vsi->macvlan_cnt) {
7836 /* reserve bit 0 for the pf device */
7837 set_bit(0, vsi->fwd_bitmask);
7839 /* Try to reserve as many queues as possible for macvlans. First
7840 * reserve 3/4th of max vectors, then half, then quarter and
7841 * calculate Qs per macvlan as you go
7843 vectors = pf->num_lan_msix;
7844 if (vectors <= I40E_MAX_MACVLANS && vectors > 64) {
7845 /* allocate 4 Qs per macvlan and 32 Qs to the PF*/
7847 macvlan_cnt = (vectors - 32) / 4;
7848 } else if (vectors <= 64 && vectors > 32) {
7849 /* allocate 2 Qs per macvlan and 16 Qs to the PF*/
7851 macvlan_cnt = (vectors - 16) / 2;
7852 } else if (vectors <= 32 && vectors > 16) {
7853 /* allocate 1 Q per macvlan and 16 Qs to the PF*/
7855 macvlan_cnt = vectors - 16;
7856 } else if (vectors <= 16 && vectors > 8) {
7857 /* allocate 1 Q per macvlan and 8 Qs to the PF */
7859 macvlan_cnt = vectors - 8;
7861 /* allocate 1 Q per macvlan and 1 Q to the PF */
7863 macvlan_cnt = vectors - 1;
7866 if (macvlan_cnt == 0)
7867 return ERR_PTR(-EBUSY);
7869 /* Quiesce VSI queues */
7870 i40e_quiesce_vsi(vsi);
7872 /* sets up the macvlans but does not "enable" them */
7873 ret = i40e_setup_macvlans(vsi, macvlan_cnt, q_per_macvlan,
7876 return ERR_PTR(ret);
7879 i40e_unquiesce_vsi(vsi);
7881 avail_macvlan = find_first_zero_bit(vsi->fwd_bitmask,
7883 if (avail_macvlan >= I40E_MAX_MACVLANS)
7884 return ERR_PTR(-EBUSY);
7886 /* create the fwd struct */
7887 fwd = kzalloc(sizeof(*fwd), GFP_KERNEL);
7889 return ERR_PTR(-ENOMEM);
7891 set_bit(avail_macvlan, vsi->fwd_bitmask);
7892 fwd->bit_no = avail_macvlan;
7893 netdev_set_sb_channel(vdev, avail_macvlan);
7896 if (!netif_running(netdev))
7899 /* Set fwd ring up */
7900 ret = i40e_fwd_ring_up(vsi, vdev, fwd);
7902 /* unbind the queues and drop the subordinate channel config */
7903 netdev_unbind_sb_channel(netdev, vdev);
7904 netdev_set_sb_channel(vdev, 0);
7907 return ERR_PTR(-EINVAL);
7914 * i40e_del_all_macvlans - Delete all the mac filters on the channels
7915 * @vsi: the VSI we want to access
7917 static void i40e_del_all_macvlans(struct i40e_vsi *vsi)
7919 struct i40e_channel *ch, *ch_tmp;
7920 struct i40e_pf *pf = vsi->back;
7921 struct i40e_hw *hw = &pf->hw;
7922 int aq_err, ret = 0;
7924 if (list_empty(&vsi->macvlan_list))
7927 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7928 if (i40e_is_channel_macvlan(ch)) {
7929 ret = i40e_del_macvlan_filter(hw, ch->seid,
7930 i40e_channel_mac(ch),
7933 /* Reset queue contexts */
7934 i40e_reset_ch_rings(vsi, ch);
7935 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7936 netdev_unbind_sb_channel(vsi->netdev,
7938 netdev_set_sb_channel(ch->fwd->netdev, 0);
7947 * i40e_fwd_del - delete macvlan interfaces
7948 * @netdev: net device to configure
7949 * @vdev: macvlan netdevice
7951 static void i40e_fwd_del(struct net_device *netdev, void *vdev)
7953 struct i40e_netdev_priv *np = netdev_priv(netdev);
7954 struct i40e_fwd_adapter *fwd = vdev;
7955 struct i40e_channel *ch, *ch_tmp;
7956 struct i40e_vsi *vsi = np->vsi;
7957 struct i40e_pf *pf = vsi->back;
7958 struct i40e_hw *hw = &pf->hw;
7959 int aq_err, ret = 0;
7961 /* Find the channel associated with the macvlan and del mac filter */
7962 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7963 if (i40e_is_channel_macvlan(ch) &&
7964 ether_addr_equal(i40e_channel_mac(ch),
7965 fwd->netdev->dev_addr)) {
7966 ret = i40e_del_macvlan_filter(hw, ch->seid,
7967 i40e_channel_mac(ch),
7970 /* Reset queue contexts */
7971 i40e_reset_ch_rings(vsi, ch);
7972 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7973 netdev_unbind_sb_channel(netdev, fwd->netdev);
7974 netdev_set_sb_channel(fwd->netdev, 0);
7978 dev_info(&pf->pdev->dev,
7979 "Error deleting mac filter on macvlan err %s, aq_err %s\n",
7980 i40e_stat_str(hw, ret),
7981 i40e_aq_str(hw, aq_err));
7989 * i40e_setup_tc - configure multiple traffic classes
7990 * @netdev: net device to configure
7991 * @type_data: tc offload data
7993 static int i40e_setup_tc(struct net_device *netdev, void *type_data)
7995 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
7996 struct i40e_netdev_priv *np = netdev_priv(netdev);
7997 struct i40e_vsi *vsi = np->vsi;
7998 struct i40e_pf *pf = vsi->back;
7999 u8 enabled_tc = 0, num_tc, hw;
8000 bool need_reset = false;
8001 int old_queue_pairs;
8006 old_queue_pairs = vsi->num_queue_pairs;
8007 num_tc = mqprio_qopt->qopt.num_tc;
8008 hw = mqprio_qopt->qopt.hw;
8009 mode = mqprio_qopt->mode;
8011 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
8012 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
8016 /* Check if MFP enabled */
8017 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
8019 "Configuring TC not supported in MFP mode\n");
8023 case TC_MQPRIO_MODE_DCB:
8024 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
8026 /* Check if DCB enabled to continue */
8027 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
8029 "DCB is not enabled for adapter\n");
8033 /* Check whether tc count is within enabled limit */
8034 if (num_tc > i40e_pf_get_num_tc(pf)) {
8036 "TC count greater than enabled on link for adapter\n");
8040 case TC_MQPRIO_MODE_CHANNEL:
8041 if (pf->flags & I40E_FLAG_DCB_ENABLED) {
8043 "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
8046 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8048 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
8051 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
8052 sizeof(*mqprio_qopt));
8053 pf->flags |= I40E_FLAG_TC_MQPRIO;
8054 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
8061 /* Generate TC map for number of tc requested */
8062 for (i = 0; i < num_tc; i++)
8063 enabled_tc |= BIT(i);
8065 /* Requesting same TC configuration as already enabled */
8066 if (enabled_tc == vsi->tc_config.enabled_tc &&
8067 mode != TC_MQPRIO_MODE_CHANNEL)
8070 /* Quiesce VSI queues */
8071 i40e_quiesce_vsi(vsi);
8073 if (!hw && !(pf->flags & I40E_FLAG_TC_MQPRIO))
8074 i40e_remove_queue_channels(vsi);
8076 /* Configure VSI for enabled TCs */
8077 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8079 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
8083 } else if (enabled_tc &&
8084 (!is_power_of_2(vsi->tc_config.tc_info[0].qcount))) {
8086 "Failed to create channel. Override queues (%u) not power of 2\n",
8087 vsi->tc_config.tc_info[0].qcount);
8093 dev_info(&vsi->back->pdev->dev,
8094 "Setup channel (id:%u) utilizing num_queues %d\n",
8095 vsi->seid, vsi->tc_config.tc_info[0].qcount);
8097 if (pf->flags & I40E_FLAG_TC_MQPRIO) {
8098 if (vsi->mqprio_qopt.max_rate[0]) {
8099 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
8101 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
8102 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
8104 u64 credits = max_tx_rate;
8106 do_div(credits, I40E_BW_CREDIT_DIVISOR);
8107 dev_dbg(&vsi->back->pdev->dev,
8108 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
8117 ret = i40e_configure_queue_channels(vsi);
8119 vsi->num_queue_pairs = old_queue_pairs;
8121 "Failed configuring queue channels\n");
8128 /* Reset the configuration data to defaults, only TC0 is enabled */
8130 i40e_vsi_set_default_tc_config(vsi);
8135 i40e_unquiesce_vsi(vsi);
8140 * i40e_set_cld_element - sets cloud filter element data
8141 * @filter: cloud filter rule
8142 * @cld: ptr to cloud filter element data
8144 * This is helper function to copy data into cloud filter element
8147 i40e_set_cld_element(struct i40e_cloud_filter *filter,
8148 struct i40e_aqc_cloud_filters_element_data *cld)
8153 memset(cld, 0, sizeof(*cld));
8154 ether_addr_copy(cld->outer_mac, filter->dst_mac);
8155 ether_addr_copy(cld->inner_mac, filter->src_mac);
8157 if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
8160 if (filter->n_proto == ETH_P_IPV6) {
8161 #define IPV6_MAX_INDEX (ARRAY_SIZE(filter->dst_ipv6) - 1)
8162 for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) {
8163 ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
8165 *(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa);
8168 ipa = be32_to_cpu(filter->dst_ipv4);
8170 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
8173 cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
8175 /* tenant_id is not supported by FW now, once the support is enabled
8176 * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
8178 if (filter->tenant_id)
8183 * i40e_add_del_cloud_filter - Add/del cloud filter
8184 * @vsi: pointer to VSI
8185 * @filter: cloud filter rule
8186 * @add: if true, add, if false, delete
8188 * Add or delete a cloud filter for a specific flow spec.
8189 * Returns 0 if the filter were successfully added.
8191 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
8192 struct i40e_cloud_filter *filter, bool add)
8194 struct i40e_aqc_cloud_filters_element_data cld_filter;
8195 struct i40e_pf *pf = vsi->back;
8197 static const u16 flag_table[128] = {
8198 [I40E_CLOUD_FILTER_FLAGS_OMAC] =
8199 I40E_AQC_ADD_CLOUD_FILTER_OMAC,
8200 [I40E_CLOUD_FILTER_FLAGS_IMAC] =
8201 I40E_AQC_ADD_CLOUD_FILTER_IMAC,
8202 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN] =
8203 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
8204 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
8205 I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
8206 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
8207 I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
8208 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
8209 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
8210 [I40E_CLOUD_FILTER_FLAGS_IIP] =
8211 I40E_AQC_ADD_CLOUD_FILTER_IIP,
8214 if (filter->flags >= ARRAY_SIZE(flag_table))
8215 return I40E_ERR_CONFIG;
8217 memset(&cld_filter, 0, sizeof(cld_filter));
8219 /* copy element needed to add cloud filter from filter */
8220 i40e_set_cld_element(filter, &cld_filter);
8222 if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
8223 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
8224 I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
8226 if (filter->n_proto == ETH_P_IPV6)
8227 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8228 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8230 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8231 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8234 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
8237 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
8240 dev_dbg(&pf->pdev->dev,
8241 "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
8242 add ? "add" : "delete", filter->dst_port, ret,
8243 pf->hw.aq.asq_last_status);
8245 dev_info(&pf->pdev->dev,
8246 "%s cloud filter for VSI: %d\n",
8247 add ? "Added" : "Deleted", filter->seid);
8252 * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
8253 * @vsi: pointer to VSI
8254 * @filter: cloud filter rule
8255 * @add: if true, add, if false, delete
8257 * Add or delete a cloud filter for a specific flow spec using big buffer.
8258 * Returns 0 if the filter were successfully added.
8260 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
8261 struct i40e_cloud_filter *filter,
8264 struct i40e_aqc_cloud_filters_element_bb cld_filter;
8265 struct i40e_pf *pf = vsi->back;
8268 /* Both (src/dst) valid mac_addr are not supported */
8269 if ((is_valid_ether_addr(filter->dst_mac) &&
8270 is_valid_ether_addr(filter->src_mac)) ||
8271 (is_multicast_ether_addr(filter->dst_mac) &&
8272 is_multicast_ether_addr(filter->src_mac)))
8275 /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
8276 * ports are not supported via big buffer now.
8278 if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
8281 /* adding filter using src_port/src_ip is not supported at this stage */
8282 if (filter->src_port ||
8283 (filter->src_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8284 !ipv6_addr_any(&filter->ip.v6.src_ip6))
8287 memset(&cld_filter, 0, sizeof(cld_filter));
8289 /* copy element needed to add cloud filter from filter */
8290 i40e_set_cld_element(filter, &cld_filter.element);
8292 if (is_valid_ether_addr(filter->dst_mac) ||
8293 is_valid_ether_addr(filter->src_mac) ||
8294 is_multicast_ether_addr(filter->dst_mac) ||
8295 is_multicast_ether_addr(filter->src_mac)) {
8296 /* MAC + IP : unsupported mode */
8297 if (filter->dst_ipv4)
8300 /* since we validated that L4 port must be valid before
8301 * we get here, start with respective "flags" value
8302 * and update if vlan is present or not
8304 cld_filter.element.flags =
8305 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
8307 if (filter->vlan_id) {
8308 cld_filter.element.flags =
8309 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
8312 } else if ((filter->dst_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8313 !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
8314 cld_filter.element.flags =
8315 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
8316 if (filter->n_proto == ETH_P_IPV6)
8317 cld_filter.element.flags |=
8318 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8320 cld_filter.element.flags |=
8321 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8323 dev_err(&pf->pdev->dev,
8324 "either mac or ip has to be valid for cloud filter\n");
8328 /* Now copy L4 port in Byte 6..7 in general fields */
8329 cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
8330 be16_to_cpu(filter->dst_port);
8333 /* Validate current device switch mode, change if necessary */
8334 ret = i40e_validate_and_set_switch_mode(vsi);
8336 dev_err(&pf->pdev->dev,
8337 "failed to set switch mode, ret %d\n",
8342 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
8345 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
8350 dev_dbg(&pf->pdev->dev,
8351 "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
8352 add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
8354 dev_info(&pf->pdev->dev,
8355 "%s cloud filter for VSI: %d, L4 port: %d\n",
8356 add ? "add" : "delete", filter->seid,
8357 ntohs(filter->dst_port));
8362 * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
8363 * @vsi: Pointer to VSI
8364 * @f: Pointer to struct flow_cls_offload
8365 * @filter: Pointer to cloud filter structure
8368 static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
8369 struct flow_cls_offload *f,
8370 struct i40e_cloud_filter *filter)
8372 struct flow_rule *rule = flow_cls_offload_flow_rule(f);
8373 struct flow_dissector *dissector = rule->match.dissector;
8374 u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
8375 struct i40e_pf *pf = vsi->back;
8378 if (dissector->used_keys &
8379 ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
8380 BIT(FLOW_DISSECTOR_KEY_BASIC) |
8381 BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
8382 BIT(FLOW_DISSECTOR_KEY_VLAN) |
8383 BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
8384 BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
8385 BIT(FLOW_DISSECTOR_KEY_PORTS) |
8386 BIT(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
8387 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%x\n",
8388 dissector->used_keys);
8392 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
8393 struct flow_match_enc_keyid match;
8395 flow_rule_match_enc_keyid(rule, &match);
8396 if (match.mask->keyid != 0)
8397 field_flags |= I40E_CLOUD_FIELD_TEN_ID;
8399 filter->tenant_id = be32_to_cpu(match.key->keyid);
8402 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
8403 struct flow_match_basic match;
8405 flow_rule_match_basic(rule, &match);
8406 n_proto_key = ntohs(match.key->n_proto);
8407 n_proto_mask = ntohs(match.mask->n_proto);
8409 if (n_proto_key == ETH_P_ALL) {
8413 filter->n_proto = n_proto_key & n_proto_mask;
8414 filter->ip_proto = match.key->ip_proto;
8417 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
8418 struct flow_match_eth_addrs match;
8420 flow_rule_match_eth_addrs(rule, &match);
8422 /* use is_broadcast and is_zero to check for all 0xf or 0 */
8423 if (!is_zero_ether_addr(match.mask->dst)) {
8424 if (is_broadcast_ether_addr(match.mask->dst)) {
8425 field_flags |= I40E_CLOUD_FIELD_OMAC;
8427 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
8429 return I40E_ERR_CONFIG;
8433 if (!is_zero_ether_addr(match.mask->src)) {
8434 if (is_broadcast_ether_addr(match.mask->src)) {
8435 field_flags |= I40E_CLOUD_FIELD_IMAC;
8437 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
8439 return I40E_ERR_CONFIG;
8442 ether_addr_copy(filter->dst_mac, match.key->dst);
8443 ether_addr_copy(filter->src_mac, match.key->src);
8446 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
8447 struct flow_match_vlan match;
8449 flow_rule_match_vlan(rule, &match);
8450 if (match.mask->vlan_id) {
8451 if (match.mask->vlan_id == VLAN_VID_MASK) {
8452 field_flags |= I40E_CLOUD_FIELD_IVLAN;
8455 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
8456 match.mask->vlan_id);
8457 return I40E_ERR_CONFIG;
8461 filter->vlan_id = cpu_to_be16(match.key->vlan_id);
8464 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
8465 struct flow_match_control match;
8467 flow_rule_match_control(rule, &match);
8468 addr_type = match.key->addr_type;
8471 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
8472 struct flow_match_ipv4_addrs match;
8474 flow_rule_match_ipv4_addrs(rule, &match);
8475 if (match.mask->dst) {
8476 if (match.mask->dst == cpu_to_be32(0xffffffff)) {
8477 field_flags |= I40E_CLOUD_FIELD_IIP;
8479 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
8481 return I40E_ERR_CONFIG;
8485 if (match.mask->src) {
8486 if (match.mask->src == cpu_to_be32(0xffffffff)) {
8487 field_flags |= I40E_CLOUD_FIELD_IIP;
8489 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
8491 return I40E_ERR_CONFIG;
8495 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
8496 dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
8497 return I40E_ERR_CONFIG;
8499 filter->dst_ipv4 = match.key->dst;
8500 filter->src_ipv4 = match.key->src;
8503 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
8504 struct flow_match_ipv6_addrs match;
8506 flow_rule_match_ipv6_addrs(rule, &match);
8508 /* src and dest IPV6 address should not be LOOPBACK
8509 * (0:0:0:0:0:0:0:1), which can be represented as ::1
8511 if (ipv6_addr_loopback(&match.key->dst) ||
8512 ipv6_addr_loopback(&match.key->src)) {
8513 dev_err(&pf->pdev->dev,
8514 "Bad ipv6, addr is LOOPBACK\n");
8515 return I40E_ERR_CONFIG;
8517 if (!ipv6_addr_any(&match.mask->dst) ||
8518 !ipv6_addr_any(&match.mask->src))
8519 field_flags |= I40E_CLOUD_FIELD_IIP;
8521 memcpy(&filter->src_ipv6, &match.key->src.s6_addr32,
8522 sizeof(filter->src_ipv6));
8523 memcpy(&filter->dst_ipv6, &match.key->dst.s6_addr32,
8524 sizeof(filter->dst_ipv6));
8527 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
8528 struct flow_match_ports match;
8530 flow_rule_match_ports(rule, &match);
8531 if (match.mask->src) {
8532 if (match.mask->src == cpu_to_be16(0xffff)) {
8533 field_flags |= I40E_CLOUD_FIELD_IIP;
8535 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
8536 be16_to_cpu(match.mask->src));
8537 return I40E_ERR_CONFIG;
8541 if (match.mask->dst) {
8542 if (match.mask->dst == cpu_to_be16(0xffff)) {
8543 field_flags |= I40E_CLOUD_FIELD_IIP;
8545 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
8546 be16_to_cpu(match.mask->dst));
8547 return I40E_ERR_CONFIG;
8551 filter->dst_port = match.key->dst;
8552 filter->src_port = match.key->src;
8554 switch (filter->ip_proto) {
8559 dev_err(&pf->pdev->dev,
8560 "Only UDP and TCP transport are supported\n");
8564 filter->flags = field_flags;
8569 * i40e_handle_tclass: Forward to a traffic class on the device
8570 * @vsi: Pointer to VSI
8571 * @tc: traffic class index on the device
8572 * @filter: Pointer to cloud filter structure
8575 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
8576 struct i40e_cloud_filter *filter)
8578 struct i40e_channel *ch, *ch_tmp;
8580 /* direct to a traffic class on the same device */
8582 filter->seid = vsi->seid;
8584 } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
8585 if (!filter->dst_port) {
8586 dev_err(&vsi->back->pdev->dev,
8587 "Specify destination port to direct to traffic class that is not default\n");
8590 if (list_empty(&vsi->ch_list))
8592 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
8594 if (ch->seid == vsi->tc_seid_map[tc])
8595 filter->seid = ch->seid;
8599 dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
8604 * i40e_configure_clsflower - Configure tc flower filters
8605 * @vsi: Pointer to VSI
8606 * @cls_flower: Pointer to struct flow_cls_offload
8609 static int i40e_configure_clsflower(struct i40e_vsi *vsi,
8610 struct flow_cls_offload *cls_flower)
8612 int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);
8613 struct i40e_cloud_filter *filter = NULL;
8614 struct i40e_pf *pf = vsi->back;
8618 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
8623 dev_err(&pf->pdev->dev, "Unable to add filter because of invalid destination");
8627 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
8628 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
8631 if (pf->fdir_pf_active_filters ||
8632 (!hlist_empty(&pf->fdir_filter_list))) {
8633 dev_err(&vsi->back->pdev->dev,
8634 "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
8638 if (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) {
8639 dev_err(&vsi->back->pdev->dev,
8640 "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
8641 vsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8642 vsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8645 filter = kzalloc(sizeof(*filter), GFP_KERNEL);
8649 filter->cookie = cls_flower->cookie;
8651 err = i40e_parse_cls_flower(vsi, cls_flower, filter);
8655 err = i40e_handle_tclass(vsi, tc, filter);
8659 /* Add cloud filter */
8660 if (filter->dst_port)
8661 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);
8663 err = i40e_add_del_cloud_filter(vsi, filter, true);
8666 dev_err(&pf->pdev->dev, "Failed to add cloud filter, err %d\n",
8671 /* add filter to the ordered list */
8672 INIT_HLIST_NODE(&filter->cloud_node);
8674 hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
8676 pf->num_cloud_filters++;
8685 * i40e_find_cloud_filter - Find the could filter in the list
8686 * @vsi: Pointer to VSI
8687 * @cookie: filter specific cookie
8690 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
8691 unsigned long *cookie)
8693 struct i40e_cloud_filter *filter = NULL;
8694 struct hlist_node *node2;
8696 hlist_for_each_entry_safe(filter, node2,
8697 &vsi->back->cloud_filter_list, cloud_node)
8698 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))
8704 * i40e_delete_clsflower - Remove tc flower filters
8705 * @vsi: Pointer to VSI
8706 * @cls_flower: Pointer to struct flow_cls_offload
8709 static int i40e_delete_clsflower(struct i40e_vsi *vsi,
8710 struct flow_cls_offload *cls_flower)
8712 struct i40e_cloud_filter *filter = NULL;
8713 struct i40e_pf *pf = vsi->back;
8716 filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);
8721 hash_del(&filter->cloud_node);
8723 if (filter->dst_port)
8724 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);
8726 err = i40e_add_del_cloud_filter(vsi, filter, false);
8730 dev_err(&pf->pdev->dev,
8731 "Failed to delete cloud filter, err %s\n",
8732 i40e_stat_str(&pf->hw, err));
8733 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
8736 pf->num_cloud_filters--;
8737 if (!pf->num_cloud_filters)
8738 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8739 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8740 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8741 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8742 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8748 * i40e_setup_tc_cls_flower - flower classifier offloads
8749 * @np: net device to configure
8750 * @cls_flower: offload data
8752 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
8753 struct flow_cls_offload *cls_flower)
8755 struct i40e_vsi *vsi = np->vsi;
8757 switch (cls_flower->command) {
8758 case FLOW_CLS_REPLACE:
8759 return i40e_configure_clsflower(vsi, cls_flower);
8760 case FLOW_CLS_DESTROY:
8761 return i40e_delete_clsflower(vsi, cls_flower);
8762 case FLOW_CLS_STATS:
8769 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
8772 struct i40e_netdev_priv *np = cb_priv;
8774 if (!tc_cls_can_offload_and_chain0(np->vsi->netdev, type_data))
8778 case TC_SETUP_CLSFLOWER:
8779 return i40e_setup_tc_cls_flower(np, type_data);
8786 static LIST_HEAD(i40e_block_cb_list);
8788 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
8791 struct i40e_netdev_priv *np = netdev_priv(netdev);
8794 case TC_SETUP_QDISC_MQPRIO:
8795 return i40e_setup_tc(netdev, type_data);
8796 case TC_SETUP_BLOCK:
8797 return flow_block_cb_setup_simple(type_data,
8798 &i40e_block_cb_list,
8799 i40e_setup_tc_block_cb,
8807 * i40e_open - Called when a network interface is made active
8808 * @netdev: network interface device structure
8810 * The open entry point is called when a network interface is made
8811 * active by the system (IFF_UP). At this point all resources needed
8812 * for transmit and receive operations are allocated, the interrupt
8813 * handler is registered with the OS, the netdev watchdog subtask is
8814 * enabled, and the stack is notified that the interface is ready.
8816 * Returns 0 on success, negative value on failure
8818 int i40e_open(struct net_device *netdev)
8820 struct i40e_netdev_priv *np = netdev_priv(netdev);
8821 struct i40e_vsi *vsi = np->vsi;
8822 struct i40e_pf *pf = vsi->back;
8825 /* disallow open during test or if eeprom is broken */
8826 if (test_bit(__I40E_TESTING, pf->state) ||
8827 test_bit(__I40E_BAD_EEPROM, pf->state))
8830 netif_carrier_off(netdev);
8832 if (i40e_force_link_state(pf, true))
8835 err = i40e_vsi_open(vsi);
8839 /* configure global TSO hardware offload settings */
8840 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
8841 TCP_FLAG_FIN) >> 16);
8842 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
8844 TCP_FLAG_CWR) >> 16);
8845 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
8846 udp_tunnel_get_rx_info(netdev);
8852 * i40e_netif_set_realnum_tx_rx_queues - Update number of tx/rx queues
8853 * @vsi: vsi structure
8855 * This updates netdev's number of tx/rx queues
8857 * Returns status of setting tx/rx queues
8859 static int i40e_netif_set_realnum_tx_rx_queues(struct i40e_vsi *vsi)
8863 ret = netif_set_real_num_rx_queues(vsi->netdev,
8864 vsi->num_queue_pairs);
8868 return netif_set_real_num_tx_queues(vsi->netdev,
8869 vsi->num_queue_pairs);
8874 * @vsi: the VSI to open
8876 * Finish initialization of the VSI.
8878 * Returns 0 on success, negative value on failure
8880 * Note: expects to be called while under rtnl_lock()
8882 int i40e_vsi_open(struct i40e_vsi *vsi)
8884 struct i40e_pf *pf = vsi->back;
8885 char int_name[I40E_INT_NAME_STR_LEN];
8888 /* allocate descriptors */
8889 err = i40e_vsi_setup_tx_resources(vsi);
8892 err = i40e_vsi_setup_rx_resources(vsi);
8896 err = i40e_vsi_configure(vsi);
8901 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
8902 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
8903 err = i40e_vsi_request_irq(vsi, int_name);
8907 /* Notify the stack of the actual queue counts. */
8908 err = i40e_netif_set_realnum_tx_rx_queues(vsi);
8910 goto err_set_queues;
8912 } else if (vsi->type == I40E_VSI_FDIR) {
8913 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
8914 dev_driver_string(&pf->pdev->dev),
8915 dev_name(&pf->pdev->dev));
8916 err = i40e_vsi_request_irq(vsi, int_name);
8925 err = i40e_up_complete(vsi);
8927 goto err_up_complete;
8934 i40e_vsi_free_irq(vsi);
8936 i40e_vsi_free_rx_resources(vsi);
8938 i40e_vsi_free_tx_resources(vsi);
8939 if (vsi == pf->vsi[pf->lan_vsi])
8940 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
8946 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
8947 * @pf: Pointer to PF
8949 * This function destroys the hlist where all the Flow Director
8950 * filters were saved.
8952 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
8954 struct i40e_fdir_filter *filter;
8955 struct i40e_flex_pit *pit_entry, *tmp;
8956 struct hlist_node *node2;
8958 hlist_for_each_entry_safe(filter, node2,
8959 &pf->fdir_filter_list, fdir_node) {
8960 hlist_del(&filter->fdir_node);
8964 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
8965 list_del(&pit_entry->list);
8968 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
8970 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
8971 list_del(&pit_entry->list);
8974 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
8976 pf->fdir_pf_active_filters = 0;
8977 i40e_reset_fdir_filter_cnt(pf);
8979 /* Reprogram the default input set for TCP/IPv4 */
8980 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
8981 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8982 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8984 /* Reprogram the default input set for TCP/IPv6 */
8985 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_TCP,
8986 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8987 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8989 /* Reprogram the default input set for UDP/IPv4 */
8990 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
8991 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8992 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8994 /* Reprogram the default input set for UDP/IPv6 */
8995 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_UDP,
8996 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8997 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8999 /* Reprogram the default input set for SCTP/IPv4 */
9000 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
9001 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9002 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9004 /* Reprogram the default input set for SCTP/IPv6 */
9005 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_SCTP,
9006 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9007 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9009 /* Reprogram the default input set for Other/IPv4 */
9010 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
9011 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9013 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
9014 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9016 /* Reprogram the default input set for Other/IPv6 */
9017 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER,
9018 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9020 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV6,
9021 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9025 * i40e_cloud_filter_exit - Cleans up the cloud filters
9026 * @pf: Pointer to PF
9028 * This function destroys the hlist where all the cloud filters
9031 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
9033 struct i40e_cloud_filter *cfilter;
9034 struct hlist_node *node;
9036 hlist_for_each_entry_safe(cfilter, node,
9037 &pf->cloud_filter_list, cloud_node) {
9038 hlist_del(&cfilter->cloud_node);
9041 pf->num_cloud_filters = 0;
9043 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
9044 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
9045 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
9046 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
9047 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
9052 * i40e_close - Disables a network interface
9053 * @netdev: network interface device structure
9055 * The close entry point is called when an interface is de-activated
9056 * by the OS. The hardware is still under the driver's control, but
9057 * this netdev interface is disabled.
9059 * Returns 0, this is not allowed to fail
9061 int i40e_close(struct net_device *netdev)
9063 struct i40e_netdev_priv *np = netdev_priv(netdev);
9064 struct i40e_vsi *vsi = np->vsi;
9066 i40e_vsi_close(vsi);
9072 * i40e_do_reset - Start a PF or Core Reset sequence
9073 * @pf: board private structure
9074 * @reset_flags: which reset is requested
9075 * @lock_acquired: indicates whether or not the lock has been acquired
9076 * before this function was called.
9078 * The essential difference in resets is that the PF Reset
9079 * doesn't clear the packet buffers, doesn't reset the PE
9080 * firmware, and doesn't bother the other PFs on the chip.
9082 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
9086 /* do the biggest reset indicated */
9087 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
9089 /* Request a Global Reset
9091 * This will start the chip's countdown to the actual full
9092 * chip reset event, and a warning interrupt to be sent
9093 * to all PFs, including the requestor. Our handler
9094 * for the warning interrupt will deal with the shutdown
9095 * and recovery of the switch setup.
9097 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
9098 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9099 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
9100 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9102 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
9104 /* Request a Core Reset
9106 * Same as Global Reset, except does *not* include the MAC/PHY
9108 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
9109 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9110 val |= I40E_GLGEN_RTRIG_CORER_MASK;
9111 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9112 i40e_flush(&pf->hw);
9114 } else if (reset_flags & I40E_PF_RESET_FLAG) {
9116 /* Request a PF Reset
9118 * Resets only the PF-specific registers
9120 * This goes directly to the tear-down and rebuild of
9121 * the switch, since we need to do all the recovery as
9122 * for the Core Reset.
9124 dev_dbg(&pf->pdev->dev, "PFR requested\n");
9125 i40e_handle_reset_warning(pf, lock_acquired);
9127 } else if (reset_flags & I40E_PF_RESET_AND_REBUILD_FLAG) {
9128 /* Request a PF Reset
9130 * Resets PF and reinitializes PFs VSI.
9132 i40e_prep_for_reset(pf);
9133 i40e_reset_and_rebuild(pf, true, lock_acquired);
9134 dev_info(&pf->pdev->dev,
9135 pf->flags & I40E_FLAG_DISABLE_FW_LLDP ?
9136 "FW LLDP is disabled\n" :
9137 "FW LLDP is enabled\n");
9139 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
9142 /* Find the VSI(s) that requested a re-init */
9143 dev_info(&pf->pdev->dev,
9144 "VSI reinit requested\n");
9145 for (v = 0; v < pf->num_alloc_vsi; v++) {
9146 struct i40e_vsi *vsi = pf->vsi[v];
9149 test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED,
9151 i40e_vsi_reinit_locked(pf->vsi[v]);
9153 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
9156 /* Find the VSI(s) that needs to be brought down */
9157 dev_info(&pf->pdev->dev, "VSI down requested\n");
9158 for (v = 0; v < pf->num_alloc_vsi; v++) {
9159 struct i40e_vsi *vsi = pf->vsi[v];
9162 test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED,
9164 set_bit(__I40E_VSI_DOWN, vsi->state);
9169 dev_info(&pf->pdev->dev,
9170 "bad reset request 0x%08x\n", reset_flags);
9174 #ifdef CONFIG_I40E_DCB
9176 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
9177 * @pf: board private structure
9178 * @old_cfg: current DCB config
9179 * @new_cfg: new DCB config
9181 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
9182 struct i40e_dcbx_config *old_cfg,
9183 struct i40e_dcbx_config *new_cfg)
9185 bool need_reconfig = false;
9187 /* Check if ETS configuration has changed */
9188 if (memcmp(&new_cfg->etscfg,
9190 sizeof(new_cfg->etscfg))) {
9191 /* If Priority Table has changed reconfig is needed */
9192 if (memcmp(&new_cfg->etscfg.prioritytable,
9193 &old_cfg->etscfg.prioritytable,
9194 sizeof(new_cfg->etscfg.prioritytable))) {
9195 need_reconfig = true;
9196 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
9199 if (memcmp(&new_cfg->etscfg.tcbwtable,
9200 &old_cfg->etscfg.tcbwtable,
9201 sizeof(new_cfg->etscfg.tcbwtable)))
9202 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
9204 if (memcmp(&new_cfg->etscfg.tsatable,
9205 &old_cfg->etscfg.tsatable,
9206 sizeof(new_cfg->etscfg.tsatable)))
9207 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
9210 /* Check if PFC configuration has changed */
9211 if (memcmp(&new_cfg->pfc,
9213 sizeof(new_cfg->pfc))) {
9214 need_reconfig = true;
9215 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
9218 /* Check if APP Table has changed */
9219 if (memcmp(&new_cfg->app,
9221 sizeof(new_cfg->app))) {
9222 need_reconfig = true;
9223 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
9226 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
9227 return need_reconfig;
9231 * i40e_handle_lldp_event - Handle LLDP Change MIB event
9232 * @pf: board private structure
9233 * @e: event info posted on ARQ
9235 static int i40e_handle_lldp_event(struct i40e_pf *pf,
9236 struct i40e_arq_event_info *e)
9238 struct i40e_aqc_lldp_get_mib *mib =
9239 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
9240 struct i40e_hw *hw = &pf->hw;
9241 struct i40e_dcbx_config tmp_dcbx_cfg;
9242 bool need_reconfig = false;
9246 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9247 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9248 (hw->phy.link_info.link_speed &
9249 ~(I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB)) &&
9250 !(pf->flags & I40E_FLAG_DCB_CAPABLE))
9251 /* let firmware decide if the DCB should be disabled */
9252 pf->flags |= I40E_FLAG_DCB_CAPABLE;
9254 /* Not DCB capable or capability disabled */
9255 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
9258 /* Ignore if event is not for Nearest Bridge */
9259 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
9260 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
9261 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
9262 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
9265 /* Check MIB Type and return if event for Remote MIB update */
9266 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
9267 dev_dbg(&pf->pdev->dev,
9268 "LLDP event mib type %s\n", type ? "remote" : "local");
9269 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
9270 /* Update the remote cached instance and return */
9271 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
9272 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
9273 &hw->remote_dcbx_config);
9277 /* Store the old configuration */
9278 tmp_dcbx_cfg = hw->local_dcbx_config;
9280 /* Reset the old DCBx configuration data */
9281 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
9282 /* Get updated DCBX data from firmware */
9283 ret = i40e_get_dcb_config(&pf->hw);
9285 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9286 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9287 (hw->phy.link_info.link_speed &
9288 (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
9289 dev_warn(&pf->pdev->dev,
9290 "DCB is not supported for X710-T*L 2.5/5G speeds\n");
9291 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9293 dev_info(&pf->pdev->dev,
9294 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
9295 i40e_stat_str(&pf->hw, ret),
9296 i40e_aq_str(&pf->hw,
9297 pf->hw.aq.asq_last_status));
9302 /* No change detected in DCBX configs */
9303 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
9304 sizeof(tmp_dcbx_cfg))) {
9305 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
9309 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
9310 &hw->local_dcbx_config);
9312 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
9317 /* Enable DCB tagging only when more than one TC */
9318 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
9319 pf->flags |= I40E_FLAG_DCB_ENABLED;
9321 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9323 set_bit(__I40E_PORT_SUSPENDED, pf->state);
9324 /* Reconfiguration needed quiesce all VSIs */
9325 i40e_pf_quiesce_all_vsi(pf);
9327 /* Changes in configuration update VEB/VSI */
9328 i40e_dcb_reconfigure(pf);
9330 ret = i40e_resume_port_tx(pf);
9332 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
9333 /* In case of error no point in resuming VSIs */
9337 /* Wait for the PF's queues to be disabled */
9338 ret = i40e_pf_wait_queues_disabled(pf);
9340 /* Schedule PF reset to recover */
9341 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9342 i40e_service_event_schedule(pf);
9344 i40e_pf_unquiesce_all_vsi(pf);
9345 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
9346 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
9352 #endif /* CONFIG_I40E_DCB */
9355 * i40e_do_reset_safe - Protected reset path for userland calls.
9356 * @pf: board private structure
9357 * @reset_flags: which reset is requested
9360 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
9363 i40e_do_reset(pf, reset_flags, true);
9368 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
9369 * @pf: board private structure
9370 * @e: event info posted on ARQ
9372 * Handler for LAN Queue Overflow Event generated by the firmware for PF
9375 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
9376 struct i40e_arq_event_info *e)
9378 struct i40e_aqc_lan_overflow *data =
9379 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
9380 u32 queue = le32_to_cpu(data->prtdcb_rupto);
9381 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
9382 struct i40e_hw *hw = &pf->hw;
9386 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
9389 /* Queue belongs to VF, find the VF and issue VF reset */
9390 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
9391 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
9392 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
9393 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
9394 vf_id -= hw->func_caps.vf_base_id;
9395 vf = &pf->vf[vf_id];
9396 i40e_vc_notify_vf_reset(vf);
9397 /* Allow VF to process pending reset notification */
9399 i40e_reset_vf(vf, false);
9404 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
9405 * @pf: board private structure
9407 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
9411 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9412 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
9417 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
9418 * @pf: board private structure
9420 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
9424 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9425 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
9426 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
9427 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
9432 * i40e_get_global_fd_count - Get total FD filters programmed on device
9433 * @pf: board private structure
9435 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
9439 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
9440 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
9441 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
9442 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
9447 * i40e_reenable_fdir_sb - Restore FDir SB capability
9448 * @pf: board private structure
9450 static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
9452 if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
9453 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
9454 (I40E_DEBUG_FD & pf->hw.debug_mask))
9455 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
9459 * i40e_reenable_fdir_atr - Restore FDir ATR capability
9460 * @pf: board private structure
9462 static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
9464 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) {
9465 /* ATR uses the same filtering logic as SB rules. It only
9466 * functions properly if the input set mask is at the default
9467 * settings. It is safe to restore the default input set
9468 * because there are no active TCPv4 filter rules.
9470 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9471 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9472 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9474 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
9475 (I40E_DEBUG_FD & pf->hw.debug_mask))
9476 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
9481 * i40e_delete_invalid_filter - Delete an invalid FDIR filter
9482 * @pf: board private structure
9483 * @filter: FDir filter to remove
9485 static void i40e_delete_invalid_filter(struct i40e_pf *pf,
9486 struct i40e_fdir_filter *filter)
9488 /* Update counters */
9489 pf->fdir_pf_active_filters--;
9492 switch (filter->flow_type) {
9494 pf->fd_tcp4_filter_cnt--;
9497 pf->fd_udp4_filter_cnt--;
9500 pf->fd_sctp4_filter_cnt--;
9503 pf->fd_tcp6_filter_cnt--;
9506 pf->fd_udp6_filter_cnt--;
9509 pf->fd_udp6_filter_cnt--;
9512 switch (filter->ipl4_proto) {
9514 pf->fd_tcp4_filter_cnt--;
9517 pf->fd_udp4_filter_cnt--;
9520 pf->fd_sctp4_filter_cnt--;
9523 pf->fd_ip4_filter_cnt--;
9527 case IPV6_USER_FLOW:
9528 switch (filter->ipl4_proto) {
9530 pf->fd_tcp6_filter_cnt--;
9533 pf->fd_udp6_filter_cnt--;
9536 pf->fd_sctp6_filter_cnt--;
9539 pf->fd_ip6_filter_cnt--;
9545 /* Remove the filter from the list and free memory */
9546 hlist_del(&filter->fdir_node);
9551 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
9552 * @pf: board private structure
9554 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
9556 struct i40e_fdir_filter *filter;
9557 u32 fcnt_prog, fcnt_avail;
9558 struct hlist_node *node;
9560 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9563 /* Check if we have enough room to re-enable FDir SB capability. */
9564 fcnt_prog = i40e_get_global_fd_count(pf);
9565 fcnt_avail = pf->fdir_pf_filter_count;
9566 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
9567 (pf->fd_add_err == 0) ||
9568 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
9569 i40e_reenable_fdir_sb(pf);
9571 /* We should wait for even more space before re-enabling ATR.
9572 * Additionally, we cannot enable ATR as long as we still have TCP SB
9575 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
9576 pf->fd_tcp4_filter_cnt == 0 && pf->fd_tcp6_filter_cnt == 0)
9577 i40e_reenable_fdir_atr(pf);
9579 /* if hw had a problem adding a filter, delete it */
9580 if (pf->fd_inv > 0) {
9581 hlist_for_each_entry_safe(filter, node,
9582 &pf->fdir_filter_list, fdir_node)
9583 if (filter->fd_id == pf->fd_inv)
9584 i40e_delete_invalid_filter(pf, filter);
9588 #define I40E_MIN_FD_FLUSH_INTERVAL 10
9589 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
9591 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
9592 * @pf: board private structure
9594 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
9596 unsigned long min_flush_time;
9597 int flush_wait_retry = 50;
9598 bool disable_atr = false;
9602 if (!time_after(jiffies, pf->fd_flush_timestamp +
9603 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
9606 /* If the flush is happening too quick and we have mostly SB rules we
9607 * should not re-enable ATR for some time.
9609 min_flush_time = pf->fd_flush_timestamp +
9610 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
9611 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
9613 if (!(time_after(jiffies, min_flush_time)) &&
9614 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
9615 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9616 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
9620 pf->fd_flush_timestamp = jiffies;
9621 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9622 /* flush all filters */
9623 wr32(&pf->hw, I40E_PFQF_CTL_1,
9624 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
9625 i40e_flush(&pf->hw);
9629 /* Check FD flush status every 5-6msec */
9630 usleep_range(5000, 6000);
9631 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
9632 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
9634 } while (flush_wait_retry--);
9635 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
9636 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
9638 /* replay sideband filters */
9639 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
9640 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
9641 clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9642 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
9643 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9644 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
9649 * i40e_get_current_atr_cnt - Get the count of total FD ATR filters programmed
9650 * @pf: board private structure
9652 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
9654 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
9658 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
9659 * @pf: board private structure
9661 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
9664 /* if interface is down do nothing */
9665 if (test_bit(__I40E_DOWN, pf->state))
9668 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9669 i40e_fdir_flush_and_replay(pf);
9671 i40e_fdir_check_and_reenable(pf);
9676 * i40e_vsi_link_event - notify VSI of a link event
9677 * @vsi: vsi to be notified
9678 * @link_up: link up or down
9680 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
9682 if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
9685 switch (vsi->type) {
9687 if (!vsi->netdev || !vsi->netdev_registered)
9691 netif_carrier_on(vsi->netdev);
9692 netif_tx_wake_all_queues(vsi->netdev);
9694 netif_carrier_off(vsi->netdev);
9695 netif_tx_stop_all_queues(vsi->netdev);
9699 case I40E_VSI_SRIOV:
9700 case I40E_VSI_VMDQ2:
9702 case I40E_VSI_IWARP:
9703 case I40E_VSI_MIRROR:
9705 /* there is no notification for other VSIs */
9711 * i40e_veb_link_event - notify elements on the veb of a link event
9712 * @veb: veb to be notified
9713 * @link_up: link up or down
9715 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
9720 if (!veb || !veb->pf)
9724 /* depth first... */
9725 for (i = 0; i < I40E_MAX_VEB; i++)
9726 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
9727 i40e_veb_link_event(pf->veb[i], link_up);
9729 /* ... now the local VSIs */
9730 for (i = 0; i < pf->num_alloc_vsi; i++)
9731 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
9732 i40e_vsi_link_event(pf->vsi[i], link_up);
9736 * i40e_link_event - Update netif_carrier status
9737 * @pf: board private structure
9739 static void i40e_link_event(struct i40e_pf *pf)
9741 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9742 u8 new_link_speed, old_link_speed;
9744 bool new_link, old_link;
9745 #ifdef CONFIG_I40E_DCB
9747 #endif /* CONFIG_I40E_DCB */
9749 /* set this to force the get_link_status call to refresh state */
9750 pf->hw.phy.get_link_info = true;
9751 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
9752 status = i40e_get_link_status(&pf->hw, &new_link);
9754 /* On success, disable temp link polling */
9755 if (status == I40E_SUCCESS) {
9756 clear_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9758 /* Enable link polling temporarily until i40e_get_link_status
9759 * returns I40E_SUCCESS
9761 set_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9762 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
9767 old_link_speed = pf->hw.phy.link_info_old.link_speed;
9768 new_link_speed = pf->hw.phy.link_info.link_speed;
9770 if (new_link == old_link &&
9771 new_link_speed == old_link_speed &&
9772 (test_bit(__I40E_VSI_DOWN, vsi->state) ||
9773 new_link == netif_carrier_ok(vsi->netdev)))
9776 i40e_print_link_message(vsi, new_link);
9778 /* Notify the base of the switch tree connected to
9779 * the link. Floating VEBs are not notified.
9781 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
9782 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
9784 i40e_vsi_link_event(vsi, new_link);
9787 i40e_vc_notify_link_state(pf);
9789 if (pf->flags & I40E_FLAG_PTP)
9790 i40e_ptp_set_increment(pf);
9791 #ifdef CONFIG_I40E_DCB
9792 if (new_link == old_link)
9794 /* Not SW DCB so firmware will take care of default settings */
9795 if (pf->dcbx_cap & DCB_CAP_DCBX_LLD_MANAGED)
9798 /* We cover here only link down, as after link up in case of SW DCB
9799 * SW LLDP agent will take care of setting it up
9802 dev_dbg(&pf->pdev->dev, "Reconfig DCB to single TC as result of Link Down\n");
9803 memset(&pf->tmp_cfg, 0, sizeof(pf->tmp_cfg));
9804 err = i40e_dcb_sw_default_config(pf);
9806 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
9807 I40E_FLAG_DCB_ENABLED);
9809 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
9810 DCB_CAP_DCBX_VER_IEEE;
9811 pf->flags |= I40E_FLAG_DCB_CAPABLE;
9812 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9815 #endif /* CONFIG_I40E_DCB */
9819 * i40e_watchdog_subtask - periodic checks not using event driven response
9820 * @pf: board private structure
9822 static void i40e_watchdog_subtask(struct i40e_pf *pf)
9826 /* if interface is down do nothing */
9827 if (test_bit(__I40E_DOWN, pf->state) ||
9828 test_bit(__I40E_CONFIG_BUSY, pf->state))
9831 /* make sure we don't do these things too often */
9832 if (time_before(jiffies, (pf->service_timer_previous +
9833 pf->service_timer_period)))
9835 pf->service_timer_previous = jiffies;
9837 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
9838 test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
9839 i40e_link_event(pf);
9841 /* Update the stats for active netdevs so the network stack
9842 * can look at updated numbers whenever it cares to
9844 for (i = 0; i < pf->num_alloc_vsi; i++)
9845 if (pf->vsi[i] && pf->vsi[i]->netdev)
9846 i40e_update_stats(pf->vsi[i]);
9848 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
9849 /* Update the stats for the active switching components */
9850 for (i = 0; i < I40E_MAX_VEB; i++)
9852 i40e_update_veb_stats(pf->veb[i]);
9855 i40e_ptp_rx_hang(pf);
9856 i40e_ptp_tx_hang(pf);
9860 * i40e_reset_subtask - Set up for resetting the device and driver
9861 * @pf: board private structure
9863 static void i40e_reset_subtask(struct i40e_pf *pf)
9865 u32 reset_flags = 0;
9867 if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
9868 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
9869 clear_bit(__I40E_REINIT_REQUESTED, pf->state);
9871 if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
9872 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
9873 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9875 if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
9876 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
9877 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
9879 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
9880 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
9881 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
9883 if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
9884 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
9885 clear_bit(__I40E_DOWN_REQUESTED, pf->state);
9888 /* If there's a recovery already waiting, it takes
9889 * precedence before starting a new reset sequence.
9891 if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
9892 i40e_prep_for_reset(pf);
9894 i40e_rebuild(pf, false, false);
9897 /* If we're already down or resetting, just bail */
9899 !test_bit(__I40E_DOWN, pf->state) &&
9900 !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
9901 i40e_do_reset(pf, reset_flags, false);
9906 * i40e_handle_link_event - Handle link event
9907 * @pf: board private structure
9908 * @e: event info posted on ARQ
9910 static void i40e_handle_link_event(struct i40e_pf *pf,
9911 struct i40e_arq_event_info *e)
9913 struct i40e_aqc_get_link_status *status =
9914 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
9916 /* Do a new status request to re-enable LSE reporting
9917 * and load new status information into the hw struct
9918 * This completely ignores any state information
9919 * in the ARQ event info, instead choosing to always
9920 * issue the AQ update link status command.
9922 i40e_link_event(pf);
9924 /* Check if module meets thermal requirements */
9925 if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
9926 dev_err(&pf->pdev->dev,
9927 "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
9928 dev_err(&pf->pdev->dev,
9929 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9931 /* check for unqualified module, if link is down, suppress
9932 * the message if link was forced to be down.
9934 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
9935 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
9936 (!(status->link_info & I40E_AQ_LINK_UP)) &&
9937 (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) {
9938 dev_err(&pf->pdev->dev,
9939 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
9940 dev_err(&pf->pdev->dev,
9941 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9947 * i40e_clean_adminq_subtask - Clean the AdminQ rings
9948 * @pf: board private structure
9950 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
9952 struct i40e_arq_event_info event;
9953 struct i40e_hw *hw = &pf->hw;
9960 /* Do not run clean AQ when PF reset fails */
9961 if (test_bit(__I40E_RESET_FAILED, pf->state))
9964 /* check for error indications */
9965 val = rd32(&pf->hw, pf->hw.aq.arq.len);
9967 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
9968 if (hw->debug_mask & I40E_DEBUG_AQ)
9969 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
9970 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
9972 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
9973 if (hw->debug_mask & I40E_DEBUG_AQ)
9974 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
9975 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
9976 pf->arq_overflows++;
9978 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
9979 if (hw->debug_mask & I40E_DEBUG_AQ)
9980 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
9981 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
9984 wr32(&pf->hw, pf->hw.aq.arq.len, val);
9986 val = rd32(&pf->hw, pf->hw.aq.asq.len);
9988 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
9989 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9990 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
9991 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
9993 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
9994 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9995 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
9996 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
9998 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
9999 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
10000 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
10001 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
10004 wr32(&pf->hw, pf->hw.aq.asq.len, val);
10006 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
10007 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
10008 if (!event.msg_buf)
10012 ret = i40e_clean_arq_element(hw, &event, &pending);
10013 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
10016 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
10020 opcode = le16_to_cpu(event.desc.opcode);
10023 case i40e_aqc_opc_get_link_status:
10025 i40e_handle_link_event(pf, &event);
10028 case i40e_aqc_opc_send_msg_to_pf:
10029 ret = i40e_vc_process_vf_msg(pf,
10030 le16_to_cpu(event.desc.retval),
10031 le32_to_cpu(event.desc.cookie_high),
10032 le32_to_cpu(event.desc.cookie_low),
10036 case i40e_aqc_opc_lldp_update_mib:
10037 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
10038 #ifdef CONFIG_I40E_DCB
10040 i40e_handle_lldp_event(pf, &event);
10042 #endif /* CONFIG_I40E_DCB */
10044 case i40e_aqc_opc_event_lan_overflow:
10045 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
10046 i40e_handle_lan_overflow_event(pf, &event);
10048 case i40e_aqc_opc_send_msg_to_peer:
10049 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
10051 case i40e_aqc_opc_nvm_erase:
10052 case i40e_aqc_opc_nvm_update:
10053 case i40e_aqc_opc_oem_post_update:
10054 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
10055 "ARQ NVM operation 0x%04x completed\n",
10059 dev_info(&pf->pdev->dev,
10060 "ARQ: Unknown event 0x%04x ignored\n",
10064 } while (i++ < pf->adminq_work_limit);
10066 if (i < pf->adminq_work_limit)
10067 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
10069 /* re-enable Admin queue interrupt cause */
10070 val = rd32(hw, I40E_PFINT_ICR0_ENA);
10071 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
10072 wr32(hw, I40E_PFINT_ICR0_ENA, val);
10075 kfree(event.msg_buf);
10079 * i40e_verify_eeprom - make sure eeprom is good to use
10080 * @pf: board private structure
10082 static void i40e_verify_eeprom(struct i40e_pf *pf)
10086 err = i40e_diag_eeprom_test(&pf->hw);
10088 /* retry in case of garbage read */
10089 err = i40e_diag_eeprom_test(&pf->hw);
10091 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
10093 set_bit(__I40E_BAD_EEPROM, pf->state);
10097 if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
10098 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
10099 clear_bit(__I40E_BAD_EEPROM, pf->state);
10104 * i40e_enable_pf_switch_lb
10105 * @pf: pointer to the PF structure
10107 * enable switch loop back or die - no point in a return value
10109 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
10111 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10112 struct i40e_vsi_context ctxt;
10115 ctxt.seid = pf->main_vsi_seid;
10116 ctxt.pf_num = pf->hw.pf_id;
10118 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10120 dev_info(&pf->pdev->dev,
10121 "couldn't get PF vsi config, err %s aq_err %s\n",
10122 i40e_stat_str(&pf->hw, ret),
10123 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10126 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10127 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10128 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10130 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
10132 dev_info(&pf->pdev->dev,
10133 "update vsi switch failed, err %s aq_err %s\n",
10134 i40e_stat_str(&pf->hw, ret),
10135 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10140 * i40e_disable_pf_switch_lb
10141 * @pf: pointer to the PF structure
10143 * disable switch loop back or die - no point in a return value
10145 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
10147 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10148 struct i40e_vsi_context ctxt;
10151 ctxt.seid = pf->main_vsi_seid;
10152 ctxt.pf_num = pf->hw.pf_id;
10154 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10156 dev_info(&pf->pdev->dev,
10157 "couldn't get PF vsi config, err %s aq_err %s\n",
10158 i40e_stat_str(&pf->hw, ret),
10159 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10162 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10163 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10164 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10166 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
10168 dev_info(&pf->pdev->dev,
10169 "update vsi switch failed, err %s aq_err %s\n",
10170 i40e_stat_str(&pf->hw, ret),
10171 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10176 * i40e_config_bridge_mode - Configure the HW bridge mode
10177 * @veb: pointer to the bridge instance
10179 * Configure the loop back mode for the LAN VSI that is downlink to the
10180 * specified HW bridge instance. It is expected this function is called
10181 * when a new HW bridge is instantiated.
10183 static void i40e_config_bridge_mode(struct i40e_veb *veb)
10185 struct i40e_pf *pf = veb->pf;
10187 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
10188 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
10189 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
10190 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
10191 i40e_disable_pf_switch_lb(pf);
10193 i40e_enable_pf_switch_lb(pf);
10197 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
10198 * @veb: pointer to the VEB instance
10200 * This is a recursive function that first builds the attached VSIs then
10201 * recurses in to build the next layer of VEB. We track the connections
10202 * through our own index numbers because the seid's from the HW could
10203 * change across the reset.
10205 static int i40e_reconstitute_veb(struct i40e_veb *veb)
10207 struct i40e_vsi *ctl_vsi = NULL;
10208 struct i40e_pf *pf = veb->pf;
10212 /* build VSI that owns this VEB, temporarily attached to base VEB */
10213 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
10215 pf->vsi[v]->veb_idx == veb->idx &&
10216 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
10217 ctl_vsi = pf->vsi[v];
10222 dev_info(&pf->pdev->dev,
10223 "missing owner VSI for veb_idx %d\n", veb->idx);
10225 goto end_reconstitute;
10227 if (ctl_vsi != pf->vsi[pf->lan_vsi])
10228 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10229 ret = i40e_add_vsi(ctl_vsi);
10231 dev_info(&pf->pdev->dev,
10232 "rebuild of veb_idx %d owner VSI failed: %d\n",
10234 goto end_reconstitute;
10236 i40e_vsi_reset_stats(ctl_vsi);
10238 /* create the VEB in the switch and move the VSI onto the VEB */
10239 ret = i40e_add_veb(veb, ctl_vsi);
10241 goto end_reconstitute;
10243 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10244 veb->bridge_mode = BRIDGE_MODE_VEB;
10246 veb->bridge_mode = BRIDGE_MODE_VEPA;
10247 i40e_config_bridge_mode(veb);
10249 /* create the remaining VSIs attached to this VEB */
10250 for (v = 0; v < pf->num_alloc_vsi; v++) {
10251 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
10254 if (pf->vsi[v]->veb_idx == veb->idx) {
10255 struct i40e_vsi *vsi = pf->vsi[v];
10257 vsi->uplink_seid = veb->seid;
10258 ret = i40e_add_vsi(vsi);
10260 dev_info(&pf->pdev->dev,
10261 "rebuild of vsi_idx %d failed: %d\n",
10263 goto end_reconstitute;
10265 i40e_vsi_reset_stats(vsi);
10269 /* create any VEBs attached to this VEB - RECURSION */
10270 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10271 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
10272 pf->veb[veb_idx]->uplink_seid = veb->seid;
10273 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
10284 * i40e_get_capabilities - get info about the HW
10285 * @pf: the PF struct
10286 * @list_type: AQ capability to be queried
10288 static int i40e_get_capabilities(struct i40e_pf *pf,
10289 enum i40e_admin_queue_opc list_type)
10291 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
10296 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
10298 cap_buf = kzalloc(buf_len, GFP_KERNEL);
10302 /* this loads the data into the hw struct for us */
10303 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
10304 &data_size, list_type,
10306 /* data loaded, buffer no longer needed */
10309 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
10310 /* retry with a larger buffer */
10311 buf_len = data_size;
10312 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK || err) {
10313 dev_info(&pf->pdev->dev,
10314 "capability discovery failed, err %s aq_err %s\n",
10315 i40e_stat_str(&pf->hw, err),
10316 i40e_aq_str(&pf->hw,
10317 pf->hw.aq.asq_last_status));
10322 if (pf->hw.debug_mask & I40E_DEBUG_USER) {
10323 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10324 dev_info(&pf->pdev->dev,
10325 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
10326 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
10327 pf->hw.func_caps.num_msix_vectors,
10328 pf->hw.func_caps.num_msix_vectors_vf,
10329 pf->hw.func_caps.fd_filters_guaranteed,
10330 pf->hw.func_caps.fd_filters_best_effort,
10331 pf->hw.func_caps.num_tx_qp,
10332 pf->hw.func_caps.num_vsis);
10333 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
10334 dev_info(&pf->pdev->dev,
10335 "switch_mode=0x%04x, function_valid=0x%08x\n",
10336 pf->hw.dev_caps.switch_mode,
10337 pf->hw.dev_caps.valid_functions);
10338 dev_info(&pf->pdev->dev,
10339 "SR-IOV=%d, num_vfs for all function=%u\n",
10340 pf->hw.dev_caps.sr_iov_1_1,
10341 pf->hw.dev_caps.num_vfs);
10342 dev_info(&pf->pdev->dev,
10343 "num_vsis=%u, num_rx:%u, num_tx=%u\n",
10344 pf->hw.dev_caps.num_vsis,
10345 pf->hw.dev_caps.num_rx_qp,
10346 pf->hw.dev_caps.num_tx_qp);
10349 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10350 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
10351 + pf->hw.func_caps.num_vfs)
10352 if (pf->hw.revision_id == 0 &&
10353 pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
10354 dev_info(&pf->pdev->dev,
10355 "got num_vsis %d, setting num_vsis to %d\n",
10356 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
10357 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
10363 static int i40e_vsi_clear(struct i40e_vsi *vsi);
10366 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
10367 * @pf: board private structure
10369 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
10371 struct i40e_vsi *vsi;
10373 /* quick workaround for an NVM issue that leaves a critical register
10376 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
10377 static const u32 hkey[] = {
10378 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
10379 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
10380 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
10384 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
10385 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
10388 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
10391 /* find existing VSI and see if it needs configuring */
10392 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10394 /* create a new VSI if none exists */
10396 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
10397 pf->vsi[pf->lan_vsi]->seid, 0);
10399 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
10400 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10401 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
10406 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
10410 * i40e_fdir_teardown - release the Flow Director resources
10411 * @pf: board private structure
10413 static void i40e_fdir_teardown(struct i40e_pf *pf)
10415 struct i40e_vsi *vsi;
10417 i40e_fdir_filter_exit(pf);
10418 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10420 i40e_vsi_release(vsi);
10424 * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
10425 * @vsi: PF main vsi
10426 * @seid: seid of main or channel VSIs
10428 * Rebuilds cloud filters associated with main VSI and channel VSIs if they
10429 * existed before reset
10431 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
10433 struct i40e_cloud_filter *cfilter;
10434 struct i40e_pf *pf = vsi->back;
10435 struct hlist_node *node;
10438 /* Add cloud filters back if they exist */
10439 hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
10441 if (cfilter->seid != seid)
10444 if (cfilter->dst_port)
10445 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
10448 ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
10451 dev_dbg(&pf->pdev->dev,
10452 "Failed to rebuild cloud filter, err %s aq_err %s\n",
10453 i40e_stat_str(&pf->hw, ret),
10454 i40e_aq_str(&pf->hw,
10455 pf->hw.aq.asq_last_status));
10463 * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
10464 * @vsi: PF main vsi
10466 * Rebuilds channel VSIs if they existed before reset
10468 static int i40e_rebuild_channels(struct i40e_vsi *vsi)
10470 struct i40e_channel *ch, *ch_tmp;
10473 if (list_empty(&vsi->ch_list))
10476 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
10477 if (!ch->initialized)
10479 /* Proceed with creation of channel (VMDq2) VSI */
10480 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch);
10482 dev_info(&vsi->back->pdev->dev,
10483 "failed to rebuild channels using uplink_seid %u\n",
10487 /* Reconfigure TX queues using QTX_CTL register */
10488 ret = i40e_channel_config_tx_ring(vsi->back, vsi, ch);
10490 dev_info(&vsi->back->pdev->dev,
10491 "failed to configure TX rings for channel %u\n",
10495 /* update 'next_base_queue' */
10496 vsi->next_base_queue = vsi->next_base_queue +
10497 ch->num_queue_pairs;
10498 if (ch->max_tx_rate) {
10499 u64 credits = ch->max_tx_rate;
10501 if (i40e_set_bw_limit(vsi, ch->seid,
10505 do_div(credits, I40E_BW_CREDIT_DIVISOR);
10506 dev_dbg(&vsi->back->pdev->dev,
10507 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10512 ret = i40e_rebuild_cloud_filters(vsi, ch->seid);
10514 dev_dbg(&vsi->back->pdev->dev,
10515 "Failed to rebuild cloud filters for channel VSI %u\n",
10524 * i40e_prep_for_reset - prep for the core to reset
10525 * @pf: board private structure
10527 * Close up the VFs and other things in prep for PF Reset.
10529 static void i40e_prep_for_reset(struct i40e_pf *pf)
10531 struct i40e_hw *hw = &pf->hw;
10532 i40e_status ret = 0;
10535 clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
10536 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
10538 if (i40e_check_asq_alive(&pf->hw))
10539 i40e_vc_notify_reset(pf);
10541 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
10543 /* quiesce the VSIs and their queues that are not already DOWN */
10544 i40e_pf_quiesce_all_vsi(pf);
10546 for (v = 0; v < pf->num_alloc_vsi; v++) {
10548 pf->vsi[v]->seid = 0;
10551 i40e_shutdown_adminq(&pf->hw);
10553 /* call shutdown HMC */
10554 if (hw->hmc.hmc_obj) {
10555 ret = i40e_shutdown_lan_hmc(hw);
10557 dev_warn(&pf->pdev->dev,
10558 "shutdown_lan_hmc failed: %d\n", ret);
10561 /* Save the current PTP time so that we can restore the time after the
10564 i40e_ptp_save_hw_time(pf);
10568 * i40e_send_version - update firmware with driver version
10571 static void i40e_send_version(struct i40e_pf *pf)
10573 struct i40e_driver_version dv;
10575 dv.major_version = 0xff;
10576 dv.minor_version = 0xff;
10577 dv.build_version = 0xff;
10578 dv.subbuild_version = 0;
10579 strlcpy(dv.driver_string, UTS_RELEASE, sizeof(dv.driver_string));
10580 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
10584 * i40e_get_oem_version - get OEM specific version information
10585 * @hw: pointer to the hardware structure
10587 static void i40e_get_oem_version(struct i40e_hw *hw)
10589 u16 block_offset = 0xffff;
10590 u16 block_length = 0;
10591 u16 capabilities = 0;
10595 #define I40E_SR_NVM_OEM_VERSION_PTR 0x1B
10596 #define I40E_NVM_OEM_LENGTH_OFFSET 0x00
10597 #define I40E_NVM_OEM_CAPABILITIES_OFFSET 0x01
10598 #define I40E_NVM_OEM_GEN_OFFSET 0x02
10599 #define I40E_NVM_OEM_RELEASE_OFFSET 0x03
10600 #define I40E_NVM_OEM_CAPABILITIES_MASK 0x000F
10601 #define I40E_NVM_OEM_LENGTH 3
10603 /* Check if pointer to OEM version block is valid. */
10604 i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset);
10605 if (block_offset == 0xffff)
10608 /* Check if OEM version block has correct length. */
10609 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
10611 if (block_length < I40E_NVM_OEM_LENGTH)
10614 /* Check if OEM version format is as expected. */
10615 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
10617 if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
10620 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET,
10622 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
10624 hw->nvm.oem_ver = (gen_snap << I40E_OEM_SNAP_SHIFT) | release;
10625 hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
10629 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
10630 * @pf: board private structure
10632 static int i40e_reset(struct i40e_pf *pf)
10634 struct i40e_hw *hw = &pf->hw;
10637 ret = i40e_pf_reset(hw);
10639 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
10640 set_bit(__I40E_RESET_FAILED, pf->state);
10641 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10649 * i40e_rebuild - rebuild using a saved config
10650 * @pf: board private structure
10651 * @reinit: if the Main VSI needs to re-initialized.
10652 * @lock_acquired: indicates whether or not the lock has been acquired
10653 * before this function was called.
10655 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
10657 const bool is_recovery_mode_reported = i40e_check_recovery_mode(pf);
10658 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10659 struct i40e_hw *hw = &pf->hw;
10664 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10665 is_recovery_mode_reported)
10666 i40e_set_ethtool_ops(pf->vsi[pf->lan_vsi]->netdev);
10668 if (test_bit(__I40E_DOWN, pf->state) &&
10669 !test_bit(__I40E_RECOVERY_MODE, pf->state))
10670 goto clear_recovery;
10671 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
10673 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
10674 ret = i40e_init_adminq(&pf->hw);
10676 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
10677 i40e_stat_str(&pf->hw, ret),
10678 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10679 goto clear_recovery;
10681 i40e_get_oem_version(&pf->hw);
10683 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state)) {
10684 /* The following delay is necessary for firmware update. */
10688 /* re-verify the eeprom if we just had an EMP reset */
10689 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
10690 i40e_verify_eeprom(pf);
10692 /* if we are going out of or into recovery mode we have to act
10693 * accordingly with regard to resources initialization
10694 * and deinitialization
10696 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10697 if (i40e_get_capabilities(pf,
10698 i40e_aqc_opc_list_func_capabilities))
10701 if (is_recovery_mode_reported) {
10702 /* we're staying in recovery mode so we'll reinitialize
10705 if (i40e_setup_misc_vector_for_recovery_mode(pf))
10708 if (!lock_acquired)
10710 /* we're going out of recovery mode so we'll free
10711 * the IRQ allocated specifically for recovery mode
10712 * and restore the interrupt scheme
10714 free_irq(pf->pdev->irq, pf);
10715 i40e_clear_interrupt_scheme(pf);
10716 if (i40e_restore_interrupt_scheme(pf))
10720 /* tell the firmware that we're starting */
10721 i40e_send_version(pf);
10723 /* bail out in case recovery mode was detected, as there is
10724 * no need for further configuration.
10729 i40e_clear_pxe_mode(hw);
10730 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
10732 goto end_core_reset;
10734 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10735 hw->func_caps.num_rx_qp, 0, 0);
10737 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
10738 goto end_core_reset;
10740 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10742 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
10743 goto end_core_reset;
10746 #ifdef CONFIG_I40E_DCB
10747 /* Enable FW to write a default DCB config on link-up
10748 * unless I40E_FLAG_TC_MQPRIO was enabled or DCB
10749 * is not supported with new link speed
10751 if (pf->flags & I40E_FLAG_TC_MQPRIO) {
10752 i40e_aq_set_dcb_parameters(hw, false, NULL);
10754 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
10755 (hw->phy.link_info.link_speed &
10756 (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
10757 i40e_aq_set_dcb_parameters(hw, false, NULL);
10758 dev_warn(&pf->pdev->dev,
10759 "DCB is not supported for X710-T*L 2.5/5G speeds\n");
10760 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10762 i40e_aq_set_dcb_parameters(hw, true, NULL);
10763 ret = i40e_init_pf_dcb(pf);
10765 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n",
10767 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10768 /* Continue without DCB enabled */
10773 #endif /* CONFIG_I40E_DCB */
10774 if (!lock_acquired)
10776 ret = i40e_setup_pf_switch(pf, reinit, true);
10780 /* The driver only wants link up/down and module qualification
10781 * reports from firmware. Note the negative logic.
10783 ret = i40e_aq_set_phy_int_mask(&pf->hw,
10784 ~(I40E_AQ_EVENT_LINK_UPDOWN |
10785 I40E_AQ_EVENT_MEDIA_NA |
10786 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10788 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10789 i40e_stat_str(&pf->hw, ret),
10790 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10792 /* Rebuild the VSIs and VEBs that existed before reset.
10793 * They are still in our local switch element arrays, so only
10794 * need to rebuild the switch model in the HW.
10796 * If there were VEBs but the reconstitution failed, we'll try
10797 * to recover minimal use by getting the basic PF VSI working.
10799 if (vsi->uplink_seid != pf->mac_seid) {
10800 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
10801 /* find the one VEB connected to the MAC, and find orphans */
10802 for (v = 0; v < I40E_MAX_VEB; v++) {
10806 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
10807 pf->veb[v]->uplink_seid == 0) {
10808 ret = i40e_reconstitute_veb(pf->veb[v]);
10813 /* If Main VEB failed, we're in deep doodoo,
10814 * so give up rebuilding the switch and set up
10815 * for minimal rebuild of PF VSI.
10816 * If orphan failed, we'll report the error
10817 * but try to keep going.
10819 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
10820 dev_info(&pf->pdev->dev,
10821 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
10823 vsi->uplink_seid = pf->mac_seid;
10825 } else if (pf->veb[v]->uplink_seid == 0) {
10826 dev_info(&pf->pdev->dev,
10827 "rebuild of orphan VEB failed: %d\n",
10834 if (vsi->uplink_seid == pf->mac_seid) {
10835 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
10836 /* no VEB, so rebuild only the Main VSI */
10837 ret = i40e_add_vsi(vsi);
10839 dev_info(&pf->pdev->dev,
10840 "rebuild of Main VSI failed: %d\n", ret);
10845 if (vsi->mqprio_qopt.max_rate[0]) {
10846 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
10849 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
10850 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
10854 credits = max_tx_rate;
10855 do_div(credits, I40E_BW_CREDIT_DIVISOR);
10856 dev_dbg(&vsi->back->pdev->dev,
10857 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10863 ret = i40e_rebuild_cloud_filters(vsi, vsi->seid);
10867 /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
10868 * for this main VSI if they exist
10870 ret = i40e_rebuild_channels(vsi);
10874 /* Reconfigure hardware for allowing smaller MSS in the case
10875 * of TSO, so that we avoid the MDD being fired and causing
10876 * a reset in the case of small MSS+TSO.
10878 #define I40E_REG_MSS 0x000E64DC
10879 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
10880 #define I40E_64BYTE_MSS 0x400000
10881 val = rd32(hw, I40E_REG_MSS);
10882 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10883 val &= ~I40E_REG_MSS_MIN_MASK;
10884 val |= I40E_64BYTE_MSS;
10885 wr32(hw, I40E_REG_MSS, val);
10888 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
10890 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10892 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10893 i40e_stat_str(&pf->hw, ret),
10894 i40e_aq_str(&pf->hw,
10895 pf->hw.aq.asq_last_status));
10897 /* reinit the misc interrupt */
10898 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
10899 ret = i40e_setup_misc_vector(pf);
10901 /* Add a filter to drop all Flow control frames from any VSI from being
10902 * transmitted. By doing so we stop a malicious VF from sending out
10903 * PAUSE or PFC frames and potentially controlling traffic for other
10905 * The FW can still send Flow control frames if enabled.
10907 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10908 pf->main_vsi_seid);
10910 /* restart the VSIs that were rebuilt and running before the reset */
10911 i40e_pf_unquiesce_all_vsi(pf);
10913 /* Release the RTNL lock before we start resetting VFs */
10914 if (!lock_acquired)
10917 /* Restore promiscuous settings */
10918 ret = i40e_set_promiscuous(pf, pf->cur_promisc);
10920 dev_warn(&pf->pdev->dev,
10921 "Failed to restore promiscuous setting: %s, err %s aq_err %s\n",
10922 pf->cur_promisc ? "on" : "off",
10923 i40e_stat_str(&pf->hw, ret),
10924 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10926 i40e_reset_all_vfs(pf, true);
10928 /* tell the firmware that we're starting */
10929 i40e_send_version(pf);
10931 /* We've already released the lock, so don't do it again */
10932 goto end_core_reset;
10935 if (!lock_acquired)
10938 clear_bit(__I40E_RESET_FAILED, pf->state);
10940 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10941 clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
10945 * i40e_reset_and_rebuild - reset and rebuild using a saved config
10946 * @pf: board private structure
10947 * @reinit: if the Main VSI needs to re-initialized.
10948 * @lock_acquired: indicates whether or not the lock has been acquired
10949 * before this function was called.
10951 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
10952 bool lock_acquired)
10956 if (test_bit(__I40E_IN_REMOVE, pf->state))
10958 /* Now we wait for GRST to settle out.
10959 * We don't have to delete the VEBs or VSIs from the hw switch
10960 * because the reset will make them disappear.
10962 ret = i40e_reset(pf);
10964 i40e_rebuild(pf, reinit, lock_acquired);
10968 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
10969 * @pf: board private structure
10971 * Close up the VFs and other things in prep for a Core Reset,
10972 * then get ready to rebuild the world.
10973 * @lock_acquired: indicates whether or not the lock has been acquired
10974 * before this function was called.
10976 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
10978 i40e_prep_for_reset(pf);
10979 i40e_reset_and_rebuild(pf, false, lock_acquired);
10983 * i40e_handle_mdd_event
10984 * @pf: pointer to the PF structure
10986 * Called from the MDD irq handler to identify possibly malicious vfs
10988 static void i40e_handle_mdd_event(struct i40e_pf *pf)
10990 struct i40e_hw *hw = &pf->hw;
10991 bool mdd_detected = false;
10992 struct i40e_vf *vf;
10996 if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
10999 /* find what triggered the MDD event */
11000 reg = rd32(hw, I40E_GL_MDET_TX);
11001 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
11002 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
11003 I40E_GL_MDET_TX_PF_NUM_SHIFT;
11004 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
11005 I40E_GL_MDET_TX_VF_NUM_SHIFT;
11006 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
11007 I40E_GL_MDET_TX_EVENT_SHIFT;
11008 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
11009 I40E_GL_MDET_TX_QUEUE_SHIFT) -
11010 pf->hw.func_caps.base_queue;
11011 if (netif_msg_tx_err(pf))
11012 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
11013 event, queue, pf_num, vf_num);
11014 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
11015 mdd_detected = true;
11017 reg = rd32(hw, I40E_GL_MDET_RX);
11018 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
11019 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
11020 I40E_GL_MDET_RX_FUNCTION_SHIFT;
11021 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
11022 I40E_GL_MDET_RX_EVENT_SHIFT;
11023 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
11024 I40E_GL_MDET_RX_QUEUE_SHIFT) -
11025 pf->hw.func_caps.base_queue;
11026 if (netif_msg_rx_err(pf))
11027 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
11028 event, queue, func);
11029 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
11030 mdd_detected = true;
11033 if (mdd_detected) {
11034 reg = rd32(hw, I40E_PF_MDET_TX);
11035 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
11036 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
11037 dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n");
11039 reg = rd32(hw, I40E_PF_MDET_RX);
11040 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
11041 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
11042 dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n");
11046 /* see if one of the VFs needs its hand slapped */
11047 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
11049 reg = rd32(hw, I40E_VP_MDET_TX(i));
11050 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
11051 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
11052 vf->num_mdd_events++;
11053 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
11055 dev_info(&pf->pdev->dev,
11056 "Use PF Control I/F to re-enable the VF\n");
11057 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
11060 reg = rd32(hw, I40E_VP_MDET_RX(i));
11061 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
11062 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
11063 vf->num_mdd_events++;
11064 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
11066 dev_info(&pf->pdev->dev,
11067 "Use PF Control I/F to re-enable the VF\n");
11068 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
11072 /* re-enable mdd interrupt cause */
11073 clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
11074 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
11075 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
11076 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
11081 * i40e_service_task - Run the driver's async subtasks
11082 * @work: pointer to work_struct containing our data
11084 static void i40e_service_task(struct work_struct *work)
11086 struct i40e_pf *pf = container_of(work,
11089 unsigned long start_time = jiffies;
11091 /* don't bother with service tasks if a reset is in progress */
11092 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
11093 test_bit(__I40E_SUSPENDED, pf->state))
11096 if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
11099 if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) {
11100 i40e_detect_recover_hung(pf->vsi[pf->lan_vsi]);
11101 i40e_sync_filters_subtask(pf);
11102 i40e_reset_subtask(pf);
11103 i40e_handle_mdd_event(pf);
11104 i40e_vc_process_vflr_event(pf);
11105 i40e_watchdog_subtask(pf);
11106 i40e_fdir_reinit_subtask(pf);
11107 if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) {
11108 /* Client subtask will reopen next time through. */
11109 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi],
11112 i40e_client_subtask(pf);
11113 if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE,
11115 i40e_notify_client_of_l2_param_changes(
11116 pf->vsi[pf->lan_vsi]);
11118 i40e_sync_filters_subtask(pf);
11120 i40e_reset_subtask(pf);
11123 i40e_clean_adminq_subtask(pf);
11125 /* flush memory to make sure state is correct before next watchdog */
11126 smp_mb__before_atomic();
11127 clear_bit(__I40E_SERVICE_SCHED, pf->state);
11129 /* If the tasks have taken longer than one timer cycle or there
11130 * is more work to be done, reschedule the service task now
11131 * rather than wait for the timer to tick again.
11133 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
11134 test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state) ||
11135 test_bit(__I40E_MDD_EVENT_PENDING, pf->state) ||
11136 test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
11137 i40e_service_event_schedule(pf);
11141 * i40e_service_timer - timer callback
11142 * @t: timer list pointer
11144 static void i40e_service_timer(struct timer_list *t)
11146 struct i40e_pf *pf = from_timer(pf, t, service_timer);
11148 mod_timer(&pf->service_timer,
11149 round_jiffies(jiffies + pf->service_timer_period));
11150 i40e_service_event_schedule(pf);
11154 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
11155 * @vsi: the VSI being configured
11157 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
11159 struct i40e_pf *pf = vsi->back;
11161 switch (vsi->type) {
11162 case I40E_VSI_MAIN:
11163 vsi->alloc_queue_pairs = pf->num_lan_qps;
11164 if (!vsi->num_tx_desc)
11165 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11166 I40E_REQ_DESCRIPTOR_MULTIPLE);
11167 if (!vsi->num_rx_desc)
11168 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11169 I40E_REQ_DESCRIPTOR_MULTIPLE);
11170 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11171 vsi->num_q_vectors = pf->num_lan_msix;
11173 vsi->num_q_vectors = 1;
11177 case I40E_VSI_FDIR:
11178 vsi->alloc_queue_pairs = 1;
11179 vsi->num_tx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11180 I40E_REQ_DESCRIPTOR_MULTIPLE);
11181 vsi->num_rx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11182 I40E_REQ_DESCRIPTOR_MULTIPLE);
11183 vsi->num_q_vectors = pf->num_fdsb_msix;
11186 case I40E_VSI_VMDQ2:
11187 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
11188 if (!vsi->num_tx_desc)
11189 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11190 I40E_REQ_DESCRIPTOR_MULTIPLE);
11191 if (!vsi->num_rx_desc)
11192 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11193 I40E_REQ_DESCRIPTOR_MULTIPLE);
11194 vsi->num_q_vectors = pf->num_vmdq_msix;
11197 case I40E_VSI_SRIOV:
11198 vsi->alloc_queue_pairs = pf->num_vf_qps;
11199 if (!vsi->num_tx_desc)
11200 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11201 I40E_REQ_DESCRIPTOR_MULTIPLE);
11202 if (!vsi->num_rx_desc)
11203 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11204 I40E_REQ_DESCRIPTOR_MULTIPLE);
11212 if (is_kdump_kernel()) {
11213 vsi->num_tx_desc = I40E_MIN_NUM_DESCRIPTORS;
11214 vsi->num_rx_desc = I40E_MIN_NUM_DESCRIPTORS;
11221 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
11222 * @vsi: VSI pointer
11223 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
11225 * On error: returns error code (negative)
11226 * On success: returns 0
11228 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
11230 struct i40e_ring **next_rings;
11234 /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
11235 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
11236 (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
11237 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
11238 if (!vsi->tx_rings)
11240 next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
11241 if (i40e_enabled_xdp_vsi(vsi)) {
11242 vsi->xdp_rings = next_rings;
11243 next_rings += vsi->alloc_queue_pairs;
11245 vsi->rx_rings = next_rings;
11247 if (alloc_qvectors) {
11248 /* allocate memory for q_vector pointers */
11249 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
11250 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
11251 if (!vsi->q_vectors) {
11259 kfree(vsi->tx_rings);
11264 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
11265 * @pf: board private structure
11266 * @type: type of VSI
11268 * On error: returns error code (negative)
11269 * On success: returns vsi index in PF (positive)
11271 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
11274 struct i40e_vsi *vsi;
11278 /* Need to protect the allocation of the VSIs at the PF level */
11279 mutex_lock(&pf->switch_mutex);
11281 /* VSI list may be fragmented if VSI creation/destruction has
11282 * been happening. We can afford to do a quick scan to look
11283 * for any free VSIs in the list.
11285 * find next empty vsi slot, looping back around if necessary
11288 while (i < pf->num_alloc_vsi && pf->vsi[i])
11290 if (i >= pf->num_alloc_vsi) {
11292 while (i < pf->next_vsi && pf->vsi[i])
11296 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
11297 vsi_idx = i; /* Found one! */
11300 goto unlock_pf; /* out of VSI slots! */
11302 pf->next_vsi = ++i;
11304 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
11311 set_bit(__I40E_VSI_DOWN, vsi->state);
11313 vsi->idx = vsi_idx;
11314 vsi->int_rate_limit = 0;
11315 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
11316 pf->rss_table_size : 64;
11317 vsi->netdev_registered = false;
11318 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
11319 hash_init(vsi->mac_filter_hash);
11320 vsi->irqs_ready = false;
11322 if (type == I40E_VSI_MAIN) {
11323 vsi->af_xdp_zc_qps = bitmap_zalloc(pf->num_lan_qps, GFP_KERNEL);
11324 if (!vsi->af_xdp_zc_qps)
11328 ret = i40e_set_num_rings_in_vsi(vsi);
11332 ret = i40e_vsi_alloc_arrays(vsi, true);
11336 /* Setup default MSIX irq handler for VSI */
11337 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
11339 /* Initialize VSI lock */
11340 spin_lock_init(&vsi->mac_filter_hash_lock);
11341 pf->vsi[vsi_idx] = vsi;
11346 bitmap_free(vsi->af_xdp_zc_qps);
11347 pf->next_vsi = i - 1;
11350 mutex_unlock(&pf->switch_mutex);
11355 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
11356 * @vsi: VSI pointer
11357 * @free_qvectors: a bool to specify if q_vectors need to be freed.
11359 * On error: returns error code (negative)
11360 * On success: returns 0
11362 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
11364 /* free the ring and vector containers */
11365 if (free_qvectors) {
11366 kfree(vsi->q_vectors);
11367 vsi->q_vectors = NULL;
11369 kfree(vsi->tx_rings);
11370 vsi->tx_rings = NULL;
11371 vsi->rx_rings = NULL;
11372 vsi->xdp_rings = NULL;
11376 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
11378 * @vsi: Pointer to VSI structure
11380 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
11385 kfree(vsi->rss_hkey_user);
11386 vsi->rss_hkey_user = NULL;
11388 kfree(vsi->rss_lut_user);
11389 vsi->rss_lut_user = NULL;
11393 * i40e_vsi_clear - Deallocate the VSI provided
11394 * @vsi: the VSI being un-configured
11396 static int i40e_vsi_clear(struct i40e_vsi *vsi)
11398 struct i40e_pf *pf;
11407 mutex_lock(&pf->switch_mutex);
11408 if (!pf->vsi[vsi->idx]) {
11409 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
11410 vsi->idx, vsi->idx, vsi->type);
11414 if (pf->vsi[vsi->idx] != vsi) {
11415 dev_err(&pf->pdev->dev,
11416 "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
11417 pf->vsi[vsi->idx]->idx,
11418 pf->vsi[vsi->idx]->type,
11419 vsi->idx, vsi->type);
11423 /* updates the PF for this cleared vsi */
11424 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
11425 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
11427 bitmap_free(vsi->af_xdp_zc_qps);
11428 i40e_vsi_free_arrays(vsi, true);
11429 i40e_clear_rss_config_user(vsi);
11431 pf->vsi[vsi->idx] = NULL;
11432 if (vsi->idx < pf->next_vsi)
11433 pf->next_vsi = vsi->idx;
11436 mutex_unlock(&pf->switch_mutex);
11444 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
11445 * @vsi: the VSI being cleaned
11447 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
11451 if (vsi->tx_rings && vsi->tx_rings[0]) {
11452 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11453 kfree_rcu(vsi->tx_rings[i], rcu);
11454 WRITE_ONCE(vsi->tx_rings[i], NULL);
11455 WRITE_ONCE(vsi->rx_rings[i], NULL);
11456 if (vsi->xdp_rings)
11457 WRITE_ONCE(vsi->xdp_rings[i], NULL);
11463 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
11464 * @vsi: the VSI being configured
11466 static int i40e_alloc_rings(struct i40e_vsi *vsi)
11468 int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
11469 struct i40e_pf *pf = vsi->back;
11470 struct i40e_ring *ring;
11472 /* Set basic values in the rings to be used later during open() */
11473 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11474 /* allocate space for both Tx and Rx in one shot */
11475 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
11479 ring->queue_index = i;
11480 ring->reg_idx = vsi->base_queue + i;
11481 ring->ring_active = false;
11483 ring->netdev = vsi->netdev;
11484 ring->dev = &pf->pdev->dev;
11485 ring->count = vsi->num_tx_desc;
11488 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11489 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11490 ring->itr_setting = pf->tx_itr_default;
11491 WRITE_ONCE(vsi->tx_rings[i], ring++);
11493 if (!i40e_enabled_xdp_vsi(vsi))
11496 ring->queue_index = vsi->alloc_queue_pairs + i;
11497 ring->reg_idx = vsi->base_queue + ring->queue_index;
11498 ring->ring_active = false;
11500 ring->netdev = NULL;
11501 ring->dev = &pf->pdev->dev;
11502 ring->count = vsi->num_tx_desc;
11505 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11506 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11507 set_ring_xdp(ring);
11508 ring->itr_setting = pf->tx_itr_default;
11509 WRITE_ONCE(vsi->xdp_rings[i], ring++);
11512 ring->queue_index = i;
11513 ring->reg_idx = vsi->base_queue + i;
11514 ring->ring_active = false;
11516 ring->netdev = vsi->netdev;
11517 ring->dev = &pf->pdev->dev;
11518 ring->count = vsi->num_rx_desc;
11521 ring->itr_setting = pf->rx_itr_default;
11522 WRITE_ONCE(vsi->rx_rings[i], ring);
11528 i40e_vsi_clear_rings(vsi);
11533 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
11534 * @pf: board private structure
11535 * @vectors: the number of MSI-X vectors to request
11537 * Returns the number of vectors reserved, or error
11539 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
11541 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
11542 I40E_MIN_MSIX, vectors);
11544 dev_info(&pf->pdev->dev,
11545 "MSI-X vector reservation failed: %d\n", vectors);
11553 * i40e_init_msix - Setup the MSIX capability
11554 * @pf: board private structure
11556 * Work with the OS to set up the MSIX vectors needed.
11558 * Returns the number of vectors reserved or negative on failure
11560 static int i40e_init_msix(struct i40e_pf *pf)
11562 struct i40e_hw *hw = &pf->hw;
11563 int cpus, extra_vectors;
11567 int iwarp_requested = 0;
11569 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
11572 /* The number of vectors we'll request will be comprised of:
11573 * - Add 1 for "other" cause for Admin Queue events, etc.
11574 * - The number of LAN queue pairs
11575 * - Queues being used for RSS.
11576 * We don't need as many as max_rss_size vectors.
11577 * use rss_size instead in the calculation since that
11578 * is governed by number of cpus in the system.
11579 * - assumes symmetric Tx/Rx pairing
11580 * - The number of VMDq pairs
11581 * - The CPU count within the NUMA node if iWARP is enabled
11582 * Once we count this up, try the request.
11584 * If we can't get what we want, we'll simplify to nearly nothing
11585 * and try again. If that still fails, we punt.
11587 vectors_left = hw->func_caps.num_msix_vectors;
11590 /* reserve one vector for miscellaneous handler */
11591 if (vectors_left) {
11596 /* reserve some vectors for the main PF traffic queues. Initially we
11597 * only reserve at most 50% of the available vectors, in the case that
11598 * the number of online CPUs is large. This ensures that we can enable
11599 * extra features as well. Once we've enabled the other features, we
11600 * will use any remaining vectors to reach as close as we can to the
11601 * number of online CPUs.
11603 cpus = num_online_cpus();
11604 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
11605 vectors_left -= pf->num_lan_msix;
11607 /* reserve one vector for sideband flow director */
11608 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11609 if (vectors_left) {
11610 pf->num_fdsb_msix = 1;
11614 pf->num_fdsb_msix = 0;
11618 /* can we reserve enough for iWARP? */
11619 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11620 iwarp_requested = pf->num_iwarp_msix;
11623 pf->num_iwarp_msix = 0;
11624 else if (vectors_left < pf->num_iwarp_msix)
11625 pf->num_iwarp_msix = 1;
11626 v_budget += pf->num_iwarp_msix;
11627 vectors_left -= pf->num_iwarp_msix;
11630 /* any vectors left over go for VMDq support */
11631 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
11632 if (!vectors_left) {
11633 pf->num_vmdq_msix = 0;
11634 pf->num_vmdq_qps = 0;
11636 int vmdq_vecs_wanted =
11637 pf->num_vmdq_vsis * pf->num_vmdq_qps;
11639 min_t(int, vectors_left, vmdq_vecs_wanted);
11641 /* if we're short on vectors for what's desired, we limit
11642 * the queues per vmdq. If this is still more than are
11643 * available, the user will need to change the number of
11644 * queues/vectors used by the PF later with the ethtool
11647 if (vectors_left < vmdq_vecs_wanted) {
11648 pf->num_vmdq_qps = 1;
11649 vmdq_vecs_wanted = pf->num_vmdq_vsis;
11650 vmdq_vecs = min_t(int,
11654 pf->num_vmdq_msix = pf->num_vmdq_qps;
11656 v_budget += vmdq_vecs;
11657 vectors_left -= vmdq_vecs;
11661 /* On systems with a large number of SMP cores, we previously limited
11662 * the number of vectors for num_lan_msix to be at most 50% of the
11663 * available vectors, to allow for other features. Now, we add back
11664 * the remaining vectors. However, we ensure that the total
11665 * num_lan_msix will not exceed num_online_cpus(). To do this, we
11666 * calculate the number of vectors we can add without going over the
11667 * cap of CPUs. For systems with a small number of CPUs this will be
11670 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
11671 pf->num_lan_msix += extra_vectors;
11672 vectors_left -= extra_vectors;
11674 WARN(vectors_left < 0,
11675 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
11677 v_budget += pf->num_lan_msix;
11678 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
11680 if (!pf->msix_entries)
11683 for (i = 0; i < v_budget; i++)
11684 pf->msix_entries[i].entry = i;
11685 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
11687 if (v_actual < I40E_MIN_MSIX) {
11688 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
11689 kfree(pf->msix_entries);
11690 pf->msix_entries = NULL;
11691 pci_disable_msix(pf->pdev);
11694 } else if (v_actual == I40E_MIN_MSIX) {
11695 /* Adjust for minimal MSIX use */
11696 pf->num_vmdq_vsis = 0;
11697 pf->num_vmdq_qps = 0;
11698 pf->num_lan_qps = 1;
11699 pf->num_lan_msix = 1;
11701 } else if (v_actual != v_budget) {
11702 /* If we have limited resources, we will start with no vectors
11703 * for the special features and then allocate vectors to some
11704 * of these features based on the policy and at the end disable
11705 * the features that did not get any vectors.
11709 dev_info(&pf->pdev->dev,
11710 "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
11711 v_actual, v_budget);
11712 /* reserve the misc vector */
11713 vec = v_actual - 1;
11715 /* Scale vector usage down */
11716 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
11717 pf->num_vmdq_vsis = 1;
11718 pf->num_vmdq_qps = 1;
11720 /* partition out the remaining vectors */
11723 pf->num_lan_msix = 1;
11726 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11727 pf->num_lan_msix = 1;
11728 pf->num_iwarp_msix = 1;
11730 pf->num_lan_msix = 2;
11734 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11735 pf->num_iwarp_msix = min_t(int, (vec / 3),
11737 pf->num_vmdq_vsis = min_t(int, (vec / 3),
11738 I40E_DEFAULT_NUM_VMDQ_VSI);
11740 pf->num_vmdq_vsis = min_t(int, (vec / 2),
11741 I40E_DEFAULT_NUM_VMDQ_VSI);
11743 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11744 pf->num_fdsb_msix = 1;
11747 pf->num_lan_msix = min_t(int,
11748 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
11750 pf->num_lan_qps = pf->num_lan_msix;
11755 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
11756 (pf->num_fdsb_msix == 0)) {
11757 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
11758 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
11759 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11761 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
11762 (pf->num_vmdq_msix == 0)) {
11763 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
11764 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
11767 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
11768 (pf->num_iwarp_msix == 0)) {
11769 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
11770 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11772 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
11773 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
11775 pf->num_vmdq_msix * pf->num_vmdq_vsis,
11777 pf->num_iwarp_msix);
11783 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
11784 * @vsi: the VSI being configured
11785 * @v_idx: index of the vector in the vsi struct
11787 * We allocate one q_vector. If allocation fails we return -ENOMEM.
11789 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
11791 struct i40e_q_vector *q_vector;
11793 /* allocate q_vector */
11794 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
11798 q_vector->vsi = vsi;
11799 q_vector->v_idx = v_idx;
11800 cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask);
11803 netif_napi_add(vsi->netdev, &q_vector->napi,
11804 i40e_napi_poll, NAPI_POLL_WEIGHT);
11806 /* tie q_vector and vsi together */
11807 vsi->q_vectors[v_idx] = q_vector;
11813 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
11814 * @vsi: the VSI being configured
11816 * We allocate one q_vector per queue interrupt. If allocation fails we
11819 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
11821 struct i40e_pf *pf = vsi->back;
11822 int err, v_idx, num_q_vectors;
11824 /* if not MSIX, give the one vector only to the LAN VSI */
11825 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11826 num_q_vectors = vsi->num_q_vectors;
11827 else if (vsi == pf->vsi[pf->lan_vsi])
11832 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
11833 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
11842 i40e_free_q_vector(vsi, v_idx);
11848 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
11849 * @pf: board private structure to initialize
11851 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
11856 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11857 vectors = i40e_init_msix(pf);
11859 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
11860 I40E_FLAG_IWARP_ENABLED |
11861 I40E_FLAG_RSS_ENABLED |
11862 I40E_FLAG_DCB_CAPABLE |
11863 I40E_FLAG_DCB_ENABLED |
11864 I40E_FLAG_SRIOV_ENABLED |
11865 I40E_FLAG_FD_SB_ENABLED |
11866 I40E_FLAG_FD_ATR_ENABLED |
11867 I40E_FLAG_VMDQ_ENABLED);
11868 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11870 /* rework the queue expectations without MSIX */
11871 i40e_determine_queue_usage(pf);
11875 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11876 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
11877 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
11878 vectors = pci_enable_msi(pf->pdev);
11880 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
11882 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
11884 vectors = 1; /* one MSI or Legacy vector */
11887 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
11888 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
11890 /* set up vector assignment tracking */
11891 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
11892 pf->irq_pile = kzalloc(size, GFP_KERNEL);
11896 pf->irq_pile->num_entries = vectors;
11898 /* track first vector for misc interrupts, ignore return */
11899 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
11905 * i40e_restore_interrupt_scheme - Restore the interrupt scheme
11906 * @pf: private board data structure
11908 * Restore the interrupt scheme that was cleared when we suspended the
11909 * device. This should be called during resume to re-allocate the q_vectors
11910 * and reacquire IRQs.
11912 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
11916 /* We cleared the MSI and MSI-X flags when disabling the old interrupt
11917 * scheme. We need to re-enabled them here in order to attempt to
11918 * re-acquire the MSI or MSI-X vectors
11920 pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
11922 err = i40e_init_interrupt_scheme(pf);
11926 /* Now that we've re-acquired IRQs, we need to remap the vectors and
11927 * rings together again.
11929 for (i = 0; i < pf->num_alloc_vsi; i++) {
11931 err = i40e_vsi_alloc_q_vectors(pf->vsi[i]);
11934 i40e_vsi_map_rings_to_vectors(pf->vsi[i]);
11938 err = i40e_setup_misc_vector(pf);
11942 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
11943 i40e_client_update_msix_info(pf);
11950 i40e_vsi_free_q_vectors(pf->vsi[i]);
11957 * i40e_setup_misc_vector_for_recovery_mode - Setup the misc vector to handle
11958 * non queue events in recovery mode
11959 * @pf: board private structure
11961 * This sets up the handler for MSIX 0 or MSI/legacy, which is used to manage
11962 * the non-queue interrupts, e.g. AdminQ and errors in recovery mode.
11963 * This is handled differently than in recovery mode since no Tx/Rx resources
11964 * are being allocated.
11966 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf)
11970 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11971 err = i40e_setup_misc_vector(pf);
11974 dev_info(&pf->pdev->dev,
11975 "MSI-X misc vector request failed, error %d\n",
11980 u32 flags = pf->flags & I40E_FLAG_MSI_ENABLED ? 0 : IRQF_SHARED;
11982 err = request_irq(pf->pdev->irq, i40e_intr, flags,
11986 dev_info(&pf->pdev->dev,
11987 "MSI/legacy misc vector request failed, error %d\n",
11991 i40e_enable_misc_int_causes(pf);
11992 i40e_irq_dynamic_enable_icr0(pf);
11999 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
12000 * @pf: board private structure
12002 * This sets up the handler for MSIX 0, which is used to manage the
12003 * non-queue interrupts, e.g. AdminQ and errors. This is not used
12004 * when in MSI or Legacy interrupt mode.
12006 static int i40e_setup_misc_vector(struct i40e_pf *pf)
12008 struct i40e_hw *hw = &pf->hw;
12011 /* Only request the IRQ once, the first time through. */
12012 if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
12013 err = request_irq(pf->msix_entries[0].vector,
12014 i40e_intr, 0, pf->int_name, pf);
12016 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
12017 dev_info(&pf->pdev->dev,
12018 "request_irq for %s failed: %d\n",
12019 pf->int_name, err);
12024 i40e_enable_misc_int_causes(pf);
12026 /* associate no queues to the misc vector */
12027 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
12028 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K >> 1);
12032 i40e_irq_dynamic_enable_icr0(pf);
12038 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
12039 * @vsi: Pointer to vsi structure
12040 * @seed: Buffter to store the hash keys
12041 * @lut: Buffer to store the lookup table entries
12042 * @lut_size: Size of buffer to store the lookup table entries
12044 * Return 0 on success, negative on failure
12046 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
12047 u8 *lut, u16 lut_size)
12049 struct i40e_pf *pf = vsi->back;
12050 struct i40e_hw *hw = &pf->hw;
12054 ret = i40e_aq_get_rss_key(hw, vsi->id,
12055 (struct i40e_aqc_get_set_rss_key_data *)seed);
12057 dev_info(&pf->pdev->dev,
12058 "Cannot get RSS key, err %s aq_err %s\n",
12059 i40e_stat_str(&pf->hw, ret),
12060 i40e_aq_str(&pf->hw,
12061 pf->hw.aq.asq_last_status));
12067 bool pf_lut = vsi->type == I40E_VSI_MAIN;
12069 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
12071 dev_info(&pf->pdev->dev,
12072 "Cannot get RSS lut, err %s aq_err %s\n",
12073 i40e_stat_str(&pf->hw, ret),
12074 i40e_aq_str(&pf->hw,
12075 pf->hw.aq.asq_last_status));
12084 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
12085 * @vsi: Pointer to vsi structure
12086 * @seed: RSS hash seed
12087 * @lut: Lookup table
12088 * @lut_size: Lookup table size
12090 * Returns 0 on success, negative on failure
12092 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
12093 const u8 *lut, u16 lut_size)
12095 struct i40e_pf *pf = vsi->back;
12096 struct i40e_hw *hw = &pf->hw;
12097 u16 vf_id = vsi->vf_id;
12100 /* Fill out hash function seed */
12102 u32 *seed_dw = (u32 *)seed;
12104 if (vsi->type == I40E_VSI_MAIN) {
12105 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12106 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
12107 } else if (vsi->type == I40E_VSI_SRIOV) {
12108 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
12109 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
12111 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
12116 u32 *lut_dw = (u32 *)lut;
12118 if (vsi->type == I40E_VSI_MAIN) {
12119 if (lut_size != I40E_HLUT_ARRAY_SIZE)
12121 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12122 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
12123 } else if (vsi->type == I40E_VSI_SRIOV) {
12124 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
12126 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12127 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
12129 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12138 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
12139 * @vsi: Pointer to VSI structure
12140 * @seed: Buffer to store the keys
12141 * @lut: Buffer to store the lookup table entries
12142 * @lut_size: Size of buffer to store the lookup table entries
12144 * Returns 0 on success, negative on failure
12146 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
12147 u8 *lut, u16 lut_size)
12149 struct i40e_pf *pf = vsi->back;
12150 struct i40e_hw *hw = &pf->hw;
12154 u32 *seed_dw = (u32 *)seed;
12156 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12157 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
12160 u32 *lut_dw = (u32 *)lut;
12162 if (lut_size != I40E_HLUT_ARRAY_SIZE)
12164 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12165 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
12172 * i40e_config_rss - Configure RSS keys and lut
12173 * @vsi: Pointer to VSI structure
12174 * @seed: RSS hash seed
12175 * @lut: Lookup table
12176 * @lut_size: Lookup table size
12178 * Returns 0 on success, negative on failure
12180 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12182 struct i40e_pf *pf = vsi->back;
12184 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12185 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
12187 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
12191 * i40e_get_rss - Get RSS keys and lut
12192 * @vsi: Pointer to VSI structure
12193 * @seed: Buffer to store the keys
12194 * @lut: Buffer to store the lookup table entries
12195 * @lut_size: Size of buffer to store the lookup table entries
12197 * Returns 0 on success, negative on failure
12199 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12201 struct i40e_pf *pf = vsi->back;
12203 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12204 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
12206 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
12210 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
12211 * @pf: Pointer to board private structure
12212 * @lut: Lookup table
12213 * @rss_table_size: Lookup table size
12214 * @rss_size: Range of queue number for hashing
12216 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
12217 u16 rss_table_size, u16 rss_size)
12221 for (i = 0; i < rss_table_size; i++)
12222 lut[i] = i % rss_size;
12226 * i40e_pf_config_rss - Prepare for RSS if used
12227 * @pf: board private structure
12229 static int i40e_pf_config_rss(struct i40e_pf *pf)
12231 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12232 u8 seed[I40E_HKEY_ARRAY_SIZE];
12234 struct i40e_hw *hw = &pf->hw;
12239 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
12240 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
12241 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
12242 hena |= i40e_pf_get_default_rss_hena(pf);
12244 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
12245 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
12247 /* Determine the RSS table size based on the hardware capabilities */
12248 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
12249 reg_val = (pf->rss_table_size == 512) ?
12250 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
12251 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
12252 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
12254 /* Determine the RSS size of the VSI */
12255 if (!vsi->rss_size) {
12257 /* If the firmware does something weird during VSI init, we
12258 * could end up with zero TCs. Check for that to avoid
12259 * divide-by-zero. It probably won't pass traffic, but it also
12262 qcount = vsi->num_queue_pairs /
12263 (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1);
12264 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12266 if (!vsi->rss_size)
12269 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
12273 /* Use user configured lut if there is one, otherwise use default */
12274 if (vsi->rss_lut_user)
12275 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
12277 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
12279 /* Use user configured hash key if there is one, otherwise
12282 if (vsi->rss_hkey_user)
12283 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
12285 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
12286 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
12293 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
12294 * @pf: board private structure
12295 * @queue_count: the requested queue count for rss.
12297 * returns 0 if rss is not enabled, if enabled returns the final rss queue
12298 * count which may be different from the requested queue count.
12299 * Note: expects to be called while under rtnl_lock()
12301 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
12303 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12306 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
12309 queue_count = min_t(int, queue_count, num_online_cpus());
12310 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
12312 if (queue_count != vsi->num_queue_pairs) {
12315 vsi->req_queue_pairs = queue_count;
12316 i40e_prep_for_reset(pf);
12317 if (test_bit(__I40E_IN_REMOVE, pf->state))
12318 return pf->alloc_rss_size;
12320 pf->alloc_rss_size = new_rss_size;
12322 i40e_reset_and_rebuild(pf, true, true);
12324 /* Discard the user configured hash keys and lut, if less
12325 * queues are enabled.
12327 if (queue_count < vsi->rss_size) {
12328 i40e_clear_rss_config_user(vsi);
12329 dev_dbg(&pf->pdev->dev,
12330 "discard user configured hash keys and lut\n");
12333 /* Reset vsi->rss_size, as number of enabled queues changed */
12334 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
12335 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12337 i40e_pf_config_rss(pf);
12339 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
12340 vsi->req_queue_pairs, pf->rss_size_max);
12341 return pf->alloc_rss_size;
12345 * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
12346 * @pf: board private structure
12348 i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf)
12350 i40e_status status;
12351 bool min_valid, max_valid;
12352 u32 max_bw, min_bw;
12354 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
12355 &min_valid, &max_valid);
12359 pf->min_bw = min_bw;
12361 pf->max_bw = max_bw;
12368 * i40e_set_partition_bw_setting - Set BW settings for this PF partition
12369 * @pf: board private structure
12371 i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf)
12373 struct i40e_aqc_configure_partition_bw_data bw_data;
12374 i40e_status status;
12376 memset(&bw_data, 0, sizeof(bw_data));
12378 /* Set the valid bit for this PF */
12379 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
12380 bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
12381 bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
12383 /* Set the new bandwidths */
12384 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
12390 * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
12391 * @pf: board private structure
12393 i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf)
12395 /* Commit temporary BW setting to permanent NVM image */
12396 enum i40e_admin_queue_err last_aq_status;
12400 if (pf->hw.partition_id != 1) {
12401 dev_info(&pf->pdev->dev,
12402 "Commit BW only works on partition 1! This is partition %d",
12403 pf->hw.partition_id);
12404 ret = I40E_NOT_SUPPORTED;
12405 goto bw_commit_out;
12408 /* Acquire NVM for read access */
12409 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
12410 last_aq_status = pf->hw.aq.asq_last_status;
12412 dev_info(&pf->pdev->dev,
12413 "Cannot acquire NVM for read access, err %s aq_err %s\n",
12414 i40e_stat_str(&pf->hw, ret),
12415 i40e_aq_str(&pf->hw, last_aq_status));
12416 goto bw_commit_out;
12419 /* Read word 0x10 of NVM - SW compatibility word 1 */
12420 ret = i40e_aq_read_nvm(&pf->hw,
12421 I40E_SR_NVM_CONTROL_WORD,
12422 0x10, sizeof(nvm_word), &nvm_word,
12424 /* Save off last admin queue command status before releasing
12427 last_aq_status = pf->hw.aq.asq_last_status;
12428 i40e_release_nvm(&pf->hw);
12430 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
12431 i40e_stat_str(&pf->hw, ret),
12432 i40e_aq_str(&pf->hw, last_aq_status));
12433 goto bw_commit_out;
12436 /* Wait a bit for NVM release to complete */
12439 /* Acquire NVM for write access */
12440 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
12441 last_aq_status = pf->hw.aq.asq_last_status;
12443 dev_info(&pf->pdev->dev,
12444 "Cannot acquire NVM for write access, err %s aq_err %s\n",
12445 i40e_stat_str(&pf->hw, ret),
12446 i40e_aq_str(&pf->hw, last_aq_status));
12447 goto bw_commit_out;
12449 /* Write it back out unchanged to initiate update NVM,
12450 * which will force a write of the shadow (alt) RAM to
12451 * the NVM - thus storing the bandwidth values permanently.
12453 ret = i40e_aq_update_nvm(&pf->hw,
12454 I40E_SR_NVM_CONTROL_WORD,
12455 0x10, sizeof(nvm_word),
12456 &nvm_word, true, 0, NULL);
12457 /* Save off last admin queue command status before releasing
12460 last_aq_status = pf->hw.aq.asq_last_status;
12461 i40e_release_nvm(&pf->hw);
12463 dev_info(&pf->pdev->dev,
12464 "BW settings NOT SAVED, err %s aq_err %s\n",
12465 i40e_stat_str(&pf->hw, ret),
12466 i40e_aq_str(&pf->hw, last_aq_status));
12473 * i40e_is_total_port_shutdown_enabled - read NVM and return value
12474 * if total port shutdown feature is enabled for this PF
12475 * @pf: board private structure
12477 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf)
12479 #define I40E_TOTAL_PORT_SHUTDOWN_ENABLED BIT(4)
12480 #define I40E_FEATURES_ENABLE_PTR 0x2A
12481 #define I40E_CURRENT_SETTING_PTR 0x2B
12482 #define I40E_LINK_BEHAVIOR_WORD_OFFSET 0x2D
12483 #define I40E_LINK_BEHAVIOR_WORD_LENGTH 0x1
12484 #define I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED BIT(0)
12485 #define I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH 4
12486 i40e_status read_status = I40E_SUCCESS;
12487 u16 sr_emp_sr_settings_ptr = 0;
12488 u16 features_enable = 0;
12489 u16 link_behavior = 0;
12492 read_status = i40e_read_nvm_word(&pf->hw,
12493 I40E_SR_EMP_SR_SETTINGS_PTR,
12494 &sr_emp_sr_settings_ptr);
12497 read_status = i40e_read_nvm_word(&pf->hw,
12498 sr_emp_sr_settings_ptr +
12499 I40E_FEATURES_ENABLE_PTR,
12503 if (I40E_TOTAL_PORT_SHUTDOWN_ENABLED & features_enable) {
12504 read_status = i40e_read_nvm_module_data(&pf->hw,
12505 I40E_SR_EMP_SR_SETTINGS_PTR,
12506 I40E_CURRENT_SETTING_PTR,
12507 I40E_LINK_BEHAVIOR_WORD_OFFSET,
12508 I40E_LINK_BEHAVIOR_WORD_LENGTH,
12512 link_behavior >>= (pf->hw.port * I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH);
12513 ret = I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED & link_behavior;
12518 dev_warn(&pf->pdev->dev,
12519 "total-port-shutdown feature is off due to read nvm error: %s\n",
12520 i40e_stat_str(&pf->hw, read_status));
12525 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
12526 * @pf: board private structure to initialize
12528 * i40e_sw_init initializes the Adapter private data structure.
12529 * Fields are initialized based on PCI device information and
12530 * OS network device settings (MTU size).
12532 static int i40e_sw_init(struct i40e_pf *pf)
12538 /* Set default capability flags */
12539 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
12540 I40E_FLAG_MSI_ENABLED |
12541 I40E_FLAG_MSIX_ENABLED;
12543 /* Set default ITR */
12544 pf->rx_itr_default = I40E_ITR_RX_DEF;
12545 pf->tx_itr_default = I40E_ITR_TX_DEF;
12547 /* Depending on PF configurations, it is possible that the RSS
12548 * maximum might end up larger than the available queues
12550 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
12551 pf->alloc_rss_size = 1;
12552 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
12553 pf->rss_size_max = min_t(int, pf->rss_size_max,
12554 pf->hw.func_caps.num_tx_qp);
12556 /* find the next higher power-of-2 of num cpus */
12557 pow = roundup_pow_of_two(num_online_cpus());
12558 pf->rss_size_max = min_t(int, pf->rss_size_max, pow);
12560 if (pf->hw.func_caps.rss) {
12561 pf->flags |= I40E_FLAG_RSS_ENABLED;
12562 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
12563 num_online_cpus());
12566 /* MFP mode enabled */
12567 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
12568 pf->flags |= I40E_FLAG_MFP_ENABLED;
12569 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
12570 if (i40e_get_partition_bw_setting(pf)) {
12571 dev_warn(&pf->pdev->dev,
12572 "Could not get partition bw settings\n");
12574 dev_info(&pf->pdev->dev,
12575 "Partition BW Min = %8.8x, Max = %8.8x\n",
12576 pf->min_bw, pf->max_bw);
12578 /* nudge the Tx scheduler */
12579 i40e_set_partition_bw_setting(pf);
12583 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
12584 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
12585 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
12586 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
12587 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
12588 pf->hw.num_partitions > 1)
12589 dev_info(&pf->pdev->dev,
12590 "Flow Director Sideband mode Disabled in MFP mode\n");
12592 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12593 pf->fdir_pf_filter_count =
12594 pf->hw.func_caps.fd_filters_guaranteed;
12595 pf->hw.fdir_shared_filter_count =
12596 pf->hw.func_caps.fd_filters_best_effort;
12599 if (pf->hw.mac.type == I40E_MAC_X722) {
12600 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE |
12601 I40E_HW_128_QP_RSS_CAPABLE |
12602 I40E_HW_ATR_EVICT_CAPABLE |
12603 I40E_HW_WB_ON_ITR_CAPABLE |
12604 I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE |
12605 I40E_HW_NO_PCI_LINK_CHECK |
12606 I40E_HW_USE_SET_LLDP_MIB |
12607 I40E_HW_GENEVE_OFFLOAD_CAPABLE |
12608 I40E_HW_PTP_L4_CAPABLE |
12609 I40E_HW_WOL_MC_MAGIC_PKT_WAKE |
12610 I40E_HW_OUTER_UDP_CSUM_CAPABLE);
12612 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
12613 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=
12614 I40E_FDEVICT_PCTYPE_DEFAULT) {
12615 dev_warn(&pf->pdev->dev,
12616 "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
12617 pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE;
12619 } else if ((pf->hw.aq.api_maj_ver > 1) ||
12620 ((pf->hw.aq.api_maj_ver == 1) &&
12621 (pf->hw.aq.api_min_ver > 4))) {
12622 /* Supported in FW API version higher than 1.4 */
12623 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE;
12626 /* Enable HW ATR eviction if possible */
12627 if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)
12628 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED;
12630 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12631 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
12632 (pf->hw.aq.fw_maj_ver < 4))) {
12633 pf->hw_features |= I40E_HW_RESTART_AUTONEG;
12634 /* No DCB support for FW < v4.33 */
12635 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT;
12638 /* Disable FW LLDP if FW < v4.3 */
12639 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12640 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
12641 (pf->hw.aq.fw_maj_ver < 4)))
12642 pf->hw_features |= I40E_HW_STOP_FW_LLDP;
12644 /* Use the FW Set LLDP MIB API if FW > v4.40 */
12645 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12646 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
12647 (pf->hw.aq.fw_maj_ver >= 5)))
12648 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB;
12650 /* Enable PTP L4 if FW > v6.0 */
12651 if (pf->hw.mac.type == I40E_MAC_XL710 &&
12652 pf->hw.aq.fw_maj_ver >= 6)
12653 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE;
12655 if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
12656 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
12657 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
12658 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
12661 if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
12662 pf->flags |= I40E_FLAG_IWARP_ENABLED;
12663 /* IWARP needs one extra vector for CQP just like MISC.*/
12664 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
12666 /* Stopping FW LLDP engine is supported on XL710 and X722
12667 * starting from FW versions determined in i40e_init_adminq.
12668 * Stopping the FW LLDP engine is not supported on XL710
12669 * if NPAR is functioning so unset this hw flag in this case.
12671 if (pf->hw.mac.type == I40E_MAC_XL710 &&
12672 pf->hw.func_caps.npar_enable &&
12673 (pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))
12674 pf->hw.flags &= ~I40E_HW_FLAG_FW_LLDP_STOPPABLE;
12676 #ifdef CONFIG_PCI_IOV
12677 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
12678 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
12679 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
12680 pf->num_req_vfs = min_t(int,
12681 pf->hw.func_caps.num_vfs,
12682 I40E_MAX_VF_COUNT);
12684 #endif /* CONFIG_PCI_IOV */
12685 pf->eeprom_version = 0xDEAD;
12686 pf->lan_veb = I40E_NO_VEB;
12687 pf->lan_vsi = I40E_NO_VSI;
12689 /* By default FW has this off for performance reasons */
12690 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
12692 /* set up queue assignment tracking */
12693 size = sizeof(struct i40e_lump_tracking)
12694 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
12695 pf->qp_pile = kzalloc(size, GFP_KERNEL);
12696 if (!pf->qp_pile) {
12700 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12702 pf->tx_timeout_recovery_level = 1;
12704 if (pf->hw.mac.type != I40E_MAC_X722 &&
12705 i40e_is_total_port_shutdown_enabled(pf)) {
12706 /* Link down on close must be on when total port shutdown
12707 * is enabled for a given port
12709 pf->flags |= (I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED |
12710 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED);
12711 dev_info(&pf->pdev->dev,
12712 "total-port-shutdown was enabled, link-down-on-close is forced on\n");
12714 mutex_init(&pf->switch_mutex);
12721 * i40e_set_ntuple - set the ntuple feature flag and take action
12722 * @pf: board private structure to initialize
12723 * @features: the feature set that the stack is suggesting
12725 * returns a bool to indicate if reset needs to happen
12727 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
12729 bool need_reset = false;
12731 /* Check if Flow Director n-tuple support was enabled or disabled. If
12732 * the state changed, we need to reset.
12734 if (features & NETIF_F_NTUPLE) {
12735 /* Enable filters and mark for reset */
12736 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
12738 /* enable FD_SB only if there is MSI-X vector and no cloud
12741 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
12742 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12743 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
12746 /* turn off filters, mark for reset and clear SW filter list */
12747 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
12749 i40e_fdir_filter_exit(pf);
12751 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
12752 clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state);
12753 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
12755 /* reset fd counters */
12756 pf->fd_add_err = 0;
12757 pf->fd_atr_cnt = 0;
12758 /* if ATR was auto disabled it can be re-enabled. */
12759 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
12760 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
12761 (I40E_DEBUG_FD & pf->hw.debug_mask))
12762 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
12768 * i40e_clear_rss_lut - clear the rx hash lookup table
12769 * @vsi: the VSI being configured
12771 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
12773 struct i40e_pf *pf = vsi->back;
12774 struct i40e_hw *hw = &pf->hw;
12775 u16 vf_id = vsi->vf_id;
12778 if (vsi->type == I40E_VSI_MAIN) {
12779 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12780 wr32(hw, I40E_PFQF_HLUT(i), 0);
12781 } else if (vsi->type == I40E_VSI_SRIOV) {
12782 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12783 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
12785 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12790 * i40e_set_features - set the netdev feature flags
12791 * @netdev: ptr to the netdev being adjusted
12792 * @features: the feature set that the stack is suggesting
12793 * Note: expects to be called while under rtnl_lock()
12795 static int i40e_set_features(struct net_device *netdev,
12796 netdev_features_t features)
12798 struct i40e_netdev_priv *np = netdev_priv(netdev);
12799 struct i40e_vsi *vsi = np->vsi;
12800 struct i40e_pf *pf = vsi->back;
12803 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
12804 i40e_pf_config_rss(pf);
12805 else if (!(features & NETIF_F_RXHASH) &&
12806 netdev->features & NETIF_F_RXHASH)
12807 i40e_clear_rss_lut(vsi);
12809 if (features & NETIF_F_HW_VLAN_CTAG_RX)
12810 i40e_vlan_stripping_enable(vsi);
12812 i40e_vlan_stripping_disable(vsi);
12814 if (!(features & NETIF_F_HW_TC) &&
12815 (netdev->features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
12816 dev_err(&pf->pdev->dev,
12817 "Offloaded tc filters active, can't turn hw_tc_offload off");
12821 if (!(features & NETIF_F_HW_L2FW_DOFFLOAD) && vsi->macvlan_cnt)
12822 i40e_del_all_macvlans(vsi);
12824 need_reset = i40e_set_ntuple(pf, features);
12827 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
12832 static int i40e_udp_tunnel_set_port(struct net_device *netdev,
12833 unsigned int table, unsigned int idx,
12834 struct udp_tunnel_info *ti)
12836 struct i40e_netdev_priv *np = netdev_priv(netdev);
12837 struct i40e_hw *hw = &np->vsi->back->hw;
12838 u8 type, filter_index;
12841 type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? I40E_AQC_TUNNEL_TYPE_VXLAN :
12842 I40E_AQC_TUNNEL_TYPE_NGE;
12844 ret = i40e_aq_add_udp_tunnel(hw, ntohs(ti->port), type, &filter_index,
12847 netdev_info(netdev, "add UDP port failed, err %s aq_err %s\n",
12848 i40e_stat_str(hw, ret),
12849 i40e_aq_str(hw, hw->aq.asq_last_status));
12853 udp_tunnel_nic_set_port_priv(netdev, table, idx, filter_index);
12857 static int i40e_udp_tunnel_unset_port(struct net_device *netdev,
12858 unsigned int table, unsigned int idx,
12859 struct udp_tunnel_info *ti)
12861 struct i40e_netdev_priv *np = netdev_priv(netdev);
12862 struct i40e_hw *hw = &np->vsi->back->hw;
12865 ret = i40e_aq_del_udp_tunnel(hw, ti->hw_priv, NULL);
12867 netdev_info(netdev, "delete UDP port failed, err %s aq_err %s\n",
12868 i40e_stat_str(hw, ret),
12869 i40e_aq_str(hw, hw->aq.asq_last_status));
12876 static int i40e_get_phys_port_id(struct net_device *netdev,
12877 struct netdev_phys_item_id *ppid)
12879 struct i40e_netdev_priv *np = netdev_priv(netdev);
12880 struct i40e_pf *pf = np->vsi->back;
12881 struct i40e_hw *hw = &pf->hw;
12883 if (!(pf->hw_features & I40E_HW_PORT_ID_VALID))
12884 return -EOPNOTSUPP;
12886 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
12887 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
12893 * i40e_ndo_fdb_add - add an entry to the hardware database
12894 * @ndm: the input from the stack
12895 * @tb: pointer to array of nladdr (unused)
12896 * @dev: the net device pointer
12897 * @addr: the MAC address entry being added
12899 * @flags: instructions from stack about fdb operation
12900 * @extack: netlink extended ack, unused currently
12902 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
12903 struct net_device *dev,
12904 const unsigned char *addr, u16 vid,
12906 struct netlink_ext_ack *extack)
12908 struct i40e_netdev_priv *np = netdev_priv(dev);
12909 struct i40e_pf *pf = np->vsi->back;
12912 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
12913 return -EOPNOTSUPP;
12916 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
12920 /* Hardware does not support aging addresses so if a
12921 * ndm_state is given only allow permanent addresses
12923 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
12924 netdev_info(dev, "FDB only supports static addresses\n");
12928 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
12929 err = dev_uc_add_excl(dev, addr);
12930 else if (is_multicast_ether_addr(addr))
12931 err = dev_mc_add_excl(dev, addr);
12935 /* Only return duplicate errors if NLM_F_EXCL is set */
12936 if (err == -EEXIST && !(flags & NLM_F_EXCL))
12943 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
12944 * @dev: the netdev being configured
12945 * @nlh: RTNL message
12946 * @flags: bridge flags
12947 * @extack: netlink extended ack
12949 * Inserts a new hardware bridge if not already created and
12950 * enables the bridging mode requested (VEB or VEPA). If the
12951 * hardware bridge has already been inserted and the request
12952 * is to change the mode then that requires a PF reset to
12953 * allow rebuild of the components with required hardware
12954 * bridge mode enabled.
12956 * Note: expects to be called while under rtnl_lock()
12958 static int i40e_ndo_bridge_setlink(struct net_device *dev,
12959 struct nlmsghdr *nlh,
12961 struct netlink_ext_ack *extack)
12963 struct i40e_netdev_priv *np = netdev_priv(dev);
12964 struct i40e_vsi *vsi = np->vsi;
12965 struct i40e_pf *pf = vsi->back;
12966 struct i40e_veb *veb = NULL;
12967 struct nlattr *attr, *br_spec;
12970 /* Only for PF VSI for now */
12971 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
12972 return -EOPNOTSUPP;
12974 /* Find the HW bridge for PF VSI */
12975 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12976 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12980 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
12982 nla_for_each_nested(attr, br_spec, rem) {
12985 if (nla_type(attr) != IFLA_BRIDGE_MODE)
12988 mode = nla_get_u16(attr);
12989 if ((mode != BRIDGE_MODE_VEPA) &&
12990 (mode != BRIDGE_MODE_VEB))
12993 /* Insert a new HW bridge */
12995 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
12996 vsi->tc_config.enabled_tc);
12998 veb->bridge_mode = mode;
12999 i40e_config_bridge_mode(veb);
13001 /* No Bridge HW offload available */
13005 } else if (mode != veb->bridge_mode) {
13006 /* Existing HW bridge but different mode needs reset */
13007 veb->bridge_mode = mode;
13008 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
13009 if (mode == BRIDGE_MODE_VEB)
13010 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
13012 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
13013 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
13022 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
13025 * @seq: RTNL message seq #
13026 * @dev: the netdev being configured
13027 * @filter_mask: unused
13028 * @nlflags: netlink flags passed in
13030 * Return the mode in which the hardware bridge is operating in
13033 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
13034 struct net_device *dev,
13035 u32 __always_unused filter_mask,
13038 struct i40e_netdev_priv *np = netdev_priv(dev);
13039 struct i40e_vsi *vsi = np->vsi;
13040 struct i40e_pf *pf = vsi->back;
13041 struct i40e_veb *veb = NULL;
13044 /* Only for PF VSI for now */
13045 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
13046 return -EOPNOTSUPP;
13048 /* Find the HW bridge for the PF VSI */
13049 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
13050 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
13057 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
13058 0, 0, nlflags, filter_mask, NULL);
13062 * i40e_features_check - Validate encapsulated packet conforms to limits
13064 * @dev: This physical port's netdev
13065 * @features: Offload features that the stack believes apply
13067 static netdev_features_t i40e_features_check(struct sk_buff *skb,
13068 struct net_device *dev,
13069 netdev_features_t features)
13073 /* No point in doing any of this if neither checksum nor GSO are
13074 * being requested for this frame. We can rule out both by just
13075 * checking for CHECKSUM_PARTIAL
13077 if (skb->ip_summed != CHECKSUM_PARTIAL)
13080 /* We cannot support GSO if the MSS is going to be less than
13081 * 64 bytes. If it is then we need to drop support for GSO.
13083 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
13084 features &= ~NETIF_F_GSO_MASK;
13086 /* MACLEN can support at most 63 words */
13087 len = skb_network_header(skb) - skb->data;
13088 if (len & ~(63 * 2))
13091 /* IPLEN and EIPLEN can support at most 127 dwords */
13092 len = skb_transport_header(skb) - skb_network_header(skb);
13093 if (len & ~(127 * 4))
13096 if (skb->encapsulation) {
13097 /* L4TUNLEN can support 127 words */
13098 len = skb_inner_network_header(skb) - skb_transport_header(skb);
13099 if (len & ~(127 * 2))
13102 /* IPLEN can support at most 127 dwords */
13103 len = skb_inner_transport_header(skb) -
13104 skb_inner_network_header(skb);
13105 if (len & ~(127 * 4))
13109 /* No need to validate L4LEN as TCP is the only protocol with a
13110 * a flexible value and we support all possible values supported
13111 * by TCP, which is at most 15 dwords
13116 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
13120 * i40e_xdp_setup - add/remove an XDP program
13121 * @vsi: VSI to changed
13122 * @prog: XDP program
13123 * @extack: netlink extended ack
13125 static int i40e_xdp_setup(struct i40e_vsi *vsi, struct bpf_prog *prog,
13126 struct netlink_ext_ack *extack)
13128 int frame_size = vsi->netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
13129 struct i40e_pf *pf = vsi->back;
13130 struct bpf_prog *old_prog;
13134 /* Don't allow frames that span over multiple buffers */
13135 if (frame_size > vsi->rx_buf_len) {
13136 NL_SET_ERR_MSG_MOD(extack, "MTU too large to enable XDP");
13140 /* When turning XDP on->off/off->on we reset and rebuild the rings. */
13141 need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
13144 i40e_prep_for_reset(pf);
13146 /* VSI shall be deleted in a moment, just return EINVAL */
13147 if (test_bit(__I40E_IN_REMOVE, pf->state))
13150 old_prog = xchg(&vsi->xdp_prog, prog);
13154 /* Wait until ndo_xsk_wakeup completes. */
13156 i40e_reset_and_rebuild(pf, true, true);
13159 for (i = 0; i < vsi->num_queue_pairs; i++)
13160 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
13163 bpf_prog_put(old_prog);
13165 /* Kick start the NAPI context if there is an AF_XDP socket open
13166 * on that queue id. This so that receiving will start.
13168 if (need_reset && prog)
13169 for (i = 0; i < vsi->num_queue_pairs; i++)
13170 if (vsi->xdp_rings[i]->xsk_pool)
13171 (void)i40e_xsk_wakeup(vsi->netdev, i,
13178 * i40e_enter_busy_conf - Enters busy config state
13181 * Returns 0 on success, <0 for failure.
13183 static int i40e_enter_busy_conf(struct i40e_vsi *vsi)
13185 struct i40e_pf *pf = vsi->back;
13188 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
13192 usleep_range(1000, 2000);
13199 * i40e_exit_busy_conf - Exits busy config state
13202 static void i40e_exit_busy_conf(struct i40e_vsi *vsi)
13204 struct i40e_pf *pf = vsi->back;
13206 clear_bit(__I40E_CONFIG_BUSY, pf->state);
13210 * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair
13212 * @queue_pair: queue pair
13214 static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair)
13216 memset(&vsi->rx_rings[queue_pair]->rx_stats, 0,
13217 sizeof(vsi->rx_rings[queue_pair]->rx_stats));
13218 memset(&vsi->tx_rings[queue_pair]->stats, 0,
13219 sizeof(vsi->tx_rings[queue_pair]->stats));
13220 if (i40e_enabled_xdp_vsi(vsi)) {
13221 memset(&vsi->xdp_rings[queue_pair]->stats, 0,
13222 sizeof(vsi->xdp_rings[queue_pair]->stats));
13227 * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair
13229 * @queue_pair: queue pair
13231 static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair)
13233 i40e_clean_tx_ring(vsi->tx_rings[queue_pair]);
13234 if (i40e_enabled_xdp_vsi(vsi)) {
13235 /* Make sure that in-progress ndo_xdp_xmit calls are
13239 i40e_clean_tx_ring(vsi->xdp_rings[queue_pair]);
13241 i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
13245 * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair
13247 * @queue_pair: queue pair
13248 * @enable: true for enable, false for disable
13250 static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair,
13253 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13254 struct i40e_q_vector *q_vector = rxr->q_vector;
13259 /* All rings in a qp belong to the same qvector. */
13260 if (q_vector->rx.ring || q_vector->tx.ring) {
13262 napi_enable(&q_vector->napi);
13264 napi_disable(&q_vector->napi);
13269 * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair
13271 * @queue_pair: queue pair
13272 * @enable: true for enable, false for disable
13274 * Returns 0 on success, <0 on failure.
13276 static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair,
13279 struct i40e_pf *pf = vsi->back;
13282 pf_q = vsi->base_queue + queue_pair;
13283 ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q,
13284 false /*is xdp*/, enable);
13286 dev_info(&pf->pdev->dev,
13287 "VSI seid %d Tx ring %d %sable timeout\n",
13288 vsi->seid, pf_q, (enable ? "en" : "dis"));
13292 i40e_control_rx_q(pf, pf_q, enable);
13293 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
13295 dev_info(&pf->pdev->dev,
13296 "VSI seid %d Rx ring %d %sable timeout\n",
13297 vsi->seid, pf_q, (enable ? "en" : "dis"));
13301 /* Due to HW errata, on Rx disable only, the register can
13302 * indicate done before it really is. Needs 50ms to be sure
13307 if (!i40e_enabled_xdp_vsi(vsi))
13310 ret = i40e_control_wait_tx_q(vsi->seid, pf,
13311 pf_q + vsi->alloc_queue_pairs,
13312 true /*is xdp*/, enable);
13314 dev_info(&pf->pdev->dev,
13315 "VSI seid %d XDP Tx ring %d %sable timeout\n",
13316 vsi->seid, pf_q, (enable ? "en" : "dis"));
13323 * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair
13325 * @queue_pair: queue_pair
13327 static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair)
13329 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13330 struct i40e_pf *pf = vsi->back;
13331 struct i40e_hw *hw = &pf->hw;
13333 /* All rings in a qp belong to the same qvector. */
13334 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
13335 i40e_irq_dynamic_enable(vsi, rxr->q_vector->v_idx);
13337 i40e_irq_dynamic_enable_icr0(pf);
13343 * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair
13345 * @queue_pair: queue_pair
13347 static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair)
13349 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13350 struct i40e_pf *pf = vsi->back;
13351 struct i40e_hw *hw = &pf->hw;
13353 /* For simplicity, instead of removing the qp interrupt causes
13354 * from the interrupt linked list, we simply disable the interrupt, and
13355 * leave the list intact.
13357 * All rings in a qp belong to the same qvector.
13359 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
13360 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx;
13362 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0);
13364 synchronize_irq(pf->msix_entries[intpf].vector);
13366 /* Legacy and MSI mode - this stops all interrupt handling */
13367 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
13368 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
13370 synchronize_irq(pf->pdev->irq);
13375 * i40e_queue_pair_disable - Disables a queue pair
13377 * @queue_pair: queue pair
13379 * Returns 0 on success, <0 on failure.
13381 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair)
13385 err = i40e_enter_busy_conf(vsi);
13389 i40e_queue_pair_disable_irq(vsi, queue_pair);
13390 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, false /* off */);
13391 i40e_queue_pair_toggle_napi(vsi, queue_pair, false /* off */);
13392 i40e_queue_pair_clean_rings(vsi, queue_pair);
13393 i40e_queue_pair_reset_stats(vsi, queue_pair);
13399 * i40e_queue_pair_enable - Enables a queue pair
13401 * @queue_pair: queue pair
13403 * Returns 0 on success, <0 on failure.
13405 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair)
13409 err = i40e_configure_tx_ring(vsi->tx_rings[queue_pair]);
13413 if (i40e_enabled_xdp_vsi(vsi)) {
13414 err = i40e_configure_tx_ring(vsi->xdp_rings[queue_pair]);
13419 err = i40e_configure_rx_ring(vsi->rx_rings[queue_pair]);
13423 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, true /* on */);
13424 i40e_queue_pair_toggle_napi(vsi, queue_pair, true /* on */);
13425 i40e_queue_pair_enable_irq(vsi, queue_pair);
13427 i40e_exit_busy_conf(vsi);
13433 * i40e_xdp - implements ndo_bpf for i40e
13435 * @xdp: XDP command
13437 static int i40e_xdp(struct net_device *dev,
13438 struct netdev_bpf *xdp)
13440 struct i40e_netdev_priv *np = netdev_priv(dev);
13441 struct i40e_vsi *vsi = np->vsi;
13443 if (vsi->type != I40E_VSI_MAIN)
13446 switch (xdp->command) {
13447 case XDP_SETUP_PROG:
13448 return i40e_xdp_setup(vsi, xdp->prog, xdp->extack);
13449 case XDP_SETUP_XSK_POOL:
13450 return i40e_xsk_pool_setup(vsi, xdp->xsk.pool,
13451 xdp->xsk.queue_id);
13457 static const struct net_device_ops i40e_netdev_ops = {
13458 .ndo_open = i40e_open,
13459 .ndo_stop = i40e_close,
13460 .ndo_start_xmit = i40e_lan_xmit_frame,
13461 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
13462 .ndo_set_rx_mode = i40e_set_rx_mode,
13463 .ndo_validate_addr = eth_validate_addr,
13464 .ndo_set_mac_address = i40e_set_mac,
13465 .ndo_change_mtu = i40e_change_mtu,
13466 .ndo_eth_ioctl = i40e_ioctl,
13467 .ndo_tx_timeout = i40e_tx_timeout,
13468 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
13469 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
13470 #ifdef CONFIG_NET_POLL_CONTROLLER
13471 .ndo_poll_controller = i40e_netpoll,
13473 .ndo_setup_tc = __i40e_setup_tc,
13474 .ndo_select_queue = i40e_lan_select_queue,
13475 .ndo_set_features = i40e_set_features,
13476 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
13477 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
13478 .ndo_get_vf_stats = i40e_get_vf_stats,
13479 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
13480 .ndo_get_vf_config = i40e_ndo_get_vf_config,
13481 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
13482 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
13483 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
13484 .ndo_get_phys_port_id = i40e_get_phys_port_id,
13485 .ndo_fdb_add = i40e_ndo_fdb_add,
13486 .ndo_features_check = i40e_features_check,
13487 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
13488 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
13489 .ndo_bpf = i40e_xdp,
13490 .ndo_xdp_xmit = i40e_xdp_xmit,
13491 .ndo_xsk_wakeup = i40e_xsk_wakeup,
13492 .ndo_dfwd_add_station = i40e_fwd_add,
13493 .ndo_dfwd_del_station = i40e_fwd_del,
13497 * i40e_config_netdev - Setup the netdev flags
13498 * @vsi: the VSI being configured
13500 * Returns 0 on success, negative value on failure
13502 static int i40e_config_netdev(struct i40e_vsi *vsi)
13504 struct i40e_pf *pf = vsi->back;
13505 struct i40e_hw *hw = &pf->hw;
13506 struct i40e_netdev_priv *np;
13507 struct net_device *netdev;
13508 u8 broadcast[ETH_ALEN];
13509 u8 mac_addr[ETH_ALEN];
13511 netdev_features_t hw_enc_features;
13512 netdev_features_t hw_features;
13514 etherdev_size = sizeof(struct i40e_netdev_priv);
13515 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
13519 vsi->netdev = netdev;
13520 np = netdev_priv(netdev);
13523 hw_enc_features = NETIF_F_SG |
13526 NETIF_F_SOFT_FEATURES |
13531 NETIF_F_GSO_GRE_CSUM |
13532 NETIF_F_GSO_PARTIAL |
13533 NETIF_F_GSO_IPXIP4 |
13534 NETIF_F_GSO_IPXIP6 |
13535 NETIF_F_GSO_UDP_TUNNEL |
13536 NETIF_F_GSO_UDP_TUNNEL_CSUM |
13537 NETIF_F_GSO_UDP_L4 |
13543 if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE))
13544 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
13546 netdev->udp_tunnel_nic_info = &pf->udp_tunnel_nic;
13548 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
13550 netdev->hw_enc_features |= hw_enc_features;
13552 /* record features VLANs can make use of */
13553 netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
13555 #define I40E_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
13556 NETIF_F_GSO_GRE_CSUM | \
13557 NETIF_F_GSO_IPXIP4 | \
13558 NETIF_F_GSO_IPXIP6 | \
13559 NETIF_F_GSO_UDP_TUNNEL | \
13560 NETIF_F_GSO_UDP_TUNNEL_CSUM)
13562 netdev->gso_partial_features = I40E_GSO_PARTIAL_FEATURES;
13563 netdev->features |= NETIF_F_GSO_PARTIAL |
13564 I40E_GSO_PARTIAL_FEATURES;
13566 netdev->mpls_features |= NETIF_F_SG;
13567 netdev->mpls_features |= NETIF_F_HW_CSUM;
13568 netdev->mpls_features |= NETIF_F_TSO;
13569 netdev->mpls_features |= NETIF_F_TSO6;
13570 netdev->mpls_features |= I40E_GSO_PARTIAL_FEATURES;
13572 /* enable macvlan offloads */
13573 netdev->hw_features |= NETIF_F_HW_L2FW_DOFFLOAD;
13575 hw_features = hw_enc_features |
13576 NETIF_F_HW_VLAN_CTAG_TX |
13577 NETIF_F_HW_VLAN_CTAG_RX;
13579 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
13580 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
13582 netdev->hw_features |= hw_features;
13584 netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
13585 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
13587 netdev->features &= ~NETIF_F_HW_TC;
13589 if (vsi->type == I40E_VSI_MAIN) {
13590 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
13591 ether_addr_copy(mac_addr, hw->mac.perm_addr);
13592 /* The following steps are necessary for two reasons. First,
13593 * some older NVM configurations load a default MAC-VLAN
13594 * filter that will accept any tagged packet, and we want to
13595 * replace this with a normal filter. Additionally, it is
13596 * possible our MAC address was provided by the platform using
13597 * Open Firmware or similar.
13599 * Thus, we need to remove the default filter and install one
13600 * specific to the MAC address.
13602 i40e_rm_default_mac_filter(vsi, mac_addr);
13603 spin_lock_bh(&vsi->mac_filter_hash_lock);
13604 i40e_add_mac_filter(vsi, mac_addr);
13605 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13607 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
13608 * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
13609 * the end, which is 4 bytes long, so force truncation of the
13610 * original name by IFNAMSIZ - 4
13612 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d",
13614 pf->vsi[pf->lan_vsi]->netdev->name);
13615 eth_random_addr(mac_addr);
13617 spin_lock_bh(&vsi->mac_filter_hash_lock);
13618 i40e_add_mac_filter(vsi, mac_addr);
13619 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13622 /* Add the broadcast filter so that we initially will receive
13623 * broadcast packets. Note that when a new VLAN is first added the
13624 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
13625 * specific filters as part of transitioning into "vlan" operation.
13626 * When more VLANs are added, the driver will copy each existing MAC
13627 * filter and add it for the new VLAN.
13629 * Broadcast filters are handled specially by
13630 * i40e_sync_filters_subtask, as the driver must to set the broadcast
13631 * promiscuous bit instead of adding this directly as a MAC/VLAN
13632 * filter. The subtask will update the correct broadcast promiscuous
13633 * bits as VLANs become active or inactive.
13635 eth_broadcast_addr(broadcast);
13636 spin_lock_bh(&vsi->mac_filter_hash_lock);
13637 i40e_add_mac_filter(vsi, broadcast);
13638 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13640 eth_hw_addr_set(netdev, mac_addr);
13641 ether_addr_copy(netdev->perm_addr, mac_addr);
13643 /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
13644 netdev->neigh_priv_len = sizeof(u32) * 4;
13646 netdev->priv_flags |= IFF_UNICAST_FLT;
13647 netdev->priv_flags |= IFF_SUPP_NOFCS;
13648 /* Setup netdev TC information */
13649 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
13651 netdev->netdev_ops = &i40e_netdev_ops;
13652 netdev->watchdog_timeo = 5 * HZ;
13653 i40e_set_ethtool_ops(netdev);
13655 /* MTU range: 68 - 9706 */
13656 netdev->min_mtu = ETH_MIN_MTU;
13657 netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
13663 * i40e_vsi_delete - Delete a VSI from the switch
13664 * @vsi: the VSI being removed
13666 * Returns 0 on success, negative value on failure
13668 static void i40e_vsi_delete(struct i40e_vsi *vsi)
13670 /* remove default VSI is not allowed */
13671 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
13674 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
13678 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
13679 * @vsi: the VSI being queried
13681 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
13683 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
13685 struct i40e_veb *veb;
13686 struct i40e_pf *pf = vsi->back;
13688 /* Uplink is not a bridge so default to VEB */
13689 if (vsi->veb_idx >= I40E_MAX_VEB)
13692 veb = pf->veb[vsi->veb_idx];
13694 dev_info(&pf->pdev->dev,
13695 "There is no veb associated with the bridge\n");
13699 /* Uplink is a bridge in VEPA mode */
13700 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
13703 /* Uplink is a bridge in VEB mode */
13707 /* VEPA is now default bridge, so return 0 */
13712 * i40e_add_vsi - Add a VSI to the switch
13713 * @vsi: the VSI being configured
13715 * This initializes a VSI context depending on the VSI type to be added and
13716 * passes it down to the add_vsi aq command.
13718 static int i40e_add_vsi(struct i40e_vsi *vsi)
13721 struct i40e_pf *pf = vsi->back;
13722 struct i40e_hw *hw = &pf->hw;
13723 struct i40e_vsi_context ctxt;
13724 struct i40e_mac_filter *f;
13725 struct hlist_node *h;
13728 u8 enabled_tc = 0x1; /* TC0 enabled */
13731 memset(&ctxt, 0, sizeof(ctxt));
13732 switch (vsi->type) {
13733 case I40E_VSI_MAIN:
13734 /* The PF's main VSI is already setup as part of the
13735 * device initialization, so we'll not bother with
13736 * the add_vsi call, but we will retrieve the current
13739 ctxt.seid = pf->main_vsi_seid;
13740 ctxt.pf_num = pf->hw.pf_id;
13742 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
13743 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13745 dev_info(&pf->pdev->dev,
13746 "couldn't get PF vsi config, err %s aq_err %s\n",
13747 i40e_stat_str(&pf->hw, ret),
13748 i40e_aq_str(&pf->hw,
13749 pf->hw.aq.asq_last_status));
13752 vsi->info = ctxt.info;
13753 vsi->info.valid_sections = 0;
13755 vsi->seid = ctxt.seid;
13756 vsi->id = ctxt.vsi_number;
13758 enabled_tc = i40e_pf_get_tc_map(pf);
13760 /* Source pruning is enabled by default, so the flag is
13761 * negative logic - if it's set, we need to fiddle with
13762 * the VSI to disable source pruning.
13764 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) {
13765 memset(&ctxt, 0, sizeof(ctxt));
13766 ctxt.seid = pf->main_vsi_seid;
13767 ctxt.pf_num = pf->hw.pf_id;
13769 ctxt.info.valid_sections |=
13770 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13771 ctxt.info.switch_id =
13772 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
13773 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13775 dev_info(&pf->pdev->dev,
13776 "update vsi failed, err %s aq_err %s\n",
13777 i40e_stat_str(&pf->hw, ret),
13778 i40e_aq_str(&pf->hw,
13779 pf->hw.aq.asq_last_status));
13785 /* MFP mode setup queue map and update VSI */
13786 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
13787 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
13788 memset(&ctxt, 0, sizeof(ctxt));
13789 ctxt.seid = pf->main_vsi_seid;
13790 ctxt.pf_num = pf->hw.pf_id;
13792 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
13793 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13795 dev_info(&pf->pdev->dev,
13796 "update vsi failed, err %s aq_err %s\n",
13797 i40e_stat_str(&pf->hw, ret),
13798 i40e_aq_str(&pf->hw,
13799 pf->hw.aq.asq_last_status));
13803 /* update the local VSI info queue map */
13804 i40e_vsi_update_queue_map(vsi, &ctxt);
13805 vsi->info.valid_sections = 0;
13807 /* Default/Main VSI is only enabled for TC0
13808 * reconfigure it to enable all TCs that are
13809 * available on the port in SFP mode.
13810 * For MFP case the iSCSI PF would use this
13811 * flow to enable LAN+iSCSI TC.
13813 ret = i40e_vsi_config_tc(vsi, enabled_tc);
13815 /* Single TC condition is not fatal,
13816 * message and continue
13818 dev_info(&pf->pdev->dev,
13819 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
13821 i40e_stat_str(&pf->hw, ret),
13822 i40e_aq_str(&pf->hw,
13823 pf->hw.aq.asq_last_status));
13828 case I40E_VSI_FDIR:
13829 ctxt.pf_num = hw->pf_id;
13831 ctxt.uplink_seid = vsi->uplink_seid;
13832 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13833 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13834 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
13835 (i40e_is_vsi_uplink_mode_veb(vsi))) {
13836 ctxt.info.valid_sections |=
13837 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13838 ctxt.info.switch_id =
13839 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13841 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13844 case I40E_VSI_VMDQ2:
13845 ctxt.pf_num = hw->pf_id;
13847 ctxt.uplink_seid = vsi->uplink_seid;
13848 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13849 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
13851 /* This VSI is connected to VEB so the switch_id
13852 * should be set to zero by default.
13854 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13855 ctxt.info.valid_sections |=
13856 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13857 ctxt.info.switch_id =
13858 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13861 /* Setup the VSI tx/rx queue map for TC0 only for now */
13862 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13865 case I40E_VSI_SRIOV:
13866 ctxt.pf_num = hw->pf_id;
13867 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
13868 ctxt.uplink_seid = vsi->uplink_seid;
13869 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13870 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
13872 /* This VSI is connected to VEB so the switch_id
13873 * should be set to zero by default.
13875 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13876 ctxt.info.valid_sections |=
13877 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13878 ctxt.info.switch_id =
13879 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13882 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
13883 ctxt.info.valid_sections |=
13884 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
13885 ctxt.info.queueing_opt_flags |=
13886 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
13887 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
13890 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
13891 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
13892 if (pf->vf[vsi->vf_id].spoofchk) {
13893 ctxt.info.valid_sections |=
13894 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
13895 ctxt.info.sec_flags |=
13896 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
13897 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
13899 /* Setup the VSI tx/rx queue map for TC0 only for now */
13900 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13903 case I40E_VSI_IWARP:
13904 /* send down message to iWARP */
13911 if (vsi->type != I40E_VSI_MAIN) {
13912 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
13914 dev_info(&vsi->back->pdev->dev,
13915 "add vsi failed, err %s aq_err %s\n",
13916 i40e_stat_str(&pf->hw, ret),
13917 i40e_aq_str(&pf->hw,
13918 pf->hw.aq.asq_last_status));
13922 vsi->info = ctxt.info;
13923 vsi->info.valid_sections = 0;
13924 vsi->seid = ctxt.seid;
13925 vsi->id = ctxt.vsi_number;
13928 vsi->active_filters = 0;
13929 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
13930 spin_lock_bh(&vsi->mac_filter_hash_lock);
13931 /* If macvlan filters already exist, force them to get loaded */
13932 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
13933 f->state = I40E_FILTER_NEW;
13936 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13939 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
13940 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
13943 /* Update VSI BW information */
13944 ret = i40e_vsi_get_bw_info(vsi);
13946 dev_info(&pf->pdev->dev,
13947 "couldn't get vsi bw info, err %s aq_err %s\n",
13948 i40e_stat_str(&pf->hw, ret),
13949 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13950 /* VSI is already added so not tearing that up */
13959 * i40e_vsi_release - Delete a VSI and free its resources
13960 * @vsi: the VSI being removed
13962 * Returns 0 on success or < 0 on error
13964 int i40e_vsi_release(struct i40e_vsi *vsi)
13966 struct i40e_mac_filter *f;
13967 struct hlist_node *h;
13968 struct i40e_veb *veb = NULL;
13969 struct i40e_pf *pf;
13975 /* release of a VEB-owner or last VSI is not allowed */
13976 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
13977 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
13978 vsi->seid, vsi->uplink_seid);
13981 if (vsi == pf->vsi[pf->lan_vsi] &&
13982 !test_bit(__I40E_DOWN, pf->state)) {
13983 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
13986 set_bit(__I40E_VSI_RELEASING, vsi->state);
13987 uplink_seid = vsi->uplink_seid;
13988 if (vsi->type != I40E_VSI_SRIOV) {
13989 if (vsi->netdev_registered) {
13990 vsi->netdev_registered = false;
13992 /* results in a call to i40e_close() */
13993 unregister_netdev(vsi->netdev);
13996 i40e_vsi_close(vsi);
13998 i40e_vsi_disable_irq(vsi);
14001 spin_lock_bh(&vsi->mac_filter_hash_lock);
14003 /* clear the sync flag on all filters */
14005 __dev_uc_unsync(vsi->netdev, NULL);
14006 __dev_mc_unsync(vsi->netdev, NULL);
14009 /* make sure any remaining filters are marked for deletion */
14010 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
14011 __i40e_del_filter(vsi, f);
14013 spin_unlock_bh(&vsi->mac_filter_hash_lock);
14015 i40e_sync_vsi_filters(vsi);
14017 i40e_vsi_delete(vsi);
14018 i40e_vsi_free_q_vectors(vsi);
14020 free_netdev(vsi->netdev);
14021 vsi->netdev = NULL;
14023 i40e_vsi_clear_rings(vsi);
14024 i40e_vsi_clear(vsi);
14026 /* If this was the last thing on the VEB, except for the
14027 * controlling VSI, remove the VEB, which puts the controlling
14028 * VSI onto the next level down in the switch.
14030 * Well, okay, there's one more exception here: don't remove
14031 * the orphan VEBs yet. We'll wait for an explicit remove request
14032 * from up the network stack.
14034 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
14036 pf->vsi[i]->uplink_seid == uplink_seid &&
14037 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14038 n++; /* count the VSIs */
14041 for (i = 0; i < I40E_MAX_VEB; i++) {
14044 if (pf->veb[i]->uplink_seid == uplink_seid)
14045 n++; /* count the VEBs */
14046 if (pf->veb[i]->seid == uplink_seid)
14049 if (n == 0 && veb && veb->uplink_seid != 0)
14050 i40e_veb_release(veb);
14056 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
14057 * @vsi: ptr to the VSI
14059 * This should only be called after i40e_vsi_mem_alloc() which allocates the
14060 * corresponding SW VSI structure and initializes num_queue_pairs for the
14061 * newly allocated VSI.
14063 * Returns 0 on success or negative on failure
14065 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
14068 struct i40e_pf *pf = vsi->back;
14070 if (vsi->q_vectors[0]) {
14071 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
14076 if (vsi->base_vector) {
14077 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
14078 vsi->seid, vsi->base_vector);
14082 ret = i40e_vsi_alloc_q_vectors(vsi);
14084 dev_info(&pf->pdev->dev,
14085 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
14086 vsi->num_q_vectors, vsi->seid, ret);
14087 vsi->num_q_vectors = 0;
14088 goto vector_setup_out;
14091 /* In Legacy mode, we do not have to get any other vector since we
14092 * piggyback on the misc/ICR0 for queue interrupts.
14094 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
14096 if (vsi->num_q_vectors)
14097 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
14098 vsi->num_q_vectors, vsi->idx);
14099 if (vsi->base_vector < 0) {
14100 dev_info(&pf->pdev->dev,
14101 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
14102 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
14103 i40e_vsi_free_q_vectors(vsi);
14105 goto vector_setup_out;
14113 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
14114 * @vsi: pointer to the vsi.
14116 * This re-allocates a vsi's queue resources.
14118 * Returns pointer to the successfully allocated and configured VSI sw struct
14119 * on success, otherwise returns NULL on failure.
14121 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
14123 u16 alloc_queue_pairs;
14124 struct i40e_pf *pf;
14133 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
14134 i40e_vsi_clear_rings(vsi);
14136 i40e_vsi_free_arrays(vsi, false);
14137 i40e_set_num_rings_in_vsi(vsi);
14138 ret = i40e_vsi_alloc_arrays(vsi, false);
14142 alloc_queue_pairs = vsi->alloc_queue_pairs *
14143 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14145 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14147 dev_info(&pf->pdev->dev,
14148 "failed to get tracking for %d queues for VSI %d err %d\n",
14149 alloc_queue_pairs, vsi->seid, ret);
14152 vsi->base_queue = ret;
14154 /* Update the FW view of the VSI. Force a reset of TC and queue
14155 * layout configurations.
14157 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14158 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14159 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14160 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14161 if (vsi->type == I40E_VSI_MAIN)
14162 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
14164 /* assign it some queues */
14165 ret = i40e_alloc_rings(vsi);
14169 /* map all of the rings to the q_vectors */
14170 i40e_vsi_map_rings_to_vectors(vsi);
14174 i40e_vsi_free_q_vectors(vsi);
14175 if (vsi->netdev_registered) {
14176 vsi->netdev_registered = false;
14177 unregister_netdev(vsi->netdev);
14178 free_netdev(vsi->netdev);
14179 vsi->netdev = NULL;
14181 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14183 i40e_vsi_clear(vsi);
14188 * i40e_vsi_setup - Set up a VSI by a given type
14189 * @pf: board private structure
14191 * @uplink_seid: the switch element to link to
14192 * @param1: usage depends upon VSI type. For VF types, indicates VF id
14194 * This allocates the sw VSI structure and its queue resources, then add a VSI
14195 * to the identified VEB.
14197 * Returns pointer to the successfully allocated and configure VSI sw struct on
14198 * success, otherwise returns NULL on failure.
14200 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
14201 u16 uplink_seid, u32 param1)
14203 struct i40e_vsi *vsi = NULL;
14204 struct i40e_veb *veb = NULL;
14205 u16 alloc_queue_pairs;
14209 /* The requested uplink_seid must be either
14210 * - the PF's port seid
14211 * no VEB is needed because this is the PF
14212 * or this is a Flow Director special case VSI
14213 * - seid of an existing VEB
14214 * - seid of a VSI that owns an existing VEB
14215 * - seid of a VSI that doesn't own a VEB
14216 * a new VEB is created and the VSI becomes the owner
14217 * - seid of the PF VSI, which is what creates the first VEB
14218 * this is a special case of the previous
14220 * Find which uplink_seid we were given and create a new VEB if needed
14222 for (i = 0; i < I40E_MAX_VEB; i++) {
14223 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
14229 if (!veb && uplink_seid != pf->mac_seid) {
14231 for (i = 0; i < pf->num_alloc_vsi; i++) {
14232 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
14238 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
14243 if (vsi->uplink_seid == pf->mac_seid)
14244 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
14245 vsi->tc_config.enabled_tc);
14246 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
14247 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
14248 vsi->tc_config.enabled_tc);
14250 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
14251 dev_info(&vsi->back->pdev->dev,
14252 "New VSI creation error, uplink seid of LAN VSI expected.\n");
14255 /* We come up by default in VEPA mode if SRIOV is not
14256 * already enabled, in which case we can't force VEPA
14259 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
14260 veb->bridge_mode = BRIDGE_MODE_VEPA;
14261 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
14263 i40e_config_bridge_mode(veb);
14265 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
14266 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
14270 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
14274 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14275 uplink_seid = veb->seid;
14278 /* get vsi sw struct */
14279 v_idx = i40e_vsi_mem_alloc(pf, type);
14282 vsi = pf->vsi[v_idx];
14286 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
14288 if (type == I40E_VSI_MAIN)
14289 pf->lan_vsi = v_idx;
14290 else if (type == I40E_VSI_SRIOV)
14291 vsi->vf_id = param1;
14292 /* assign it some queues */
14293 alloc_queue_pairs = vsi->alloc_queue_pairs *
14294 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14296 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14298 dev_info(&pf->pdev->dev,
14299 "failed to get tracking for %d queues for VSI %d err=%d\n",
14300 alloc_queue_pairs, vsi->seid, ret);
14303 vsi->base_queue = ret;
14305 /* get a VSI from the hardware */
14306 vsi->uplink_seid = uplink_seid;
14307 ret = i40e_add_vsi(vsi);
14311 switch (vsi->type) {
14312 /* setup the netdev if needed */
14313 case I40E_VSI_MAIN:
14314 case I40E_VSI_VMDQ2:
14315 ret = i40e_config_netdev(vsi);
14318 ret = i40e_netif_set_realnum_tx_rx_queues(vsi);
14321 ret = register_netdev(vsi->netdev);
14324 vsi->netdev_registered = true;
14325 netif_carrier_off(vsi->netdev);
14326 #ifdef CONFIG_I40E_DCB
14327 /* Setup DCB netlink interface */
14328 i40e_dcbnl_setup(vsi);
14329 #endif /* CONFIG_I40E_DCB */
14331 case I40E_VSI_FDIR:
14332 /* set up vectors and rings if needed */
14333 ret = i40e_vsi_setup_vectors(vsi);
14337 ret = i40e_alloc_rings(vsi);
14341 /* map all of the rings to the q_vectors */
14342 i40e_vsi_map_rings_to_vectors(vsi);
14344 i40e_vsi_reset_stats(vsi);
14347 /* no netdev or rings for the other VSI types */
14351 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
14352 (vsi->type == I40E_VSI_VMDQ2)) {
14353 ret = i40e_vsi_config_rss(vsi);
14358 i40e_vsi_free_q_vectors(vsi);
14360 if (vsi->netdev_registered) {
14361 vsi->netdev_registered = false;
14362 unregister_netdev(vsi->netdev);
14363 free_netdev(vsi->netdev);
14364 vsi->netdev = NULL;
14367 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14369 i40e_vsi_clear(vsi);
14375 * i40e_veb_get_bw_info - Query VEB BW information
14376 * @veb: the veb to query
14378 * Query the Tx scheduler BW configuration data for given VEB
14380 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
14382 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
14383 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
14384 struct i40e_pf *pf = veb->pf;
14385 struct i40e_hw *hw = &pf->hw;
14390 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
14393 dev_info(&pf->pdev->dev,
14394 "query veb bw config failed, err %s aq_err %s\n",
14395 i40e_stat_str(&pf->hw, ret),
14396 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14400 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
14403 dev_info(&pf->pdev->dev,
14404 "query veb bw ets config failed, err %s aq_err %s\n",
14405 i40e_stat_str(&pf->hw, ret),
14406 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14410 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
14411 veb->bw_max_quanta = ets_data.tc_bw_max;
14412 veb->is_abs_credits = bw_data.absolute_credits_enable;
14413 veb->enabled_tc = ets_data.tc_valid_bits;
14414 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
14415 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
14416 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
14417 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
14418 veb->bw_tc_limit_credits[i] =
14419 le16_to_cpu(bw_data.tc_bw_limits[i]);
14420 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
14428 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
14429 * @pf: board private structure
14431 * On error: returns error code (negative)
14432 * On success: returns vsi index in PF (positive)
14434 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
14437 struct i40e_veb *veb;
14440 /* Need to protect the allocation of switch elements at the PF level */
14441 mutex_lock(&pf->switch_mutex);
14443 /* VEB list may be fragmented if VEB creation/destruction has
14444 * been happening. We can afford to do a quick scan to look
14445 * for any free slots in the list.
14447 * find next empty veb slot, looping back around if necessary
14450 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
14452 if (i >= I40E_MAX_VEB) {
14454 goto err_alloc_veb; /* out of VEB slots! */
14457 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
14460 goto err_alloc_veb;
14464 veb->enabled_tc = 1;
14469 mutex_unlock(&pf->switch_mutex);
14474 * i40e_switch_branch_release - Delete a branch of the switch tree
14475 * @branch: where to start deleting
14477 * This uses recursion to find the tips of the branch to be
14478 * removed, deleting until we get back to and can delete this VEB.
14480 static void i40e_switch_branch_release(struct i40e_veb *branch)
14482 struct i40e_pf *pf = branch->pf;
14483 u16 branch_seid = branch->seid;
14484 u16 veb_idx = branch->idx;
14487 /* release any VEBs on this VEB - RECURSION */
14488 for (i = 0; i < I40E_MAX_VEB; i++) {
14491 if (pf->veb[i]->uplink_seid == branch->seid)
14492 i40e_switch_branch_release(pf->veb[i]);
14495 /* Release the VSIs on this VEB, but not the owner VSI.
14497 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
14498 * the VEB itself, so don't use (*branch) after this loop.
14500 for (i = 0; i < pf->num_alloc_vsi; i++) {
14503 if (pf->vsi[i]->uplink_seid == branch_seid &&
14504 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14505 i40e_vsi_release(pf->vsi[i]);
14509 /* There's one corner case where the VEB might not have been
14510 * removed, so double check it here and remove it if needed.
14511 * This case happens if the veb was created from the debugfs
14512 * commands and no VSIs were added to it.
14514 if (pf->veb[veb_idx])
14515 i40e_veb_release(pf->veb[veb_idx]);
14519 * i40e_veb_clear - remove veb struct
14520 * @veb: the veb to remove
14522 static void i40e_veb_clear(struct i40e_veb *veb)
14528 struct i40e_pf *pf = veb->pf;
14530 mutex_lock(&pf->switch_mutex);
14531 if (pf->veb[veb->idx] == veb)
14532 pf->veb[veb->idx] = NULL;
14533 mutex_unlock(&pf->switch_mutex);
14540 * i40e_veb_release - Delete a VEB and free its resources
14541 * @veb: the VEB being removed
14543 void i40e_veb_release(struct i40e_veb *veb)
14545 struct i40e_vsi *vsi = NULL;
14546 struct i40e_pf *pf;
14551 /* find the remaining VSI and check for extras */
14552 for (i = 0; i < pf->num_alloc_vsi; i++) {
14553 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
14559 dev_info(&pf->pdev->dev,
14560 "can't remove VEB %d with %d VSIs left\n",
14565 /* move the remaining VSI to uplink veb */
14566 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
14567 if (veb->uplink_seid) {
14568 vsi->uplink_seid = veb->uplink_seid;
14569 if (veb->uplink_seid == pf->mac_seid)
14570 vsi->veb_idx = I40E_NO_VEB;
14572 vsi->veb_idx = veb->veb_idx;
14575 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
14576 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
14579 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14580 i40e_veb_clear(veb);
14584 * i40e_add_veb - create the VEB in the switch
14585 * @veb: the VEB to be instantiated
14586 * @vsi: the controlling VSI
14588 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
14590 struct i40e_pf *pf = veb->pf;
14591 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
14594 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
14595 veb->enabled_tc, false,
14596 &veb->seid, enable_stats, NULL);
14598 /* get a VEB from the hardware */
14600 dev_info(&pf->pdev->dev,
14601 "couldn't add VEB, err %s aq_err %s\n",
14602 i40e_stat_str(&pf->hw, ret),
14603 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14607 /* get statistics counter */
14608 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
14609 &veb->stats_idx, NULL, NULL, NULL);
14611 dev_info(&pf->pdev->dev,
14612 "couldn't get VEB statistics idx, err %s aq_err %s\n",
14613 i40e_stat_str(&pf->hw, ret),
14614 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14617 ret = i40e_veb_get_bw_info(veb);
14619 dev_info(&pf->pdev->dev,
14620 "couldn't get VEB bw info, err %s aq_err %s\n",
14621 i40e_stat_str(&pf->hw, ret),
14622 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14623 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14627 vsi->uplink_seid = veb->seid;
14628 vsi->veb_idx = veb->idx;
14629 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14635 * i40e_veb_setup - Set up a VEB
14636 * @pf: board private structure
14637 * @flags: VEB setup flags
14638 * @uplink_seid: the switch element to link to
14639 * @vsi_seid: the initial VSI seid
14640 * @enabled_tc: Enabled TC bit-map
14642 * This allocates the sw VEB structure and links it into the switch
14643 * It is possible and legal for this to be a duplicate of an already
14644 * existing VEB. It is also possible for both uplink and vsi seids
14645 * to be zero, in order to create a floating VEB.
14647 * Returns pointer to the successfully allocated VEB sw struct on
14648 * success, otherwise returns NULL on failure.
14650 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
14651 u16 uplink_seid, u16 vsi_seid,
14654 struct i40e_veb *veb, *uplink_veb = NULL;
14655 int vsi_idx, veb_idx;
14658 /* if one seid is 0, the other must be 0 to create a floating relay */
14659 if ((uplink_seid == 0 || vsi_seid == 0) &&
14660 (uplink_seid + vsi_seid != 0)) {
14661 dev_info(&pf->pdev->dev,
14662 "one, not both seid's are 0: uplink=%d vsi=%d\n",
14663 uplink_seid, vsi_seid);
14667 /* make sure there is such a vsi and uplink */
14668 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
14669 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
14671 if (vsi_idx == pf->num_alloc_vsi && vsi_seid != 0) {
14672 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
14677 if (uplink_seid && uplink_seid != pf->mac_seid) {
14678 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
14679 if (pf->veb[veb_idx] &&
14680 pf->veb[veb_idx]->seid == uplink_seid) {
14681 uplink_veb = pf->veb[veb_idx];
14686 dev_info(&pf->pdev->dev,
14687 "uplink seid %d not found\n", uplink_seid);
14692 /* get veb sw struct */
14693 veb_idx = i40e_veb_mem_alloc(pf);
14696 veb = pf->veb[veb_idx];
14697 veb->flags = flags;
14698 veb->uplink_seid = uplink_seid;
14699 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
14700 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
14702 /* create the VEB in the switch */
14703 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
14706 if (vsi_idx == pf->lan_vsi)
14707 pf->lan_veb = veb->idx;
14712 i40e_veb_clear(veb);
14718 * i40e_setup_pf_switch_element - set PF vars based on switch type
14719 * @pf: board private structure
14720 * @ele: element we are building info from
14721 * @num_reported: total number of elements
14722 * @printconfig: should we print the contents
14724 * helper function to assist in extracting a few useful SEID values.
14726 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
14727 struct i40e_aqc_switch_config_element_resp *ele,
14728 u16 num_reported, bool printconfig)
14730 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
14731 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
14732 u8 element_type = ele->element_type;
14733 u16 seid = le16_to_cpu(ele->seid);
14736 dev_info(&pf->pdev->dev,
14737 "type=%d seid=%d uplink=%d downlink=%d\n",
14738 element_type, seid, uplink_seid, downlink_seid);
14740 switch (element_type) {
14741 case I40E_SWITCH_ELEMENT_TYPE_MAC:
14742 pf->mac_seid = seid;
14744 case I40E_SWITCH_ELEMENT_TYPE_VEB:
14746 if (uplink_seid != pf->mac_seid)
14748 if (pf->lan_veb >= I40E_MAX_VEB) {
14751 /* find existing or else empty VEB */
14752 for (v = 0; v < I40E_MAX_VEB; v++) {
14753 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
14758 if (pf->lan_veb >= I40E_MAX_VEB) {
14759 v = i40e_veb_mem_alloc(pf);
14765 if (pf->lan_veb >= I40E_MAX_VEB)
14768 pf->veb[pf->lan_veb]->seid = seid;
14769 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
14770 pf->veb[pf->lan_veb]->pf = pf;
14771 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
14773 case I40E_SWITCH_ELEMENT_TYPE_VSI:
14774 if (num_reported != 1)
14776 /* This is immediately after a reset so we can assume this is
14779 pf->mac_seid = uplink_seid;
14780 pf->pf_seid = downlink_seid;
14781 pf->main_vsi_seid = seid;
14783 dev_info(&pf->pdev->dev,
14784 "pf_seid=%d main_vsi_seid=%d\n",
14785 pf->pf_seid, pf->main_vsi_seid);
14787 case I40E_SWITCH_ELEMENT_TYPE_PF:
14788 case I40E_SWITCH_ELEMENT_TYPE_VF:
14789 case I40E_SWITCH_ELEMENT_TYPE_EMP:
14790 case I40E_SWITCH_ELEMENT_TYPE_BMC:
14791 case I40E_SWITCH_ELEMENT_TYPE_PE:
14792 case I40E_SWITCH_ELEMENT_TYPE_PA:
14793 /* ignore these for now */
14796 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
14797 element_type, seid);
14803 * i40e_fetch_switch_configuration - Get switch config from firmware
14804 * @pf: board private structure
14805 * @printconfig: should we print the contents
14807 * Get the current switch configuration from the device and
14808 * extract a few useful SEID values.
14810 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
14812 struct i40e_aqc_get_switch_config_resp *sw_config;
14818 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
14822 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
14824 u16 num_reported, num_total;
14826 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
14830 dev_info(&pf->pdev->dev,
14831 "get switch config failed err %s aq_err %s\n",
14832 i40e_stat_str(&pf->hw, ret),
14833 i40e_aq_str(&pf->hw,
14834 pf->hw.aq.asq_last_status));
14839 num_reported = le16_to_cpu(sw_config->header.num_reported);
14840 num_total = le16_to_cpu(sw_config->header.num_total);
14843 dev_info(&pf->pdev->dev,
14844 "header: %d reported %d total\n",
14845 num_reported, num_total);
14847 for (i = 0; i < num_reported; i++) {
14848 struct i40e_aqc_switch_config_element_resp *ele =
14849 &sw_config->element[i];
14851 i40e_setup_pf_switch_element(pf, ele, num_reported,
14854 } while (next_seid != 0);
14861 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
14862 * @pf: board private structure
14863 * @reinit: if the Main VSI needs to re-initialized.
14864 * @lock_acquired: indicates whether or not the lock has been acquired
14866 * Returns 0 on success, negative value on failure
14868 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired)
14873 /* find out what's out there already */
14874 ret = i40e_fetch_switch_configuration(pf, false);
14876 dev_info(&pf->pdev->dev,
14877 "couldn't fetch switch config, err %s aq_err %s\n",
14878 i40e_stat_str(&pf->hw, ret),
14879 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14882 i40e_pf_reset_stats(pf);
14884 /* set the switch config bit for the whole device to
14885 * support limited promisc or true promisc
14886 * when user requests promisc. The default is limited
14890 if ((pf->hw.pf_id == 0) &&
14891 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
14892 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14893 pf->last_sw_conf_flags = flags;
14896 if (pf->hw.pf_id == 0) {
14899 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14900 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
14902 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
14903 dev_info(&pf->pdev->dev,
14904 "couldn't set switch config bits, err %s aq_err %s\n",
14905 i40e_stat_str(&pf->hw, ret),
14906 i40e_aq_str(&pf->hw,
14907 pf->hw.aq.asq_last_status));
14908 /* not a fatal problem, just keep going */
14910 pf->last_sw_conf_valid_flags = valid_flags;
14913 /* first time setup */
14914 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
14915 struct i40e_vsi *vsi = NULL;
14918 /* Set up the PF VSI associated with the PF's main VSI
14919 * that is already in the HW switch
14921 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
14922 uplink_seid = pf->veb[pf->lan_veb]->seid;
14924 uplink_seid = pf->mac_seid;
14925 if (pf->lan_vsi == I40E_NO_VSI)
14926 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
14928 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
14930 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
14931 i40e_cloud_filter_exit(pf);
14932 i40e_fdir_teardown(pf);
14936 /* force a reset of TC and queue layout configurations */
14937 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14939 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14940 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14941 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14943 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
14945 i40e_fdir_sb_setup(pf);
14947 /* Setup static PF queue filter control settings */
14948 ret = i40e_setup_pf_filter_control(pf);
14950 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
14952 /* Failure here should not stop continuing other steps */
14955 /* enable RSS in the HW, even for only one queue, as the stack can use
14958 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
14959 i40e_pf_config_rss(pf);
14961 /* fill in link information and enable LSE reporting */
14962 i40e_link_event(pf);
14964 /* Initialize user-specific link properties */
14965 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
14966 I40E_AQ_AN_COMPLETED) ? true : false);
14970 if (!lock_acquired)
14973 /* repopulate tunnel port filters */
14974 udp_tunnel_nic_reset_ntf(pf->vsi[pf->lan_vsi]->netdev);
14976 if (!lock_acquired)
14983 * i40e_determine_queue_usage - Work out queue distribution
14984 * @pf: board private structure
14986 static void i40e_determine_queue_usage(struct i40e_pf *pf)
14991 pf->num_lan_qps = 0;
14993 /* Find the max queues to be put into basic use. We'll always be
14994 * using TC0, whether or not DCB is running, and TC0 will get the
14997 queues_left = pf->hw.func_caps.num_tx_qp;
14999 if ((queues_left == 1) ||
15000 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
15001 /* one qp for PF, no queues for anything else */
15003 pf->alloc_rss_size = pf->num_lan_qps = 1;
15005 /* make sure all the fancies are disabled */
15006 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
15007 I40E_FLAG_IWARP_ENABLED |
15008 I40E_FLAG_FD_SB_ENABLED |
15009 I40E_FLAG_FD_ATR_ENABLED |
15010 I40E_FLAG_DCB_CAPABLE |
15011 I40E_FLAG_DCB_ENABLED |
15012 I40E_FLAG_SRIOV_ENABLED |
15013 I40E_FLAG_VMDQ_ENABLED);
15014 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15015 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
15016 I40E_FLAG_FD_SB_ENABLED |
15017 I40E_FLAG_FD_ATR_ENABLED |
15018 I40E_FLAG_DCB_CAPABLE))) {
15019 /* one qp for PF */
15020 pf->alloc_rss_size = pf->num_lan_qps = 1;
15021 queues_left -= pf->num_lan_qps;
15023 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
15024 I40E_FLAG_IWARP_ENABLED |
15025 I40E_FLAG_FD_SB_ENABLED |
15026 I40E_FLAG_FD_ATR_ENABLED |
15027 I40E_FLAG_DCB_ENABLED |
15028 I40E_FLAG_VMDQ_ENABLED);
15029 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15031 /* Not enough queues for all TCs */
15032 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
15033 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
15034 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
15035 I40E_FLAG_DCB_ENABLED);
15036 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
15039 /* limit lan qps to the smaller of qps, cpus or msix */
15040 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
15041 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
15042 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
15043 pf->num_lan_qps = q_max;
15045 queues_left -= pf->num_lan_qps;
15048 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
15049 if (queues_left > 1) {
15050 queues_left -= 1; /* save 1 queue for FD */
15052 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
15053 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15054 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
15058 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15059 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
15060 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
15061 (queues_left / pf->num_vf_qps));
15062 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
15065 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
15066 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
15067 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
15068 (queues_left / pf->num_vmdq_qps));
15069 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
15072 pf->queues_left = queues_left;
15073 dev_dbg(&pf->pdev->dev,
15074 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
15075 pf->hw.func_caps.num_tx_qp,
15076 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
15077 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
15078 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
15083 * i40e_setup_pf_filter_control - Setup PF static filter control
15084 * @pf: PF to be setup
15086 * i40e_setup_pf_filter_control sets up a PF's initial filter control
15087 * settings. If PE/FCoE are enabled then it will also set the per PF
15088 * based filter sizes required for them. It also enables Flow director,
15089 * ethertype and macvlan type filter settings for the pf.
15091 * Returns 0 on success, negative on failure
15093 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
15095 struct i40e_filter_control_settings *settings = &pf->filter_settings;
15097 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
15099 /* Flow Director is enabled */
15100 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
15101 settings->enable_fdir = true;
15103 /* Ethtype and MACVLAN filters enabled for PF */
15104 settings->enable_ethtype = true;
15105 settings->enable_macvlan = true;
15107 if (i40e_set_filter_control(&pf->hw, settings))
15113 #define INFO_STRING_LEN 255
15114 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
15115 static void i40e_print_features(struct i40e_pf *pf)
15117 struct i40e_hw *hw = &pf->hw;
15121 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
15125 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
15126 #ifdef CONFIG_PCI_IOV
15127 i += scnprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
15129 i += scnprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
15130 pf->hw.func_caps.num_vsis,
15131 pf->vsi[pf->lan_vsi]->num_queue_pairs);
15132 if (pf->flags & I40E_FLAG_RSS_ENABLED)
15133 i += scnprintf(&buf[i], REMAIN(i), " RSS");
15134 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
15135 i += scnprintf(&buf[i], REMAIN(i), " FD_ATR");
15136 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
15137 i += scnprintf(&buf[i], REMAIN(i), " FD_SB");
15138 i += scnprintf(&buf[i], REMAIN(i), " NTUPLE");
15140 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
15141 i += scnprintf(&buf[i], REMAIN(i), " DCB");
15142 i += scnprintf(&buf[i], REMAIN(i), " VxLAN");
15143 i += scnprintf(&buf[i], REMAIN(i), " Geneve");
15144 if (pf->flags & I40E_FLAG_PTP)
15145 i += scnprintf(&buf[i], REMAIN(i), " PTP");
15146 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
15147 i += scnprintf(&buf[i], REMAIN(i), " VEB");
15149 i += scnprintf(&buf[i], REMAIN(i), " VEPA");
15151 dev_info(&pf->pdev->dev, "%s\n", buf);
15153 WARN_ON(i > INFO_STRING_LEN);
15157 * i40e_get_platform_mac_addr - get platform-specific MAC address
15158 * @pdev: PCI device information struct
15159 * @pf: board private structure
15161 * Look up the MAC address for the device. First we'll try
15162 * eth_platform_get_mac_address, which will check Open Firmware, or arch
15163 * specific fallback. Otherwise, we'll default to the stored value in
15166 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
15168 if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
15169 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
15173 * i40e_set_fec_in_flags - helper function for setting FEC options in flags
15174 * @fec_cfg: FEC option to set in flags
15175 * @flags: ptr to flags in which we set FEC option
15177 void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags)
15179 if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
15180 *flags |= I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC;
15181 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_RS) ||
15182 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_RS)) {
15183 *flags |= I40E_FLAG_RS_FEC;
15184 *flags &= ~I40E_FLAG_BASE_R_FEC;
15186 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_KR) ||
15187 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_KR)) {
15188 *flags |= I40E_FLAG_BASE_R_FEC;
15189 *flags &= ~I40E_FLAG_RS_FEC;
15192 *flags &= ~(I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC);
15196 * i40e_check_recovery_mode - check if we are running transition firmware
15197 * @pf: board private structure
15199 * Check registers indicating the firmware runs in recovery mode. Sets the
15200 * appropriate driver state.
15202 * Returns true if the recovery mode was detected, false otherwise
15204 static bool i40e_check_recovery_mode(struct i40e_pf *pf)
15206 u32 val = rd32(&pf->hw, I40E_GL_FWSTS);
15208 if (val & I40E_GL_FWSTS_FWS1B_MASK) {
15209 dev_crit(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n");
15210 dev_crit(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
15211 set_bit(__I40E_RECOVERY_MODE, pf->state);
15215 if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15216 dev_info(&pf->pdev->dev, "Please do Power-On Reset to initialize adapter in normal mode with full functionality.\n");
15222 * i40e_pf_loop_reset - perform reset in a loop.
15223 * @pf: board private structure
15225 * This function is useful when a NIC is about to enter recovery mode.
15226 * When a NIC's internal data structures are corrupted the NIC's
15227 * firmware is going to enter recovery mode.
15228 * Right after a POR it takes about 7 minutes for firmware to enter
15229 * recovery mode. Until that time a NIC is in some kind of intermediate
15230 * state. After that time period the NIC almost surely enters
15231 * recovery mode. The only way for a driver to detect intermediate
15232 * state is to issue a series of pf-resets and check a return value.
15233 * If a PF reset returns success then the firmware could be in recovery
15234 * mode so the caller of this code needs to check for recovery mode
15235 * if this function returns success. There is a little chance that
15236 * firmware will hang in intermediate state forever.
15237 * Since waiting 7 minutes is quite a lot of time this function waits
15238 * 10 seconds and then gives up by returning an error.
15240 * Return 0 on success, negative on failure.
15242 static i40e_status i40e_pf_loop_reset(struct i40e_pf *pf)
15244 /* wait max 10 seconds for PF reset to succeed */
15245 const unsigned long time_end = jiffies + 10 * HZ;
15247 struct i40e_hw *hw = &pf->hw;
15250 ret = i40e_pf_reset(hw);
15251 while (ret != I40E_SUCCESS && time_before(jiffies, time_end)) {
15252 usleep_range(10000, 20000);
15253 ret = i40e_pf_reset(hw);
15256 if (ret == I40E_SUCCESS)
15259 dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret);
15265 * i40e_check_fw_empr - check if FW issued unexpected EMP Reset
15266 * @pf: board private structure
15268 * Check FW registers to determine if FW issued unexpected EMP Reset.
15269 * Every time when unexpected EMP Reset occurs the FW increments
15270 * a counter of unexpected EMP Resets. When the counter reaches 10
15271 * the FW should enter the Recovery mode
15273 * Returns true if FW issued unexpected EMP Reset
15275 static bool i40e_check_fw_empr(struct i40e_pf *pf)
15277 const u32 fw_sts = rd32(&pf->hw, I40E_GL_FWSTS) &
15278 I40E_GL_FWSTS_FWS1B_MASK;
15279 return (fw_sts > I40E_GL_FWSTS_FWS1B_EMPR_0) &&
15280 (fw_sts <= I40E_GL_FWSTS_FWS1B_EMPR_10);
15284 * i40e_handle_resets - handle EMP resets and PF resets
15285 * @pf: board private structure
15287 * Handle both EMP resets and PF resets and conclude whether there are
15288 * any issues regarding these resets. If there are any issues then
15289 * generate log entry.
15291 * Return 0 if NIC is healthy or negative value when there are issues
15294 static i40e_status i40e_handle_resets(struct i40e_pf *pf)
15296 const i40e_status pfr = i40e_pf_loop_reset(pf);
15297 const bool is_empr = i40e_check_fw_empr(pf);
15299 if (is_empr || pfr != I40E_SUCCESS)
15300 dev_crit(&pf->pdev->dev, "Entering recovery mode due to repeated FW resets. This may take several minutes. Refer to the Intel(R) Ethernet Adapters and Devices User Guide.\n");
15302 return is_empr ? I40E_ERR_RESET_FAILED : pfr;
15306 * i40e_init_recovery_mode - initialize subsystems needed in recovery mode
15307 * @pf: board private structure
15308 * @hw: ptr to the hardware info
15310 * This function does a minimal setup of all subsystems needed for running
15313 * Returns 0 on success, negative on failure
15315 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
15317 struct i40e_vsi *vsi;
15321 pci_save_state(pf->pdev);
15323 /* set up periodic task facility */
15324 timer_setup(&pf->service_timer, i40e_service_timer, 0);
15325 pf->service_timer_period = HZ;
15327 INIT_WORK(&pf->service_task, i40e_service_task);
15328 clear_bit(__I40E_SERVICE_SCHED, pf->state);
15330 err = i40e_init_interrupt_scheme(pf);
15332 goto err_switch_setup;
15334 /* The number of VSIs reported by the FW is the minimum guaranteed
15335 * to us; HW supports far more and we share the remaining pool with
15336 * the other PFs. We allocate space for more than the guarantee with
15337 * the understanding that we might not get them all later.
15339 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15340 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15342 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15344 /* Set up the vsi struct and our local tracking of the MAIN PF vsi. */
15345 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15349 goto err_switch_setup;
15352 /* We allocate one VSI which is needed as absolute minimum
15353 * in order to register the netdev
15355 v_idx = i40e_vsi_mem_alloc(pf, I40E_VSI_MAIN);
15358 goto err_switch_setup;
15360 pf->lan_vsi = v_idx;
15361 vsi = pf->vsi[v_idx];
15364 goto err_switch_setup;
15366 vsi->alloc_queue_pairs = 1;
15367 err = i40e_config_netdev(vsi);
15369 goto err_switch_setup;
15370 err = register_netdev(vsi->netdev);
15372 goto err_switch_setup;
15373 vsi->netdev_registered = true;
15374 i40e_dbg_pf_init(pf);
15376 err = i40e_setup_misc_vector_for_recovery_mode(pf);
15378 goto err_switch_setup;
15380 /* tell the firmware that we're starting */
15381 i40e_send_version(pf);
15383 /* since everything's happy, start the service_task timer */
15384 mod_timer(&pf->service_timer,
15385 round_jiffies(jiffies + pf->service_timer_period));
15390 i40e_reset_interrupt_capability(pf);
15391 del_timer_sync(&pf->service_timer);
15392 i40e_shutdown_adminq(hw);
15393 iounmap(hw->hw_addr);
15394 pci_disable_pcie_error_reporting(pf->pdev);
15395 pci_release_mem_regions(pf->pdev);
15396 pci_disable_device(pf->pdev);
15403 * i40e_set_subsystem_device_id - set subsystem device id
15404 * @hw: pointer to the hardware info
15406 * Set PCI subsystem device id either from a pci_dev structure or
15407 * a specific FW register.
15409 static inline void i40e_set_subsystem_device_id(struct i40e_hw *hw)
15411 struct pci_dev *pdev = ((struct i40e_pf *)hw->back)->pdev;
15413 hw->subsystem_device_id = pdev->subsystem_device ?
15414 pdev->subsystem_device :
15415 (ushort)(rd32(hw, I40E_PFPCI_SUBSYSID) & USHRT_MAX);
15419 * i40e_probe - Device initialization routine
15420 * @pdev: PCI device information struct
15421 * @ent: entry in i40e_pci_tbl
15423 * i40e_probe initializes a PF identified by a pci_dev structure.
15424 * The OS initialization, configuring of the PF private structure,
15425 * and a hardware reset occur.
15427 * Returns 0 on success, negative on failure
15429 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
15431 struct i40e_aq_get_phy_abilities_resp abilities;
15432 #ifdef CONFIG_I40E_DCB
15433 enum i40e_get_fw_lldp_status_resp lldp_status;
15434 i40e_status status;
15435 #endif /* CONFIG_I40E_DCB */
15436 struct i40e_pf *pf;
15437 struct i40e_hw *hw;
15438 static u16 pfs_found;
15445 err = pci_enable_device_mem(pdev);
15449 /* set up for high or low dma */
15450 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
15452 dev_err(&pdev->dev,
15453 "DMA configuration failed: 0x%x\n", err);
15457 /* set up pci connections */
15458 err = pci_request_mem_regions(pdev, i40e_driver_name);
15460 dev_info(&pdev->dev,
15461 "pci_request_selected_regions failed %d\n", err);
15465 pci_enable_pcie_error_reporting(pdev);
15466 pci_set_master(pdev);
15468 /* Now that we have a PCI connection, we need to do the
15469 * low level device setup. This is primarily setting up
15470 * the Admin Queue structures and then querying for the
15471 * device's current profile information.
15473 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
15480 set_bit(__I40E_DOWN, pf->state);
15485 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
15486 I40E_MAX_CSR_SPACE);
15487 /* We believe that the highest register to read is
15488 * I40E_GLGEN_STAT_CLEAR, so we check if the BAR size
15489 * is not less than that before mapping to prevent a
15492 if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) {
15493 dev_err(&pdev->dev, "Cannot map registers, bar size 0x%X too small, aborting\n",
15498 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
15499 if (!hw->hw_addr) {
15501 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
15502 (unsigned int)pci_resource_start(pdev, 0),
15503 pf->ioremap_len, err);
15506 hw->vendor_id = pdev->vendor;
15507 hw->device_id = pdev->device;
15508 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
15509 hw->subsystem_vendor_id = pdev->subsystem_vendor;
15510 i40e_set_subsystem_device_id(hw);
15511 hw->bus.device = PCI_SLOT(pdev->devfn);
15512 hw->bus.func = PCI_FUNC(pdev->devfn);
15513 hw->bus.bus_id = pdev->bus->number;
15514 pf->instance = pfs_found;
15516 /* Select something other than the 802.1ad ethertype for the
15517 * switch to use internally and drop on ingress.
15519 hw->switch_tag = 0xffff;
15520 hw->first_tag = ETH_P_8021AD;
15521 hw->second_tag = ETH_P_8021Q;
15523 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
15524 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
15525 INIT_LIST_HEAD(&pf->ddp_old_prof);
15527 /* set up the locks for the AQ, do this only once in probe
15528 * and destroy them only once in remove
15530 mutex_init(&hw->aq.asq_mutex);
15531 mutex_init(&hw->aq.arq_mutex);
15533 pf->msg_enable = netif_msg_init(debug,
15538 pf->hw.debug_mask = debug;
15540 /* do a special CORER for clearing PXE mode once at init */
15541 if (hw->revision_id == 0 &&
15542 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
15543 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
15548 i40e_clear_pxe_mode(hw);
15551 /* Reset here to make sure all is clean and to define PF 'n' */
15554 err = i40e_set_mac_type(hw);
15556 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15561 err = i40e_handle_resets(pf);
15565 i40e_check_recovery_mode(pf);
15567 if (is_kdump_kernel()) {
15568 hw->aq.num_arq_entries = I40E_MIN_ARQ_LEN;
15569 hw->aq.num_asq_entries = I40E_MIN_ASQ_LEN;
15571 hw->aq.num_arq_entries = I40E_AQ_LEN;
15572 hw->aq.num_asq_entries = I40E_AQ_LEN;
15574 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15575 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15576 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
15578 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
15580 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
15582 err = i40e_init_shared_code(hw);
15584 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15589 /* set up a default setting for link flow control */
15590 pf->hw.fc.requested_mode = I40E_FC_NONE;
15592 err = i40e_init_adminq(hw);
15594 if (err == I40E_ERR_FIRMWARE_API_VERSION)
15595 dev_info(&pdev->dev,
15596 "The driver for the device stopped because the NVM image v%u.%u is newer than expected v%u.%u. You must install the most recent version of the network driver.\n",
15597 hw->aq.api_maj_ver,
15598 hw->aq.api_min_ver,
15599 I40E_FW_API_VERSION_MAJOR,
15600 I40E_FW_MINOR_VERSION(hw));
15602 dev_info(&pdev->dev,
15603 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
15607 i40e_get_oem_version(hw);
15609 /* provide nvm, fw, api versions, vendor:device id, subsys vendor:device id */
15610 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s [%04x:%04x] [%04x:%04x]\n",
15611 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
15612 hw->aq.api_maj_ver, hw->aq.api_min_ver,
15613 i40e_nvm_version_str(hw), hw->vendor_id, hw->device_id,
15614 hw->subsystem_vendor_id, hw->subsystem_device_id);
15616 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
15617 hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw))
15618 dev_dbg(&pdev->dev,
15619 "The driver for the device detected a newer version of the NVM image v%u.%u than v%u.%u.\n",
15620 hw->aq.api_maj_ver,
15621 hw->aq.api_min_ver,
15622 I40E_FW_API_VERSION_MAJOR,
15623 I40E_FW_MINOR_VERSION(hw));
15624 else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4)
15625 dev_info(&pdev->dev,
15626 "The driver for the device detected an older version of the NVM image v%u.%u than expected v%u.%u. Please update the NVM image.\n",
15627 hw->aq.api_maj_ver,
15628 hw->aq.api_min_ver,
15629 I40E_FW_API_VERSION_MAJOR,
15630 I40E_FW_MINOR_VERSION(hw));
15632 i40e_verify_eeprom(pf);
15634 /* Rev 0 hardware was never productized */
15635 if (hw->revision_id < 1)
15636 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
15638 i40e_clear_pxe_mode(hw);
15640 err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
15642 goto err_adminq_setup;
15644 err = i40e_sw_init(pf);
15646 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
15650 if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15651 return i40e_init_recovery_mode(pf, hw);
15653 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
15654 hw->func_caps.num_rx_qp, 0, 0);
15656 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
15657 goto err_init_lan_hmc;
15660 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
15662 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
15664 goto err_configure_lan_hmc;
15667 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
15668 * Ignore error return codes because if it was already disabled via
15669 * hardware settings this will fail
15671 if (pf->hw_features & I40E_HW_STOP_FW_LLDP) {
15672 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
15673 i40e_aq_stop_lldp(hw, true, false, NULL);
15676 /* allow a platform config to override the HW addr */
15677 i40e_get_platform_mac_addr(pdev, pf);
15679 if (!is_valid_ether_addr(hw->mac.addr)) {
15680 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
15684 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
15685 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
15686 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
15687 if (is_valid_ether_addr(hw->mac.port_addr))
15688 pf->hw_features |= I40E_HW_PORT_ID_VALID;
15690 i40e_ptp_alloc_pins(pf);
15691 pci_set_drvdata(pdev, pf);
15692 pci_save_state(pdev);
15694 #ifdef CONFIG_I40E_DCB
15695 status = i40e_get_fw_lldp_status(&pf->hw, &lldp_status);
15697 lldp_status == I40E_GET_FW_LLDP_STATUS_ENABLED) ?
15698 (pf->flags &= ~I40E_FLAG_DISABLE_FW_LLDP) :
15699 (pf->flags |= I40E_FLAG_DISABLE_FW_LLDP);
15700 dev_info(&pdev->dev,
15701 (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) ?
15702 "FW LLDP is disabled\n" :
15703 "FW LLDP is enabled\n");
15705 /* Enable FW to write default DCB config on link-up */
15706 i40e_aq_set_dcb_parameters(hw, true, NULL);
15708 err = i40e_init_pf_dcb(pf);
15710 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
15711 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
15712 /* Continue without DCB enabled */
15714 #endif /* CONFIG_I40E_DCB */
15716 /* set up periodic task facility */
15717 timer_setup(&pf->service_timer, i40e_service_timer, 0);
15718 pf->service_timer_period = HZ;
15720 INIT_WORK(&pf->service_task, i40e_service_task);
15721 clear_bit(__I40E_SERVICE_SCHED, pf->state);
15723 /* NVM bit on means WoL disabled for the port */
15724 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
15725 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
15726 pf->wol_en = false;
15729 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
15731 /* set up the main switch operations */
15732 i40e_determine_queue_usage(pf);
15733 err = i40e_init_interrupt_scheme(pf);
15735 goto err_switch_setup;
15737 /* Reduce Tx and Rx pairs for kdump
15738 * When MSI-X is enabled, it's not allowed to use more TC queue
15739 * pairs than MSI-X vectors (pf->num_lan_msix) exist. Thus
15740 * vsi->num_queue_pairs will be equal to pf->num_lan_msix, i.e., 1.
15742 if (is_kdump_kernel())
15743 pf->num_lan_msix = 1;
15745 pf->udp_tunnel_nic.set_port = i40e_udp_tunnel_set_port;
15746 pf->udp_tunnel_nic.unset_port = i40e_udp_tunnel_unset_port;
15747 pf->udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;
15748 pf->udp_tunnel_nic.shared = &pf->udp_tunnel_shared;
15749 pf->udp_tunnel_nic.tables[0].n_entries = I40E_MAX_PF_UDP_OFFLOAD_PORTS;
15750 pf->udp_tunnel_nic.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN |
15751 UDP_TUNNEL_TYPE_GENEVE;
15753 /* The number of VSIs reported by the FW is the minimum guaranteed
15754 * to us; HW supports far more and we share the remaining pool with
15755 * the other PFs. We allocate space for more than the guarantee with
15756 * the understanding that we might not get them all later.
15758 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15759 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15761 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15762 if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) {
15763 dev_warn(&pf->pdev->dev,
15764 "limiting the VSI count due to UDP tunnel limitation %d > %d\n",
15765 pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES);
15766 pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES;
15769 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
15770 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15774 goto err_switch_setup;
15777 #ifdef CONFIG_PCI_IOV
15778 /* prep for VF support */
15779 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15780 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15781 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15782 if (pci_num_vf(pdev))
15783 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
15786 err = i40e_setup_pf_switch(pf, false, false);
15788 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
15791 INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
15793 /* if FDIR VSI was set up, start it now */
15794 for (i = 0; i < pf->num_alloc_vsi; i++) {
15795 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
15796 i40e_vsi_open(pf->vsi[i]);
15801 /* The driver only wants link up/down and module qualification
15802 * reports from firmware. Note the negative logic.
15804 err = i40e_aq_set_phy_int_mask(&pf->hw,
15805 ~(I40E_AQ_EVENT_LINK_UPDOWN |
15806 I40E_AQ_EVENT_MEDIA_NA |
15807 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
15809 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
15810 i40e_stat_str(&pf->hw, err),
15811 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15813 /* Reconfigure hardware for allowing smaller MSS in the case
15814 * of TSO, so that we avoid the MDD being fired and causing
15815 * a reset in the case of small MSS+TSO.
15817 val = rd32(hw, I40E_REG_MSS);
15818 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
15819 val &= ~I40E_REG_MSS_MIN_MASK;
15820 val |= I40E_64BYTE_MSS;
15821 wr32(hw, I40E_REG_MSS, val);
15824 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
15826 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
15828 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
15829 i40e_stat_str(&pf->hw, err),
15830 i40e_aq_str(&pf->hw,
15831 pf->hw.aq.asq_last_status));
15833 /* The main driver is (mostly) up and happy. We need to set this state
15834 * before setting up the misc vector or we get a race and the vector
15835 * ends up disabled forever.
15837 clear_bit(__I40E_DOWN, pf->state);
15839 /* In case of MSIX we are going to setup the misc vector right here
15840 * to handle admin queue events etc. In case of legacy and MSI
15841 * the misc functionality and queue processing is combined in
15842 * the same vector and that gets setup at open.
15844 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
15845 err = i40e_setup_misc_vector(pf);
15847 dev_info(&pdev->dev,
15848 "setup of misc vector failed: %d\n", err);
15849 i40e_cloud_filter_exit(pf);
15850 i40e_fdir_teardown(pf);
15855 #ifdef CONFIG_PCI_IOV
15856 /* prep for VF support */
15857 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15858 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15859 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15860 /* disable link interrupts for VFs */
15861 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
15862 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
15863 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
15866 if (pci_num_vf(pdev)) {
15867 dev_info(&pdev->dev,
15868 "Active VFs found, allocating resources.\n");
15869 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
15871 dev_info(&pdev->dev,
15872 "Error %d allocating resources for existing VFs\n",
15876 #endif /* CONFIG_PCI_IOV */
15878 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15879 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
15880 pf->num_iwarp_msix,
15881 I40E_IWARP_IRQ_PILE_ID);
15882 if (pf->iwarp_base_vector < 0) {
15883 dev_info(&pdev->dev,
15884 "failed to get tracking for %d vectors for IWARP err=%d\n",
15885 pf->num_iwarp_msix, pf->iwarp_base_vector);
15886 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
15890 i40e_dbg_pf_init(pf);
15892 /* tell the firmware that we're starting */
15893 i40e_send_version(pf);
15895 /* since everything's happy, start the service_task timer */
15896 mod_timer(&pf->service_timer,
15897 round_jiffies(jiffies + pf->service_timer_period));
15899 /* add this PF to client device list and launch a client service task */
15900 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15901 err = i40e_lan_add_device(pf);
15903 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
15907 #define PCI_SPEED_SIZE 8
15908 #define PCI_WIDTH_SIZE 8
15909 /* Devices on the IOSF bus do not have this information
15910 * and will report PCI Gen 1 x 1 by default so don't bother
15913 if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) {
15914 char speed[PCI_SPEED_SIZE] = "Unknown";
15915 char width[PCI_WIDTH_SIZE] = "Unknown";
15917 /* Get the negotiated link width and speed from PCI config
15920 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
15923 i40e_set_pci_config_data(hw, link_status);
15925 switch (hw->bus.speed) {
15926 case i40e_bus_speed_8000:
15927 strlcpy(speed, "8.0", PCI_SPEED_SIZE); break;
15928 case i40e_bus_speed_5000:
15929 strlcpy(speed, "5.0", PCI_SPEED_SIZE); break;
15930 case i40e_bus_speed_2500:
15931 strlcpy(speed, "2.5", PCI_SPEED_SIZE); break;
15935 switch (hw->bus.width) {
15936 case i40e_bus_width_pcie_x8:
15937 strlcpy(width, "8", PCI_WIDTH_SIZE); break;
15938 case i40e_bus_width_pcie_x4:
15939 strlcpy(width, "4", PCI_WIDTH_SIZE); break;
15940 case i40e_bus_width_pcie_x2:
15941 strlcpy(width, "2", PCI_WIDTH_SIZE); break;
15942 case i40e_bus_width_pcie_x1:
15943 strlcpy(width, "1", PCI_WIDTH_SIZE); break;
15948 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
15951 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
15952 hw->bus.speed < i40e_bus_speed_8000) {
15953 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
15954 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
15958 /* get the requested speeds from the fw */
15959 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
15961 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
15962 i40e_stat_str(&pf->hw, err),
15963 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15964 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
15966 /* set the FEC config due to the board capabilities */
15967 i40e_set_fec_in_flags(abilities.fec_cfg_curr_mod_ext_info, &pf->flags);
15969 /* get the supported phy types from the fw */
15970 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
15972 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
15973 i40e_stat_str(&pf->hw, err),
15974 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15976 /* make sure the MFS hasn't been set lower than the default */
15977 #define MAX_FRAME_SIZE_DEFAULT 0x2600
15978 val = (rd32(&pf->hw, I40E_PRTGL_SAH) &
15979 I40E_PRTGL_SAH_MFS_MASK) >> I40E_PRTGL_SAH_MFS_SHIFT;
15980 if (val < MAX_FRAME_SIZE_DEFAULT)
15981 dev_warn(&pdev->dev, "MFS for port %x has been set below the default: %x\n",
15984 /* Add a filter to drop all Flow control frames from any VSI from being
15985 * transmitted. By doing so we stop a malicious VF from sending out
15986 * PAUSE or PFC frames and potentially controlling traffic for other
15988 * The FW can still send Flow control frames if enabled.
15990 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
15991 pf->main_vsi_seid);
15993 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
15994 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
15995 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS;
15996 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
15997 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER;
15998 /* print a string summarizing features */
15999 i40e_print_features(pf);
16003 /* Unwind what we've done if something failed in the setup */
16005 set_bit(__I40E_DOWN, pf->state);
16006 i40e_clear_interrupt_scheme(pf);
16009 i40e_reset_interrupt_capability(pf);
16010 del_timer_sync(&pf->service_timer);
16012 err_configure_lan_hmc:
16013 (void)i40e_shutdown_lan_hmc(hw);
16015 kfree(pf->qp_pile);
16019 iounmap(hw->hw_addr);
16023 pci_disable_pcie_error_reporting(pdev);
16024 pci_release_mem_regions(pdev);
16027 pci_disable_device(pdev);
16032 * i40e_remove - Device removal routine
16033 * @pdev: PCI device information struct
16035 * i40e_remove is called by the PCI subsystem to alert the driver
16036 * that is should release a PCI device. This could be caused by a
16037 * Hot-Plug event, or because the driver is going to be removed from
16040 static void i40e_remove(struct pci_dev *pdev)
16042 struct i40e_pf *pf = pci_get_drvdata(pdev);
16043 struct i40e_hw *hw = &pf->hw;
16044 i40e_status ret_code;
16047 i40e_dbg_pf_exit(pf);
16051 /* Disable RSS in hw */
16052 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
16053 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
16055 /* Grab __I40E_RESET_RECOVERY_PENDING and set __I40E_IN_REMOVE
16056 * flags, once they are set, i40e_rebuild should not be called as
16057 * i40e_prep_for_reset always returns early.
16059 while (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
16060 usleep_range(1000, 2000);
16061 set_bit(__I40E_IN_REMOVE, pf->state);
16063 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
16064 set_bit(__I40E_VF_RESETS_DISABLED, pf->state);
16066 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
16068 /* no more scheduling of any task */
16069 set_bit(__I40E_SUSPENDED, pf->state);
16070 set_bit(__I40E_DOWN, pf->state);
16071 if (pf->service_timer.function)
16072 del_timer_sync(&pf->service_timer);
16073 if (pf->service_task.func)
16074 cancel_work_sync(&pf->service_task);
16076 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
16077 struct i40e_vsi *vsi = pf->vsi[0];
16079 /* We know that we have allocated only one vsi for this PF,
16080 * it was just for registering netdevice, so the interface
16081 * could be visible in the 'ifconfig' output
16083 unregister_netdev(vsi->netdev);
16084 free_netdev(vsi->netdev);
16089 /* Client close must be called explicitly here because the timer
16090 * has been stopped.
16092 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16094 i40e_fdir_teardown(pf);
16096 /* If there is a switch structure or any orphans, remove them.
16097 * This will leave only the PF's VSI remaining.
16099 for (i = 0; i < I40E_MAX_VEB; i++) {
16103 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
16104 pf->veb[i]->uplink_seid == 0)
16105 i40e_switch_branch_release(pf->veb[i]);
16108 /* Now we can shutdown the PF's VSI, just before we kill
16111 if (pf->vsi[pf->lan_vsi])
16112 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
16114 i40e_cloud_filter_exit(pf);
16116 /* remove attached clients */
16117 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
16118 ret_code = i40e_lan_del_device(pf);
16120 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
16124 /* shutdown and destroy the HMC */
16125 if (hw->hmc.hmc_obj) {
16126 ret_code = i40e_shutdown_lan_hmc(hw);
16128 dev_warn(&pdev->dev,
16129 "Failed to destroy the HMC resources: %d\n",
16134 /* Free MSI/legacy interrupt 0 when in recovery mode. */
16135 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16136 !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16137 free_irq(pf->pdev->irq, pf);
16139 /* shutdown the adminq */
16140 i40e_shutdown_adminq(hw);
16142 /* destroy the locks only once, here */
16143 mutex_destroy(&hw->aq.arq_mutex);
16144 mutex_destroy(&hw->aq.asq_mutex);
16146 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
16148 i40e_clear_interrupt_scheme(pf);
16149 for (i = 0; i < pf->num_alloc_vsi; i++) {
16151 if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
16152 i40e_vsi_clear_rings(pf->vsi[i]);
16153 i40e_vsi_clear(pf->vsi[i]);
16159 for (i = 0; i < I40E_MAX_VEB; i++) {
16164 kfree(pf->qp_pile);
16167 iounmap(hw->hw_addr);
16169 pci_release_mem_regions(pdev);
16171 pci_disable_pcie_error_reporting(pdev);
16172 pci_disable_device(pdev);
16176 * i40e_pci_error_detected - warning that something funky happened in PCI land
16177 * @pdev: PCI device information struct
16178 * @error: the type of PCI error
16180 * Called to warn that something happened and the error handling steps
16181 * are in progress. Allows the driver to quiesce things, be ready for
16184 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
16185 pci_channel_state_t error)
16187 struct i40e_pf *pf = pci_get_drvdata(pdev);
16189 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
16192 dev_info(&pdev->dev,
16193 "Cannot recover - error happened during device probe\n");
16194 return PCI_ERS_RESULT_DISCONNECT;
16197 /* shutdown all operations */
16198 if (!test_bit(__I40E_SUSPENDED, pf->state))
16199 i40e_prep_for_reset(pf);
16201 /* Request a slot reset */
16202 return PCI_ERS_RESULT_NEED_RESET;
16206 * i40e_pci_error_slot_reset - a PCI slot reset just happened
16207 * @pdev: PCI device information struct
16209 * Called to find if the driver can work with the device now that
16210 * the pci slot has been reset. If a basic connection seems good
16211 * (registers are readable and have sane content) then return a
16212 * happy little PCI_ERS_RESULT_xxx.
16214 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
16216 struct i40e_pf *pf = pci_get_drvdata(pdev);
16217 pci_ers_result_t result;
16220 dev_dbg(&pdev->dev, "%s\n", __func__);
16221 if (pci_enable_device_mem(pdev)) {
16222 dev_info(&pdev->dev,
16223 "Cannot re-enable PCI device after reset.\n");
16224 result = PCI_ERS_RESULT_DISCONNECT;
16226 pci_set_master(pdev);
16227 pci_restore_state(pdev);
16228 pci_save_state(pdev);
16229 pci_wake_from_d3(pdev, false);
16231 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
16233 result = PCI_ERS_RESULT_RECOVERED;
16235 result = PCI_ERS_RESULT_DISCONNECT;
16242 * i40e_pci_error_reset_prepare - prepare device driver for pci reset
16243 * @pdev: PCI device information struct
16245 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
16247 struct i40e_pf *pf = pci_get_drvdata(pdev);
16249 i40e_prep_for_reset(pf);
16253 * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
16254 * @pdev: PCI device information struct
16256 static void i40e_pci_error_reset_done(struct pci_dev *pdev)
16258 struct i40e_pf *pf = pci_get_drvdata(pdev);
16260 if (test_bit(__I40E_IN_REMOVE, pf->state))
16263 i40e_reset_and_rebuild(pf, false, false);
16267 * i40e_pci_error_resume - restart operations after PCI error recovery
16268 * @pdev: PCI device information struct
16270 * Called to allow the driver to bring things back up after PCI error
16271 * and/or reset recovery has finished.
16273 static void i40e_pci_error_resume(struct pci_dev *pdev)
16275 struct i40e_pf *pf = pci_get_drvdata(pdev);
16277 dev_dbg(&pdev->dev, "%s\n", __func__);
16278 if (test_bit(__I40E_SUSPENDED, pf->state))
16281 i40e_handle_reset_warning(pf, false);
16285 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
16286 * using the mac_address_write admin q function
16287 * @pf: pointer to i40e_pf struct
16289 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
16291 struct i40e_hw *hw = &pf->hw;
16296 /* Get current MAC address in case it's an LAA */
16297 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
16298 ether_addr_copy(mac_addr,
16299 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
16301 dev_err(&pf->pdev->dev,
16302 "Failed to retrieve MAC address; using default\n");
16303 ether_addr_copy(mac_addr, hw->mac.addr);
16306 /* The FW expects the mac address write cmd to first be called with
16307 * one of these flags before calling it again with the multicast
16310 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
16312 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
16313 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
16315 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16317 dev_err(&pf->pdev->dev,
16318 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
16322 flags = I40E_AQC_MC_MAG_EN
16323 | I40E_AQC_WOL_PRESERVE_ON_PFR
16324 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
16325 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16327 dev_err(&pf->pdev->dev,
16328 "Failed to enable Multicast Magic Packet wake up\n");
16332 * i40e_shutdown - PCI callback for shutting down
16333 * @pdev: PCI device information struct
16335 static void i40e_shutdown(struct pci_dev *pdev)
16337 struct i40e_pf *pf = pci_get_drvdata(pdev);
16338 struct i40e_hw *hw = &pf->hw;
16340 set_bit(__I40E_SUSPENDED, pf->state);
16341 set_bit(__I40E_DOWN, pf->state);
16343 del_timer_sync(&pf->service_timer);
16344 cancel_work_sync(&pf->service_task);
16345 i40e_cloud_filter_exit(pf);
16346 i40e_fdir_teardown(pf);
16348 /* Client close must be called explicitly here because the timer
16349 * has been stopped.
16351 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16353 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16354 i40e_enable_mc_magic_wake(pf);
16356 i40e_prep_for_reset(pf);
16358 wr32(hw, I40E_PFPM_APM,
16359 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16360 wr32(hw, I40E_PFPM_WUFC,
16361 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16363 /* Free MSI/legacy interrupt 0 when in recovery mode. */
16364 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16365 !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16366 free_irq(pf->pdev->irq, pf);
16368 /* Since we're going to destroy queues during the
16369 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16373 i40e_clear_interrupt_scheme(pf);
16376 if (system_state == SYSTEM_POWER_OFF) {
16377 pci_wake_from_d3(pdev, pf->wol_en);
16378 pci_set_power_state(pdev, PCI_D3hot);
16383 * i40e_suspend - PM callback for moving to D3
16384 * @dev: generic device information structure
16386 static int __maybe_unused i40e_suspend(struct device *dev)
16388 struct i40e_pf *pf = dev_get_drvdata(dev);
16389 struct i40e_hw *hw = &pf->hw;
16391 /* If we're already suspended, then there is nothing to do */
16392 if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
16395 set_bit(__I40E_DOWN, pf->state);
16397 /* Ensure service task will not be running */
16398 del_timer_sync(&pf->service_timer);
16399 cancel_work_sync(&pf->service_task);
16401 /* Client close must be called explicitly here because the timer
16402 * has been stopped.
16404 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16406 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16407 i40e_enable_mc_magic_wake(pf);
16409 /* Since we're going to destroy queues during the
16410 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16415 i40e_prep_for_reset(pf);
16417 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16418 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16420 /* Clear the interrupt scheme and release our IRQs so that the system
16421 * can safely hibernate even when there are a large number of CPUs.
16422 * Otherwise hibernation might fail when mapping all the vectors back
16425 i40e_clear_interrupt_scheme(pf);
16433 * i40e_resume - PM callback for waking up from D3
16434 * @dev: generic device information structure
16436 static int __maybe_unused i40e_resume(struct device *dev)
16438 struct i40e_pf *pf = dev_get_drvdata(dev);
16441 /* If we're not suspended, then there is nothing to do */
16442 if (!test_bit(__I40E_SUSPENDED, pf->state))
16445 /* We need to hold the RTNL lock prior to restoring interrupt schemes,
16446 * since we're going to be restoring queues
16450 /* We cleared the interrupt scheme when we suspended, so we need to
16451 * restore it now to resume device functionality.
16453 err = i40e_restore_interrupt_scheme(pf);
16455 dev_err(dev, "Cannot restore interrupt scheme: %d\n",
16459 clear_bit(__I40E_DOWN, pf->state);
16460 i40e_reset_and_rebuild(pf, false, true);
16464 /* Clear suspended state last after everything is recovered */
16465 clear_bit(__I40E_SUSPENDED, pf->state);
16467 /* Restart the service task */
16468 mod_timer(&pf->service_timer,
16469 round_jiffies(jiffies + pf->service_timer_period));
16474 static const struct pci_error_handlers i40e_err_handler = {
16475 .error_detected = i40e_pci_error_detected,
16476 .slot_reset = i40e_pci_error_slot_reset,
16477 .reset_prepare = i40e_pci_error_reset_prepare,
16478 .reset_done = i40e_pci_error_reset_done,
16479 .resume = i40e_pci_error_resume,
16482 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
16484 static struct pci_driver i40e_driver = {
16485 .name = i40e_driver_name,
16486 .id_table = i40e_pci_tbl,
16487 .probe = i40e_probe,
16488 .remove = i40e_remove,
16490 .pm = &i40e_pm_ops,
16492 .shutdown = i40e_shutdown,
16493 .err_handler = &i40e_err_handler,
16494 .sriov_configure = i40e_pci_sriov_configure,
16498 * i40e_init_module - Driver registration routine
16500 * i40e_init_module is the first routine called when the driver is
16501 * loaded. All it does is register with the PCI subsystem.
16503 static int __init i40e_init_module(void)
16505 pr_info("%s: %s\n", i40e_driver_name, i40e_driver_string);
16506 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
16508 /* There is no need to throttle the number of active tasks because
16509 * each device limits its own task using a state bit for scheduling
16510 * the service task, and the device tasks do not interfere with each
16511 * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
16512 * since we need to be able to guarantee forward progress even under
16515 i40e_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, i40e_driver_name);
16517 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
16522 return pci_register_driver(&i40e_driver);
16524 module_init(i40e_init_module);
16527 * i40e_exit_module - Driver exit cleanup routine
16529 * i40e_exit_module is called just before the driver is removed
16532 static void __exit i40e_exit_module(void)
16534 pci_unregister_driver(&i40e_driver);
16535 destroy_workqueue(i40e_wq);
16536 ida_destroy(&i40e_client_ida);
16539 module_exit(i40e_exit_module);