1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
4 #include <linux/etherdevice.h>
5 #include <linux/of_net.h>
8 #include <generated/utsrelease.h>
9 #include <linux/crash_dump.h>
13 #include "i40e_diag.h"
15 #include <net/udp_tunnel.h>
16 #include <net/xdp_sock_drv.h>
17 /* All i40e tracepoints are defined by the include below, which
18 * must be included exactly once across the whole kernel with
19 * CREATE_TRACE_POINTS defined
21 #define CREATE_TRACE_POINTS
22 #include "i40e_trace.h"
24 const char i40e_driver_name[] = "i40e";
25 static const char i40e_driver_string[] =
26 "Intel(R) Ethernet Connection XL710 Network Driver";
28 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
30 /* a bit of forward declarations */
31 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
32 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired);
33 static int i40e_add_vsi(struct i40e_vsi *vsi);
34 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
35 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired);
36 static int i40e_setup_misc_vector(struct i40e_pf *pf);
37 static void i40e_determine_queue_usage(struct i40e_pf *pf);
38 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
39 static void i40e_prep_for_reset(struct i40e_pf *pf);
40 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
42 static int i40e_reset(struct i40e_pf *pf);
43 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired);
44 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf);
45 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf);
46 static bool i40e_check_recovery_mode(struct i40e_pf *pf);
47 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw);
48 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
49 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
50 static int i40e_get_capabilities(struct i40e_pf *pf,
51 enum i40e_admin_queue_opc list_type);
52 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf);
54 /* i40e_pci_tbl - PCI Device ID Table
56 * Last entry must be all 0s
58 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
59 * Class, Class Mask, private data (not used) }
61 static const struct pci_device_id i40e_pci_tbl[] = {
62 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
63 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
64 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
65 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
66 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
67 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
68 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_BC), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_SFP), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_B), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722_A), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_X710_N3000), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_XXV710_N3000), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_B), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_25G_SFP28), 0},
87 /* required last entry */
90 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
92 #define I40E_MAX_VF_COUNT 128
93 static int debug = -1;
94 module_param(debug, uint, 0);
95 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
97 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
98 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
99 MODULE_LICENSE("GPL v2");
101 static struct workqueue_struct *i40e_wq;
103 static void netdev_hw_addr_refcnt(struct i40e_mac_filter *f,
104 struct net_device *netdev, int delta)
106 struct netdev_hw_addr *ha;
111 netdev_for_each_mc_addr(ha, netdev) {
112 if (ether_addr_equal(ha->addr, f->macaddr)) {
113 ha->refcount += delta;
114 if (ha->refcount <= 0)
122 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
123 * @hw: pointer to the HW structure
124 * @mem: ptr to mem struct to fill out
125 * @size: size of memory requested
126 * @alignment: what to align the allocation to
128 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
129 u64 size, u32 alignment)
131 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
133 mem->size = ALIGN(size, alignment);
134 mem->va = dma_alloc_coherent(&pf->pdev->dev, mem->size, &mem->pa,
143 * i40e_free_dma_mem_d - OS specific memory free for shared code
144 * @hw: pointer to the HW structure
145 * @mem: ptr to mem struct to free
147 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
149 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
151 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
160 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
161 * @hw: pointer to the HW structure
162 * @mem: ptr to mem struct to fill out
163 * @size: size of memory requested
165 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
169 mem->va = kzalloc(size, GFP_KERNEL);
178 * i40e_free_virt_mem_d - OS specific memory free for shared code
179 * @hw: pointer to the HW structure
180 * @mem: ptr to mem struct to free
182 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
184 /* it's ok to kfree a NULL pointer */
193 * i40e_get_lump - find a lump of free generic resource
194 * @pf: board private structure
195 * @pile: the pile of resource to search
196 * @needed: the number of items needed
197 * @id: an owner id to stick on the items assigned
199 * Returns the base item index of the lump, or negative for error
201 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
207 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
208 dev_info(&pf->pdev->dev,
209 "param err: pile=%s needed=%d id=0x%04x\n",
210 pile ? "<valid>" : "<null>", needed, id);
214 /* Allocate last queue in the pile for FDIR VSI queue
215 * so it doesn't fragment the qp_pile
217 if (pile == pf->qp_pile && pf->vsi[id]->type == I40E_VSI_FDIR) {
218 if (pile->list[pile->num_entries - 1] & I40E_PILE_VALID_BIT) {
219 dev_err(&pf->pdev->dev,
220 "Cannot allocate queue %d for I40E_VSI_FDIR\n",
221 pile->num_entries - 1);
224 pile->list[pile->num_entries - 1] = id | I40E_PILE_VALID_BIT;
225 return pile->num_entries - 1;
229 while (i < pile->num_entries) {
230 /* skip already allocated entries */
231 if (pile->list[i] & I40E_PILE_VALID_BIT) {
236 /* do we have enough in this lump? */
237 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
238 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
243 /* there was enough, so assign it to the requestor */
244 for (j = 0; j < needed; j++)
245 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
250 /* not enough, so skip over it and continue looking */
258 * i40e_put_lump - return a lump of generic resource
259 * @pile: the pile of resource to search
260 * @index: the base item index
261 * @id: the owner id of the items assigned
263 * Returns the count of items in the lump
265 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
267 int valid_id = (id | I40E_PILE_VALID_BIT);
271 if (!pile || index >= pile->num_entries)
275 i < pile->num_entries && pile->list[i] == valid_id;
286 * i40e_find_vsi_from_id - searches for the vsi with the given id
287 * @pf: the pf structure to search for the vsi
288 * @id: id of the vsi it is searching for
290 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
294 for (i = 0; i < pf->num_alloc_vsi; i++)
295 if (pf->vsi[i] && (pf->vsi[i]->id == id))
302 * i40e_service_event_schedule - Schedule the service task to wake up
303 * @pf: board private structure
305 * If not already scheduled, this puts the task into the work queue
307 void i40e_service_event_schedule(struct i40e_pf *pf)
309 if ((!test_bit(__I40E_DOWN, pf->state) &&
310 !test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) ||
311 test_bit(__I40E_RECOVERY_MODE, pf->state))
312 queue_work(i40e_wq, &pf->service_task);
316 * i40e_tx_timeout - Respond to a Tx Hang
317 * @netdev: network interface device structure
318 * @txqueue: queue number timing out
320 * If any port has noticed a Tx timeout, it is likely that the whole
321 * device is munged, not just the one netdev port, so go for the full
324 static void i40e_tx_timeout(struct net_device *netdev, unsigned int txqueue)
326 struct i40e_netdev_priv *np = netdev_priv(netdev);
327 struct i40e_vsi *vsi = np->vsi;
328 struct i40e_pf *pf = vsi->back;
329 struct i40e_ring *tx_ring = NULL;
333 pf->tx_timeout_count++;
335 /* with txqueue index, find the tx_ring struct */
336 for (i = 0; i < vsi->num_queue_pairs; i++) {
337 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
339 vsi->tx_rings[i]->queue_index) {
340 tx_ring = vsi->tx_rings[i];
346 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
347 pf->tx_timeout_recovery_level = 1; /* reset after some time */
348 else if (time_before(jiffies,
349 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
350 return; /* don't do any new action before the next timeout */
352 /* don't kick off another recovery if one is already pending */
353 if (test_and_set_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state))
357 head = i40e_get_head(tx_ring);
358 /* Read interrupt register */
359 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
361 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
362 tx_ring->vsi->base_vector - 1));
364 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
366 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
367 vsi->seid, txqueue, tx_ring->next_to_clean,
368 head, tx_ring->next_to_use,
369 readl(tx_ring->tail), val);
372 pf->tx_timeout_last_recovery = jiffies;
373 netdev_info(netdev, "tx_timeout recovery level %d, txqueue %d\n",
374 pf->tx_timeout_recovery_level, txqueue);
376 switch (pf->tx_timeout_recovery_level) {
378 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
381 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
384 set_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
387 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
391 i40e_service_event_schedule(pf);
392 pf->tx_timeout_recovery_level++;
396 * i40e_get_vsi_stats_struct - Get System Network Statistics
397 * @vsi: the VSI we care about
399 * Returns the address of the device statistics structure.
400 * The statistics are actually updated from the service task.
402 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
404 return &vsi->net_stats;
408 * i40e_get_netdev_stats_struct_tx - populate stats from a Tx ring
409 * @ring: Tx ring to get statistics from
410 * @stats: statistics entry to be updated
412 static void i40e_get_netdev_stats_struct_tx(struct i40e_ring *ring,
413 struct rtnl_link_stats64 *stats)
419 start = u64_stats_fetch_begin_irq(&ring->syncp);
420 packets = ring->stats.packets;
421 bytes = ring->stats.bytes;
422 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
424 stats->tx_packets += packets;
425 stats->tx_bytes += bytes;
429 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
430 * @netdev: network interface device structure
431 * @stats: data structure to store statistics
433 * Returns the address of the device statistics structure.
434 * The statistics are actually updated from the service task.
436 static void i40e_get_netdev_stats_struct(struct net_device *netdev,
437 struct rtnl_link_stats64 *stats)
439 struct i40e_netdev_priv *np = netdev_priv(netdev);
440 struct i40e_vsi *vsi = np->vsi;
441 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
442 struct i40e_ring *ring;
445 if (test_bit(__I40E_VSI_DOWN, vsi->state))
452 for (i = 0; i < vsi->num_queue_pairs; i++) {
456 ring = READ_ONCE(vsi->tx_rings[i]);
459 i40e_get_netdev_stats_struct_tx(ring, stats);
461 if (i40e_enabled_xdp_vsi(vsi)) {
462 ring = READ_ONCE(vsi->xdp_rings[i]);
465 i40e_get_netdev_stats_struct_tx(ring, stats);
468 ring = READ_ONCE(vsi->rx_rings[i]);
472 start = u64_stats_fetch_begin_irq(&ring->syncp);
473 packets = ring->stats.packets;
474 bytes = ring->stats.bytes;
475 } while (u64_stats_fetch_retry_irq(&ring->syncp, start));
477 stats->rx_packets += packets;
478 stats->rx_bytes += bytes;
483 /* following stats updated by i40e_watchdog_subtask() */
484 stats->multicast = vsi_stats->multicast;
485 stats->tx_errors = vsi_stats->tx_errors;
486 stats->tx_dropped = vsi_stats->tx_dropped;
487 stats->rx_errors = vsi_stats->rx_errors;
488 stats->rx_dropped = vsi_stats->rx_dropped;
489 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
490 stats->rx_length_errors = vsi_stats->rx_length_errors;
494 * i40e_vsi_reset_stats - Resets all stats of the given vsi
495 * @vsi: the VSI to have its stats reset
497 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
499 struct rtnl_link_stats64 *ns;
505 ns = i40e_get_vsi_stats_struct(vsi);
506 memset(ns, 0, sizeof(*ns));
507 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
508 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
509 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
510 if (vsi->rx_rings && vsi->rx_rings[0]) {
511 for (i = 0; i < vsi->num_queue_pairs; i++) {
512 memset(&vsi->rx_rings[i]->stats, 0,
513 sizeof(vsi->rx_rings[i]->stats));
514 memset(&vsi->rx_rings[i]->rx_stats, 0,
515 sizeof(vsi->rx_rings[i]->rx_stats));
516 memset(&vsi->tx_rings[i]->stats, 0,
517 sizeof(vsi->tx_rings[i]->stats));
518 memset(&vsi->tx_rings[i]->tx_stats, 0,
519 sizeof(vsi->tx_rings[i]->tx_stats));
522 vsi->stat_offsets_loaded = false;
526 * i40e_pf_reset_stats - Reset all of the stats for the given PF
527 * @pf: the PF to be reset
529 void i40e_pf_reset_stats(struct i40e_pf *pf)
533 memset(&pf->stats, 0, sizeof(pf->stats));
534 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
535 pf->stat_offsets_loaded = false;
537 for (i = 0; i < I40E_MAX_VEB; i++) {
539 memset(&pf->veb[i]->stats, 0,
540 sizeof(pf->veb[i]->stats));
541 memset(&pf->veb[i]->stats_offsets, 0,
542 sizeof(pf->veb[i]->stats_offsets));
543 memset(&pf->veb[i]->tc_stats, 0,
544 sizeof(pf->veb[i]->tc_stats));
545 memset(&pf->veb[i]->tc_stats_offsets, 0,
546 sizeof(pf->veb[i]->tc_stats_offsets));
547 pf->veb[i]->stat_offsets_loaded = false;
550 pf->hw_csum_rx_error = 0;
554 * i40e_compute_pci_to_hw_id - compute index form PCI function.
555 * @vsi: ptr to the VSI to read from.
556 * @hw: ptr to the hardware info.
558 static u32 i40e_compute_pci_to_hw_id(struct i40e_vsi *vsi, struct i40e_hw *hw)
560 int pf_count = i40e_get_pf_count(hw);
562 if (vsi->type == I40E_VSI_SRIOV)
563 return (hw->port * BIT(7)) / pf_count + vsi->vf_id;
565 return hw->port + BIT(7);
569 * i40e_stat_update64 - read and update a 64 bit stat from the chip.
570 * @hw: ptr to the hardware info.
571 * @hireg: the high 32 bit reg to read.
572 * @loreg: the low 32 bit reg to read.
573 * @offset_loaded: has the initial offset been loaded yet.
574 * @offset: ptr to current offset value.
575 * @stat: ptr to the stat.
577 * Since the device stats are not reset at PFReset, they will not
578 * be zeroed when the driver starts. We'll save the first values read
579 * and use them as offsets to be subtracted from the raw values in order
580 * to report stats that count from zero.
582 static void i40e_stat_update64(struct i40e_hw *hw, u32 hireg, u32 loreg,
583 bool offset_loaded, u64 *offset, u64 *stat)
587 new_data = rd64(hw, loreg);
589 if (!offset_loaded || new_data < *offset)
591 *stat = new_data - *offset;
595 * i40e_stat_update48 - read and update a 48 bit stat from the chip
596 * @hw: ptr to the hardware info
597 * @hireg: the high 32 bit reg to read
598 * @loreg: the low 32 bit reg to read
599 * @offset_loaded: has the initial offset been loaded yet
600 * @offset: ptr to current offset value
601 * @stat: ptr to the stat
603 * Since the device stats are not reset at PFReset, they likely will not
604 * be zeroed when the driver starts. We'll save the first values read
605 * and use them as offsets to be subtracted from the raw values in order
606 * to report stats that count from zero. In the process, we also manage
607 * the potential roll-over.
609 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
610 bool offset_loaded, u64 *offset, u64 *stat)
614 if (hw->device_id == I40E_DEV_ID_QEMU) {
615 new_data = rd32(hw, loreg);
616 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
618 new_data = rd64(hw, loreg);
622 if (likely(new_data >= *offset))
623 *stat = new_data - *offset;
625 *stat = (new_data + BIT_ULL(48)) - *offset;
626 *stat &= 0xFFFFFFFFFFFFULL;
630 * i40e_stat_update32 - read and update a 32 bit stat from the chip
631 * @hw: ptr to the hardware info
632 * @reg: the hw reg to read
633 * @offset_loaded: has the initial offset been loaded yet
634 * @offset: ptr to current offset value
635 * @stat: ptr to the stat
637 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
638 bool offset_loaded, u64 *offset, u64 *stat)
642 new_data = rd32(hw, reg);
645 if (likely(new_data >= *offset))
646 *stat = (u32)(new_data - *offset);
648 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
652 * i40e_stat_update_and_clear32 - read and clear hw reg, update a 32 bit stat
653 * @hw: ptr to the hardware info
654 * @reg: the hw reg to read and clear
655 * @stat: ptr to the stat
657 static void i40e_stat_update_and_clear32(struct i40e_hw *hw, u32 reg, u64 *stat)
659 u32 new_data = rd32(hw, reg);
661 wr32(hw, reg, 1); /* must write a nonzero value to clear register */
666 * i40e_stats_update_rx_discards - update rx_discards.
667 * @vsi: ptr to the VSI to be updated.
668 * @hw: ptr to the hardware info.
669 * @stat_idx: VSI's stat_counter_idx.
670 * @offset_loaded: ptr to the VSI's stat_offsets_loaded.
671 * @stat_offset: ptr to stat_offset to store first read of specific register.
672 * @stat: ptr to VSI's stat to be updated.
675 i40e_stats_update_rx_discards(struct i40e_vsi *vsi, struct i40e_hw *hw,
676 int stat_idx, bool offset_loaded,
677 struct i40e_eth_stats *stat_offset,
678 struct i40e_eth_stats *stat)
680 u64 rx_rdpc, rx_rxerr;
682 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx), offset_loaded,
683 &stat_offset->rx_discards, &rx_rdpc);
684 i40e_stat_update64(hw,
685 I40E_GL_RXERR1H(i40e_compute_pci_to_hw_id(vsi, hw)),
686 I40E_GL_RXERR1L(i40e_compute_pci_to_hw_id(vsi, hw)),
687 offset_loaded, &stat_offset->rx_discards_other,
690 stat->rx_discards = rx_rdpc + rx_rxerr;
694 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
695 * @vsi: the VSI to be updated
697 void i40e_update_eth_stats(struct i40e_vsi *vsi)
699 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
700 struct i40e_pf *pf = vsi->back;
701 struct i40e_hw *hw = &pf->hw;
702 struct i40e_eth_stats *oes;
703 struct i40e_eth_stats *es; /* device's eth stats */
705 es = &vsi->eth_stats;
706 oes = &vsi->eth_stats_offsets;
708 /* Gather up the stats that the hw collects */
709 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
710 vsi->stat_offsets_loaded,
711 &oes->tx_errors, &es->tx_errors);
712 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
713 vsi->stat_offsets_loaded,
714 &oes->rx_discards, &es->rx_discards);
715 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
716 vsi->stat_offsets_loaded,
717 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
719 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
720 I40E_GLV_GORCL(stat_idx),
721 vsi->stat_offsets_loaded,
722 &oes->rx_bytes, &es->rx_bytes);
723 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
724 I40E_GLV_UPRCL(stat_idx),
725 vsi->stat_offsets_loaded,
726 &oes->rx_unicast, &es->rx_unicast);
727 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
728 I40E_GLV_MPRCL(stat_idx),
729 vsi->stat_offsets_loaded,
730 &oes->rx_multicast, &es->rx_multicast);
731 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
732 I40E_GLV_BPRCL(stat_idx),
733 vsi->stat_offsets_loaded,
734 &oes->rx_broadcast, &es->rx_broadcast);
736 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
737 I40E_GLV_GOTCL(stat_idx),
738 vsi->stat_offsets_loaded,
739 &oes->tx_bytes, &es->tx_bytes);
740 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
741 I40E_GLV_UPTCL(stat_idx),
742 vsi->stat_offsets_loaded,
743 &oes->tx_unicast, &es->tx_unicast);
744 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
745 I40E_GLV_MPTCL(stat_idx),
746 vsi->stat_offsets_loaded,
747 &oes->tx_multicast, &es->tx_multicast);
748 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
749 I40E_GLV_BPTCL(stat_idx),
750 vsi->stat_offsets_loaded,
751 &oes->tx_broadcast, &es->tx_broadcast);
753 i40e_stats_update_rx_discards(vsi, hw, stat_idx,
754 vsi->stat_offsets_loaded, oes, es);
756 vsi->stat_offsets_loaded = true;
760 * i40e_update_veb_stats - Update Switch component statistics
761 * @veb: the VEB being updated
763 void i40e_update_veb_stats(struct i40e_veb *veb)
765 struct i40e_pf *pf = veb->pf;
766 struct i40e_hw *hw = &pf->hw;
767 struct i40e_eth_stats *oes;
768 struct i40e_eth_stats *es; /* device's eth stats */
769 struct i40e_veb_tc_stats *veb_oes;
770 struct i40e_veb_tc_stats *veb_es;
773 idx = veb->stats_idx;
775 oes = &veb->stats_offsets;
776 veb_es = &veb->tc_stats;
777 veb_oes = &veb->tc_stats_offsets;
779 /* Gather up the stats that the hw collects */
780 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
781 veb->stat_offsets_loaded,
782 &oes->tx_discards, &es->tx_discards);
783 if (hw->revision_id > 0)
784 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
785 veb->stat_offsets_loaded,
786 &oes->rx_unknown_protocol,
787 &es->rx_unknown_protocol);
788 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
789 veb->stat_offsets_loaded,
790 &oes->rx_bytes, &es->rx_bytes);
791 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
792 veb->stat_offsets_loaded,
793 &oes->rx_unicast, &es->rx_unicast);
794 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
795 veb->stat_offsets_loaded,
796 &oes->rx_multicast, &es->rx_multicast);
797 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
798 veb->stat_offsets_loaded,
799 &oes->rx_broadcast, &es->rx_broadcast);
801 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
802 veb->stat_offsets_loaded,
803 &oes->tx_bytes, &es->tx_bytes);
804 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
805 veb->stat_offsets_loaded,
806 &oes->tx_unicast, &es->tx_unicast);
807 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
808 veb->stat_offsets_loaded,
809 &oes->tx_multicast, &es->tx_multicast);
810 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
811 veb->stat_offsets_loaded,
812 &oes->tx_broadcast, &es->tx_broadcast);
813 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
814 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
815 I40E_GLVEBTC_RPCL(i, idx),
816 veb->stat_offsets_loaded,
817 &veb_oes->tc_rx_packets[i],
818 &veb_es->tc_rx_packets[i]);
819 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
820 I40E_GLVEBTC_RBCL(i, idx),
821 veb->stat_offsets_loaded,
822 &veb_oes->tc_rx_bytes[i],
823 &veb_es->tc_rx_bytes[i]);
824 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
825 I40E_GLVEBTC_TPCL(i, idx),
826 veb->stat_offsets_loaded,
827 &veb_oes->tc_tx_packets[i],
828 &veb_es->tc_tx_packets[i]);
829 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
830 I40E_GLVEBTC_TBCL(i, idx),
831 veb->stat_offsets_loaded,
832 &veb_oes->tc_tx_bytes[i],
833 &veb_es->tc_tx_bytes[i]);
835 veb->stat_offsets_loaded = true;
839 * i40e_update_vsi_stats - Update the vsi statistics counters.
840 * @vsi: the VSI to be updated
842 * There are a few instances where we store the same stat in a
843 * couple of different structs. This is partly because we have
844 * the netdev stats that need to be filled out, which is slightly
845 * different from the "eth_stats" defined by the chip and used in
846 * VF communications. We sort it out here.
848 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
850 u64 rx_page, rx_buf, rx_reuse, rx_alloc, rx_waive, rx_busy;
851 struct i40e_pf *pf = vsi->back;
852 struct rtnl_link_stats64 *ons;
853 struct rtnl_link_stats64 *ns; /* netdev stats */
854 struct i40e_eth_stats *oes;
855 struct i40e_eth_stats *es; /* device's eth stats */
856 u64 tx_restart, tx_busy;
867 if (test_bit(__I40E_VSI_DOWN, vsi->state) ||
868 test_bit(__I40E_CONFIG_BUSY, pf->state))
871 ns = i40e_get_vsi_stats_struct(vsi);
872 ons = &vsi->net_stats_offsets;
873 es = &vsi->eth_stats;
874 oes = &vsi->eth_stats_offsets;
876 /* Gather up the netdev and vsi stats that the driver collects
877 * on the fly during packet processing
881 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
890 for (q = 0; q < vsi->num_queue_pairs; q++) {
892 p = READ_ONCE(vsi->tx_rings[q]);
897 start = u64_stats_fetch_begin_irq(&p->syncp);
898 packets = p->stats.packets;
899 bytes = p->stats.bytes;
900 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
903 tx_restart += p->tx_stats.restart_queue;
904 tx_busy += p->tx_stats.tx_busy;
905 tx_linearize += p->tx_stats.tx_linearize;
906 tx_force_wb += p->tx_stats.tx_force_wb;
907 tx_stopped += p->tx_stats.tx_stopped;
910 p = READ_ONCE(vsi->rx_rings[q]);
915 start = u64_stats_fetch_begin_irq(&p->syncp);
916 packets = p->stats.packets;
917 bytes = p->stats.bytes;
918 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
921 rx_buf += p->rx_stats.alloc_buff_failed;
922 rx_page += p->rx_stats.alloc_page_failed;
923 rx_reuse += p->rx_stats.page_reuse_count;
924 rx_alloc += p->rx_stats.page_alloc_count;
925 rx_waive += p->rx_stats.page_waive_count;
926 rx_busy += p->rx_stats.page_busy_count;
928 if (i40e_enabled_xdp_vsi(vsi)) {
929 /* locate XDP ring */
930 p = READ_ONCE(vsi->xdp_rings[q]);
935 start = u64_stats_fetch_begin_irq(&p->syncp);
936 packets = p->stats.packets;
937 bytes = p->stats.bytes;
938 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
941 tx_restart += p->tx_stats.restart_queue;
942 tx_busy += p->tx_stats.tx_busy;
943 tx_linearize += p->tx_stats.tx_linearize;
944 tx_force_wb += p->tx_stats.tx_force_wb;
948 vsi->tx_restart = tx_restart;
949 vsi->tx_busy = tx_busy;
950 vsi->tx_linearize = tx_linearize;
951 vsi->tx_force_wb = tx_force_wb;
952 vsi->tx_stopped = tx_stopped;
953 vsi->rx_page_failed = rx_page;
954 vsi->rx_buf_failed = rx_buf;
955 vsi->rx_page_reuse = rx_reuse;
956 vsi->rx_page_alloc = rx_alloc;
957 vsi->rx_page_waive = rx_waive;
958 vsi->rx_page_busy = rx_busy;
960 ns->rx_packets = rx_p;
962 ns->tx_packets = tx_p;
965 /* update netdev stats from eth stats */
966 i40e_update_eth_stats(vsi);
967 ons->tx_errors = oes->tx_errors;
968 ns->tx_errors = es->tx_errors;
969 ons->multicast = oes->rx_multicast;
970 ns->multicast = es->rx_multicast;
971 ons->rx_dropped = oes->rx_discards;
972 ns->rx_dropped = es->rx_discards;
973 ons->tx_dropped = oes->tx_discards;
974 ns->tx_dropped = es->tx_discards;
976 /* pull in a couple PF stats if this is the main vsi */
977 if (vsi == pf->vsi[pf->lan_vsi]) {
978 ns->rx_crc_errors = pf->stats.crc_errors;
979 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
980 ns->rx_length_errors = pf->stats.rx_length_errors;
985 * i40e_update_pf_stats - Update the PF statistics counters.
986 * @pf: the PF to be updated
988 static void i40e_update_pf_stats(struct i40e_pf *pf)
990 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
991 struct i40e_hw_port_stats *nsd = &pf->stats;
992 struct i40e_hw *hw = &pf->hw;
996 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
997 I40E_GLPRT_GORCL(hw->port),
998 pf->stat_offsets_loaded,
999 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
1000 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
1001 I40E_GLPRT_GOTCL(hw->port),
1002 pf->stat_offsets_loaded,
1003 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
1004 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
1005 pf->stat_offsets_loaded,
1006 &osd->eth.rx_discards,
1007 &nsd->eth.rx_discards);
1008 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
1009 I40E_GLPRT_UPRCL(hw->port),
1010 pf->stat_offsets_loaded,
1011 &osd->eth.rx_unicast,
1012 &nsd->eth.rx_unicast);
1013 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
1014 I40E_GLPRT_MPRCL(hw->port),
1015 pf->stat_offsets_loaded,
1016 &osd->eth.rx_multicast,
1017 &nsd->eth.rx_multicast);
1018 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
1019 I40E_GLPRT_BPRCL(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->eth.rx_broadcast,
1022 &nsd->eth.rx_broadcast);
1023 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
1024 I40E_GLPRT_UPTCL(hw->port),
1025 pf->stat_offsets_loaded,
1026 &osd->eth.tx_unicast,
1027 &nsd->eth.tx_unicast);
1028 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
1029 I40E_GLPRT_MPTCL(hw->port),
1030 pf->stat_offsets_loaded,
1031 &osd->eth.tx_multicast,
1032 &nsd->eth.tx_multicast);
1033 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
1034 I40E_GLPRT_BPTCL(hw->port),
1035 pf->stat_offsets_loaded,
1036 &osd->eth.tx_broadcast,
1037 &nsd->eth.tx_broadcast);
1039 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
1040 pf->stat_offsets_loaded,
1041 &osd->tx_dropped_link_down,
1042 &nsd->tx_dropped_link_down);
1044 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
1045 pf->stat_offsets_loaded,
1046 &osd->crc_errors, &nsd->crc_errors);
1048 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
1049 pf->stat_offsets_loaded,
1050 &osd->illegal_bytes, &nsd->illegal_bytes);
1052 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->mac_local_faults,
1055 &nsd->mac_local_faults);
1056 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
1057 pf->stat_offsets_loaded,
1058 &osd->mac_remote_faults,
1059 &nsd->mac_remote_faults);
1061 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
1062 pf->stat_offsets_loaded,
1063 &osd->rx_length_errors,
1064 &nsd->rx_length_errors);
1066 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
1067 pf->stat_offsets_loaded,
1068 &osd->link_xon_rx, &nsd->link_xon_rx);
1069 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1070 pf->stat_offsets_loaded,
1071 &osd->link_xon_tx, &nsd->link_xon_tx);
1072 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
1073 pf->stat_offsets_loaded,
1074 &osd->link_xoff_rx, &nsd->link_xoff_rx);
1075 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1076 pf->stat_offsets_loaded,
1077 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1079 for (i = 0; i < 8; i++) {
1080 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
1081 pf->stat_offsets_loaded,
1082 &osd->priority_xoff_rx[i],
1083 &nsd->priority_xoff_rx[i]);
1084 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1085 pf->stat_offsets_loaded,
1086 &osd->priority_xon_rx[i],
1087 &nsd->priority_xon_rx[i]);
1088 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1089 pf->stat_offsets_loaded,
1090 &osd->priority_xon_tx[i],
1091 &nsd->priority_xon_tx[i]);
1092 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1093 pf->stat_offsets_loaded,
1094 &osd->priority_xoff_tx[i],
1095 &nsd->priority_xoff_tx[i]);
1096 i40e_stat_update32(hw,
1097 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1098 pf->stat_offsets_loaded,
1099 &osd->priority_xon_2_xoff[i],
1100 &nsd->priority_xon_2_xoff[i]);
1103 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1104 I40E_GLPRT_PRC64L(hw->port),
1105 pf->stat_offsets_loaded,
1106 &osd->rx_size_64, &nsd->rx_size_64);
1107 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1108 I40E_GLPRT_PRC127L(hw->port),
1109 pf->stat_offsets_loaded,
1110 &osd->rx_size_127, &nsd->rx_size_127);
1111 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1112 I40E_GLPRT_PRC255L(hw->port),
1113 pf->stat_offsets_loaded,
1114 &osd->rx_size_255, &nsd->rx_size_255);
1115 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1116 I40E_GLPRT_PRC511L(hw->port),
1117 pf->stat_offsets_loaded,
1118 &osd->rx_size_511, &nsd->rx_size_511);
1119 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1120 I40E_GLPRT_PRC1023L(hw->port),
1121 pf->stat_offsets_loaded,
1122 &osd->rx_size_1023, &nsd->rx_size_1023);
1123 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1124 I40E_GLPRT_PRC1522L(hw->port),
1125 pf->stat_offsets_loaded,
1126 &osd->rx_size_1522, &nsd->rx_size_1522);
1127 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1128 I40E_GLPRT_PRC9522L(hw->port),
1129 pf->stat_offsets_loaded,
1130 &osd->rx_size_big, &nsd->rx_size_big);
1132 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1133 I40E_GLPRT_PTC64L(hw->port),
1134 pf->stat_offsets_loaded,
1135 &osd->tx_size_64, &nsd->tx_size_64);
1136 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1137 I40E_GLPRT_PTC127L(hw->port),
1138 pf->stat_offsets_loaded,
1139 &osd->tx_size_127, &nsd->tx_size_127);
1140 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1141 I40E_GLPRT_PTC255L(hw->port),
1142 pf->stat_offsets_loaded,
1143 &osd->tx_size_255, &nsd->tx_size_255);
1144 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1145 I40E_GLPRT_PTC511L(hw->port),
1146 pf->stat_offsets_loaded,
1147 &osd->tx_size_511, &nsd->tx_size_511);
1148 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1149 I40E_GLPRT_PTC1023L(hw->port),
1150 pf->stat_offsets_loaded,
1151 &osd->tx_size_1023, &nsd->tx_size_1023);
1152 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1153 I40E_GLPRT_PTC1522L(hw->port),
1154 pf->stat_offsets_loaded,
1155 &osd->tx_size_1522, &nsd->tx_size_1522);
1156 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1157 I40E_GLPRT_PTC9522L(hw->port),
1158 pf->stat_offsets_loaded,
1159 &osd->tx_size_big, &nsd->tx_size_big);
1161 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1162 pf->stat_offsets_loaded,
1163 &osd->rx_undersize, &nsd->rx_undersize);
1164 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1165 pf->stat_offsets_loaded,
1166 &osd->rx_fragments, &nsd->rx_fragments);
1167 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1168 pf->stat_offsets_loaded,
1169 &osd->rx_oversize, &nsd->rx_oversize);
1170 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1171 pf->stat_offsets_loaded,
1172 &osd->rx_jabber, &nsd->rx_jabber);
1175 i40e_stat_update_and_clear32(hw,
1176 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(hw->pf_id)),
1177 &nsd->fd_atr_match);
1178 i40e_stat_update_and_clear32(hw,
1179 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(hw->pf_id)),
1181 i40e_stat_update_and_clear32(hw,
1182 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(hw->pf_id)),
1183 &nsd->fd_atr_tunnel_match);
1185 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1186 nsd->tx_lpi_status =
1187 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1188 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1189 nsd->rx_lpi_status =
1190 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1191 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1192 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1193 pf->stat_offsets_loaded,
1194 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1195 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1196 pf->stat_offsets_loaded,
1197 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1199 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1200 !test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
1201 nsd->fd_sb_status = true;
1203 nsd->fd_sb_status = false;
1205 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1206 !test_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
1207 nsd->fd_atr_status = true;
1209 nsd->fd_atr_status = false;
1211 pf->stat_offsets_loaded = true;
1215 * i40e_update_stats - Update the various statistics counters.
1216 * @vsi: the VSI to be updated
1218 * Update the various stats for this VSI and its related entities.
1220 void i40e_update_stats(struct i40e_vsi *vsi)
1222 struct i40e_pf *pf = vsi->back;
1224 if (vsi == pf->vsi[pf->lan_vsi])
1225 i40e_update_pf_stats(pf);
1227 i40e_update_vsi_stats(vsi);
1231 * i40e_count_filters - counts VSI mac filters
1232 * @vsi: the VSI to be searched
1234 * Returns count of mac filters
1236 int i40e_count_filters(struct i40e_vsi *vsi)
1238 struct i40e_mac_filter *f;
1239 struct hlist_node *h;
1243 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
1250 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1251 * @vsi: the VSI to be searched
1252 * @macaddr: the MAC address
1255 * Returns ptr to the filter object or NULL
1257 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1258 const u8 *macaddr, s16 vlan)
1260 struct i40e_mac_filter *f;
1263 if (!vsi || !macaddr)
1266 key = i40e_addr_to_hkey(macaddr);
1267 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1268 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1276 * i40e_find_mac - Find a mac addr in the macvlan filters list
1277 * @vsi: the VSI to be searched
1278 * @macaddr: the MAC address we are searching for
1280 * Returns the first filter with the provided MAC address or NULL if
1281 * MAC address was not found
1283 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr)
1285 struct i40e_mac_filter *f;
1288 if (!vsi || !macaddr)
1291 key = i40e_addr_to_hkey(macaddr);
1292 hash_for_each_possible(vsi->mac_filter_hash, f, hlist, key) {
1293 if ((ether_addr_equal(macaddr, f->macaddr)))
1300 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1301 * @vsi: the VSI to be searched
1303 * Returns true if VSI is in vlan mode or false otherwise
1305 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1307 /* If we have a PVID, always operate in VLAN mode */
1311 /* We need to operate in VLAN mode whenever we have any filters with
1312 * a VLAN other than I40E_VLAN_ALL. We could check the table each
1313 * time, incurring search cost repeatedly. However, we can notice two
1316 * 1) the only place where we can gain a VLAN filter is in
1319 * 2) the only place where filters are actually removed is in
1320 * i40e_sync_filters_subtask.
1322 * Thus, we can simply use a boolean value, has_vlan_filters which we
1323 * will set to true when we add a VLAN filter in i40e_add_filter. Then
1324 * we have to perform the full search after deleting filters in
1325 * i40e_sync_filters_subtask, but we already have to search
1326 * filters here and can perform the check at the same time. This
1327 * results in avoiding embedding a loop for VLAN mode inside another
1328 * loop over all the filters, and should maintain correctness as noted
1331 return vsi->has_vlan_filter;
1335 * i40e_correct_mac_vlan_filters - Correct non-VLAN filters if necessary
1336 * @vsi: the VSI to configure
1337 * @tmp_add_list: list of filters ready to be added
1338 * @tmp_del_list: list of filters ready to be deleted
1339 * @vlan_filters: the number of active VLAN filters
1341 * Update VLAN=0 and VLAN=-1 (I40E_VLAN_ANY) filters properly so that they
1342 * behave as expected. If we have any active VLAN filters remaining or about
1343 * to be added then we need to update non-VLAN filters to be marked as VLAN=0
1344 * so that they only match against untagged traffic. If we no longer have any
1345 * active VLAN filters, we need to make all non-VLAN filters marked as VLAN=-1
1346 * so that they match against both tagged and untagged traffic. In this way,
1347 * we ensure that we correctly receive the desired traffic. This ensures that
1348 * when we have an active VLAN we will receive only untagged traffic and
1349 * traffic matching active VLANs. If we have no active VLANs then we will
1350 * operate in non-VLAN mode and receive all traffic, tagged or untagged.
1352 * Finally, in a similar fashion, this function also corrects filters when
1353 * there is an active PVID assigned to this VSI.
1355 * In case of memory allocation failure return -ENOMEM. Otherwise, return 0.
1357 * This function is only expected to be called from within
1358 * i40e_sync_vsi_filters.
1360 * NOTE: This function expects to be called while under the
1361 * mac_filter_hash_lock
1363 static int i40e_correct_mac_vlan_filters(struct i40e_vsi *vsi,
1364 struct hlist_head *tmp_add_list,
1365 struct hlist_head *tmp_del_list,
1368 s16 pvid = le16_to_cpu(vsi->info.pvid);
1369 struct i40e_mac_filter *f, *add_head;
1370 struct i40e_new_mac_filter *new;
1371 struct hlist_node *h;
1374 /* To determine if a particular filter needs to be replaced we
1375 * have the three following conditions:
1377 * a) if we have a PVID assigned, then all filters which are
1378 * not marked as VLAN=PVID must be replaced with filters that
1380 * b) otherwise, if we have any active VLANS, all filters
1381 * which are marked as VLAN=-1 must be replaced with
1382 * filters marked as VLAN=0
1383 * c) finally, if we do not have any active VLANS, all filters
1384 * which are marked as VLAN=0 must be replaced with filters
1388 /* Update the filters about to be added in place */
1389 hlist_for_each_entry(new, tmp_add_list, hlist) {
1390 if (pvid && new->f->vlan != pvid)
1391 new->f->vlan = pvid;
1392 else if (vlan_filters && new->f->vlan == I40E_VLAN_ANY)
1394 else if (!vlan_filters && new->f->vlan == 0)
1395 new->f->vlan = I40E_VLAN_ANY;
1398 /* Update the remaining active filters */
1399 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1400 /* Combine the checks for whether a filter needs to be changed
1401 * and then determine the new VLAN inside the if block, in
1402 * order to avoid duplicating code for adding the new filter
1403 * then deleting the old filter.
1405 if ((pvid && f->vlan != pvid) ||
1406 (vlan_filters && f->vlan == I40E_VLAN_ANY) ||
1407 (!vlan_filters && f->vlan == 0)) {
1408 /* Determine the new vlan we will be adding */
1411 else if (vlan_filters)
1414 new_vlan = I40E_VLAN_ANY;
1416 /* Create the new filter */
1417 add_head = i40e_add_filter(vsi, f->macaddr, new_vlan);
1421 /* Create a temporary i40e_new_mac_filter */
1422 new = kzalloc(sizeof(*new), GFP_ATOMIC);
1427 new->state = add_head->state;
1429 /* Add the new filter to the tmp list */
1430 hlist_add_head(&new->hlist, tmp_add_list);
1432 /* Put the original filter into the delete list */
1433 f->state = I40E_FILTER_REMOVE;
1434 hash_del(&f->hlist);
1435 hlist_add_head(&f->hlist, tmp_del_list);
1439 vsi->has_vlan_filter = !!vlan_filters;
1445 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1446 * @vsi: the PF Main VSI - inappropriate for any other VSI
1447 * @macaddr: the MAC address
1449 * Remove whatever filter the firmware set up so the driver can manage
1450 * its own filtering intelligently.
1452 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1454 struct i40e_aqc_remove_macvlan_element_data element;
1455 struct i40e_pf *pf = vsi->back;
1457 /* Only appropriate for the PF main VSI */
1458 if (vsi->type != I40E_VSI_MAIN)
1461 memset(&element, 0, sizeof(element));
1462 ether_addr_copy(element.mac_addr, macaddr);
1463 element.vlan_tag = 0;
1464 /* Ignore error returns, some firmware does it this way... */
1465 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1466 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1468 memset(&element, 0, sizeof(element));
1469 ether_addr_copy(element.mac_addr, macaddr);
1470 element.vlan_tag = 0;
1471 /* ...and some firmware does it this way. */
1472 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1473 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1474 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1478 * i40e_add_filter - Add a mac/vlan filter to the VSI
1479 * @vsi: the VSI to be searched
1480 * @macaddr: the MAC address
1483 * Returns ptr to the filter object or NULL when no memory available.
1485 * NOTE: This function is expected to be called with mac_filter_hash_lock
1488 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1489 const u8 *macaddr, s16 vlan)
1491 struct i40e_mac_filter *f;
1494 if (!vsi || !macaddr)
1497 f = i40e_find_filter(vsi, macaddr, vlan);
1499 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1503 /* Update the boolean indicating if we need to function in
1507 vsi->has_vlan_filter = true;
1509 ether_addr_copy(f->macaddr, macaddr);
1511 f->state = I40E_FILTER_NEW;
1512 INIT_HLIST_NODE(&f->hlist);
1514 key = i40e_addr_to_hkey(macaddr);
1515 hash_add(vsi->mac_filter_hash, &f->hlist, key);
1517 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1518 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1521 /* If we're asked to add a filter that has been marked for removal, it
1522 * is safe to simply restore it to active state. __i40e_del_filter
1523 * will have simply deleted any filters which were previously marked
1524 * NEW or FAILED, so if it is currently marked REMOVE it must have
1525 * previously been ACTIVE. Since we haven't yet run the sync filters
1526 * task, just restore this filter to the ACTIVE state so that the
1527 * sync task leaves it in place
1529 if (f->state == I40E_FILTER_REMOVE)
1530 f->state = I40E_FILTER_ACTIVE;
1536 * __i40e_del_filter - Remove a specific filter from the VSI
1537 * @vsi: VSI to remove from
1538 * @f: the filter to remove from the list
1540 * This function should be called instead of i40e_del_filter only if you know
1541 * the exact filter you will remove already, such as via i40e_find_filter or
1544 * NOTE: This function is expected to be called with mac_filter_hash_lock
1546 * ANOTHER NOTE: This function MUST be called from within the context of
1547 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1548 * instead of list_for_each_entry().
1550 void __i40e_del_filter(struct i40e_vsi *vsi, struct i40e_mac_filter *f)
1555 /* If the filter was never added to firmware then we can just delete it
1556 * directly and we don't want to set the status to remove or else an
1557 * admin queue command will unnecessarily fire.
1559 if ((f->state == I40E_FILTER_FAILED) ||
1560 (f->state == I40E_FILTER_NEW)) {
1561 hash_del(&f->hlist);
1564 f->state = I40E_FILTER_REMOVE;
1567 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1568 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
1572 * i40e_del_filter - Remove a MAC/VLAN filter from the VSI
1573 * @vsi: the VSI to be searched
1574 * @macaddr: the MAC address
1577 * NOTE: This function is expected to be called with mac_filter_hash_lock
1579 * ANOTHER NOTE: This function MUST be called from within the context of
1580 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1581 * instead of list_for_each_entry().
1583 void i40e_del_filter(struct i40e_vsi *vsi, const u8 *macaddr, s16 vlan)
1585 struct i40e_mac_filter *f;
1587 if (!vsi || !macaddr)
1590 f = i40e_find_filter(vsi, macaddr, vlan);
1591 __i40e_del_filter(vsi, f);
1595 * i40e_add_mac_filter - Add a MAC filter for all active VLANs
1596 * @vsi: the VSI to be searched
1597 * @macaddr: the mac address to be filtered
1599 * If we're not in VLAN mode, just add the filter to I40E_VLAN_ANY. Otherwise,
1600 * go through all the macvlan filters and add a macvlan filter for each
1601 * unique vlan that already exists. If a PVID has been assigned, instead only
1602 * add the macaddr to that VLAN.
1604 * Returns last filter added on success, else NULL
1606 struct i40e_mac_filter *i40e_add_mac_filter(struct i40e_vsi *vsi,
1609 struct i40e_mac_filter *f, *add = NULL;
1610 struct hlist_node *h;
1614 return i40e_add_filter(vsi, macaddr,
1615 le16_to_cpu(vsi->info.pvid));
1617 if (!i40e_is_vsi_in_vlan(vsi))
1618 return i40e_add_filter(vsi, macaddr, I40E_VLAN_ANY);
1620 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1621 if (f->state == I40E_FILTER_REMOVE)
1623 add = i40e_add_filter(vsi, macaddr, f->vlan);
1632 * i40e_del_mac_filter - Remove a MAC filter from all VLANs
1633 * @vsi: the VSI to be searched
1634 * @macaddr: the mac address to be removed
1636 * Removes a given MAC address from a VSI regardless of what VLAN it has been
1639 * Returns 0 for success, or error
1641 int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr)
1643 struct i40e_mac_filter *f;
1644 struct hlist_node *h;
1648 lockdep_assert_held(&vsi->mac_filter_hash_lock);
1649 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
1650 if (ether_addr_equal(macaddr, f->macaddr)) {
1651 __i40e_del_filter(vsi, f);
1663 * i40e_set_mac - NDO callback to set mac address
1664 * @netdev: network interface device structure
1665 * @p: pointer to an address structure
1667 * Returns 0 on success, negative on failure
1669 static int i40e_set_mac(struct net_device *netdev, void *p)
1671 struct i40e_netdev_priv *np = netdev_priv(netdev);
1672 struct i40e_vsi *vsi = np->vsi;
1673 struct i40e_pf *pf = vsi->back;
1674 struct i40e_hw *hw = &pf->hw;
1675 struct sockaddr *addr = p;
1677 if (!is_valid_ether_addr(addr->sa_data))
1678 return -EADDRNOTAVAIL;
1680 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1681 netdev_info(netdev, "already using mac address %pM\n",
1686 if (test_bit(__I40E_DOWN, pf->state) ||
1687 test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
1688 return -EADDRNOTAVAIL;
1690 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1691 netdev_info(netdev, "returning to hw mac address %pM\n",
1694 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1696 /* Copy the address first, so that we avoid a possible race with
1698 * - Remove old address from MAC filter
1699 * - Copy new address
1700 * - Add new address to MAC filter
1702 spin_lock_bh(&vsi->mac_filter_hash_lock);
1703 i40e_del_mac_filter(vsi, netdev->dev_addr);
1704 eth_hw_addr_set(netdev, addr->sa_data);
1705 i40e_add_mac_filter(vsi, netdev->dev_addr);
1706 spin_unlock_bh(&vsi->mac_filter_hash_lock);
1708 if (vsi->type == I40E_VSI_MAIN) {
1711 ret = i40e_aq_mac_address_write(hw, I40E_AQC_WRITE_TYPE_LAA_WOL,
1712 addr->sa_data, NULL);
1714 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1715 i40e_stat_str(hw, ret),
1716 i40e_aq_str(hw, hw->aq.asq_last_status));
1719 /* schedule our worker thread which will take care of
1720 * applying the new filter changes
1722 i40e_service_event_schedule(pf);
1727 * i40e_config_rss_aq - Prepare for RSS using AQ commands
1728 * @vsi: vsi structure
1729 * @seed: RSS hash seed
1730 * @lut: pointer to lookup table of lut_size
1731 * @lut_size: size of the lookup table
1733 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
1734 u8 *lut, u16 lut_size)
1736 struct i40e_pf *pf = vsi->back;
1737 struct i40e_hw *hw = &pf->hw;
1741 struct i40e_aqc_get_set_rss_key_data *seed_dw =
1742 (struct i40e_aqc_get_set_rss_key_data *)seed;
1743 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
1745 dev_info(&pf->pdev->dev,
1746 "Cannot set RSS key, err %s aq_err %s\n",
1747 i40e_stat_str(hw, ret),
1748 i40e_aq_str(hw, hw->aq.asq_last_status));
1753 bool pf_lut = vsi->type == I40E_VSI_MAIN;
1755 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
1757 dev_info(&pf->pdev->dev,
1758 "Cannot set RSS lut, err %s aq_err %s\n",
1759 i40e_stat_str(hw, ret),
1760 i40e_aq_str(hw, hw->aq.asq_last_status));
1768 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
1769 * @vsi: VSI structure
1771 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
1773 struct i40e_pf *pf = vsi->back;
1774 u8 seed[I40E_HKEY_ARRAY_SIZE];
1778 if (!(pf->hw_features & I40E_HW_RSS_AQ_CAPABLE))
1781 vsi->rss_size = min_t(int, pf->alloc_rss_size,
1782 vsi->num_queue_pairs);
1785 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
1789 /* Use the user configured hash keys and lookup table if there is one,
1790 * otherwise use default
1792 if (vsi->rss_lut_user)
1793 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
1795 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
1796 if (vsi->rss_hkey_user)
1797 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
1799 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
1800 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
1806 * i40e_vsi_setup_queue_map_mqprio - Prepares mqprio based tc_config
1807 * @vsi: the VSI being configured,
1808 * @ctxt: VSI context structure
1809 * @enabled_tc: number of traffic classes to enable
1811 * Prepares VSI tc_config to have queue configurations based on MQPRIO options.
1813 static int i40e_vsi_setup_queue_map_mqprio(struct i40e_vsi *vsi,
1814 struct i40e_vsi_context *ctxt,
1817 u16 qcount = 0, max_qcount, qmap, sections = 0;
1818 int i, override_q, pow, num_qps, ret;
1819 u8 netdev_tc = 0, offset = 0;
1821 if (vsi->type != I40E_VSI_MAIN)
1823 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1824 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1825 vsi->tc_config.numtc = vsi->mqprio_qopt.qopt.num_tc;
1826 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1827 num_qps = vsi->mqprio_qopt.qopt.count[0];
1829 /* find the next higher power-of-2 of num queue pairs */
1830 pow = ilog2(num_qps);
1831 if (!is_power_of_2(num_qps))
1833 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1834 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1836 /* Setup queue offset/count for all TCs for given VSI */
1837 max_qcount = vsi->mqprio_qopt.qopt.count[0];
1838 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1839 /* See if the given TC is enabled for the given VSI */
1840 if (vsi->tc_config.enabled_tc & BIT(i)) {
1841 offset = vsi->mqprio_qopt.qopt.offset[i];
1842 qcount = vsi->mqprio_qopt.qopt.count[i];
1843 if (qcount > max_qcount)
1844 max_qcount = qcount;
1845 vsi->tc_config.tc_info[i].qoffset = offset;
1846 vsi->tc_config.tc_info[i].qcount = qcount;
1847 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1849 /* TC is not enabled so set the offset to
1850 * default queue and allocate one queue
1853 vsi->tc_config.tc_info[i].qoffset = 0;
1854 vsi->tc_config.tc_info[i].qcount = 1;
1855 vsi->tc_config.tc_info[i].netdev_tc = 0;
1859 /* Set actual Tx/Rx queue pairs */
1860 vsi->num_queue_pairs = offset + qcount;
1862 /* Setup queue TC[0].qmap for given VSI context */
1863 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
1864 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1865 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1866 ctxt->info.valid_sections |= cpu_to_le16(sections);
1868 /* Reconfigure RSS for main VSI with max queue count */
1869 vsi->rss_size = max_qcount;
1870 ret = i40e_vsi_config_rss(vsi);
1872 dev_info(&vsi->back->pdev->dev,
1873 "Failed to reconfig rss for num_queues (%u)\n",
1877 vsi->reconfig_rss = true;
1878 dev_dbg(&vsi->back->pdev->dev,
1879 "Reconfigured rss with num_queues (%u)\n", max_qcount);
1881 /* Find queue count available for channel VSIs and starting offset
1884 override_q = vsi->mqprio_qopt.qopt.count[0];
1885 if (override_q && override_q < vsi->num_queue_pairs) {
1886 vsi->cnt_q_avail = vsi->num_queue_pairs - override_q;
1887 vsi->next_base_queue = override_q;
1893 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1894 * @vsi: the VSI being setup
1895 * @ctxt: VSI context structure
1896 * @enabled_tc: Enabled TCs bitmap
1897 * @is_add: True if called before Add VSI
1899 * Setup VSI queue mapping for enabled traffic classes.
1901 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1902 struct i40e_vsi_context *ctxt,
1906 struct i40e_pf *pf = vsi->back;
1916 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1918 /* zero out queue mapping, it will get updated on the end of the function */
1919 memset(ctxt->info.queue_mapping, 0, sizeof(ctxt->info.queue_mapping));
1921 if (vsi->type == I40E_VSI_MAIN) {
1922 /* This code helps add more queue to the VSI if we have
1923 * more cores than RSS can support, the higher cores will
1924 * be served by ATR or other filters. Furthermore, the
1925 * non-zero req_queue_pairs says that user requested a new
1926 * queue count via ethtool's set_channels, so use this
1927 * value for queues distribution across traffic classes
1929 if (vsi->req_queue_pairs > 0)
1930 vsi->num_queue_pairs = vsi->req_queue_pairs;
1931 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1932 vsi->num_queue_pairs = pf->num_lan_msix;
1935 /* Number of queues per enabled TC */
1936 if (vsi->type == I40E_VSI_MAIN ||
1937 (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs != 0))
1938 num_tc_qps = vsi->num_queue_pairs;
1940 num_tc_qps = vsi->alloc_queue_pairs;
1942 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1943 /* Find numtc from enabled TC bitmap */
1944 for (i = 0, numtc = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1945 if (enabled_tc & BIT(i)) /* TC is enabled */
1949 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1952 num_tc_qps = num_tc_qps / numtc;
1953 num_tc_qps = min_t(int, num_tc_qps,
1954 i40e_pf_get_max_q_per_tc(pf));
1957 vsi->tc_config.numtc = numtc;
1958 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1960 /* Do not allow use more TC queue pairs than MSI-X vectors exist */
1961 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1962 num_tc_qps = min_t(int, num_tc_qps, pf->num_lan_msix);
1964 /* Setup queue offset/count for all TCs for given VSI */
1965 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1966 /* See if the given TC is enabled for the given VSI */
1967 if (vsi->tc_config.enabled_tc & BIT(i)) {
1971 switch (vsi->type) {
1973 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED |
1974 I40E_FLAG_FD_ATR_ENABLED)) ||
1975 vsi->tc_config.enabled_tc != 1) {
1976 qcount = min_t(int, pf->alloc_rss_size,
1982 case I40E_VSI_SRIOV:
1983 case I40E_VSI_VMDQ2:
1985 qcount = num_tc_qps;
1989 vsi->tc_config.tc_info[i].qoffset = offset;
1990 vsi->tc_config.tc_info[i].qcount = qcount;
1992 /* find the next higher power-of-2 of num queue pairs */
1995 while (num_qps && (BIT_ULL(pow) < qcount)) {
2000 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
2002 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
2003 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
2007 /* TC is not enabled so set the offset to
2008 * default queue and allocate one queue
2011 vsi->tc_config.tc_info[i].qoffset = 0;
2012 vsi->tc_config.tc_info[i].qcount = 1;
2013 vsi->tc_config.tc_info[i].netdev_tc = 0;
2017 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
2019 /* Do not change previously set num_queue_pairs for PFs and VFs*/
2020 if ((vsi->type == I40E_VSI_MAIN && numtc != 1) ||
2021 (vsi->type == I40E_VSI_SRIOV && vsi->num_queue_pairs == 0) ||
2022 (vsi->type != I40E_VSI_MAIN && vsi->type != I40E_VSI_SRIOV))
2023 vsi->num_queue_pairs = offset;
2025 /* Scheduler section valid can only be set for ADD VSI */
2027 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
2029 ctxt->info.up_enable_bits = enabled_tc;
2031 if (vsi->type == I40E_VSI_SRIOV) {
2032 ctxt->info.mapping_flags |=
2033 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
2034 for (i = 0; i < vsi->num_queue_pairs; i++)
2035 ctxt->info.queue_mapping[i] =
2036 cpu_to_le16(vsi->base_queue + i);
2038 ctxt->info.mapping_flags |=
2039 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
2040 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
2042 ctxt->info.valid_sections |= cpu_to_le16(sections);
2046 * i40e_addr_sync - Callback for dev_(mc|uc)_sync to add address
2047 * @netdev: the netdevice
2048 * @addr: address to add
2050 * Called by __dev_(mc|uc)_sync when an address needs to be added. We call
2051 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2053 static int i40e_addr_sync(struct net_device *netdev, const u8 *addr)
2055 struct i40e_netdev_priv *np = netdev_priv(netdev);
2056 struct i40e_vsi *vsi = np->vsi;
2058 if (i40e_add_mac_filter(vsi, addr))
2065 * i40e_addr_unsync - Callback for dev_(mc|uc)_sync to remove address
2066 * @netdev: the netdevice
2067 * @addr: address to add
2069 * Called by __dev_(mc|uc)_sync when an address needs to be removed. We call
2070 * __dev_(uc|mc)_sync from .set_rx_mode and guarantee to hold the hash lock.
2072 static int i40e_addr_unsync(struct net_device *netdev, const u8 *addr)
2074 struct i40e_netdev_priv *np = netdev_priv(netdev);
2075 struct i40e_vsi *vsi = np->vsi;
2077 /* Under some circumstances, we might receive a request to delete
2078 * our own device address from our uc list. Because we store the
2079 * device address in the VSI's MAC/VLAN filter list, we need to ignore
2080 * such requests and not delete our device address from this list.
2082 if (ether_addr_equal(addr, netdev->dev_addr))
2085 i40e_del_mac_filter(vsi, addr);
2091 * i40e_set_rx_mode - NDO callback to set the netdev filters
2092 * @netdev: network interface device structure
2094 static void i40e_set_rx_mode(struct net_device *netdev)
2096 struct i40e_netdev_priv *np = netdev_priv(netdev);
2097 struct i40e_vsi *vsi = np->vsi;
2099 spin_lock_bh(&vsi->mac_filter_hash_lock);
2101 __dev_uc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
2102 __dev_mc_sync(netdev, i40e_addr_sync, i40e_addr_unsync);
2104 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2106 /* check for other flag changes */
2107 if (vsi->current_netdev_flags != vsi->netdev->flags) {
2108 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2109 set_bit(__I40E_MACVLAN_SYNC_PENDING, vsi->back->state);
2114 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
2115 * @vsi: Pointer to VSI struct
2116 * @from: Pointer to list which contains MAC filter entries - changes to
2117 * those entries needs to be undone.
2119 * MAC filter entries from this list were slated for deletion.
2121 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
2122 struct hlist_head *from)
2124 struct i40e_mac_filter *f;
2125 struct hlist_node *h;
2127 hlist_for_each_entry_safe(f, h, from, hlist) {
2128 u64 key = i40e_addr_to_hkey(f->macaddr);
2130 /* Move the element back into MAC filter list*/
2131 hlist_del(&f->hlist);
2132 hash_add(vsi->mac_filter_hash, &f->hlist, key);
2137 * i40e_undo_add_filter_entries - Undo the changes made to MAC filter entries
2138 * @vsi: Pointer to vsi struct
2139 * @from: Pointer to list which contains MAC filter entries - changes to
2140 * those entries needs to be undone.
2142 * MAC filter entries from this list were slated for addition.
2144 static void i40e_undo_add_filter_entries(struct i40e_vsi *vsi,
2145 struct hlist_head *from)
2147 struct i40e_new_mac_filter *new;
2148 struct hlist_node *h;
2150 hlist_for_each_entry_safe(new, h, from, hlist) {
2151 /* We can simply free the wrapper structure */
2152 hlist_del(&new->hlist);
2153 netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
2159 * i40e_next_filter - Get the next non-broadcast filter from a list
2160 * @next: pointer to filter in list
2162 * Returns the next non-broadcast filter in the list. Required so that we
2163 * ignore broadcast filters within the list, since these are not handled via
2164 * the normal firmware update path.
2167 struct i40e_new_mac_filter *i40e_next_filter(struct i40e_new_mac_filter *next)
2169 hlist_for_each_entry_continue(next, hlist) {
2170 if (!is_broadcast_ether_addr(next->f->macaddr))
2178 * i40e_update_filter_state - Update filter state based on return data
2180 * @count: Number of filters added
2181 * @add_list: return data from fw
2182 * @add_head: pointer to first filter in current batch
2184 * MAC filter entries from list were slated to be added to device. Returns
2185 * number of successful filters. Note that 0 does NOT mean success!
2188 i40e_update_filter_state(int count,
2189 struct i40e_aqc_add_macvlan_element_data *add_list,
2190 struct i40e_new_mac_filter *add_head)
2195 for (i = 0; i < count; i++) {
2196 /* Always check status of each filter. We don't need to check
2197 * the firmware return status because we pre-set the filter
2198 * status to I40E_AQC_MM_ERR_NO_RES when sending the filter
2199 * request to the adminq. Thus, if it no longer matches then
2200 * we know the filter is active.
2202 if (add_list[i].match_method == I40E_AQC_MM_ERR_NO_RES) {
2203 add_head->state = I40E_FILTER_FAILED;
2205 add_head->state = I40E_FILTER_ACTIVE;
2209 add_head = i40e_next_filter(add_head);
2218 * i40e_aqc_del_filters - Request firmware to delete a set of filters
2219 * @vsi: ptr to the VSI
2220 * @vsi_name: name to display in messages
2221 * @list: the list of filters to send to firmware
2222 * @num_del: the number of filters to delete
2223 * @retval: Set to -EIO on failure to delete
2225 * Send a request to firmware via AdminQ to delete a set of filters. Uses
2226 * *retval instead of a return value so that success does not force ret_val to
2227 * be set to 0. This ensures that a sequence of calls to this function
2228 * preserve the previous value of *retval on successful delete.
2231 void i40e_aqc_del_filters(struct i40e_vsi *vsi, const char *vsi_name,
2232 struct i40e_aqc_remove_macvlan_element_data *list,
2233 int num_del, int *retval)
2235 struct i40e_hw *hw = &vsi->back->hw;
2236 enum i40e_admin_queue_err aq_status;
2239 aq_ret = i40e_aq_remove_macvlan_v2(hw, vsi->seid, list, num_del, NULL,
2242 /* Explicitly ignore and do not report when firmware returns ENOENT */
2243 if (aq_ret && !(aq_status == I40E_AQ_RC_ENOENT)) {
2245 dev_info(&vsi->back->pdev->dev,
2246 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
2247 vsi_name, i40e_stat_str(hw, aq_ret),
2248 i40e_aq_str(hw, aq_status));
2253 * i40e_aqc_add_filters - Request firmware to add a set of filters
2254 * @vsi: ptr to the VSI
2255 * @vsi_name: name to display in messages
2256 * @list: the list of filters to send to firmware
2257 * @add_head: Position in the add hlist
2258 * @num_add: the number of filters to add
2260 * Send a request to firmware via AdminQ to add a chunk of filters. Will set
2261 * __I40E_VSI_OVERFLOW_PROMISC bit in vsi->state if the firmware has run out of
2262 * space for more filters.
2265 void i40e_aqc_add_filters(struct i40e_vsi *vsi, const char *vsi_name,
2266 struct i40e_aqc_add_macvlan_element_data *list,
2267 struct i40e_new_mac_filter *add_head,
2270 struct i40e_hw *hw = &vsi->back->hw;
2271 enum i40e_admin_queue_err aq_status;
2274 i40e_aq_add_macvlan_v2(hw, vsi->seid, list, num_add, NULL, &aq_status);
2275 fcnt = i40e_update_filter_state(num_add, list, add_head);
2277 if (fcnt != num_add) {
2278 if (vsi->type == I40E_VSI_MAIN) {
2279 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2280 dev_warn(&vsi->back->pdev->dev,
2281 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2282 i40e_aq_str(hw, aq_status), vsi_name);
2283 } else if (vsi->type == I40E_VSI_SRIOV ||
2284 vsi->type == I40E_VSI_VMDQ1 ||
2285 vsi->type == I40E_VSI_VMDQ2) {
2286 dev_warn(&vsi->back->pdev->dev,
2287 "Error %s adding RX filters on %s, please set promiscuous on manually for %s\n",
2288 i40e_aq_str(hw, aq_status), vsi_name,
2291 dev_warn(&vsi->back->pdev->dev,
2292 "Error %s adding RX filters on %s, incorrect VSI type: %i.\n",
2293 i40e_aq_str(hw, aq_status), vsi_name,
2300 * i40e_aqc_broadcast_filter - Set promiscuous broadcast flags
2301 * @vsi: pointer to the VSI
2302 * @vsi_name: the VSI name
2305 * This function sets or clears the promiscuous broadcast flags for VLAN
2306 * filters in order to properly receive broadcast frames. Assumes that only
2307 * broadcast filters are passed.
2309 * Returns status indicating success or failure;
2312 i40e_aqc_broadcast_filter(struct i40e_vsi *vsi, const char *vsi_name,
2313 struct i40e_mac_filter *f)
2315 bool enable = f->state == I40E_FILTER_NEW;
2316 struct i40e_hw *hw = &vsi->back->hw;
2319 if (f->vlan == I40E_VLAN_ANY) {
2320 aq_ret = i40e_aq_set_vsi_broadcast(hw,
2325 aq_ret = i40e_aq_set_vsi_bc_promisc_on_vlan(hw,
2333 set_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2334 dev_warn(&vsi->back->pdev->dev,
2335 "Error %s, forcing overflow promiscuous on %s\n",
2336 i40e_aq_str(hw, hw->aq.asq_last_status),
2344 * i40e_set_promiscuous - set promiscuous mode
2345 * @pf: board private structure
2346 * @promisc: promisc on or off
2348 * There are different ways of setting promiscuous mode on a PF depending on
2349 * what state/environment we're in. This identifies and sets it appropriately.
2350 * Returns 0 on success.
2352 static int i40e_set_promiscuous(struct i40e_pf *pf, bool promisc)
2354 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
2355 struct i40e_hw *hw = &pf->hw;
2358 if (vsi->type == I40E_VSI_MAIN &&
2359 pf->lan_veb != I40E_NO_VEB &&
2360 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2361 /* set defport ON for Main VSI instead of true promisc
2362 * this way we will get all unicast/multicast and VLAN
2363 * promisc behavior but will not get VF or VMDq traffic
2364 * replicated on the Main VSI.
2367 aq_ret = i40e_aq_set_default_vsi(hw,
2371 aq_ret = i40e_aq_clear_default_vsi(hw,
2375 dev_info(&pf->pdev->dev,
2376 "Set default VSI failed, err %s, aq_err %s\n",
2377 i40e_stat_str(hw, aq_ret),
2378 i40e_aq_str(hw, hw->aq.asq_last_status));
2381 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2387 dev_info(&pf->pdev->dev,
2388 "set unicast promisc failed, err %s, aq_err %s\n",
2389 i40e_stat_str(hw, aq_ret),
2390 i40e_aq_str(hw, hw->aq.asq_last_status));
2392 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2397 dev_info(&pf->pdev->dev,
2398 "set multicast promisc failed, err %s, aq_err %s\n",
2399 i40e_stat_str(hw, aq_ret),
2400 i40e_aq_str(hw, hw->aq.asq_last_status));
2405 pf->cur_promisc = promisc;
2411 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
2412 * @vsi: ptr to the VSI
2414 * Push any outstanding VSI filter changes through the AdminQ.
2416 * Returns 0 or error value
2418 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
2420 struct hlist_head tmp_add_list, tmp_del_list;
2421 struct i40e_mac_filter *f;
2422 struct i40e_new_mac_filter *new, *add_head = NULL;
2423 struct i40e_hw *hw = &vsi->back->hw;
2424 bool old_overflow, new_overflow;
2425 unsigned int failed_filters = 0;
2426 unsigned int vlan_filters = 0;
2427 char vsi_name[16] = "PF";
2428 int filter_list_len = 0;
2429 i40e_status aq_ret = 0;
2430 u32 changed_flags = 0;
2431 struct hlist_node *h;
2440 /* empty array typed pointers, kcalloc later */
2441 struct i40e_aqc_add_macvlan_element_data *add_list;
2442 struct i40e_aqc_remove_macvlan_element_data *del_list;
2444 while (test_and_set_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state))
2445 usleep_range(1000, 2000);
2448 old_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2451 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
2452 vsi->current_netdev_flags = vsi->netdev->flags;
2455 INIT_HLIST_HEAD(&tmp_add_list);
2456 INIT_HLIST_HEAD(&tmp_del_list);
2458 if (vsi->type == I40E_VSI_SRIOV)
2459 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
2460 else if (vsi->type != I40E_VSI_MAIN)
2461 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
2463 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
2464 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
2466 spin_lock_bh(&vsi->mac_filter_hash_lock);
2467 /* Create a list of filters to delete. */
2468 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2469 if (f->state == I40E_FILTER_REMOVE) {
2470 /* Move the element into temporary del_list */
2471 hash_del(&f->hlist);
2472 hlist_add_head(&f->hlist, &tmp_del_list);
2474 /* Avoid counting removed filters */
2477 if (f->state == I40E_FILTER_NEW) {
2478 /* Create a temporary i40e_new_mac_filter */
2479 new = kzalloc(sizeof(*new), GFP_ATOMIC);
2481 goto err_no_memory_locked;
2483 /* Store pointer to the real filter */
2485 new->state = f->state;
2487 /* Add it to the hash list */
2488 hlist_add_head(&new->hlist, &tmp_add_list);
2491 /* Count the number of active (current and new) VLAN
2492 * filters we have now. Does not count filters which
2493 * are marked for deletion.
2499 retval = i40e_correct_mac_vlan_filters(vsi,
2504 hlist_for_each_entry(new, &tmp_add_list, hlist)
2505 netdev_hw_addr_refcnt(new->f, vsi->netdev, 1);
2508 goto err_no_memory_locked;
2510 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2513 /* Now process 'del_list' outside the lock */
2514 if (!hlist_empty(&tmp_del_list)) {
2515 filter_list_len = hw->aq.asq_buf_size /
2516 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2517 list_size = filter_list_len *
2518 sizeof(struct i40e_aqc_remove_macvlan_element_data);
2519 del_list = kzalloc(list_size, GFP_ATOMIC);
2523 hlist_for_each_entry_safe(f, h, &tmp_del_list, hlist) {
2526 /* handle broadcast filters by updating the broadcast
2527 * promiscuous flag and release filter list.
2529 if (is_broadcast_ether_addr(f->macaddr)) {
2530 i40e_aqc_broadcast_filter(vsi, vsi_name, f);
2532 hlist_del(&f->hlist);
2537 /* add to delete list */
2538 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
2539 if (f->vlan == I40E_VLAN_ANY) {
2540 del_list[num_del].vlan_tag = 0;
2541 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
2543 del_list[num_del].vlan_tag =
2544 cpu_to_le16((u16)(f->vlan));
2547 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
2548 del_list[num_del].flags = cmd_flags;
2551 /* flush a full buffer */
2552 if (num_del == filter_list_len) {
2553 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2555 memset(del_list, 0, list_size);
2558 /* Release memory for MAC filter entries which were
2559 * synced up with HW.
2561 hlist_del(&f->hlist);
2566 i40e_aqc_del_filters(vsi, vsi_name, del_list,
2574 if (!hlist_empty(&tmp_add_list)) {
2575 /* Do all the adds now. */
2576 filter_list_len = hw->aq.asq_buf_size /
2577 sizeof(struct i40e_aqc_add_macvlan_element_data);
2578 list_size = filter_list_len *
2579 sizeof(struct i40e_aqc_add_macvlan_element_data);
2580 add_list = kzalloc(list_size, GFP_ATOMIC);
2585 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2586 /* handle broadcast filters by updating the broadcast
2587 * promiscuous flag instead of adding a MAC filter.
2589 if (is_broadcast_ether_addr(new->f->macaddr)) {
2590 if (i40e_aqc_broadcast_filter(vsi, vsi_name,
2592 new->state = I40E_FILTER_FAILED;
2594 new->state = I40E_FILTER_ACTIVE;
2598 /* add to add array */
2602 ether_addr_copy(add_list[num_add].mac_addr,
2604 if (new->f->vlan == I40E_VLAN_ANY) {
2605 add_list[num_add].vlan_tag = 0;
2606 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
2608 add_list[num_add].vlan_tag =
2609 cpu_to_le16((u16)(new->f->vlan));
2611 add_list[num_add].queue_number = 0;
2612 /* set invalid match method for later detection */
2613 add_list[num_add].match_method = I40E_AQC_MM_ERR_NO_RES;
2614 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2615 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2618 /* flush a full buffer */
2619 if (num_add == filter_list_len) {
2620 i40e_aqc_add_filters(vsi, vsi_name, add_list,
2622 memset(add_list, 0, list_size);
2627 i40e_aqc_add_filters(vsi, vsi_name, add_list, add_head,
2630 /* Now move all of the filters from the temp add list back to
2633 spin_lock_bh(&vsi->mac_filter_hash_lock);
2634 hlist_for_each_entry_safe(new, h, &tmp_add_list, hlist) {
2635 /* Only update the state if we're still NEW */
2636 if (new->f->state == I40E_FILTER_NEW)
2637 new->f->state = new->state;
2638 hlist_del(&new->hlist);
2639 netdev_hw_addr_refcnt(new->f, vsi->netdev, -1);
2642 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2647 /* Determine the number of active and failed filters. */
2648 spin_lock_bh(&vsi->mac_filter_hash_lock);
2649 vsi->active_filters = 0;
2650 hash_for_each(vsi->mac_filter_hash, bkt, f, hlist) {
2651 if (f->state == I40E_FILTER_ACTIVE)
2652 vsi->active_filters++;
2653 else if (f->state == I40E_FILTER_FAILED)
2656 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2658 /* Check if we are able to exit overflow promiscuous mode. We can
2659 * safely exit if we didn't just enter, we no longer have any failed
2660 * filters, and we have reduced filters below the threshold value.
2662 if (old_overflow && !failed_filters &&
2663 vsi->active_filters < vsi->promisc_threshold) {
2664 dev_info(&pf->pdev->dev,
2665 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2667 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2668 vsi->promisc_threshold = 0;
2671 /* if the VF is not trusted do not do promisc */
2672 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2673 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2677 new_overflow = test_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
2679 /* If we are entering overflow promiscuous, we need to calculate a new
2680 * threshold for when we are safe to exit
2682 if (!old_overflow && new_overflow)
2683 vsi->promisc_threshold = (vsi->active_filters * 3) / 4;
2685 /* check for changes in promiscuous modes */
2686 if (changed_flags & IFF_ALLMULTI) {
2687 bool cur_multipromisc;
2689 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2690 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2695 retval = i40e_aq_rc_to_posix(aq_ret,
2696 hw->aq.asq_last_status);
2697 dev_info(&pf->pdev->dev,
2698 "set multi promisc failed on %s, err %s aq_err %s\n",
2700 i40e_stat_str(hw, aq_ret),
2701 i40e_aq_str(hw, hw->aq.asq_last_status));
2703 dev_info(&pf->pdev->dev, "%s allmulti mode.\n",
2704 cur_multipromisc ? "entering" : "leaving");
2708 if ((changed_flags & IFF_PROMISC) || old_overflow != new_overflow) {
2711 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2713 aq_ret = i40e_set_promiscuous(pf, cur_promisc);
2715 retval = i40e_aq_rc_to_posix(aq_ret,
2716 hw->aq.asq_last_status);
2717 dev_info(&pf->pdev->dev,
2718 "Setting promiscuous %s failed on %s, err %s aq_err %s\n",
2719 cur_promisc ? "on" : "off",
2721 i40e_stat_str(hw, aq_ret),
2722 i40e_aq_str(hw, hw->aq.asq_last_status));
2726 /* if something went wrong then set the changed flag so we try again */
2728 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2730 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2734 /* Restore elements on the temporary add and delete lists */
2735 spin_lock_bh(&vsi->mac_filter_hash_lock);
2736 err_no_memory_locked:
2737 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
2738 i40e_undo_add_filter_entries(vsi, &tmp_add_list);
2739 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2741 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2742 clear_bit(__I40E_VSI_SYNCING_FILTERS, vsi->state);
2747 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2748 * @pf: board private structure
2750 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2756 if (!test_and_clear_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state))
2758 if (test_bit(__I40E_VF_DISABLE, pf->state)) {
2759 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
2763 for (v = 0; v < pf->num_alloc_vsi; v++) {
2765 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED) &&
2766 !test_bit(__I40E_VSI_RELEASING, pf->vsi[v]->state)) {
2767 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2770 /* come back and try again later */
2771 set_bit(__I40E_MACVLAN_SYNC_PENDING,
2780 * i40e_max_xdp_frame_size - returns the maximum allowed frame size for XDP
2783 static int i40e_max_xdp_frame_size(struct i40e_vsi *vsi)
2785 if (PAGE_SIZE >= 8192 || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
2786 return I40E_RXBUFFER_2048;
2788 return I40E_RXBUFFER_3072;
2792 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2793 * @netdev: network interface device structure
2794 * @new_mtu: new value for maximum frame size
2796 * Returns 0 on success, negative on failure
2798 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2800 struct i40e_netdev_priv *np = netdev_priv(netdev);
2801 struct i40e_vsi *vsi = np->vsi;
2802 struct i40e_pf *pf = vsi->back;
2804 if (i40e_enabled_xdp_vsi(vsi)) {
2805 int frame_size = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
2807 if (frame_size > i40e_max_xdp_frame_size(vsi))
2811 netdev_dbg(netdev, "changing MTU from %d to %d\n",
2812 netdev->mtu, new_mtu);
2813 netdev->mtu = new_mtu;
2814 if (netif_running(netdev))
2815 i40e_vsi_reinit_locked(vsi);
2816 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
2817 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
2822 * i40e_ioctl - Access the hwtstamp interface
2823 * @netdev: network interface device structure
2824 * @ifr: interface request data
2825 * @cmd: ioctl command
2827 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2829 struct i40e_netdev_priv *np = netdev_priv(netdev);
2830 struct i40e_pf *pf = np->vsi->back;
2834 return i40e_ptp_get_ts_config(pf, ifr);
2836 return i40e_ptp_set_ts_config(pf, ifr);
2843 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2844 * @vsi: the vsi being adjusted
2846 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2848 struct i40e_vsi_context ctxt;
2851 /* Don't modify stripping options if a port VLAN is active */
2855 if ((vsi->info.valid_sections &
2856 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2857 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2858 return; /* already enabled */
2860 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2861 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2862 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2864 ctxt.seid = vsi->seid;
2865 ctxt.info = vsi->info;
2866 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2868 dev_info(&vsi->back->pdev->dev,
2869 "update vlan stripping failed, err %s aq_err %s\n",
2870 i40e_stat_str(&vsi->back->hw, ret),
2871 i40e_aq_str(&vsi->back->hw,
2872 vsi->back->hw.aq.asq_last_status));
2877 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2878 * @vsi: the vsi being adjusted
2880 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2882 struct i40e_vsi_context ctxt;
2885 /* Don't modify stripping options if a port VLAN is active */
2889 if ((vsi->info.valid_sections &
2890 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2891 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2892 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2893 return; /* already disabled */
2895 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2896 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2897 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2899 ctxt.seid = vsi->seid;
2900 ctxt.info = vsi->info;
2901 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2903 dev_info(&vsi->back->pdev->dev,
2904 "update vlan stripping failed, err %s aq_err %s\n",
2905 i40e_stat_str(&vsi->back->hw, ret),
2906 i40e_aq_str(&vsi->back->hw,
2907 vsi->back->hw.aq.asq_last_status));
2912 * i40e_add_vlan_all_mac - Add a MAC/VLAN filter for each existing MAC address
2913 * @vsi: the vsi being configured
2914 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2916 * This is a helper function for adding a new MAC/VLAN filter with the
2917 * specified VLAN for each existing MAC address already in the hash table.
2918 * This function does *not* perform any accounting to update filters based on
2921 * NOTE: this function expects to be called while under the
2922 * mac_filter_hash_lock
2924 int i40e_add_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2926 struct i40e_mac_filter *f, *add_f;
2927 struct hlist_node *h;
2930 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
2931 if (f->state == I40E_FILTER_REMOVE)
2933 add_f = i40e_add_filter(vsi, f->macaddr, vid);
2935 dev_info(&vsi->back->pdev->dev,
2936 "Could not add vlan filter %d for %pM\n",
2946 * i40e_vsi_add_vlan - Add VSI membership for given VLAN
2947 * @vsi: the VSI being configured
2948 * @vid: VLAN id to be added
2950 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, u16 vid)
2957 /* The network stack will attempt to add VID=0, with the intention to
2958 * receive priority tagged packets with a VLAN of 0. Our HW receives
2959 * these packets by default when configured to receive untagged
2960 * packets, so we don't need to add a filter for this case.
2961 * Additionally, HW interprets adding a VID=0 filter as meaning to
2962 * receive *only* tagged traffic and stops receiving untagged traffic.
2963 * Thus, we do not want to actually add a filter for VID=0
2968 /* Locked once because all functions invoked below iterates list*/
2969 spin_lock_bh(&vsi->mac_filter_hash_lock);
2970 err = i40e_add_vlan_all_mac(vsi, vid);
2971 spin_unlock_bh(&vsi->mac_filter_hash_lock);
2975 /* schedule our worker thread which will take care of
2976 * applying the new filter changes
2978 i40e_service_event_schedule(vsi->back);
2983 * i40e_rm_vlan_all_mac - Remove MAC/VLAN pair for all MAC with the given VLAN
2984 * @vsi: the vsi being configured
2985 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2987 * This function should be used to remove all VLAN filters which match the
2988 * given VID. It does not schedule the service event and does not take the
2989 * mac_filter_hash_lock so it may be combined with other operations under
2990 * a single invocation of the mac_filter_hash_lock.
2992 * NOTE: this function expects to be called while under the
2993 * mac_filter_hash_lock
2995 void i40e_rm_vlan_all_mac(struct i40e_vsi *vsi, s16 vid)
2997 struct i40e_mac_filter *f;
2998 struct hlist_node *h;
3001 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
3003 __i40e_del_filter(vsi, f);
3008 * i40e_vsi_kill_vlan - Remove VSI membership for given VLAN
3009 * @vsi: the VSI being configured
3010 * @vid: VLAN id to be removed
3012 void i40e_vsi_kill_vlan(struct i40e_vsi *vsi, u16 vid)
3014 if (!vid || vsi->info.pvid)
3017 spin_lock_bh(&vsi->mac_filter_hash_lock);
3018 i40e_rm_vlan_all_mac(vsi, vid);
3019 spin_unlock_bh(&vsi->mac_filter_hash_lock);
3021 /* schedule our worker thread which will take care of
3022 * applying the new filter changes
3024 i40e_service_event_schedule(vsi->back);
3028 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
3029 * @netdev: network interface to be adjusted
3030 * @proto: unused protocol value
3031 * @vid: vlan id to be added
3033 * net_device_ops implementation for adding vlan ids
3035 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
3036 __always_unused __be16 proto, u16 vid)
3038 struct i40e_netdev_priv *np = netdev_priv(netdev);
3039 struct i40e_vsi *vsi = np->vsi;
3042 if (vid >= VLAN_N_VID)
3045 ret = i40e_vsi_add_vlan(vsi, vid);
3047 set_bit(vid, vsi->active_vlans);
3053 * i40e_vlan_rx_add_vid_up - Add a vlan id filter to HW offload in UP path
3054 * @netdev: network interface to be adjusted
3055 * @proto: unused protocol value
3056 * @vid: vlan id to be added
3058 static void i40e_vlan_rx_add_vid_up(struct net_device *netdev,
3059 __always_unused __be16 proto, u16 vid)
3061 struct i40e_netdev_priv *np = netdev_priv(netdev);
3062 struct i40e_vsi *vsi = np->vsi;
3064 if (vid >= VLAN_N_VID)
3066 set_bit(vid, vsi->active_vlans);
3070 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
3071 * @netdev: network interface to be adjusted
3072 * @proto: unused protocol value
3073 * @vid: vlan id to be removed
3075 * net_device_ops implementation for removing vlan ids
3077 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
3078 __always_unused __be16 proto, u16 vid)
3080 struct i40e_netdev_priv *np = netdev_priv(netdev);
3081 struct i40e_vsi *vsi = np->vsi;
3083 /* return code is ignored as there is nothing a user
3084 * can do about failure to remove and a log message was
3085 * already printed from the other function
3087 i40e_vsi_kill_vlan(vsi, vid);
3089 clear_bit(vid, vsi->active_vlans);
3095 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
3096 * @vsi: the vsi being brought back up
3098 static void i40e_restore_vlan(struct i40e_vsi *vsi)
3105 if (vsi->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3106 i40e_vlan_stripping_enable(vsi);
3108 i40e_vlan_stripping_disable(vsi);
3110 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
3111 i40e_vlan_rx_add_vid_up(vsi->netdev, htons(ETH_P_8021Q),
3116 * i40e_vsi_add_pvid - Add pvid for the VSI
3117 * @vsi: the vsi being adjusted
3118 * @vid: the vlan id to set as a PVID
3120 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
3122 struct i40e_vsi_context ctxt;
3125 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
3126 vsi->info.pvid = cpu_to_le16(vid);
3127 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
3128 I40E_AQ_VSI_PVLAN_INSERT_PVID |
3129 I40E_AQ_VSI_PVLAN_EMOD_STR;
3131 ctxt.seid = vsi->seid;
3132 ctxt.info = vsi->info;
3133 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
3135 dev_info(&vsi->back->pdev->dev,
3136 "add pvid failed, err %s aq_err %s\n",
3137 i40e_stat_str(&vsi->back->hw, ret),
3138 i40e_aq_str(&vsi->back->hw,
3139 vsi->back->hw.aq.asq_last_status));
3147 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
3148 * @vsi: the vsi being adjusted
3150 * Just use the vlan_rx_register() service to put it back to normal
3152 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
3156 i40e_vlan_stripping_disable(vsi);
3160 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
3161 * @vsi: ptr to the VSI
3163 * If this function returns with an error, then it's possible one or
3164 * more of the rings is populated (while the rest are not). It is the
3165 * callers duty to clean those orphaned rings.
3167 * Return 0 on success, negative on failure
3169 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
3173 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3174 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
3176 if (!i40e_enabled_xdp_vsi(vsi))
3179 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3180 err = i40e_setup_tx_descriptors(vsi->xdp_rings[i]);
3186 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
3187 * @vsi: ptr to the VSI
3189 * Free VSI's transmit software resources
3191 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
3195 if (vsi->tx_rings) {
3196 for (i = 0; i < vsi->num_queue_pairs; i++)
3197 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
3198 i40e_free_tx_resources(vsi->tx_rings[i]);
3201 if (vsi->xdp_rings) {
3202 for (i = 0; i < vsi->num_queue_pairs; i++)
3203 if (vsi->xdp_rings[i] && vsi->xdp_rings[i]->desc)
3204 i40e_free_tx_resources(vsi->xdp_rings[i]);
3209 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
3210 * @vsi: ptr to the VSI
3212 * If this function returns with an error, then it's possible one or
3213 * more of the rings is populated (while the rest are not). It is the
3214 * callers duty to clean those orphaned rings.
3216 * Return 0 on success, negative on failure
3218 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
3222 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3223 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
3228 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
3229 * @vsi: ptr to the VSI
3231 * Free all receive software resources
3233 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
3240 for (i = 0; i < vsi->num_queue_pairs; i++)
3241 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
3242 i40e_free_rx_resources(vsi->rx_rings[i]);
3246 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
3247 * @ring: The Tx ring to configure
3249 * This enables/disables XPS for a given Tx descriptor ring
3250 * based on the TCs enabled for the VSI that ring belongs to.
3252 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
3256 if (!ring->q_vector || !ring->netdev || ring->ch)
3259 /* We only initialize XPS once, so as not to overwrite user settings */
3260 if (test_and_set_bit(__I40E_TX_XPS_INIT_DONE, ring->state))
3263 cpu = cpumask_local_spread(ring->q_vector->v_idx, -1);
3264 netif_set_xps_queue(ring->netdev, get_cpu_mask(cpu),
3269 * i40e_xsk_pool - Retrieve the AF_XDP buffer pool if XDP and ZC is enabled
3270 * @ring: The Tx or Rx ring
3272 * Returns the AF_XDP buffer pool or NULL.
3274 static struct xsk_buff_pool *i40e_xsk_pool(struct i40e_ring *ring)
3276 bool xdp_on = i40e_enabled_xdp_vsi(ring->vsi);
3277 int qid = ring->queue_index;
3279 if (ring_is_xdp(ring))
3280 qid -= ring->vsi->alloc_queue_pairs;
3282 if (!xdp_on || !test_bit(qid, ring->vsi->af_xdp_zc_qps))
3285 return xsk_get_pool_from_qid(ring->vsi->netdev, qid);
3289 * i40e_configure_tx_ring - Configure a transmit ring context and rest
3290 * @ring: The Tx ring to configure
3292 * Configure the Tx descriptor ring in the HMC context.
3294 static int i40e_configure_tx_ring(struct i40e_ring *ring)
3296 struct i40e_vsi *vsi = ring->vsi;
3297 u16 pf_q = vsi->base_queue + ring->queue_index;
3298 struct i40e_hw *hw = &vsi->back->hw;
3299 struct i40e_hmc_obj_txq tx_ctx;
3300 i40e_status err = 0;
3303 if (ring_is_xdp(ring))
3304 ring->xsk_pool = i40e_xsk_pool(ring);
3306 /* some ATR related tx ring init */
3307 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
3308 ring->atr_sample_rate = vsi->back->atr_sample_rate;
3309 ring->atr_count = 0;
3311 ring->atr_sample_rate = 0;
3315 i40e_config_xps_tx_ring(ring);
3317 /* clear the context structure first */
3318 memset(&tx_ctx, 0, sizeof(tx_ctx));
3320 tx_ctx.new_context = 1;
3321 tx_ctx.base = (ring->dma / 128);
3322 tx_ctx.qlen = ring->count;
3323 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
3324 I40E_FLAG_FD_ATR_ENABLED));
3325 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
3326 /* FDIR VSI tx ring can still use RS bit and writebacks */
3327 if (vsi->type != I40E_VSI_FDIR)
3328 tx_ctx.head_wb_ena = 1;
3329 tx_ctx.head_wb_addr = ring->dma +
3330 (ring->count * sizeof(struct i40e_tx_desc));
3332 /* As part of VSI creation/update, FW allocates certain
3333 * Tx arbitration queue sets for each TC enabled for
3334 * the VSI. The FW returns the handles to these queue
3335 * sets as part of the response buffer to Add VSI,
3336 * Update VSI, etc. AQ commands. It is expected that
3337 * these queue set handles be associated with the Tx
3338 * queues by the driver as part of the TX queue context
3339 * initialization. This has to be done regardless of
3340 * DCB as by default everything is mapped to TC0.
3345 le16_to_cpu(ring->ch->info.qs_handle[ring->dcb_tc]);
3348 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
3350 tx_ctx.rdylist_act = 0;
3352 /* clear the context in the HMC */
3353 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
3355 dev_info(&vsi->back->pdev->dev,
3356 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
3357 ring->queue_index, pf_q, err);
3361 /* set the context in the HMC */
3362 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
3364 dev_info(&vsi->back->pdev->dev,
3365 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
3366 ring->queue_index, pf_q, err);
3370 /* Now associate this queue with this PCI function */
3372 if (ring->ch->type == I40E_VSI_VMDQ2)
3373 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3377 qtx_ctl |= (ring->ch->vsi_number <<
3378 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3379 I40E_QTX_CTL_VFVM_INDX_MASK;
3381 if (vsi->type == I40E_VSI_VMDQ2) {
3382 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
3383 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
3384 I40E_QTX_CTL_VFVM_INDX_MASK;
3386 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
3390 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
3391 I40E_QTX_CTL_PF_INDX_MASK);
3392 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
3395 /* cache tail off for easier writes later */
3396 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
3402 * i40e_rx_offset - Return expected offset into page to access data
3403 * @rx_ring: Ring we are requesting offset of
3405 * Returns the offset value for ring into the data buffer.
3407 static unsigned int i40e_rx_offset(struct i40e_ring *rx_ring)
3409 return ring_uses_build_skb(rx_ring) ? I40E_SKB_PAD : 0;
3413 * i40e_configure_rx_ring - Configure a receive ring context
3414 * @ring: The Rx ring to configure
3416 * Configure the Rx descriptor ring in the HMC context.
3418 static int i40e_configure_rx_ring(struct i40e_ring *ring)
3420 struct i40e_vsi *vsi = ring->vsi;
3421 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
3422 u16 pf_q = vsi->base_queue + ring->queue_index;
3423 struct i40e_hw *hw = &vsi->back->hw;
3424 struct i40e_hmc_obj_rxq rx_ctx;
3425 i40e_status err = 0;
3429 bitmap_zero(ring->state, __I40E_RING_STATE_NBITS);
3431 /* clear the context structure first */
3432 memset(&rx_ctx, 0, sizeof(rx_ctx));
3434 if (ring->vsi->type == I40E_VSI_MAIN)
3435 xdp_rxq_info_unreg_mem_model(&ring->xdp_rxq);
3438 ring->xsk_pool = i40e_xsk_pool(ring);
3439 if (ring->xsk_pool) {
3440 ret = i40e_alloc_rx_bi_zc(ring);
3444 xsk_pool_get_rx_frame_size(ring->xsk_pool);
3445 /* For AF_XDP ZC, we disallow packets to span on
3446 * multiple buffers, thus letting us skip that
3447 * handling in the fast-path.
3450 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3451 MEM_TYPE_XSK_BUFF_POOL,
3455 dev_info(&vsi->back->pdev->dev,
3456 "Registered XDP mem model MEM_TYPE_XSK_BUFF_POOL on Rx ring %d\n",
3460 ret = i40e_alloc_rx_bi(ring);
3463 ring->rx_buf_len = vsi->rx_buf_len;
3464 if (ring->vsi->type == I40E_VSI_MAIN) {
3465 ret = xdp_rxq_info_reg_mem_model(&ring->xdp_rxq,
3466 MEM_TYPE_PAGE_SHARED,
3473 rx_ctx.dbuff = DIV_ROUND_UP(ring->rx_buf_len,
3474 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3476 rx_ctx.base = (ring->dma / 128);
3477 rx_ctx.qlen = ring->count;
3479 /* use 16 byte descriptors */
3482 /* descriptor type is always zero
3485 rx_ctx.hsplit_0 = 0;
3487 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
3488 if (hw->revision_id == 0)
3489 rx_ctx.lrxqthresh = 0;
3491 rx_ctx.lrxqthresh = 1;
3492 rx_ctx.crcstrip = 1;
3494 /* this controls whether VLAN is stripped from inner headers */
3496 /* set the prefena field to 1 because the manual says to */
3499 /* clear the context in the HMC */
3500 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
3502 dev_info(&vsi->back->pdev->dev,
3503 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3504 ring->queue_index, pf_q, err);
3508 /* set the context in the HMC */
3509 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
3511 dev_info(&vsi->back->pdev->dev,
3512 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
3513 ring->queue_index, pf_q, err);
3517 /* configure Rx buffer alignment */
3518 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX))
3519 clear_ring_build_skb_enabled(ring);
3521 set_ring_build_skb_enabled(ring);
3523 ring->rx_offset = i40e_rx_offset(ring);
3525 /* cache tail for quicker writes, and clear the reg before use */
3526 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
3527 writel(0, ring->tail);
3529 if (ring->xsk_pool) {
3530 xsk_pool_set_rxq_info(ring->xsk_pool, &ring->xdp_rxq);
3531 ok = i40e_alloc_rx_buffers_zc(ring, I40E_DESC_UNUSED(ring));
3533 ok = !i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
3536 /* Log this in case the user has forgotten to give the kernel
3537 * any buffers, even later in the application.
3539 dev_info(&vsi->back->pdev->dev,
3540 "Failed to allocate some buffers on %sRx ring %d (pf_q %d)\n",
3541 ring->xsk_pool ? "AF_XDP ZC enabled " : "",
3542 ring->queue_index, pf_q);
3549 * i40e_vsi_configure_tx - Configure the VSI for Tx
3550 * @vsi: VSI structure describing this set of rings and resources
3552 * Configure the Tx VSI for operation.
3554 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
3559 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3560 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
3562 if (err || !i40e_enabled_xdp_vsi(vsi))
3565 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
3566 err = i40e_configure_tx_ring(vsi->xdp_rings[i]);
3572 * i40e_vsi_configure_rx - Configure the VSI for Rx
3573 * @vsi: the VSI being configured
3575 * Configure the Rx VSI for operation.
3577 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
3582 if (!vsi->netdev || (vsi->back->flags & I40E_FLAG_LEGACY_RX)) {
3583 vsi->max_frame = I40E_MAX_RXBUFFER;
3584 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3585 #if (PAGE_SIZE < 8192)
3586 } else if (!I40E_2K_TOO_SMALL_WITH_PADDING &&
3587 (vsi->netdev->mtu <= ETH_DATA_LEN)) {
3588 vsi->max_frame = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3589 vsi->rx_buf_len = I40E_RXBUFFER_1536 - NET_IP_ALIGN;
3592 vsi->max_frame = I40E_MAX_RXBUFFER;
3593 vsi->rx_buf_len = (PAGE_SIZE < 8192) ? I40E_RXBUFFER_3072 :
3597 /* set up individual rings */
3598 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3599 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3605 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3606 * @vsi: ptr to the VSI
3608 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3610 struct i40e_ring *tx_ring, *rx_ring;
3611 u16 qoffset, qcount;
3614 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3615 /* Reset the TC information */
3616 for (i = 0; i < vsi->num_queue_pairs; i++) {
3617 rx_ring = vsi->rx_rings[i];
3618 tx_ring = vsi->tx_rings[i];
3619 rx_ring->dcb_tc = 0;
3620 tx_ring->dcb_tc = 0;
3625 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3626 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3629 qoffset = vsi->tc_config.tc_info[n].qoffset;
3630 qcount = vsi->tc_config.tc_info[n].qcount;
3631 for (i = qoffset; i < (qoffset + qcount); i++) {
3632 rx_ring = vsi->rx_rings[i];
3633 tx_ring = vsi->tx_rings[i];
3634 rx_ring->dcb_tc = n;
3635 tx_ring->dcb_tc = n;
3641 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3642 * @vsi: ptr to the VSI
3644 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3647 i40e_set_rx_mode(vsi->netdev);
3651 * i40e_reset_fdir_filter_cnt - Reset flow director filter counters
3652 * @pf: Pointer to the targeted PF
3654 * Set all flow director counters to 0.
3656 static void i40e_reset_fdir_filter_cnt(struct i40e_pf *pf)
3658 pf->fd_tcp4_filter_cnt = 0;
3659 pf->fd_udp4_filter_cnt = 0;
3660 pf->fd_sctp4_filter_cnt = 0;
3661 pf->fd_ip4_filter_cnt = 0;
3662 pf->fd_tcp6_filter_cnt = 0;
3663 pf->fd_udp6_filter_cnt = 0;
3664 pf->fd_sctp6_filter_cnt = 0;
3665 pf->fd_ip6_filter_cnt = 0;
3669 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3670 * @vsi: Pointer to the targeted VSI
3672 * This function replays the hlist on the hw where all the SB Flow Director
3673 * filters were saved.
3675 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3677 struct i40e_fdir_filter *filter;
3678 struct i40e_pf *pf = vsi->back;
3679 struct hlist_node *node;
3681 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3684 /* Reset FDir counters as we're replaying all existing filters */
3685 i40e_reset_fdir_filter_cnt(pf);
3687 hlist_for_each_entry_safe(filter, node,
3688 &pf->fdir_filter_list, fdir_node) {
3689 i40e_add_del_fdir(vsi, filter, true);
3694 * i40e_vsi_configure - Set up the VSI for action
3695 * @vsi: the VSI being configured
3697 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3701 i40e_set_vsi_rx_mode(vsi);
3702 i40e_restore_vlan(vsi);
3703 i40e_vsi_config_dcb_rings(vsi);
3704 err = i40e_vsi_configure_tx(vsi);
3706 err = i40e_vsi_configure_rx(vsi);
3712 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3713 * @vsi: the VSI being configured
3715 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3717 bool has_xdp = i40e_enabled_xdp_vsi(vsi);
3718 struct i40e_pf *pf = vsi->back;
3719 struct i40e_hw *hw = &pf->hw;
3724 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3725 * and PFINT_LNKLSTn registers, e.g.:
3726 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3728 qp = vsi->base_queue;
3729 vector = vsi->base_vector;
3730 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3731 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3733 q_vector->rx.next_update = jiffies + 1;
3734 q_vector->rx.target_itr =
3735 ITR_TO_REG(vsi->rx_rings[i]->itr_setting);
3736 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3737 q_vector->rx.target_itr >> 1);
3738 q_vector->rx.current_itr = q_vector->rx.target_itr;
3740 q_vector->tx.next_update = jiffies + 1;
3741 q_vector->tx.target_itr =
3742 ITR_TO_REG(vsi->tx_rings[i]->itr_setting);
3743 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3744 q_vector->tx.target_itr >> 1);
3745 q_vector->tx.current_itr = q_vector->tx.target_itr;
3747 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3748 i40e_intrl_usec_to_reg(vsi->int_rate_limit));
3750 /* Linked list for the queuepairs assigned to this vector */
3751 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3752 for (q = 0; q < q_vector->num_ringpairs; q++) {
3753 u32 nextqp = has_xdp ? qp + vsi->alloc_queue_pairs : qp;
3756 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3757 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3758 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3759 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
3760 (I40E_QUEUE_TYPE_TX <<
3761 I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3763 wr32(hw, I40E_QINT_RQCTL(qp), val);
3766 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3767 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3768 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3769 (qp << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3770 (I40E_QUEUE_TYPE_TX <<
3771 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3773 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3776 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3777 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3778 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3779 ((qp + 1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT) |
3780 (I40E_QUEUE_TYPE_RX <<
3781 I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3783 /* Terminate the linked list */
3784 if (q == (q_vector->num_ringpairs - 1))
3785 val |= (I40E_QUEUE_END_OF_LIST <<
3786 I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3788 wr32(hw, I40E_QINT_TQCTL(qp), val);
3797 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3798 * @pf: pointer to private device data structure
3800 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3802 struct i40e_hw *hw = &pf->hw;
3805 /* clear things first */
3806 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3807 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3809 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3810 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3811 I40E_PFINT_ICR0_ENA_GRST_MASK |
3812 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3813 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3814 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3815 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3816 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3818 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3819 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3821 if (pf->flags & I40E_FLAG_PTP)
3822 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3824 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3826 /* SW_ITR_IDX = 0, but don't change INTENA */
3827 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3828 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3830 /* OTHER_ITR_IDX = 0 */
3831 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3835 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3836 * @vsi: the VSI being configured
3838 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3840 u32 nextqp = i40e_enabled_xdp_vsi(vsi) ? vsi->alloc_queue_pairs : 0;
3841 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3842 struct i40e_pf *pf = vsi->back;
3843 struct i40e_hw *hw = &pf->hw;
3846 /* set the ITR configuration */
3847 q_vector->rx.next_update = jiffies + 1;
3848 q_vector->rx.target_itr = ITR_TO_REG(vsi->rx_rings[0]->itr_setting);
3849 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.target_itr >> 1);
3850 q_vector->rx.current_itr = q_vector->rx.target_itr;
3851 q_vector->tx.next_update = jiffies + 1;
3852 q_vector->tx.target_itr = ITR_TO_REG(vsi->tx_rings[0]->itr_setting);
3853 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.target_itr >> 1);
3854 q_vector->tx.current_itr = q_vector->tx.target_itr;
3856 i40e_enable_misc_int_causes(pf);
3858 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3859 wr32(hw, I40E_PFINT_LNKLST0, 0);
3861 /* Associate the queue pair to the vector and enable the queue int */
3862 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3863 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3864 (nextqp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3865 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3867 wr32(hw, I40E_QINT_RQCTL(0), val);
3869 if (i40e_enabled_xdp_vsi(vsi)) {
3870 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3871 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT)|
3873 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3875 wr32(hw, I40E_QINT_TQCTL(nextqp), val);
3878 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3879 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3880 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3882 wr32(hw, I40E_QINT_TQCTL(0), val);
3887 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3888 * @pf: board private structure
3890 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3892 struct i40e_hw *hw = &pf->hw;
3894 wr32(hw, I40E_PFINT_DYN_CTL0,
3895 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3900 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3901 * @pf: board private structure
3903 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
3905 struct i40e_hw *hw = &pf->hw;
3908 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3909 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
3910 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3912 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3917 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3918 * @irq: interrupt number
3919 * @data: pointer to a q_vector
3921 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3923 struct i40e_q_vector *q_vector = data;
3925 if (!q_vector->tx.ring && !q_vector->rx.ring)
3928 napi_schedule_irqoff(&q_vector->napi);
3934 * i40e_irq_affinity_notify - Callback for affinity changes
3935 * @notify: context as to what irq was changed
3936 * @mask: the new affinity mask
3938 * This is a callback function used by the irq_set_affinity_notifier function
3939 * so that we may register to receive changes to the irq affinity masks.
3941 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3942 const cpumask_t *mask)
3944 struct i40e_q_vector *q_vector =
3945 container_of(notify, struct i40e_q_vector, affinity_notify);
3947 cpumask_copy(&q_vector->affinity_mask, mask);
3951 * i40e_irq_affinity_release - Callback for affinity notifier release
3952 * @ref: internal core kernel usage
3954 * This is a callback function used by the irq_set_affinity_notifier function
3955 * to inform the current notification subscriber that they will no longer
3956 * receive notifications.
3958 static void i40e_irq_affinity_release(struct kref *ref) {}
3961 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3962 * @vsi: the VSI being configured
3963 * @basename: name for the vector
3965 * Allocates MSI-X vectors and requests interrupts from the kernel.
3967 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3969 int q_vectors = vsi->num_q_vectors;
3970 struct i40e_pf *pf = vsi->back;
3971 int base = vsi->base_vector;
3978 for (vector = 0; vector < q_vectors; vector++) {
3979 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3981 irq_num = pf->msix_entries[base + vector].vector;
3983 if (q_vector->tx.ring && q_vector->rx.ring) {
3984 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3985 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3987 } else if (q_vector->rx.ring) {
3988 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3989 "%s-%s-%d", basename, "rx", rx_int_idx++);
3990 } else if (q_vector->tx.ring) {
3991 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3992 "%s-%s-%d", basename, "tx", tx_int_idx++);
3994 /* skip this unused q_vector */
3997 err = request_irq(irq_num,
4003 dev_info(&pf->pdev->dev,
4004 "MSIX request_irq failed, error: %d\n", err);
4005 goto free_queue_irqs;
4008 /* register for affinity change notifications */
4009 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
4010 q_vector->affinity_notify.release = i40e_irq_affinity_release;
4011 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
4012 /* Spread affinity hints out across online CPUs.
4014 * get_cpu_mask returns a static constant mask with
4015 * a permanent lifetime so it's ok to pass to
4016 * irq_update_affinity_hint without making a copy.
4018 cpu = cpumask_local_spread(q_vector->v_idx, -1);
4019 irq_update_affinity_hint(irq_num, get_cpu_mask(cpu));
4022 vsi->irqs_ready = true;
4028 irq_num = pf->msix_entries[base + vector].vector;
4029 irq_set_affinity_notifier(irq_num, NULL);
4030 irq_update_affinity_hint(irq_num, NULL);
4031 free_irq(irq_num, &vsi->q_vectors[vector]);
4037 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
4038 * @vsi: the VSI being un-configured
4040 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
4042 struct i40e_pf *pf = vsi->back;
4043 struct i40e_hw *hw = &pf->hw;
4044 int base = vsi->base_vector;
4047 /* disable interrupt causation from each queue */
4048 for (i = 0; i < vsi->num_queue_pairs; i++) {
4051 val = rd32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx));
4052 val &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
4053 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), val);
4055 val = rd32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx));
4056 val &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
4057 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), val);
4059 if (!i40e_enabled_xdp_vsi(vsi))
4061 wr32(hw, I40E_QINT_TQCTL(vsi->xdp_rings[i]->reg_idx), 0);
4064 /* disable each interrupt */
4065 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4066 for (i = vsi->base_vector;
4067 i < (vsi->num_q_vectors + vsi->base_vector); i++)
4068 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
4071 for (i = 0; i < vsi->num_q_vectors; i++)
4072 synchronize_irq(pf->msix_entries[i + base].vector);
4074 /* Legacy and MSI mode - this stops all interrupt handling */
4075 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
4076 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
4078 synchronize_irq(pf->pdev->irq);
4083 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
4084 * @vsi: the VSI being configured
4086 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
4088 struct i40e_pf *pf = vsi->back;
4091 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4092 for (i = 0; i < vsi->num_q_vectors; i++)
4093 i40e_irq_dynamic_enable(vsi, i);
4095 i40e_irq_dynamic_enable_icr0(pf);
4098 i40e_flush(&pf->hw);
4103 * i40e_free_misc_vector - Free the vector that handles non-queue events
4104 * @pf: board private structure
4106 static void i40e_free_misc_vector(struct i40e_pf *pf)
4109 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
4110 i40e_flush(&pf->hw);
4112 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4113 synchronize_irq(pf->msix_entries[0].vector);
4114 free_irq(pf->msix_entries[0].vector, pf);
4115 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
4120 * i40e_intr - MSI/Legacy and non-queue interrupt handler
4121 * @irq: interrupt number
4122 * @data: pointer to a q_vector
4124 * This is the handler used for all MSI/Legacy interrupts, and deals
4125 * with both queue and non-queue interrupts. This is also used in
4126 * MSIX mode to handle the non-queue interrupts.
4128 static irqreturn_t i40e_intr(int irq, void *data)
4130 struct i40e_pf *pf = (struct i40e_pf *)data;
4131 struct i40e_hw *hw = &pf->hw;
4132 irqreturn_t ret = IRQ_NONE;
4133 u32 icr0, icr0_remaining;
4136 icr0 = rd32(hw, I40E_PFINT_ICR0);
4137 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
4139 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
4140 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
4143 /* if interrupt but no bits showing, must be SWINT */
4144 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
4145 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
4148 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
4149 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
4150 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
4151 dev_dbg(&pf->pdev->dev, "cleared PE_CRITERR\n");
4152 set_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
4155 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
4156 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
4157 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
4158 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
4160 /* We do not have a way to disarm Queue causes while leaving
4161 * interrupt enabled for all other causes, ideally
4162 * interrupt should be disabled while we are in NAPI but
4163 * this is not a performance path and napi_schedule()
4164 * can deal with rescheduling.
4166 if (!test_bit(__I40E_DOWN, pf->state))
4167 napi_schedule_irqoff(&q_vector->napi);
4170 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
4171 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
4172 set_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
4173 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
4176 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
4177 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
4178 set_bit(__I40E_MDD_EVENT_PENDING, pf->state);
4181 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
4182 /* disable any further VFLR event notifications */
4183 if (test_bit(__I40E_VF_RESETS_DISABLED, pf->state)) {
4184 u32 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
4186 reg &= ~I40E_PFINT_ICR0_VFLR_MASK;
4187 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
4189 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
4190 set_bit(__I40E_VFLR_EVENT_PENDING, pf->state);
4194 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
4195 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
4196 set_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
4197 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
4198 val = rd32(hw, I40E_GLGEN_RSTAT);
4199 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
4200 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
4201 if (val == I40E_RESET_CORER) {
4203 } else if (val == I40E_RESET_GLOBR) {
4205 } else if (val == I40E_RESET_EMPR) {
4207 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state);
4211 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
4212 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
4213 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
4214 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
4215 rd32(hw, I40E_PFHMC_ERRORINFO),
4216 rd32(hw, I40E_PFHMC_ERRORDATA));
4219 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
4220 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
4222 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_EVENT0_MASK)
4223 schedule_work(&pf->ptp_extts0_work);
4225 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK)
4226 i40e_ptp_tx_hwtstamp(pf);
4228 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
4231 /* If a critical error is pending we have no choice but to reset the
4233 * Report and mask out any remaining unexpected interrupts.
4235 icr0_remaining = icr0 & ena_mask;
4236 if (icr0_remaining) {
4237 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
4239 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
4240 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
4241 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
4242 dev_info(&pf->pdev->dev, "device will be reset\n");
4243 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
4244 i40e_service_event_schedule(pf);
4246 ena_mask &= ~icr0_remaining;
4251 /* re-enable interrupt causes */
4252 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
4253 if (!test_bit(__I40E_DOWN, pf->state) ||
4254 test_bit(__I40E_RECOVERY_MODE, pf->state)) {
4255 i40e_service_event_schedule(pf);
4256 i40e_irq_dynamic_enable_icr0(pf);
4263 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
4264 * @tx_ring: tx ring to clean
4265 * @budget: how many cleans we're allowed
4267 * Returns true if there's any budget left (e.g. the clean is finished)
4269 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
4271 struct i40e_vsi *vsi = tx_ring->vsi;
4272 u16 i = tx_ring->next_to_clean;
4273 struct i40e_tx_buffer *tx_buf;
4274 struct i40e_tx_desc *tx_desc;
4276 tx_buf = &tx_ring->tx_bi[i];
4277 tx_desc = I40E_TX_DESC(tx_ring, i);
4278 i -= tx_ring->count;
4281 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
4283 /* if next_to_watch is not set then there is no work pending */
4287 /* prevent any other reads prior to eop_desc */
4290 /* if the descriptor isn't done, no work yet to do */
4291 if (!(eop_desc->cmd_type_offset_bsz &
4292 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
4295 /* clear next_to_watch to prevent false hangs */
4296 tx_buf->next_to_watch = NULL;
4298 tx_desc->buffer_addr = 0;
4299 tx_desc->cmd_type_offset_bsz = 0;
4300 /* move past filter desc */
4305 i -= tx_ring->count;
4306 tx_buf = tx_ring->tx_bi;
4307 tx_desc = I40E_TX_DESC(tx_ring, 0);
4309 /* unmap skb header data */
4310 dma_unmap_single(tx_ring->dev,
4311 dma_unmap_addr(tx_buf, dma),
4312 dma_unmap_len(tx_buf, len),
4314 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
4315 kfree(tx_buf->raw_buf);
4317 tx_buf->raw_buf = NULL;
4318 tx_buf->tx_flags = 0;
4319 tx_buf->next_to_watch = NULL;
4320 dma_unmap_len_set(tx_buf, len, 0);
4321 tx_desc->buffer_addr = 0;
4322 tx_desc->cmd_type_offset_bsz = 0;
4324 /* move us past the eop_desc for start of next FD desc */
4329 i -= tx_ring->count;
4330 tx_buf = tx_ring->tx_bi;
4331 tx_desc = I40E_TX_DESC(tx_ring, 0);
4334 /* update budget accounting */
4336 } while (likely(budget));
4338 i += tx_ring->count;
4339 tx_ring->next_to_clean = i;
4341 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
4342 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
4348 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
4349 * @irq: interrupt number
4350 * @data: pointer to a q_vector
4352 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
4354 struct i40e_q_vector *q_vector = data;
4355 struct i40e_vsi *vsi;
4357 if (!q_vector->tx.ring)
4360 vsi = q_vector->tx.ring->vsi;
4361 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
4367 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
4368 * @vsi: the VSI being configured
4369 * @v_idx: vector index
4370 * @qp_idx: queue pair index
4372 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
4374 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4375 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
4376 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
4378 tx_ring->q_vector = q_vector;
4379 tx_ring->next = q_vector->tx.ring;
4380 q_vector->tx.ring = tx_ring;
4381 q_vector->tx.count++;
4383 /* Place XDP Tx ring in the same q_vector ring list as regular Tx */
4384 if (i40e_enabled_xdp_vsi(vsi)) {
4385 struct i40e_ring *xdp_ring = vsi->xdp_rings[qp_idx];
4387 xdp_ring->q_vector = q_vector;
4388 xdp_ring->next = q_vector->tx.ring;
4389 q_vector->tx.ring = xdp_ring;
4390 q_vector->tx.count++;
4393 rx_ring->q_vector = q_vector;
4394 rx_ring->next = q_vector->rx.ring;
4395 q_vector->rx.ring = rx_ring;
4396 q_vector->rx.count++;
4400 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
4401 * @vsi: the VSI being configured
4403 * This function maps descriptor rings to the queue-specific vectors
4404 * we were allotted through the MSI-X enabling code. Ideally, we'd have
4405 * one vector per queue pair, but on a constrained vector budget, we
4406 * group the queue pairs as "efficiently" as possible.
4408 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
4410 int qp_remaining = vsi->num_queue_pairs;
4411 int q_vectors = vsi->num_q_vectors;
4416 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
4417 * group them so there are multiple queues per vector.
4418 * It is also important to go through all the vectors available to be
4419 * sure that if we don't use all the vectors, that the remaining vectors
4420 * are cleared. This is especially important when decreasing the
4421 * number of queues in use.
4423 for (; v_start < q_vectors; v_start++) {
4424 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
4426 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
4428 q_vector->num_ringpairs = num_ringpairs;
4429 q_vector->reg_idx = q_vector->v_idx + vsi->base_vector - 1;
4431 q_vector->rx.count = 0;
4432 q_vector->tx.count = 0;
4433 q_vector->rx.ring = NULL;
4434 q_vector->tx.ring = NULL;
4436 while (num_ringpairs--) {
4437 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
4445 * i40e_vsi_request_irq - Request IRQ from the OS
4446 * @vsi: the VSI being configured
4447 * @basename: name for the vector
4449 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
4451 struct i40e_pf *pf = vsi->back;
4454 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4455 err = i40e_vsi_request_irq_msix(vsi, basename);
4456 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
4457 err = request_irq(pf->pdev->irq, i40e_intr, 0,
4460 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
4464 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
4469 #ifdef CONFIG_NET_POLL_CONTROLLER
4471 * i40e_netpoll - A Polling 'interrupt' handler
4472 * @netdev: network interface device structure
4474 * This is used by netconsole to send skbs without having to re-enable
4475 * interrupts. It's not called while the normal interrupt routine is executing.
4477 static void i40e_netpoll(struct net_device *netdev)
4479 struct i40e_netdev_priv *np = netdev_priv(netdev);
4480 struct i40e_vsi *vsi = np->vsi;
4481 struct i40e_pf *pf = vsi->back;
4484 /* if interface is down do nothing */
4485 if (test_bit(__I40E_VSI_DOWN, vsi->state))
4488 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4489 for (i = 0; i < vsi->num_q_vectors; i++)
4490 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
4492 i40e_intr(pf->pdev->irq, netdev);
4497 #define I40E_QTX_ENA_WAIT_COUNT 50
4500 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
4501 * @pf: the PF being configured
4502 * @pf_q: the PF queue
4503 * @enable: enable or disable state of the queue
4505 * This routine will wait for the given Tx queue of the PF to reach the
4506 * enabled or disabled state.
4507 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4508 * multiple retries; else will return 0 in case of success.
4510 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4515 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4516 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
4517 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4520 usleep_range(10, 20);
4522 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4529 * i40e_control_tx_q - Start or stop a particular Tx queue
4530 * @pf: the PF structure
4531 * @pf_q: the PF queue to configure
4532 * @enable: start or stop the queue
4534 * This function enables or disables a single queue. Note that any delay
4535 * required after the operation is expected to be handled by the caller of
4538 static void i40e_control_tx_q(struct i40e_pf *pf, int pf_q, bool enable)
4540 struct i40e_hw *hw = &pf->hw;
4544 /* warn the TX unit of coming changes */
4545 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
4547 usleep_range(10, 20);
4549 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4550 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
4551 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
4552 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
4554 usleep_range(1000, 2000);
4557 /* Skip if the queue is already in the requested state */
4558 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
4561 /* turn on/off the queue */
4563 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
4564 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
4566 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
4569 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
4573 * i40e_control_wait_tx_q - Start/stop Tx queue and wait for completion
4575 * @pf: the PF structure
4576 * @pf_q: the PF queue to configure
4577 * @is_xdp: true if the queue is used for XDP
4578 * @enable: start or stop the queue
4580 int i40e_control_wait_tx_q(int seid, struct i40e_pf *pf, int pf_q,
4581 bool is_xdp, bool enable)
4585 i40e_control_tx_q(pf, pf_q, enable);
4587 /* wait for the change to finish */
4588 ret = i40e_pf_txq_wait(pf, pf_q, enable);
4590 dev_info(&pf->pdev->dev,
4591 "VSI seid %d %sTx ring %d %sable timeout\n",
4592 seid, (is_xdp ? "XDP " : ""), pf_q,
4593 (enable ? "en" : "dis"));
4600 * i40e_vsi_enable_tx - Start a VSI's rings
4601 * @vsi: the VSI being configured
4603 static int i40e_vsi_enable_tx(struct i40e_vsi *vsi)
4605 struct i40e_pf *pf = vsi->back;
4606 int i, pf_q, ret = 0;
4608 pf_q = vsi->base_queue;
4609 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4610 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4612 false /*is xdp*/, true);
4616 if (!i40e_enabled_xdp_vsi(vsi))
4619 ret = i40e_control_wait_tx_q(vsi->seid, pf,
4620 pf_q + vsi->alloc_queue_pairs,
4621 true /*is xdp*/, true);
4629 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
4630 * @pf: the PF being configured
4631 * @pf_q: the PF queue
4632 * @enable: enable or disable state of the queue
4634 * This routine will wait for the given Rx queue of the PF to reach the
4635 * enabled or disabled state.
4636 * Returns -ETIMEDOUT in case of failing to reach the requested state after
4637 * multiple retries; else will return 0 in case of success.
4639 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
4644 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
4645 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
4646 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4649 usleep_range(10, 20);
4651 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
4658 * i40e_control_rx_q - Start or stop a particular Rx queue
4659 * @pf: the PF structure
4660 * @pf_q: the PF queue to configure
4661 * @enable: start or stop the queue
4663 * This function enables or disables a single queue. Note that
4664 * any delay required after the operation is expected to be
4665 * handled by the caller of this function.
4667 static void i40e_control_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4669 struct i40e_hw *hw = &pf->hw;
4673 for (i = 0; i < I40E_QTX_ENA_WAIT_COUNT; i++) {
4674 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
4675 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
4676 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
4678 usleep_range(1000, 2000);
4681 /* Skip if the queue is already in the requested state */
4682 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
4685 /* turn on/off the queue */
4687 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
4689 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
4691 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
4695 * i40e_control_wait_rx_q
4696 * @pf: the PF structure
4697 * @pf_q: queue being configured
4698 * @enable: start or stop the rings
4700 * This function enables or disables a single queue along with waiting
4701 * for the change to finish. The caller of this function should handle
4702 * the delays needed in the case of disabling queues.
4704 int i40e_control_wait_rx_q(struct i40e_pf *pf, int pf_q, bool enable)
4708 i40e_control_rx_q(pf, pf_q, enable);
4710 /* wait for the change to finish */
4711 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
4719 * i40e_vsi_enable_rx - Start a VSI's rings
4720 * @vsi: the VSI being configured
4722 static int i40e_vsi_enable_rx(struct i40e_vsi *vsi)
4724 struct i40e_pf *pf = vsi->back;
4725 int i, pf_q, ret = 0;
4727 pf_q = vsi->base_queue;
4728 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4729 ret = i40e_control_wait_rx_q(pf, pf_q, true);
4731 dev_info(&pf->pdev->dev,
4732 "VSI seid %d Rx ring %d enable timeout\n",
4742 * i40e_vsi_start_rings - Start a VSI's rings
4743 * @vsi: the VSI being configured
4745 int i40e_vsi_start_rings(struct i40e_vsi *vsi)
4749 /* do rx first for enable and last for disable */
4750 ret = i40e_vsi_enable_rx(vsi);
4753 ret = i40e_vsi_enable_tx(vsi);
4758 #define I40E_DISABLE_TX_GAP_MSEC 50
4761 * i40e_vsi_stop_rings - Stop a VSI's rings
4762 * @vsi: the VSI being configured
4764 void i40e_vsi_stop_rings(struct i40e_vsi *vsi)
4766 struct i40e_pf *pf = vsi->back;
4767 int pf_q, err, q_end;
4769 /* When port TX is suspended, don't wait */
4770 if (test_bit(__I40E_PORT_SUSPENDED, vsi->back->state))
4771 return i40e_vsi_stop_rings_no_wait(vsi);
4773 q_end = vsi->base_queue + vsi->num_queue_pairs;
4774 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4775 i40e_pre_tx_queue_cfg(&pf->hw, (u32)pf_q, false);
4777 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++) {
4778 err = i40e_control_wait_rx_q(pf, pf_q, false);
4780 dev_info(&pf->pdev->dev,
4781 "VSI seid %d Rx ring %d disable timeout\n",
4785 msleep(I40E_DISABLE_TX_GAP_MSEC);
4786 pf_q = vsi->base_queue;
4787 for (pf_q = vsi->base_queue; pf_q < q_end; pf_q++)
4788 wr32(&pf->hw, I40E_QTX_ENA(pf_q), 0);
4790 i40e_vsi_wait_queues_disabled(vsi);
4794 * i40e_vsi_stop_rings_no_wait - Stop a VSI's rings and do not delay
4795 * @vsi: the VSI being shutdown
4797 * This function stops all the rings for a VSI but does not delay to verify
4798 * that rings have been disabled. It is expected that the caller is shutting
4799 * down multiple VSIs at once and will delay together for all the VSIs after
4800 * initiating the shutdown. This is particularly useful for shutting down lots
4801 * of VFs together. Otherwise, a large delay can be incurred while configuring
4802 * each VSI in serial.
4804 void i40e_vsi_stop_rings_no_wait(struct i40e_vsi *vsi)
4806 struct i40e_pf *pf = vsi->back;
4809 pf_q = vsi->base_queue;
4810 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4811 i40e_control_tx_q(pf, pf_q, false);
4812 i40e_control_rx_q(pf, pf_q, false);
4817 * i40e_vsi_free_irq - Free the irq association with the OS
4818 * @vsi: the VSI being configured
4820 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4822 struct i40e_pf *pf = vsi->back;
4823 struct i40e_hw *hw = &pf->hw;
4824 int base = vsi->base_vector;
4828 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4829 if (!vsi->q_vectors)
4832 if (!vsi->irqs_ready)
4835 vsi->irqs_ready = false;
4836 for (i = 0; i < vsi->num_q_vectors; i++) {
4841 irq_num = pf->msix_entries[vector].vector;
4843 /* free only the irqs that were actually requested */
4844 if (!vsi->q_vectors[i] ||
4845 !vsi->q_vectors[i]->num_ringpairs)
4848 /* clear the affinity notifier in the IRQ descriptor */
4849 irq_set_affinity_notifier(irq_num, NULL);
4850 /* remove our suggested affinity mask for this IRQ */
4851 irq_update_affinity_hint(irq_num, NULL);
4852 synchronize_irq(irq_num);
4853 free_irq(irq_num, vsi->q_vectors[i]);
4855 /* Tear down the interrupt queue link list
4857 * We know that they come in pairs and always
4858 * the Rx first, then the Tx. To clear the
4859 * link list, stick the EOL value into the
4860 * next_q field of the registers.
4862 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4863 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4864 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4865 val |= I40E_QUEUE_END_OF_LIST
4866 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4867 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4869 while (qp != I40E_QUEUE_END_OF_LIST) {
4872 val = rd32(hw, I40E_QINT_RQCTL(qp));
4874 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4875 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4876 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4877 I40E_QINT_RQCTL_INTEVENT_MASK);
4879 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4880 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4882 wr32(hw, I40E_QINT_RQCTL(qp), val);
4884 val = rd32(hw, I40E_QINT_TQCTL(qp));
4886 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4887 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4889 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4890 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4891 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4892 I40E_QINT_TQCTL_INTEVENT_MASK);
4894 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4895 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4897 wr32(hw, I40E_QINT_TQCTL(qp), val);
4902 free_irq(pf->pdev->irq, pf);
4904 val = rd32(hw, I40E_PFINT_LNKLST0);
4905 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4906 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4907 val |= I40E_QUEUE_END_OF_LIST
4908 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4909 wr32(hw, I40E_PFINT_LNKLST0, val);
4911 val = rd32(hw, I40E_QINT_RQCTL(qp));
4912 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4913 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4914 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4915 I40E_QINT_RQCTL_INTEVENT_MASK);
4917 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4918 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4920 wr32(hw, I40E_QINT_RQCTL(qp), val);
4922 val = rd32(hw, I40E_QINT_TQCTL(qp));
4924 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4925 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4926 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4927 I40E_QINT_TQCTL_INTEVENT_MASK);
4929 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4930 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4932 wr32(hw, I40E_QINT_TQCTL(qp), val);
4937 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4938 * @vsi: the VSI being configured
4939 * @v_idx: Index of vector to be freed
4941 * This function frees the memory allocated to the q_vector. In addition if
4942 * NAPI is enabled it will delete any references to the NAPI struct prior
4943 * to freeing the q_vector.
4945 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4947 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4948 struct i40e_ring *ring;
4953 /* disassociate q_vector from rings */
4954 i40e_for_each_ring(ring, q_vector->tx)
4955 ring->q_vector = NULL;
4957 i40e_for_each_ring(ring, q_vector->rx)
4958 ring->q_vector = NULL;
4960 /* only VSI w/ an associated netdev is set up w/ NAPI */
4962 netif_napi_del(&q_vector->napi);
4964 vsi->q_vectors[v_idx] = NULL;
4966 kfree_rcu(q_vector, rcu);
4970 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4971 * @vsi: the VSI being un-configured
4973 * This frees the memory allocated to the q_vectors and
4974 * deletes references to the NAPI struct.
4976 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4980 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4981 i40e_free_q_vector(vsi, v_idx);
4985 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4986 * @pf: board private structure
4988 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4990 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4991 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4992 pci_disable_msix(pf->pdev);
4993 kfree(pf->msix_entries);
4994 pf->msix_entries = NULL;
4995 kfree(pf->irq_pile);
4996 pf->irq_pile = NULL;
4997 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4998 pci_disable_msi(pf->pdev);
5000 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
5004 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
5005 * @pf: board private structure
5007 * We go through and clear interrupt specific resources and reset the structure
5008 * to pre-load conditions
5010 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
5014 if (test_bit(__I40E_MISC_IRQ_REQUESTED, pf->state))
5015 i40e_free_misc_vector(pf);
5017 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
5018 I40E_IWARP_IRQ_PILE_ID);
5020 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
5021 for (i = 0; i < pf->num_alloc_vsi; i++)
5023 i40e_vsi_free_q_vectors(pf->vsi[i]);
5024 i40e_reset_interrupt_capability(pf);
5028 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
5029 * @vsi: the VSI being configured
5031 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
5038 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5039 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5041 if (q_vector->rx.ring || q_vector->tx.ring)
5042 napi_enable(&q_vector->napi);
5047 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
5048 * @vsi: the VSI being configured
5050 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
5057 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++) {
5058 struct i40e_q_vector *q_vector = vsi->q_vectors[q_idx];
5060 if (q_vector->rx.ring || q_vector->tx.ring)
5061 napi_disable(&q_vector->napi);
5066 * i40e_vsi_close - Shut down a VSI
5067 * @vsi: the vsi to be quelled
5069 static void i40e_vsi_close(struct i40e_vsi *vsi)
5071 struct i40e_pf *pf = vsi->back;
5072 if (!test_and_set_bit(__I40E_VSI_DOWN, vsi->state))
5074 i40e_vsi_free_irq(vsi);
5075 i40e_vsi_free_tx_resources(vsi);
5076 i40e_vsi_free_rx_resources(vsi);
5077 vsi->current_netdev_flags = 0;
5078 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
5079 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
5080 set_bit(__I40E_CLIENT_RESET, pf->state);
5084 * i40e_quiesce_vsi - Pause a given VSI
5085 * @vsi: the VSI being paused
5087 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
5089 if (test_bit(__I40E_VSI_DOWN, vsi->state))
5092 set_bit(__I40E_VSI_NEEDS_RESTART, vsi->state);
5093 if (vsi->netdev && netif_running(vsi->netdev))
5094 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
5096 i40e_vsi_close(vsi);
5100 * i40e_unquiesce_vsi - Resume a given VSI
5101 * @vsi: the VSI being resumed
5103 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
5105 if (!test_and_clear_bit(__I40E_VSI_NEEDS_RESTART, vsi->state))
5108 if (vsi->netdev && netif_running(vsi->netdev))
5109 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
5111 i40e_vsi_open(vsi); /* this clears the DOWN bit */
5115 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
5118 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
5122 for (v = 0; v < pf->num_alloc_vsi; v++) {
5124 i40e_quiesce_vsi(pf->vsi[v]);
5129 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
5132 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
5136 for (v = 0; v < pf->num_alloc_vsi; v++) {
5138 i40e_unquiesce_vsi(pf->vsi[v]);
5143 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
5144 * @vsi: the VSI being configured
5146 * Wait until all queues on a given VSI have been disabled.
5148 int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
5150 struct i40e_pf *pf = vsi->back;
5153 pf_q = vsi->base_queue;
5154 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
5155 /* Check and wait for the Tx queue */
5156 ret = i40e_pf_txq_wait(pf, pf_q, false);
5158 dev_info(&pf->pdev->dev,
5159 "VSI seid %d Tx ring %d disable timeout\n",
5164 if (!i40e_enabled_xdp_vsi(vsi))
5167 /* Check and wait for the XDP Tx queue */
5168 ret = i40e_pf_txq_wait(pf, pf_q + vsi->alloc_queue_pairs,
5171 dev_info(&pf->pdev->dev,
5172 "VSI seid %d XDP Tx ring %d disable timeout\n",
5177 /* Check and wait for the Rx queue */
5178 ret = i40e_pf_rxq_wait(pf, pf_q, false);
5180 dev_info(&pf->pdev->dev,
5181 "VSI seid %d Rx ring %d disable timeout\n",
5190 #ifdef CONFIG_I40E_DCB
5192 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
5195 * This function waits for the queues to be in disabled state for all the
5196 * VSIs that are managed by this PF.
5198 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
5202 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
5204 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
5216 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
5217 * @pf: pointer to PF
5219 * Get TC map for ISCSI PF type that will include iSCSI TC
5222 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
5224 struct i40e_dcb_app_priority_table app;
5225 struct i40e_hw *hw = &pf->hw;
5226 u8 enabled_tc = 1; /* TC0 is always enabled */
5228 /* Get the iSCSI APP TLV */
5229 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5231 for (i = 0; i < dcbcfg->numapps; i++) {
5232 app = dcbcfg->app[i];
5233 if (app.selector == I40E_APP_SEL_TCPIP &&
5234 app.protocolid == I40E_APP_PROTOID_ISCSI) {
5235 tc = dcbcfg->etscfg.prioritytable[app.priority];
5236 enabled_tc |= BIT(tc);
5245 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
5246 * @dcbcfg: the corresponding DCBx configuration structure
5248 * Return the number of TCs from given DCBx configuration
5250 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
5252 int i, tc_unused = 0;
5256 /* Scan the ETS Config Priority Table to find
5257 * traffic class enabled for a given priority
5258 * and create a bitmask of enabled TCs
5260 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
5261 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
5263 /* Now scan the bitmask to check for
5264 * contiguous TCs starting with TC0
5266 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5267 if (num_tc & BIT(i)) {
5271 pr_err("Non-contiguous TC - Disabling DCB\n");
5279 /* There is always at least TC0 */
5287 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
5288 * @dcbcfg: the corresponding DCBx configuration structure
5290 * Query the current DCB configuration and return the number of
5291 * traffic classes enabled from the given DCBX config
5293 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
5295 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
5299 for (i = 0; i < num_tc; i++)
5300 enabled_tc |= BIT(i);
5306 * i40e_mqprio_get_enabled_tc - Get enabled traffic classes
5307 * @pf: PF being queried
5309 * Query the current MQPRIO configuration and return the number of
5310 * traffic classes enabled.
5312 static u8 i40e_mqprio_get_enabled_tc(struct i40e_pf *pf)
5314 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5315 u8 num_tc = vsi->mqprio_qopt.qopt.num_tc;
5316 u8 enabled_tc = 1, i;
5318 for (i = 1; i < num_tc; i++)
5319 enabled_tc |= BIT(i);
5324 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
5325 * @pf: PF being queried
5327 * Return number of traffic classes enabled for the given PF
5329 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
5331 struct i40e_hw *hw = &pf->hw;
5332 u8 i, enabled_tc = 1;
5334 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5336 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5337 return pf->vsi[pf->lan_vsi]->mqprio_qopt.qopt.num_tc;
5339 /* If neither MQPRIO nor DCB is enabled, then always use single TC */
5340 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5343 /* SFP mode will be enabled for all TCs on port */
5344 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5345 return i40e_dcb_get_num_tc(dcbcfg);
5347 /* MFP mode return count of enabled TCs for this PF */
5348 if (pf->hw.func_caps.iscsi)
5349 enabled_tc = i40e_get_iscsi_tc_map(pf);
5351 return 1; /* Only TC0 */
5353 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5354 if (enabled_tc & BIT(i))
5361 * i40e_pf_get_tc_map - Get bitmap for enabled traffic classes
5362 * @pf: PF being queried
5364 * Return a bitmap for enabled traffic classes for this PF.
5366 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
5368 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5369 return i40e_mqprio_get_enabled_tc(pf);
5371 /* If neither MQPRIO nor DCB is enabled for this PF then just return
5374 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5375 return I40E_DEFAULT_TRAFFIC_CLASS;
5377 /* SFP mode we want PF to be enabled for all TCs */
5378 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
5379 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
5381 /* MFP enabled and iSCSI PF type */
5382 if (pf->hw.func_caps.iscsi)
5383 return i40e_get_iscsi_tc_map(pf);
5385 return I40E_DEFAULT_TRAFFIC_CLASS;
5389 * i40e_vsi_get_bw_info - Query VSI BW Information
5390 * @vsi: the VSI being queried
5392 * Returns 0 on success, negative value on failure
5394 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
5396 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
5397 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5398 struct i40e_pf *pf = vsi->back;
5399 struct i40e_hw *hw = &pf->hw;
5404 /* Get the VSI level BW configuration */
5405 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
5407 dev_info(&pf->pdev->dev,
5408 "couldn't get PF vsi bw config, err %s aq_err %s\n",
5409 i40e_stat_str(&pf->hw, ret),
5410 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5414 /* Get the VSI level BW configuration per TC */
5415 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
5418 dev_info(&pf->pdev->dev,
5419 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
5420 i40e_stat_str(&pf->hw, ret),
5421 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5425 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
5426 dev_info(&pf->pdev->dev,
5427 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
5428 bw_config.tc_valid_bits,
5429 bw_ets_config.tc_valid_bits);
5430 /* Still continuing */
5433 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
5434 vsi->bw_max_quanta = bw_config.max_bw;
5435 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
5436 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
5437 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5438 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
5439 vsi->bw_ets_limit_credits[i] =
5440 le16_to_cpu(bw_ets_config.credits[i]);
5441 /* 3 bits out of 4 for each TC */
5442 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
5449 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
5450 * @vsi: the VSI being configured
5451 * @enabled_tc: TC bitmap
5452 * @bw_share: BW shared credits per TC
5454 * Returns 0 on success, negative value on failure
5456 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
5459 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
5460 struct i40e_pf *pf = vsi->back;
5464 /* There is no need to reset BW when mqprio mode is on. */
5465 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5467 if (!vsi->mqprio_qopt.qopt.hw && !(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5468 ret = i40e_set_bw_limit(vsi, vsi->seid, 0);
5470 dev_info(&pf->pdev->dev,
5471 "Failed to reset tx rate for vsi->seid %u\n",
5475 memset(&bw_data, 0, sizeof(bw_data));
5476 bw_data.tc_valid_bits = enabled_tc;
5477 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5478 bw_data.tc_bw_credits[i] = bw_share[i];
5480 ret = i40e_aq_config_vsi_tc_bw(&pf->hw, vsi->seid, &bw_data, NULL);
5482 dev_info(&pf->pdev->dev,
5483 "AQ command Config VSI BW allocation per TC failed = %d\n",
5484 pf->hw.aq.asq_last_status);
5488 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
5489 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
5495 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
5496 * @vsi: the VSI being configured
5497 * @enabled_tc: TC map to be enabled
5500 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5502 struct net_device *netdev = vsi->netdev;
5503 struct i40e_pf *pf = vsi->back;
5504 struct i40e_hw *hw = &pf->hw;
5507 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
5513 netdev_reset_tc(netdev);
5517 /* Set up actual enabled TCs on the VSI */
5518 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
5521 /* set per TC queues for the VSI */
5522 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5523 /* Only set TC queues for enabled tcs
5525 * e.g. For a VSI that has TC0 and TC3 enabled the
5526 * enabled_tc bitmap would be 0x00001001; the driver
5527 * will set the numtc for netdev as 2 that will be
5528 * referenced by the netdev layer as TC 0 and 1.
5530 if (vsi->tc_config.enabled_tc & BIT(i))
5531 netdev_set_tc_queue(netdev,
5532 vsi->tc_config.tc_info[i].netdev_tc,
5533 vsi->tc_config.tc_info[i].qcount,
5534 vsi->tc_config.tc_info[i].qoffset);
5537 if (pf->flags & I40E_FLAG_TC_MQPRIO)
5540 /* Assign UP2TC map for the VSI */
5541 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
5542 /* Get the actual TC# for the UP */
5543 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
5544 /* Get the mapped netdev TC# for the UP */
5545 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
5546 netdev_set_prio_tc_map(netdev, i, netdev_tc);
5551 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
5552 * @vsi: the VSI being configured
5553 * @ctxt: the ctxt buffer returned from AQ VSI update param command
5555 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
5556 struct i40e_vsi_context *ctxt)
5558 /* copy just the sections touched not the entire info
5559 * since not all sections are valid as returned by
5562 vsi->info.mapping_flags = ctxt->info.mapping_flags;
5563 memcpy(&vsi->info.queue_mapping,
5564 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
5565 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
5566 sizeof(vsi->info.tc_mapping));
5570 * i40e_update_adq_vsi_queues - update queue mapping for ADq VSI
5571 * @vsi: the VSI being reconfigured
5572 * @vsi_offset: offset from main VF VSI
5574 int i40e_update_adq_vsi_queues(struct i40e_vsi *vsi, int vsi_offset)
5576 struct i40e_vsi_context ctxt = {};
5582 return I40E_ERR_PARAM;
5586 ctxt.seid = vsi->seid;
5587 ctxt.pf_num = hw->pf_id;
5588 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id + vsi_offset;
5589 ctxt.uplink_seid = vsi->uplink_seid;
5590 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
5591 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
5592 ctxt.info = vsi->info;
5594 i40e_vsi_setup_queue_map(vsi, &ctxt, vsi->tc_config.enabled_tc,
5596 if (vsi->reconfig_rss) {
5597 vsi->rss_size = min_t(int, pf->alloc_rss_size,
5598 vsi->num_queue_pairs);
5599 ret = i40e_vsi_config_rss(vsi);
5601 dev_info(&pf->pdev->dev, "Failed to reconfig rss for num_queues\n");
5604 vsi->reconfig_rss = false;
5607 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5609 dev_info(&pf->pdev->dev, "Update vsi config failed, err %s aq_err %s\n",
5610 i40e_stat_str(hw, ret),
5611 i40e_aq_str(hw, hw->aq.asq_last_status));
5614 /* update the local VSI info with updated queue map */
5615 i40e_vsi_update_queue_map(vsi, &ctxt);
5616 vsi->info.valid_sections = 0;
5622 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
5623 * @vsi: VSI to be configured
5624 * @enabled_tc: TC bitmap
5626 * This configures a particular VSI for TCs that are mapped to the
5627 * given TC bitmap. It uses default bandwidth share for TCs across
5628 * VSIs to configure TC for a particular VSI.
5631 * It is expected that the VSI queues have been quisced before calling
5634 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
5636 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
5637 struct i40e_pf *pf = vsi->back;
5638 struct i40e_hw *hw = &pf->hw;
5639 struct i40e_vsi_context ctxt;
5643 /* Check if enabled_tc is same as existing or new TCs */
5644 if (vsi->tc_config.enabled_tc == enabled_tc &&
5645 vsi->mqprio_qopt.mode != TC_MQPRIO_MODE_CHANNEL)
5648 /* Enable ETS TCs with equal BW Share for now across all VSIs */
5649 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
5650 if (enabled_tc & BIT(i))
5654 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5656 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
5658 dev_info(&pf->pdev->dev,
5659 "Failed configuring TC map %d for VSI %d\n",
5660 enabled_tc, vsi->seid);
5661 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid,
5664 dev_info(&pf->pdev->dev,
5665 "Failed querying vsi bw info, err %s aq_err %s\n",
5666 i40e_stat_str(hw, ret),
5667 i40e_aq_str(hw, hw->aq.asq_last_status));
5670 if ((bw_config.tc_valid_bits & enabled_tc) != enabled_tc) {
5671 u8 valid_tc = bw_config.tc_valid_bits & enabled_tc;
5674 valid_tc = bw_config.tc_valid_bits;
5675 /* Always enable TC0, no matter what */
5677 dev_info(&pf->pdev->dev,
5678 "Requested tc 0x%x, but FW reports 0x%x as valid. Attempting to use 0x%x.\n",
5679 enabled_tc, bw_config.tc_valid_bits, valid_tc);
5680 enabled_tc = valid_tc;
5683 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
5685 dev_err(&pf->pdev->dev,
5686 "Unable to configure TC map %d for VSI %d\n",
5687 enabled_tc, vsi->seid);
5692 /* Update Queue Pairs Mapping for currently enabled UPs */
5693 ctxt.seid = vsi->seid;
5694 ctxt.pf_num = vsi->back->hw.pf_id;
5696 ctxt.uplink_seid = vsi->uplink_seid;
5697 ctxt.info = vsi->info;
5698 if (vsi->back->flags & I40E_FLAG_TC_MQPRIO) {
5699 ret = i40e_vsi_setup_queue_map_mqprio(vsi, &ctxt, enabled_tc);
5703 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
5706 /* On destroying the qdisc, reset vsi->rss_size, as number of enabled
5709 if (!vsi->mqprio_qopt.qopt.hw && vsi->reconfig_rss) {
5710 vsi->rss_size = min_t(int, vsi->back->alloc_rss_size,
5711 vsi->num_queue_pairs);
5712 ret = i40e_vsi_config_rss(vsi);
5714 dev_info(&vsi->back->pdev->dev,
5715 "Failed to reconfig rss for num_queues\n");
5718 vsi->reconfig_rss = false;
5720 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
5721 ctxt.info.valid_sections |=
5722 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
5723 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
5726 /* Update the VSI after updating the VSI queue-mapping
5729 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
5731 dev_info(&pf->pdev->dev,
5732 "Update vsi tc config failed, err %s aq_err %s\n",
5733 i40e_stat_str(hw, ret),
5734 i40e_aq_str(hw, hw->aq.asq_last_status));
5737 /* update the local VSI info with updated queue map */
5738 i40e_vsi_update_queue_map(vsi, &ctxt);
5739 vsi->info.valid_sections = 0;
5741 /* Update current VSI BW information */
5742 ret = i40e_vsi_get_bw_info(vsi);
5744 dev_info(&pf->pdev->dev,
5745 "Failed updating vsi bw info, err %s aq_err %s\n",
5746 i40e_stat_str(hw, ret),
5747 i40e_aq_str(hw, hw->aq.asq_last_status));
5751 /* Update the netdev TC setup */
5752 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
5758 * i40e_get_link_speed - Returns link speed for the interface
5759 * @vsi: VSI to be configured
5762 static int i40e_get_link_speed(struct i40e_vsi *vsi)
5764 struct i40e_pf *pf = vsi->back;
5766 switch (pf->hw.phy.link_info.link_speed) {
5767 case I40E_LINK_SPEED_40GB:
5769 case I40E_LINK_SPEED_25GB:
5771 case I40E_LINK_SPEED_20GB:
5773 case I40E_LINK_SPEED_10GB:
5775 case I40E_LINK_SPEED_1GB:
5783 * i40e_set_bw_limit - setup BW limit for Tx traffic based on max_tx_rate
5784 * @vsi: VSI to be configured
5785 * @seid: seid of the channel/VSI
5786 * @max_tx_rate: max TX rate to be configured as BW limit
5788 * Helper function to set BW limit for a given VSI
5790 int i40e_set_bw_limit(struct i40e_vsi *vsi, u16 seid, u64 max_tx_rate)
5792 struct i40e_pf *pf = vsi->back;
5797 speed = i40e_get_link_speed(vsi);
5798 if (max_tx_rate > speed) {
5799 dev_err(&pf->pdev->dev,
5800 "Invalid max tx rate %llu specified for VSI seid %d.",
5804 if (max_tx_rate && max_tx_rate < 50) {
5805 dev_warn(&pf->pdev->dev,
5806 "Setting max tx rate to minimum usable value of 50Mbps.\n");
5810 /* Tx rate credits are in values of 50Mbps, 0 is disabled */
5811 credits = max_tx_rate;
5812 do_div(credits, I40E_BW_CREDIT_DIVISOR);
5813 ret = i40e_aq_config_vsi_bw_limit(&pf->hw, seid, credits,
5814 I40E_MAX_BW_INACTIVE_ACCUM, NULL);
5816 dev_err(&pf->pdev->dev,
5817 "Failed set tx rate (%llu Mbps) for vsi->seid %u, err %s aq_err %s\n",
5818 max_tx_rate, seid, i40e_stat_str(&pf->hw, ret),
5819 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5824 * i40e_remove_queue_channels - Remove queue channels for the TCs
5825 * @vsi: VSI to be configured
5827 * Remove queue channels for the TCs
5829 static void i40e_remove_queue_channels(struct i40e_vsi *vsi)
5831 enum i40e_admin_queue_err last_aq_status;
5832 struct i40e_cloud_filter *cfilter;
5833 struct i40e_channel *ch, *ch_tmp;
5834 struct i40e_pf *pf = vsi->back;
5835 struct hlist_node *node;
5838 /* Reset rss size that was stored when reconfiguring rss for
5839 * channel VSIs with non-power-of-2 queue count.
5841 vsi->current_rss_size = 0;
5843 /* perform cleanup for channels if they exist */
5844 if (list_empty(&vsi->ch_list))
5847 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5848 struct i40e_vsi *p_vsi;
5850 list_del(&ch->list);
5851 p_vsi = ch->parent_vsi;
5852 if (!p_vsi || !ch->initialized) {
5856 /* Reset queue contexts */
5857 for (i = 0; i < ch->num_queue_pairs; i++) {
5858 struct i40e_ring *tx_ring, *rx_ring;
5861 pf_q = ch->base_queue + i;
5862 tx_ring = vsi->tx_rings[pf_q];
5865 rx_ring = vsi->rx_rings[pf_q];
5869 /* Reset BW configured for this VSI via mqprio */
5870 ret = i40e_set_bw_limit(vsi, ch->seid, 0);
5872 dev_info(&vsi->back->pdev->dev,
5873 "Failed to reset tx rate for ch->seid %u\n",
5876 /* delete cloud filters associated with this channel */
5877 hlist_for_each_entry_safe(cfilter, node,
5878 &pf->cloud_filter_list, cloud_node) {
5879 if (cfilter->seid != ch->seid)
5882 hash_del(&cfilter->cloud_node);
5883 if (cfilter->dst_port)
5884 ret = i40e_add_del_cloud_filter_big_buf(vsi,
5888 ret = i40e_add_del_cloud_filter(vsi, cfilter,
5890 last_aq_status = pf->hw.aq.asq_last_status;
5892 dev_info(&pf->pdev->dev,
5893 "Failed to delete cloud filter, err %s aq_err %s\n",
5894 i40e_stat_str(&pf->hw, ret),
5895 i40e_aq_str(&pf->hw, last_aq_status));
5899 /* delete VSI from FW */
5900 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
5903 dev_err(&vsi->back->pdev->dev,
5904 "unable to remove channel (%d) for parent VSI(%d)\n",
5905 ch->seid, p_vsi->seid);
5908 INIT_LIST_HEAD(&vsi->ch_list);
5912 * i40e_get_max_queues_for_channel
5913 * @vsi: ptr to VSI to which channels are associated with
5915 * Helper function which returns max value among the queue counts set on the
5916 * channels/TCs created.
5918 static int i40e_get_max_queues_for_channel(struct i40e_vsi *vsi)
5920 struct i40e_channel *ch, *ch_tmp;
5923 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
5924 if (!ch->initialized)
5926 if (ch->num_queue_pairs > max)
5927 max = ch->num_queue_pairs;
5934 * i40e_validate_num_queues - validate num_queues w.r.t channel
5935 * @pf: ptr to PF device
5936 * @num_queues: number of queues
5937 * @vsi: the parent VSI
5938 * @reconfig_rss: indicates should the RSS be reconfigured or not
5940 * This function validates number of queues in the context of new channel
5941 * which is being established and determines if RSS should be reconfigured
5942 * or not for parent VSI.
5944 static int i40e_validate_num_queues(struct i40e_pf *pf, int num_queues,
5945 struct i40e_vsi *vsi, bool *reconfig_rss)
5952 *reconfig_rss = false;
5953 if (vsi->current_rss_size) {
5954 if (num_queues > vsi->current_rss_size) {
5955 dev_dbg(&pf->pdev->dev,
5956 "Error: num_queues (%d) > vsi's current_size(%d)\n",
5957 num_queues, vsi->current_rss_size);
5959 } else if ((num_queues < vsi->current_rss_size) &&
5960 (!is_power_of_2(num_queues))) {
5961 dev_dbg(&pf->pdev->dev,
5962 "Error: num_queues (%d) < vsi's current_size(%d), but not power of 2\n",
5963 num_queues, vsi->current_rss_size);
5968 if (!is_power_of_2(num_queues)) {
5969 /* Find the max num_queues configured for channel if channel
5971 * if channel exist, then enforce 'num_queues' to be more than
5972 * max ever queues configured for channel.
5974 max_ch_queues = i40e_get_max_queues_for_channel(vsi);
5975 if (num_queues < max_ch_queues) {
5976 dev_dbg(&pf->pdev->dev,
5977 "Error: num_queues (%d) < max queues configured for channel(%d)\n",
5978 num_queues, max_ch_queues);
5981 *reconfig_rss = true;
5988 * i40e_vsi_reconfig_rss - reconfig RSS based on specified rss_size
5989 * @vsi: the VSI being setup
5990 * @rss_size: size of RSS, accordingly LUT gets reprogrammed
5992 * This function reconfigures RSS by reprogramming LUTs using 'rss_size'
5994 static int i40e_vsi_reconfig_rss(struct i40e_vsi *vsi, u16 rss_size)
5996 struct i40e_pf *pf = vsi->back;
5997 u8 seed[I40E_HKEY_ARRAY_SIZE];
5998 struct i40e_hw *hw = &pf->hw;
6006 if (rss_size > vsi->rss_size)
6009 local_rss_size = min_t(int, vsi->rss_size, rss_size);
6010 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
6014 /* Ignoring user configured lut if there is one */
6015 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, local_rss_size);
6017 /* Use user configured hash key if there is one, otherwise
6020 if (vsi->rss_hkey_user)
6021 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
6023 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
6025 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
6027 dev_info(&pf->pdev->dev,
6028 "Cannot set RSS lut, err %s aq_err %s\n",
6029 i40e_stat_str(hw, ret),
6030 i40e_aq_str(hw, hw->aq.asq_last_status));
6036 /* Do the update w.r.t. storing rss_size */
6037 if (!vsi->orig_rss_size)
6038 vsi->orig_rss_size = vsi->rss_size;
6039 vsi->current_rss_size = local_rss_size;
6045 * i40e_channel_setup_queue_map - Setup a channel queue map
6046 * @pf: ptr to PF device
6047 * @ctxt: VSI context structure
6048 * @ch: ptr to channel structure
6050 * Setup queue map for a specific channel
6052 static void i40e_channel_setup_queue_map(struct i40e_pf *pf,
6053 struct i40e_vsi_context *ctxt,
6054 struct i40e_channel *ch)
6056 u16 qcount, qmap, sections = 0;
6060 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
6061 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
6063 qcount = min_t(int, ch->num_queue_pairs, pf->num_lan_msix);
6064 ch->num_queue_pairs = qcount;
6066 /* find the next higher power-of-2 of num queue pairs */
6067 pow = ilog2(qcount);
6068 if (!is_power_of_2(qcount))
6071 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
6072 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
6074 /* Setup queue TC[0].qmap for given VSI context */
6075 ctxt->info.tc_mapping[0] = cpu_to_le16(qmap);
6077 ctxt->info.up_enable_bits = 0x1; /* TC0 enabled */
6078 ctxt->info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
6079 ctxt->info.queue_mapping[0] = cpu_to_le16(ch->base_queue);
6080 ctxt->info.valid_sections |= cpu_to_le16(sections);
6084 * i40e_add_channel - add a channel by adding VSI
6085 * @pf: ptr to PF device
6086 * @uplink_seid: underlying HW switching element (VEB) ID
6087 * @ch: ptr to channel structure
6089 * Add a channel (VSI) using add_vsi and queue_map
6091 static int i40e_add_channel(struct i40e_pf *pf, u16 uplink_seid,
6092 struct i40e_channel *ch)
6094 struct i40e_hw *hw = &pf->hw;
6095 struct i40e_vsi_context ctxt;
6096 u8 enabled_tc = 0x1; /* TC0 enabled */
6099 if (ch->type != I40E_VSI_VMDQ2) {
6100 dev_info(&pf->pdev->dev,
6101 "add new vsi failed, ch->type %d\n", ch->type);
6105 memset(&ctxt, 0, sizeof(ctxt));
6106 ctxt.pf_num = hw->pf_id;
6108 ctxt.uplink_seid = uplink_seid;
6109 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
6110 if (ch->type == I40E_VSI_VMDQ2)
6111 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
6113 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED) {
6114 ctxt.info.valid_sections |=
6115 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6116 ctxt.info.switch_id =
6117 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6120 /* Set queue map for a given VSI context */
6121 i40e_channel_setup_queue_map(pf, &ctxt, ch);
6123 /* Now time to create VSI */
6124 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
6126 dev_info(&pf->pdev->dev,
6127 "add new vsi failed, err %s aq_err %s\n",
6128 i40e_stat_str(&pf->hw, ret),
6129 i40e_aq_str(&pf->hw,
6130 pf->hw.aq.asq_last_status));
6134 /* Success, update channel, set enabled_tc only if the channel
6137 ch->enabled_tc = !i40e_is_channel_macvlan(ch) && enabled_tc;
6138 ch->seid = ctxt.seid;
6139 ch->vsi_number = ctxt.vsi_number;
6140 ch->stat_counter_idx = le16_to_cpu(ctxt.info.stat_counter_idx);
6142 /* copy just the sections touched not the entire info
6143 * since not all sections are valid as returned by
6146 ch->info.mapping_flags = ctxt.info.mapping_flags;
6147 memcpy(&ch->info.queue_mapping,
6148 &ctxt.info.queue_mapping, sizeof(ctxt.info.queue_mapping));
6149 memcpy(&ch->info.tc_mapping, ctxt.info.tc_mapping,
6150 sizeof(ctxt.info.tc_mapping));
6155 static int i40e_channel_config_bw(struct i40e_vsi *vsi, struct i40e_channel *ch,
6158 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
6162 memset(&bw_data, 0, sizeof(bw_data));
6163 bw_data.tc_valid_bits = ch->enabled_tc;
6164 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6165 bw_data.tc_bw_credits[i] = bw_share[i];
6167 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, ch->seid,
6170 dev_info(&vsi->back->pdev->dev,
6171 "Config VSI BW allocation per TC failed, aq_err: %d for new_vsi->seid %u\n",
6172 vsi->back->hw.aq.asq_last_status, ch->seid);
6176 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
6177 ch->info.qs_handle[i] = bw_data.qs_handles[i];
6183 * i40e_channel_config_tx_ring - config TX ring associated with new channel
6184 * @pf: ptr to PF device
6185 * @vsi: the VSI being setup
6186 * @ch: ptr to channel structure
6188 * Configure TX rings associated with channel (VSI) since queues are being
6191 static int i40e_channel_config_tx_ring(struct i40e_pf *pf,
6192 struct i40e_vsi *vsi,
6193 struct i40e_channel *ch)
6197 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
6199 /* Enable ETS TCs with equal BW Share for now across all VSIs */
6200 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6201 if (ch->enabled_tc & BIT(i))
6205 /* configure BW for new VSI */
6206 ret = i40e_channel_config_bw(vsi, ch, bw_share);
6208 dev_info(&vsi->back->pdev->dev,
6209 "Failed configuring TC map %d for channel (seid %u)\n",
6210 ch->enabled_tc, ch->seid);
6214 for (i = 0; i < ch->num_queue_pairs; i++) {
6215 struct i40e_ring *tx_ring, *rx_ring;
6218 pf_q = ch->base_queue + i;
6220 /* Get to TX ring ptr of main VSI, for re-setup TX queue
6223 tx_ring = vsi->tx_rings[pf_q];
6226 /* Get the RX ring ptr */
6227 rx_ring = vsi->rx_rings[pf_q];
6235 * i40e_setup_hw_channel - setup new channel
6236 * @pf: ptr to PF device
6237 * @vsi: the VSI being setup
6238 * @ch: ptr to channel structure
6239 * @uplink_seid: underlying HW switching element (VEB) ID
6240 * @type: type of channel to be created (VMDq2/VF)
6242 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6243 * and configures TX rings accordingly
6245 static inline int i40e_setup_hw_channel(struct i40e_pf *pf,
6246 struct i40e_vsi *vsi,
6247 struct i40e_channel *ch,
6248 u16 uplink_seid, u8 type)
6252 ch->initialized = false;
6253 ch->base_queue = vsi->next_base_queue;
6256 /* Proceed with creation of channel (VMDq2) VSI */
6257 ret = i40e_add_channel(pf, uplink_seid, ch);
6259 dev_info(&pf->pdev->dev,
6260 "failed to add_channel using uplink_seid %u\n",
6265 /* Mark the successful creation of channel */
6266 ch->initialized = true;
6268 /* Reconfigure TX queues using QTX_CTL register */
6269 ret = i40e_channel_config_tx_ring(pf, vsi, ch);
6271 dev_info(&pf->pdev->dev,
6272 "failed to configure TX rings for channel %u\n",
6277 /* update 'next_base_queue' */
6278 vsi->next_base_queue = vsi->next_base_queue + ch->num_queue_pairs;
6279 dev_dbg(&pf->pdev->dev,
6280 "Added channel: vsi_seid %u, vsi_number %u, stat_counter_idx %u, num_queue_pairs %u, pf->next_base_queue %d\n",
6281 ch->seid, ch->vsi_number, ch->stat_counter_idx,
6282 ch->num_queue_pairs,
6283 vsi->next_base_queue);
6288 * i40e_setup_channel - setup new channel using uplink element
6289 * @pf: ptr to PF device
6290 * @vsi: pointer to the VSI to set up the channel within
6291 * @ch: ptr to channel structure
6293 * Setup new channel (VSI) based on specified type (VMDq2/VF)
6294 * and uplink switching element (uplink_seid)
6296 static bool i40e_setup_channel(struct i40e_pf *pf, struct i40e_vsi *vsi,
6297 struct i40e_channel *ch)
6303 if (vsi->type == I40E_VSI_MAIN) {
6304 vsi_type = I40E_VSI_VMDQ2;
6306 dev_err(&pf->pdev->dev, "unsupported parent vsi type(%d)\n",
6311 /* underlying switching element */
6312 seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6314 /* create channel (VSI), configure TX rings */
6315 ret = i40e_setup_hw_channel(pf, vsi, ch, seid, vsi_type);
6317 dev_err(&pf->pdev->dev, "failed to setup hw_channel\n");
6321 return ch->initialized ? true : false;
6325 * i40e_validate_and_set_switch_mode - sets up switch mode correctly
6326 * @vsi: ptr to VSI which has PF backing
6328 * Sets up switch mode correctly if it needs to be changed and perform
6329 * what are allowed modes.
6331 static int i40e_validate_and_set_switch_mode(struct i40e_vsi *vsi)
6334 struct i40e_pf *pf = vsi->back;
6335 struct i40e_hw *hw = &pf->hw;
6338 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_dev_capabilities);
6342 if (hw->dev_caps.switch_mode) {
6343 /* if switch mode is set, support mode2 (non-tunneled for
6344 * cloud filter) for now
6346 u32 switch_mode = hw->dev_caps.switch_mode &
6347 I40E_SWITCH_MODE_MASK;
6348 if (switch_mode >= I40E_CLOUD_FILTER_MODE1) {
6349 if (switch_mode == I40E_CLOUD_FILTER_MODE2)
6351 dev_err(&pf->pdev->dev,
6352 "Invalid switch_mode (%d), only non-tunneled mode for cloud filter is supported\n",
6353 hw->dev_caps.switch_mode);
6358 /* Set Bit 7 to be valid */
6359 mode = I40E_AQ_SET_SWITCH_BIT7_VALID;
6361 /* Set L4type for TCP support */
6362 mode |= I40E_AQ_SET_SWITCH_L4_TYPE_TCP;
6364 /* Set cloud filter mode */
6365 mode |= I40E_AQ_SET_SWITCH_MODE_NON_TUNNEL;
6367 /* Prep mode field for set_switch_config */
6368 ret = i40e_aq_set_switch_config(hw, pf->last_sw_conf_flags,
6369 pf->last_sw_conf_valid_flags,
6371 if (ret && hw->aq.asq_last_status != I40E_AQ_RC_ESRCH)
6372 dev_err(&pf->pdev->dev,
6373 "couldn't set switch config bits, err %s aq_err %s\n",
6374 i40e_stat_str(hw, ret),
6376 hw->aq.asq_last_status));
6382 * i40e_create_queue_channel - function to create channel
6383 * @vsi: VSI to be configured
6384 * @ch: ptr to channel (it contains channel specific params)
6386 * This function creates channel (VSI) using num_queues specified by user,
6387 * reconfigs RSS if needed.
6389 int i40e_create_queue_channel(struct i40e_vsi *vsi,
6390 struct i40e_channel *ch)
6392 struct i40e_pf *pf = vsi->back;
6399 if (!ch->num_queue_pairs) {
6400 dev_err(&pf->pdev->dev, "Invalid num_queues requested: %d\n",
6401 ch->num_queue_pairs);
6405 /* validate user requested num_queues for channel */
6406 err = i40e_validate_num_queues(pf, ch->num_queue_pairs, vsi,
6409 dev_info(&pf->pdev->dev, "Failed to validate num_queues (%d)\n",
6410 ch->num_queue_pairs);
6414 /* By default we are in VEPA mode, if this is the first VF/VMDq
6415 * VSI to be added switch to VEB mode.
6418 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
6419 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
6421 if (vsi->type == I40E_VSI_MAIN) {
6422 if (pf->flags & I40E_FLAG_TC_MQPRIO)
6423 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
6425 i40e_do_reset_safe(pf, I40E_PF_RESET_FLAG);
6427 /* now onwards for main VSI, number of queues will be value
6428 * of TC0's queue count
6432 /* By this time, vsi->cnt_q_avail shall be set to non-zero and
6433 * it should be more than num_queues
6435 if (!vsi->cnt_q_avail || vsi->cnt_q_avail < ch->num_queue_pairs) {
6436 dev_dbg(&pf->pdev->dev,
6437 "Error: cnt_q_avail (%u) less than num_queues %d\n",
6438 vsi->cnt_q_avail, ch->num_queue_pairs);
6442 /* reconfig_rss only if vsi type is MAIN_VSI */
6443 if (reconfig_rss && (vsi->type == I40E_VSI_MAIN)) {
6444 err = i40e_vsi_reconfig_rss(vsi, ch->num_queue_pairs);
6446 dev_info(&pf->pdev->dev,
6447 "Error: unable to reconfig rss for num_queues (%u)\n",
6448 ch->num_queue_pairs);
6453 if (!i40e_setup_channel(pf, vsi, ch)) {
6454 dev_info(&pf->pdev->dev, "Failed to setup channel\n");
6458 dev_info(&pf->pdev->dev,
6459 "Setup channel (id:%u) utilizing num_queues %d\n",
6460 ch->seid, ch->num_queue_pairs);
6462 /* configure VSI for BW limit */
6463 if (ch->max_tx_rate) {
6464 u64 credits = ch->max_tx_rate;
6466 if (i40e_set_bw_limit(vsi, ch->seid, ch->max_tx_rate))
6469 do_div(credits, I40E_BW_CREDIT_DIVISOR);
6470 dev_dbg(&pf->pdev->dev,
6471 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
6477 /* in case of VF, this will be main SRIOV VSI */
6478 ch->parent_vsi = vsi;
6480 /* and update main_vsi's count for queue_available to use */
6481 vsi->cnt_q_avail -= ch->num_queue_pairs;
6487 * i40e_configure_queue_channels - Add queue channel for the given TCs
6488 * @vsi: VSI to be configured
6490 * Configures queue channel mapping to the given TCs
6492 static int i40e_configure_queue_channels(struct i40e_vsi *vsi)
6494 struct i40e_channel *ch;
6498 /* Create app vsi with the TCs. Main VSI with TC0 is already set up */
6499 vsi->tc_seid_map[0] = vsi->seid;
6500 for (i = 1; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6501 if (vsi->tc_config.enabled_tc & BIT(i)) {
6502 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
6508 INIT_LIST_HEAD(&ch->list);
6509 ch->num_queue_pairs =
6510 vsi->tc_config.tc_info[i].qcount;
6512 vsi->tc_config.tc_info[i].qoffset;
6514 /* Bandwidth limit through tc interface is in bytes/s,
6517 max_rate = vsi->mqprio_qopt.max_rate[i];
6518 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
6519 ch->max_tx_rate = max_rate;
6521 list_add_tail(&ch->list, &vsi->ch_list);
6523 ret = i40e_create_queue_channel(vsi, ch);
6525 dev_err(&vsi->back->pdev->dev,
6526 "Failed creating queue channel with TC%d: queues %d\n",
6527 i, ch->num_queue_pairs);
6530 vsi->tc_seid_map[i] = ch->seid;
6536 i40e_remove_queue_channels(vsi);
6541 * i40e_veb_config_tc - Configure TCs for given VEB
6543 * @enabled_tc: TC bitmap
6545 * Configures given TC bitmap for VEB (switching) element
6547 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
6549 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
6550 struct i40e_pf *pf = veb->pf;
6554 /* No TCs or already enabled TCs just return */
6555 if (!enabled_tc || veb->enabled_tc == enabled_tc)
6558 bw_data.tc_valid_bits = enabled_tc;
6559 /* bw_data.absolute_credits is not set (relative) */
6561 /* Enable ETS TCs with equal BW Share for now */
6562 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6563 if (enabled_tc & BIT(i))
6564 bw_data.tc_bw_share_credits[i] = 1;
6567 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
6570 dev_info(&pf->pdev->dev,
6571 "VEB bw config failed, err %s aq_err %s\n",
6572 i40e_stat_str(&pf->hw, ret),
6573 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6577 /* Update the BW information */
6578 ret = i40e_veb_get_bw_info(veb);
6580 dev_info(&pf->pdev->dev,
6581 "Failed getting veb bw config, err %s aq_err %s\n",
6582 i40e_stat_str(&pf->hw, ret),
6583 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6590 #ifdef CONFIG_I40E_DCB
6592 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
6595 * Reconfigure VEB/VSIs on a given PF; it is assumed that
6596 * the caller would've quiesce all the VSIs before calling
6599 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
6605 /* Enable the TCs available on PF to all VEBs */
6606 tc_map = i40e_pf_get_tc_map(pf);
6607 if (tc_map == I40E_DEFAULT_TRAFFIC_CLASS)
6610 for (v = 0; v < I40E_MAX_VEB; v++) {
6613 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
6615 dev_info(&pf->pdev->dev,
6616 "Failed configuring TC for VEB seid=%d\n",
6618 /* Will try to configure as many components */
6622 /* Update each VSI */
6623 for (v = 0; v < pf->num_alloc_vsi; v++) {
6627 /* - Enable all TCs for the LAN VSI
6628 * - For all others keep them at TC0 for now
6630 if (v == pf->lan_vsi)
6631 tc_map = i40e_pf_get_tc_map(pf);
6633 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
6635 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
6637 dev_info(&pf->pdev->dev,
6638 "Failed configuring TC for VSI seid=%d\n",
6640 /* Will try to configure as many components */
6642 /* Re-configure VSI vectors based on updated TC map */
6643 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
6644 if (pf->vsi[v]->netdev)
6645 i40e_dcbnl_set_all(pf->vsi[v]);
6651 * i40e_resume_port_tx - Resume port Tx
6654 * Resume a port's Tx and issue a PF reset in case of failure to
6657 static int i40e_resume_port_tx(struct i40e_pf *pf)
6659 struct i40e_hw *hw = &pf->hw;
6662 ret = i40e_aq_resume_port_tx(hw, NULL);
6664 dev_info(&pf->pdev->dev,
6665 "Resume Port Tx failed, err %s aq_err %s\n",
6666 i40e_stat_str(&pf->hw, ret),
6667 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6668 /* Schedule PF reset to recover */
6669 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6670 i40e_service_event_schedule(pf);
6677 * i40e_suspend_port_tx - Suspend port Tx
6680 * Suspend a port's Tx and issue a PF reset in case of failure.
6682 static int i40e_suspend_port_tx(struct i40e_pf *pf)
6684 struct i40e_hw *hw = &pf->hw;
6687 ret = i40e_aq_suspend_port_tx(hw, pf->mac_seid, NULL);
6689 dev_info(&pf->pdev->dev,
6690 "Suspend Port Tx failed, err %s aq_err %s\n",
6691 i40e_stat_str(&pf->hw, ret),
6692 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6693 /* Schedule PF reset to recover */
6694 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6695 i40e_service_event_schedule(pf);
6702 * i40e_hw_set_dcb_config - Program new DCBX settings into HW
6703 * @pf: PF being configured
6704 * @new_cfg: New DCBX configuration
6706 * Program DCB settings into HW and reconfigure VEB/VSIs on
6707 * given PF. Uses "Set LLDP MIB" AQC to program the hardware.
6709 static int i40e_hw_set_dcb_config(struct i40e_pf *pf,
6710 struct i40e_dcbx_config *new_cfg)
6712 struct i40e_dcbx_config *old_cfg = &pf->hw.local_dcbx_config;
6715 /* Check if need reconfiguration */
6716 if (!memcmp(&new_cfg, &old_cfg, sizeof(new_cfg))) {
6717 dev_dbg(&pf->pdev->dev, "No Change in DCB Config required.\n");
6721 /* Config change disable all VSIs */
6722 i40e_pf_quiesce_all_vsi(pf);
6724 /* Copy the new config to the current config */
6725 *old_cfg = *new_cfg;
6726 old_cfg->etsrec = old_cfg->etscfg;
6727 ret = i40e_set_dcb_config(&pf->hw);
6729 dev_info(&pf->pdev->dev,
6730 "Set DCB Config failed, err %s aq_err %s\n",
6731 i40e_stat_str(&pf->hw, ret),
6732 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6736 /* Changes in configuration update VEB/VSI */
6737 i40e_dcb_reconfigure(pf);
6739 /* In case of reset do not try to resume anything */
6740 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state)) {
6741 /* Re-start the VSIs if disabled */
6742 ret = i40e_resume_port_tx(pf);
6743 /* In case of error no point in resuming VSIs */
6746 i40e_pf_unquiesce_all_vsi(pf);
6753 * i40e_hw_dcb_config - Program new DCBX settings into HW
6754 * @pf: PF being configured
6755 * @new_cfg: New DCBX configuration
6757 * Program DCB settings into HW and reconfigure VEB/VSIs on
6760 int i40e_hw_dcb_config(struct i40e_pf *pf, struct i40e_dcbx_config *new_cfg)
6762 struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6763 u8 prio_type[I40E_MAX_TRAFFIC_CLASS] = {0};
6764 u32 mfs_tc[I40E_MAX_TRAFFIC_CLASS];
6765 struct i40e_dcbx_config *old_cfg;
6766 u8 mode[I40E_MAX_TRAFFIC_CLASS];
6767 struct i40e_rx_pb_config pb_cfg;
6768 struct i40e_hw *hw = &pf->hw;
6769 u8 num_ports = hw->num_ports;
6777 dev_dbg(&pf->pdev->dev, "Configuring DCB registers directly\n");
6778 /* Un-pack information to Program ETS HW via shared API
6781 * ETS/NON-ETS arbiter mode
6782 * max exponent (credit refills)
6783 * Total number of ports
6784 * PFC priority bit-map
6787 * Arbiter mode between UPs sharing same TC
6788 * TSA table (ETS or non-ETS)
6789 * EEE enabled or not
6793 new_numtc = i40e_dcb_get_num_tc(new_cfg);
6795 memset(&ets_data, 0, sizeof(ets_data));
6796 for (i = 0; i < new_numtc; i++) {
6798 switch (new_cfg->etscfg.tsatable[i]) {
6799 case I40E_IEEE_TSA_ETS:
6800 prio_type[i] = I40E_DCB_PRIO_TYPE_ETS;
6801 ets_data.tc_bw_share_credits[i] =
6802 new_cfg->etscfg.tcbwtable[i];
6804 case I40E_IEEE_TSA_STRICT:
6805 prio_type[i] = I40E_DCB_PRIO_TYPE_STRICT;
6807 ets_data.tc_bw_share_credits[i] =
6808 I40E_DCB_STRICT_PRIO_CREDITS;
6811 /* Invalid TSA type */
6812 need_reconfig = false;
6817 old_cfg = &hw->local_dcbx_config;
6818 /* Check if need reconfiguration */
6819 need_reconfig = i40e_dcb_need_reconfig(pf, old_cfg, new_cfg);
6821 /* If needed, enable/disable frame tagging, disable all VSIs
6822 * and suspend port tx
6824 if (need_reconfig) {
6825 /* Enable DCB tagging only when more than one TC */
6827 pf->flags |= I40E_FLAG_DCB_ENABLED;
6829 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
6831 set_bit(__I40E_PORT_SUSPENDED, pf->state);
6832 /* Reconfiguration needed quiesce all VSIs */
6833 i40e_pf_quiesce_all_vsi(pf);
6834 ret = i40e_suspend_port_tx(pf);
6839 /* Configure Port ETS Tx Scheduler */
6840 ets_data.tc_valid_bits = tc_map;
6841 ets_data.tc_strict_priority_flags = lltc_map;
6842 ret = i40e_aq_config_switch_comp_ets
6843 (hw, pf->mac_seid, &ets_data,
6844 i40e_aqc_opc_modify_switching_comp_ets, NULL);
6846 dev_info(&pf->pdev->dev,
6847 "Modify Port ETS failed, err %s aq_err %s\n",
6848 i40e_stat_str(&pf->hw, ret),
6849 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6853 /* Configure Rx ETS HW */
6854 memset(&mode, I40E_DCB_ARB_MODE_ROUND_ROBIN, sizeof(mode));
6855 i40e_dcb_hw_set_num_tc(hw, new_numtc);
6856 i40e_dcb_hw_rx_fifo_config(hw, I40E_DCB_ARB_MODE_ROUND_ROBIN,
6857 I40E_DCB_ARB_MODE_STRICT_PRIORITY,
6858 I40E_DCB_DEFAULT_MAX_EXPONENT,
6860 i40e_dcb_hw_rx_cmd_monitor_config(hw, new_numtc, num_ports);
6861 i40e_dcb_hw_rx_ets_bw_config(hw, new_cfg->etscfg.tcbwtable, mode,
6863 i40e_dcb_hw_pfc_config(hw, new_cfg->pfc.pfcenable,
6864 new_cfg->etscfg.prioritytable);
6865 i40e_dcb_hw_rx_up2tc_config(hw, new_cfg->etscfg.prioritytable);
6867 /* Configure Rx Packet Buffers in HW */
6868 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
6869 mfs_tc[i] = pf->vsi[pf->lan_vsi]->netdev->mtu;
6870 mfs_tc[i] += I40E_PACKET_HDR_PAD;
6873 i40e_dcb_hw_calculate_pool_sizes(hw, num_ports,
6874 false, new_cfg->pfc.pfcenable,
6876 i40e_dcb_hw_rx_pb_config(hw, &pf->pb_cfg, &pb_cfg);
6878 /* Update the local Rx Packet buffer config */
6879 pf->pb_cfg = pb_cfg;
6881 /* Inform the FW about changes to DCB configuration */
6882 ret = i40e_aq_dcb_updated(&pf->hw, NULL);
6884 dev_info(&pf->pdev->dev,
6885 "DCB Updated failed, err %s aq_err %s\n",
6886 i40e_stat_str(&pf->hw, ret),
6887 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6891 /* Update the port DCBx configuration */
6892 *old_cfg = *new_cfg;
6894 /* Changes in configuration update VEB/VSI */
6895 i40e_dcb_reconfigure(pf);
6897 /* Re-start the VSIs if disabled */
6898 if (need_reconfig) {
6899 ret = i40e_resume_port_tx(pf);
6901 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
6902 /* In case of error no point in resuming VSIs */
6906 /* Wait for the PF's queues to be disabled */
6907 ret = i40e_pf_wait_queues_disabled(pf);
6909 /* Schedule PF reset to recover */
6910 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
6911 i40e_service_event_schedule(pf);
6914 i40e_pf_unquiesce_all_vsi(pf);
6915 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
6916 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
6918 /* registers are set, lets apply */
6919 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB)
6920 ret = i40e_hw_set_dcb_config(pf, new_cfg);
6928 * i40e_dcb_sw_default_config - Set default DCB configuration when DCB in SW
6929 * @pf: PF being queried
6931 * Set default DCB configuration in case DCB is to be done in SW.
6933 int i40e_dcb_sw_default_config(struct i40e_pf *pf)
6935 struct i40e_dcbx_config *dcb_cfg = &pf->hw.local_dcbx_config;
6936 struct i40e_aqc_configure_switching_comp_ets_data ets_data;
6937 struct i40e_hw *hw = &pf->hw;
6940 if (pf->hw_features & I40E_HW_USE_SET_LLDP_MIB) {
6941 /* Update the local cached instance with TC0 ETS */
6942 memset(&pf->tmp_cfg, 0, sizeof(struct i40e_dcbx_config));
6943 pf->tmp_cfg.etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
6944 pf->tmp_cfg.etscfg.maxtcs = 0;
6945 pf->tmp_cfg.etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
6946 pf->tmp_cfg.etscfg.tsatable[0] = I40E_IEEE_TSA_ETS;
6947 pf->tmp_cfg.pfc.willing = I40E_IEEE_DEFAULT_PFC_WILLING;
6948 pf->tmp_cfg.pfc.pfccap = I40E_MAX_TRAFFIC_CLASS;
6949 /* FW needs one App to configure HW */
6950 pf->tmp_cfg.numapps = I40E_IEEE_DEFAULT_NUM_APPS;
6951 pf->tmp_cfg.app[0].selector = I40E_APP_SEL_ETHTYPE;
6952 pf->tmp_cfg.app[0].priority = I40E_IEEE_DEFAULT_APP_PRIO;
6953 pf->tmp_cfg.app[0].protocolid = I40E_APP_PROTOID_FCOE;
6955 return i40e_hw_set_dcb_config(pf, &pf->tmp_cfg);
6958 memset(&ets_data, 0, sizeof(ets_data));
6959 ets_data.tc_valid_bits = I40E_DEFAULT_TRAFFIC_CLASS; /* TC0 only */
6960 ets_data.tc_strict_priority_flags = 0; /* ETS */
6961 ets_data.tc_bw_share_credits[0] = I40E_IEEE_DEFAULT_ETS_TCBW; /* 100% to TC0 */
6963 /* Enable ETS on the Physical port */
6964 err = i40e_aq_config_switch_comp_ets
6965 (hw, pf->mac_seid, &ets_data,
6966 i40e_aqc_opc_enable_switching_comp_ets, NULL);
6968 dev_info(&pf->pdev->dev,
6969 "Enable Port ETS failed, err %s aq_err %s\n",
6970 i40e_stat_str(&pf->hw, err),
6971 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6976 /* Update the local cached instance with TC0 ETS */
6977 dcb_cfg->etscfg.willing = I40E_IEEE_DEFAULT_ETS_WILLING;
6978 dcb_cfg->etscfg.cbs = 0;
6979 dcb_cfg->etscfg.maxtcs = I40E_MAX_TRAFFIC_CLASS;
6980 dcb_cfg->etscfg.tcbwtable[0] = I40E_IEEE_DEFAULT_ETS_TCBW;
6987 * i40e_init_pf_dcb - Initialize DCB configuration
6988 * @pf: PF being configured
6990 * Query the current DCB configuration and cache it
6991 * in the hardware structure
6993 static int i40e_init_pf_dcb(struct i40e_pf *pf)
6995 struct i40e_hw *hw = &pf->hw;
6998 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable
6999 * Also do not enable DCBx if FW LLDP agent is disabled
7001 if (pf->hw_features & I40E_HW_NO_DCB_SUPPORT) {
7002 dev_info(&pf->pdev->dev, "DCB is not supported.\n");
7003 err = I40E_NOT_SUPPORTED;
7006 if (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) {
7007 dev_info(&pf->pdev->dev, "FW LLDP is disabled, attempting SW DCB\n");
7008 err = i40e_dcb_sw_default_config(pf);
7010 dev_info(&pf->pdev->dev, "Could not initialize SW DCB\n");
7013 dev_info(&pf->pdev->dev, "SW DCB initialization succeeded.\n");
7014 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
7015 DCB_CAP_DCBX_VER_IEEE;
7016 /* at init capable but disabled */
7017 pf->flags |= I40E_FLAG_DCB_CAPABLE;
7018 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7021 err = i40e_init_dcb(hw, true);
7023 /* Device/Function is not DCBX capable */
7024 if ((!hw->func_caps.dcb) ||
7025 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
7026 dev_info(&pf->pdev->dev,
7027 "DCBX offload is not supported or is disabled for this PF.\n");
7029 /* When status is not DISABLED then DCBX in FW */
7030 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
7031 DCB_CAP_DCBX_VER_IEEE;
7033 pf->flags |= I40E_FLAG_DCB_CAPABLE;
7034 /* Enable DCB tagging only when more than one TC
7035 * or explicitly disable if only one TC
7037 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
7038 pf->flags |= I40E_FLAG_DCB_ENABLED;
7040 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
7041 dev_dbg(&pf->pdev->dev,
7042 "DCBX offload is supported for this PF.\n");
7044 } else if (pf->hw.aq.asq_last_status == I40E_AQ_RC_EPERM) {
7045 dev_info(&pf->pdev->dev, "FW LLDP disabled for this PF.\n");
7046 pf->flags |= I40E_FLAG_DISABLE_FW_LLDP;
7048 dev_info(&pf->pdev->dev,
7049 "Query for DCB configuration failed, err %s aq_err %s\n",
7050 i40e_stat_str(&pf->hw, err),
7051 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7057 #endif /* CONFIG_I40E_DCB */
7060 * i40e_print_link_message - print link up or down
7061 * @vsi: the VSI for which link needs a message
7062 * @isup: true of link is up, false otherwise
7064 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
7066 enum i40e_aq_link_speed new_speed;
7067 struct i40e_pf *pf = vsi->back;
7068 char *speed = "Unknown";
7069 char *fc = "Unknown";
7075 new_speed = pf->hw.phy.link_info.link_speed;
7077 new_speed = I40E_LINK_SPEED_UNKNOWN;
7079 if ((vsi->current_isup == isup) && (vsi->current_speed == new_speed))
7081 vsi->current_isup = isup;
7082 vsi->current_speed = new_speed;
7084 netdev_info(vsi->netdev, "NIC Link is Down\n");
7088 /* Warn user if link speed on NPAR enabled partition is not at
7091 if (pf->hw.func_caps.npar_enable &&
7092 (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
7093 pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
7094 netdev_warn(vsi->netdev,
7095 "The partition detected link speed that is less than 10Gbps\n");
7097 switch (pf->hw.phy.link_info.link_speed) {
7098 case I40E_LINK_SPEED_40GB:
7101 case I40E_LINK_SPEED_20GB:
7104 case I40E_LINK_SPEED_25GB:
7107 case I40E_LINK_SPEED_10GB:
7110 case I40E_LINK_SPEED_5GB:
7113 case I40E_LINK_SPEED_2_5GB:
7116 case I40E_LINK_SPEED_1GB:
7119 case I40E_LINK_SPEED_100MB:
7126 switch (pf->hw.fc.current_mode) {
7130 case I40E_FC_TX_PAUSE:
7133 case I40E_FC_RX_PAUSE:
7141 if (pf->hw.phy.link_info.link_speed == I40E_LINK_SPEED_25GB) {
7146 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7149 if (pf->hw.phy.link_info.fec_info &
7150 I40E_AQ_CONFIG_FEC_KR_ENA)
7151 fec = "CL74 FC-FEC/BASE-R";
7152 else if (pf->hw.phy.link_info.fec_info &
7153 I40E_AQ_CONFIG_FEC_RS_ENA)
7154 fec = "CL108 RS-FEC";
7156 /* 'CL108 RS-FEC' should be displayed when RS is requested, or
7157 * both RS and FC are requested
7159 if (vsi->back->hw.phy.link_info.req_fec_info &
7160 (I40E_AQ_REQUEST_FEC_KR | I40E_AQ_REQUEST_FEC_RS)) {
7161 if (vsi->back->hw.phy.link_info.req_fec_info &
7162 I40E_AQ_REQUEST_FEC_RS)
7163 req_fec = "CL108 RS-FEC";
7165 req_fec = "CL74 FC-FEC/BASE-R";
7167 netdev_info(vsi->netdev,
7168 "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7169 speed, req_fec, fec, an, fc);
7170 } else if (pf->hw.device_id == I40E_DEV_ID_KX_X722) {
7175 if (pf->hw.phy.link_info.an_info & I40E_AQ_AN_COMPLETED)
7178 if (pf->hw.phy.link_info.fec_info &
7179 I40E_AQ_CONFIG_FEC_KR_ENA)
7180 fec = "CL74 FC-FEC/BASE-R";
7182 if (pf->hw.phy.link_info.req_fec_info &
7183 I40E_AQ_REQUEST_FEC_KR)
7184 req_fec = "CL74 FC-FEC/BASE-R";
7186 netdev_info(vsi->netdev,
7187 "NIC Link is Up, %sbps Full Duplex, Requested FEC: %s, Negotiated FEC: %s, Autoneg: %s, Flow Control: %s\n",
7188 speed, req_fec, fec, an, fc);
7190 netdev_info(vsi->netdev,
7191 "NIC Link is Up, %sbps Full Duplex, Flow Control: %s\n",
7198 * i40e_up_complete - Finish the last steps of bringing up a connection
7199 * @vsi: the VSI being configured
7201 static int i40e_up_complete(struct i40e_vsi *vsi)
7203 struct i40e_pf *pf = vsi->back;
7206 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7207 i40e_vsi_configure_msix(vsi);
7209 i40e_configure_msi_and_legacy(vsi);
7212 err = i40e_vsi_start_rings(vsi);
7216 clear_bit(__I40E_VSI_DOWN, vsi->state);
7217 i40e_napi_enable_all(vsi);
7218 i40e_vsi_enable_irq(vsi);
7220 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
7222 i40e_print_link_message(vsi, true);
7223 netif_tx_start_all_queues(vsi->netdev);
7224 netif_carrier_on(vsi->netdev);
7227 /* replay FDIR SB filters */
7228 if (vsi->type == I40E_VSI_FDIR) {
7229 /* reset fd counters */
7232 i40e_fdir_filter_restore(vsi);
7235 /* On the next run of the service_task, notify any clients of the new
7238 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
7239 i40e_service_event_schedule(pf);
7245 * i40e_vsi_reinit_locked - Reset the VSI
7246 * @vsi: the VSI being configured
7248 * Rebuild the ring structs after some configuration
7249 * has changed, e.g. MTU size.
7251 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
7253 struct i40e_pf *pf = vsi->back;
7255 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state))
7256 usleep_range(1000, 2000);
7260 clear_bit(__I40E_CONFIG_BUSY, pf->state);
7264 * i40e_force_link_state - Force the link status
7265 * @pf: board private structure
7266 * @is_up: whether the link state should be forced up or down
7268 static i40e_status i40e_force_link_state(struct i40e_pf *pf, bool is_up)
7270 struct i40e_aq_get_phy_abilities_resp abilities;
7271 struct i40e_aq_set_phy_config config = {0};
7272 bool non_zero_phy_type = is_up;
7273 struct i40e_hw *hw = &pf->hw;
7278 /* Card might've been put in an unstable state by other drivers
7279 * and applications, which causes incorrect speed values being
7280 * set on startup. In order to clear speed registers, we call
7281 * get_phy_capabilities twice, once to get initial state of
7282 * available speeds, and once to get current PHY config.
7284 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
7287 dev_err(&pf->pdev->dev,
7288 "failed to get phy cap., ret = %s last_status = %s\n",
7289 i40e_stat_str(hw, err),
7290 i40e_aq_str(hw, hw->aq.asq_last_status));
7293 speed = abilities.link_speed;
7295 /* Get the current phy config */
7296 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
7299 dev_err(&pf->pdev->dev,
7300 "failed to get phy cap., ret = %s last_status = %s\n",
7301 i40e_stat_str(hw, err),
7302 i40e_aq_str(hw, hw->aq.asq_last_status));
7306 /* If link needs to go up, but was not forced to go down,
7307 * and its speed values are OK, no need for a flap
7308 * if non_zero_phy_type was set, still need to force up
7310 if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED)
7311 non_zero_phy_type = true;
7312 else if (is_up && abilities.phy_type != 0 && abilities.link_speed != 0)
7313 return I40E_SUCCESS;
7315 /* To force link we need to set bits for all supported PHY types,
7316 * but there are now more than 32, so we need to split the bitmap
7317 * across two fields.
7319 mask = I40E_PHY_TYPES_BITMASK;
7321 non_zero_phy_type ? cpu_to_le32((u32)(mask & 0xffffffff)) : 0;
7322 config.phy_type_ext =
7323 non_zero_phy_type ? (u8)((mask >> 32) & 0xff) : 0;
7324 /* Copy the old settings, except of phy_type */
7325 config.abilities = abilities.abilities;
7326 if (pf->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED) {
7328 config.abilities |= I40E_AQ_PHY_ENABLE_LINK;
7330 config.abilities &= ~(I40E_AQ_PHY_ENABLE_LINK);
7332 if (abilities.link_speed != 0)
7333 config.link_speed = abilities.link_speed;
7335 config.link_speed = speed;
7336 config.eee_capability = abilities.eee_capability;
7337 config.eeer = abilities.eeer_val;
7338 config.low_power_ctrl = abilities.d3_lpan;
7339 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
7340 I40E_AQ_PHY_FEC_CONFIG_MASK;
7341 err = i40e_aq_set_phy_config(hw, &config, NULL);
7344 dev_err(&pf->pdev->dev,
7345 "set phy config ret = %s last_status = %s\n",
7346 i40e_stat_str(&pf->hw, err),
7347 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
7351 /* Update the link info */
7352 err = i40e_update_link_info(hw);
7354 /* Wait a little bit (on 40G cards it sometimes takes a really
7355 * long time for link to come back from the atomic reset)
7359 i40e_update_link_info(hw);
7362 i40e_aq_set_link_restart_an(hw, is_up, NULL);
7364 return I40E_SUCCESS;
7368 * i40e_up - Bring the connection back up after being down
7369 * @vsi: the VSI being configured
7371 int i40e_up(struct i40e_vsi *vsi)
7375 if (vsi->type == I40E_VSI_MAIN &&
7376 (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7377 vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7378 i40e_force_link_state(vsi->back, true);
7380 err = i40e_vsi_configure(vsi);
7382 err = i40e_up_complete(vsi);
7388 * i40e_down - Shutdown the connection processing
7389 * @vsi: the VSI being stopped
7391 void i40e_down(struct i40e_vsi *vsi)
7395 /* It is assumed that the caller of this function
7396 * sets the vsi->state __I40E_VSI_DOWN bit.
7399 netif_carrier_off(vsi->netdev);
7400 netif_tx_disable(vsi->netdev);
7402 i40e_vsi_disable_irq(vsi);
7403 i40e_vsi_stop_rings(vsi);
7404 if (vsi->type == I40E_VSI_MAIN &&
7405 (vsi->back->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED ||
7406 vsi->back->flags & I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED))
7407 i40e_force_link_state(vsi->back, false);
7408 i40e_napi_disable_all(vsi);
7410 for (i = 0; i < vsi->num_queue_pairs; i++) {
7411 i40e_clean_tx_ring(vsi->tx_rings[i]);
7412 if (i40e_enabled_xdp_vsi(vsi)) {
7413 /* Make sure that in-progress ndo_xdp_xmit and
7414 * ndo_xsk_wakeup calls are completed.
7417 i40e_clean_tx_ring(vsi->xdp_rings[i]);
7419 i40e_clean_rx_ring(vsi->rx_rings[i]);
7425 * i40e_validate_mqprio_qopt- validate queue mapping info
7426 * @vsi: the VSI being configured
7427 * @mqprio_qopt: queue parametrs
7429 static int i40e_validate_mqprio_qopt(struct i40e_vsi *vsi,
7430 struct tc_mqprio_qopt_offload *mqprio_qopt)
7432 u64 sum_max_rate = 0;
7436 if (mqprio_qopt->qopt.offset[0] != 0 ||
7437 mqprio_qopt->qopt.num_tc < 1 ||
7438 mqprio_qopt->qopt.num_tc > I40E_MAX_TRAFFIC_CLASS)
7440 for (i = 0; ; i++) {
7441 if (!mqprio_qopt->qopt.count[i])
7443 if (mqprio_qopt->min_rate[i]) {
7444 dev_err(&vsi->back->pdev->dev,
7445 "Invalid min tx rate (greater than 0) specified\n");
7448 max_rate = mqprio_qopt->max_rate[i];
7449 do_div(max_rate, I40E_BW_MBPS_DIVISOR);
7450 sum_max_rate += max_rate;
7452 if (i >= mqprio_qopt->qopt.num_tc - 1)
7454 if (mqprio_qopt->qopt.offset[i + 1] !=
7455 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i]))
7458 if (vsi->num_queue_pairs <
7459 (mqprio_qopt->qopt.offset[i] + mqprio_qopt->qopt.count[i])) {
7460 dev_err(&vsi->back->pdev->dev,
7461 "Failed to create traffic channel, insufficient number of queues.\n");
7464 if (sum_max_rate > i40e_get_link_speed(vsi)) {
7465 dev_err(&vsi->back->pdev->dev,
7466 "Invalid max tx rate specified\n");
7473 * i40e_vsi_set_default_tc_config - set default values for tc configuration
7474 * @vsi: the VSI being configured
7476 static void i40e_vsi_set_default_tc_config(struct i40e_vsi *vsi)
7481 /* Only TC0 is enabled */
7482 vsi->tc_config.numtc = 1;
7483 vsi->tc_config.enabled_tc = 1;
7484 qcount = min_t(int, vsi->alloc_queue_pairs,
7485 i40e_pf_get_max_q_per_tc(vsi->back));
7486 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
7487 /* For the TC that is not enabled set the offset to default
7488 * queue and allocate one queue for the given TC.
7490 vsi->tc_config.tc_info[i].qoffset = 0;
7492 vsi->tc_config.tc_info[i].qcount = qcount;
7494 vsi->tc_config.tc_info[i].qcount = 1;
7495 vsi->tc_config.tc_info[i].netdev_tc = 0;
7500 * i40e_del_macvlan_filter
7501 * @hw: pointer to the HW structure
7502 * @seid: seid of the channel VSI
7503 * @macaddr: the mac address to apply as a filter
7504 * @aq_err: store the admin Q error
7506 * This function deletes a mac filter on the channel VSI which serves as the
7507 * macvlan. Returns 0 on success.
7509 static i40e_status i40e_del_macvlan_filter(struct i40e_hw *hw, u16 seid,
7510 const u8 *macaddr, int *aq_err)
7512 struct i40e_aqc_remove_macvlan_element_data element;
7515 memset(&element, 0, sizeof(element));
7516 ether_addr_copy(element.mac_addr, macaddr);
7517 element.vlan_tag = 0;
7518 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
7519 status = i40e_aq_remove_macvlan(hw, seid, &element, 1, NULL);
7520 *aq_err = hw->aq.asq_last_status;
7526 * i40e_add_macvlan_filter
7527 * @hw: pointer to the HW structure
7528 * @seid: seid of the channel VSI
7529 * @macaddr: the mac address to apply as a filter
7530 * @aq_err: store the admin Q error
7532 * This function adds a mac filter on the channel VSI which serves as the
7533 * macvlan. Returns 0 on success.
7535 static i40e_status i40e_add_macvlan_filter(struct i40e_hw *hw, u16 seid,
7536 const u8 *macaddr, int *aq_err)
7538 struct i40e_aqc_add_macvlan_element_data element;
7542 ether_addr_copy(element.mac_addr, macaddr);
7543 element.vlan_tag = 0;
7544 element.queue_number = 0;
7545 element.match_method = I40E_AQC_MM_ERR_NO_RES;
7546 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
7547 element.flags = cpu_to_le16(cmd_flags);
7548 status = i40e_aq_add_macvlan(hw, seid, &element, 1, NULL);
7549 *aq_err = hw->aq.asq_last_status;
7555 * i40e_reset_ch_rings - Reset the queue contexts in a channel
7556 * @vsi: the VSI we want to access
7557 * @ch: the channel we want to access
7559 static void i40e_reset_ch_rings(struct i40e_vsi *vsi, struct i40e_channel *ch)
7561 struct i40e_ring *tx_ring, *rx_ring;
7565 for (i = 0; i < ch->num_queue_pairs; i++) {
7566 pf_q = ch->base_queue + i;
7567 tx_ring = vsi->tx_rings[pf_q];
7569 rx_ring = vsi->rx_rings[pf_q];
7575 * i40e_free_macvlan_channels
7576 * @vsi: the VSI we want to access
7578 * This function frees the Qs of the channel VSI from
7579 * the stack and also deletes the channel VSIs which
7580 * serve as macvlans.
7582 static void i40e_free_macvlan_channels(struct i40e_vsi *vsi)
7584 struct i40e_channel *ch, *ch_tmp;
7587 if (list_empty(&vsi->macvlan_list))
7590 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7591 struct i40e_vsi *parent_vsi;
7593 if (i40e_is_channel_macvlan(ch)) {
7594 i40e_reset_ch_rings(vsi, ch);
7595 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7596 netdev_unbind_sb_channel(vsi->netdev, ch->fwd->netdev);
7597 netdev_set_sb_channel(ch->fwd->netdev, 0);
7602 list_del(&ch->list);
7603 parent_vsi = ch->parent_vsi;
7604 if (!parent_vsi || !ch->initialized) {
7609 /* remove the VSI */
7610 ret = i40e_aq_delete_element(&vsi->back->hw, ch->seid,
7613 dev_err(&vsi->back->pdev->dev,
7614 "unable to remove channel (%d) for parent VSI(%d)\n",
7615 ch->seid, parent_vsi->seid);
7618 vsi->macvlan_cnt = 0;
7622 * i40e_fwd_ring_up - bring the macvlan device up
7623 * @vsi: the VSI we want to access
7624 * @vdev: macvlan netdevice
7625 * @fwd: the private fwd structure
7627 static int i40e_fwd_ring_up(struct i40e_vsi *vsi, struct net_device *vdev,
7628 struct i40e_fwd_adapter *fwd)
7630 struct i40e_channel *ch = NULL, *ch_tmp, *iter;
7631 int ret = 0, num_tc = 1, i, aq_err;
7632 struct i40e_pf *pf = vsi->back;
7633 struct i40e_hw *hw = &pf->hw;
7635 /* Go through the list and find an available channel */
7636 list_for_each_entry_safe(iter, ch_tmp, &vsi->macvlan_list, list) {
7637 if (!i40e_is_channel_macvlan(iter)) {
7639 /* record configuration for macvlan interface in vdev */
7640 for (i = 0; i < num_tc; i++)
7641 netdev_bind_sb_channel_queue(vsi->netdev, vdev,
7643 iter->num_queue_pairs,
7645 for (i = 0; i < iter->num_queue_pairs; i++) {
7646 struct i40e_ring *tx_ring, *rx_ring;
7649 pf_q = iter->base_queue + i;
7651 /* Get to TX ring ptr */
7652 tx_ring = vsi->tx_rings[pf_q];
7655 /* Get the RX ring ptr */
7656 rx_ring = vsi->rx_rings[pf_q];
7667 /* Guarantee all rings are updated before we update the
7668 * MAC address filter.
7672 /* Add a mac filter */
7673 ret = i40e_add_macvlan_filter(hw, ch->seid, vdev->dev_addr, &aq_err);
7675 /* if we cannot add the MAC rule then disable the offload */
7676 macvlan_release_l2fw_offload(vdev);
7677 for (i = 0; i < ch->num_queue_pairs; i++) {
7678 struct i40e_ring *rx_ring;
7681 pf_q = ch->base_queue + i;
7682 rx_ring = vsi->rx_rings[pf_q];
7683 rx_ring->netdev = NULL;
7685 dev_info(&pf->pdev->dev,
7686 "Error adding mac filter on macvlan err %s, aq_err %s\n",
7687 i40e_stat_str(hw, ret),
7688 i40e_aq_str(hw, aq_err));
7689 netdev_err(vdev, "L2fwd offload disabled to L2 filter error\n");
7696 * i40e_setup_macvlans - create the channels which will be macvlans
7697 * @vsi: the VSI we want to access
7698 * @macvlan_cnt: no. of macvlans to be setup
7699 * @qcnt: no. of Qs per macvlan
7700 * @vdev: macvlan netdevice
7702 static int i40e_setup_macvlans(struct i40e_vsi *vsi, u16 macvlan_cnt, u16 qcnt,
7703 struct net_device *vdev)
7705 struct i40e_pf *pf = vsi->back;
7706 struct i40e_hw *hw = &pf->hw;
7707 struct i40e_vsi_context ctxt;
7708 u16 sections, qmap, num_qps;
7709 struct i40e_channel *ch;
7710 int i, pow, ret = 0;
7713 if (vsi->type != I40E_VSI_MAIN || !macvlan_cnt)
7716 num_qps = vsi->num_queue_pairs - (macvlan_cnt * qcnt);
7718 /* find the next higher power-of-2 of num queue pairs */
7719 pow = fls(roundup_pow_of_two(num_qps) - 1);
7721 qmap = (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
7722 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
7724 /* Setup context bits for the main VSI */
7725 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
7726 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
7727 memset(&ctxt, 0, sizeof(ctxt));
7728 ctxt.seid = vsi->seid;
7729 ctxt.pf_num = vsi->back->hw.pf_id;
7731 ctxt.uplink_seid = vsi->uplink_seid;
7732 ctxt.info = vsi->info;
7733 ctxt.info.tc_mapping[0] = cpu_to_le16(qmap);
7734 ctxt.info.mapping_flags |= cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
7735 ctxt.info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
7736 ctxt.info.valid_sections |= cpu_to_le16(sections);
7738 /* Reconfigure RSS for main VSI with new max queue count */
7739 vsi->rss_size = max_t(u16, num_qps, qcnt);
7740 ret = i40e_vsi_config_rss(vsi);
7742 dev_info(&pf->pdev->dev,
7743 "Failed to reconfig RSS for num_queues (%u)\n",
7747 vsi->reconfig_rss = true;
7748 dev_dbg(&vsi->back->pdev->dev,
7749 "Reconfigured RSS with num_queues (%u)\n", vsi->rss_size);
7750 vsi->next_base_queue = num_qps;
7751 vsi->cnt_q_avail = vsi->num_queue_pairs - num_qps;
7753 /* Update the VSI after updating the VSI queue-mapping
7756 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
7758 dev_info(&pf->pdev->dev,
7759 "Update vsi tc config failed, err %s aq_err %s\n",
7760 i40e_stat_str(hw, ret),
7761 i40e_aq_str(hw, hw->aq.asq_last_status));
7764 /* update the local VSI info with updated queue map */
7765 i40e_vsi_update_queue_map(vsi, &ctxt);
7766 vsi->info.valid_sections = 0;
7768 /* Create channels for macvlans */
7769 INIT_LIST_HEAD(&vsi->macvlan_list);
7770 for (i = 0; i < macvlan_cnt; i++) {
7771 ch = kzalloc(sizeof(*ch), GFP_KERNEL);
7776 INIT_LIST_HEAD(&ch->list);
7777 ch->num_queue_pairs = qcnt;
7778 if (!i40e_setup_channel(pf, vsi, ch)) {
7783 ch->parent_vsi = vsi;
7784 vsi->cnt_q_avail -= ch->num_queue_pairs;
7786 list_add_tail(&ch->list, &vsi->macvlan_list);
7792 dev_info(&pf->pdev->dev, "Failed to setup macvlans\n");
7793 i40e_free_macvlan_channels(vsi);
7799 * i40e_fwd_add - configure macvlans
7800 * @netdev: net device to configure
7801 * @vdev: macvlan netdevice
7803 static void *i40e_fwd_add(struct net_device *netdev, struct net_device *vdev)
7805 struct i40e_netdev_priv *np = netdev_priv(netdev);
7806 u16 q_per_macvlan = 0, macvlan_cnt = 0, vectors;
7807 struct i40e_vsi *vsi = np->vsi;
7808 struct i40e_pf *pf = vsi->back;
7809 struct i40e_fwd_adapter *fwd;
7810 int avail_macvlan, ret;
7812 if ((pf->flags & I40E_FLAG_DCB_ENABLED)) {
7813 netdev_info(netdev, "Macvlans are not supported when DCB is enabled\n");
7814 return ERR_PTR(-EINVAL);
7816 if ((pf->flags & I40E_FLAG_TC_MQPRIO)) {
7817 netdev_info(netdev, "Macvlans are not supported when HW TC offload is on\n");
7818 return ERR_PTR(-EINVAL);
7820 if (pf->num_lan_msix < I40E_MIN_MACVLAN_VECTORS) {
7821 netdev_info(netdev, "Not enough vectors available to support macvlans\n");
7822 return ERR_PTR(-EINVAL);
7825 /* The macvlan device has to be a single Q device so that the
7826 * tc_to_txq field can be reused to pick the tx queue.
7828 if (netif_is_multiqueue(vdev))
7829 return ERR_PTR(-ERANGE);
7831 if (!vsi->macvlan_cnt) {
7832 /* reserve bit 0 for the pf device */
7833 set_bit(0, vsi->fwd_bitmask);
7835 /* Try to reserve as many queues as possible for macvlans. First
7836 * reserve 3/4th of max vectors, then half, then quarter and
7837 * calculate Qs per macvlan as you go
7839 vectors = pf->num_lan_msix;
7840 if (vectors <= I40E_MAX_MACVLANS && vectors > 64) {
7841 /* allocate 4 Qs per macvlan and 32 Qs to the PF*/
7843 macvlan_cnt = (vectors - 32) / 4;
7844 } else if (vectors <= 64 && vectors > 32) {
7845 /* allocate 2 Qs per macvlan and 16 Qs to the PF*/
7847 macvlan_cnt = (vectors - 16) / 2;
7848 } else if (vectors <= 32 && vectors > 16) {
7849 /* allocate 1 Q per macvlan and 16 Qs to the PF*/
7851 macvlan_cnt = vectors - 16;
7852 } else if (vectors <= 16 && vectors > 8) {
7853 /* allocate 1 Q per macvlan and 8 Qs to the PF */
7855 macvlan_cnt = vectors - 8;
7857 /* allocate 1 Q per macvlan and 1 Q to the PF */
7859 macvlan_cnt = vectors - 1;
7862 if (macvlan_cnt == 0)
7863 return ERR_PTR(-EBUSY);
7865 /* Quiesce VSI queues */
7866 i40e_quiesce_vsi(vsi);
7868 /* sets up the macvlans but does not "enable" them */
7869 ret = i40e_setup_macvlans(vsi, macvlan_cnt, q_per_macvlan,
7872 return ERR_PTR(ret);
7875 i40e_unquiesce_vsi(vsi);
7877 avail_macvlan = find_first_zero_bit(vsi->fwd_bitmask,
7879 if (avail_macvlan >= I40E_MAX_MACVLANS)
7880 return ERR_PTR(-EBUSY);
7882 /* create the fwd struct */
7883 fwd = kzalloc(sizeof(*fwd), GFP_KERNEL);
7885 return ERR_PTR(-ENOMEM);
7887 set_bit(avail_macvlan, vsi->fwd_bitmask);
7888 fwd->bit_no = avail_macvlan;
7889 netdev_set_sb_channel(vdev, avail_macvlan);
7892 if (!netif_running(netdev))
7895 /* Set fwd ring up */
7896 ret = i40e_fwd_ring_up(vsi, vdev, fwd);
7898 /* unbind the queues and drop the subordinate channel config */
7899 netdev_unbind_sb_channel(netdev, vdev);
7900 netdev_set_sb_channel(vdev, 0);
7903 return ERR_PTR(-EINVAL);
7910 * i40e_del_all_macvlans - Delete all the mac filters on the channels
7911 * @vsi: the VSI we want to access
7913 static void i40e_del_all_macvlans(struct i40e_vsi *vsi)
7915 struct i40e_channel *ch, *ch_tmp;
7916 struct i40e_pf *pf = vsi->back;
7917 struct i40e_hw *hw = &pf->hw;
7918 int aq_err, ret = 0;
7920 if (list_empty(&vsi->macvlan_list))
7923 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7924 if (i40e_is_channel_macvlan(ch)) {
7925 ret = i40e_del_macvlan_filter(hw, ch->seid,
7926 i40e_channel_mac(ch),
7929 /* Reset queue contexts */
7930 i40e_reset_ch_rings(vsi, ch);
7931 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7932 netdev_unbind_sb_channel(vsi->netdev,
7934 netdev_set_sb_channel(ch->fwd->netdev, 0);
7943 * i40e_fwd_del - delete macvlan interfaces
7944 * @netdev: net device to configure
7945 * @vdev: macvlan netdevice
7947 static void i40e_fwd_del(struct net_device *netdev, void *vdev)
7949 struct i40e_netdev_priv *np = netdev_priv(netdev);
7950 struct i40e_fwd_adapter *fwd = vdev;
7951 struct i40e_channel *ch, *ch_tmp;
7952 struct i40e_vsi *vsi = np->vsi;
7953 struct i40e_pf *pf = vsi->back;
7954 struct i40e_hw *hw = &pf->hw;
7955 int aq_err, ret = 0;
7957 /* Find the channel associated with the macvlan and del mac filter */
7958 list_for_each_entry_safe(ch, ch_tmp, &vsi->macvlan_list, list) {
7959 if (i40e_is_channel_macvlan(ch) &&
7960 ether_addr_equal(i40e_channel_mac(ch),
7961 fwd->netdev->dev_addr)) {
7962 ret = i40e_del_macvlan_filter(hw, ch->seid,
7963 i40e_channel_mac(ch),
7966 /* Reset queue contexts */
7967 i40e_reset_ch_rings(vsi, ch);
7968 clear_bit(ch->fwd->bit_no, vsi->fwd_bitmask);
7969 netdev_unbind_sb_channel(netdev, fwd->netdev);
7970 netdev_set_sb_channel(fwd->netdev, 0);
7974 dev_info(&pf->pdev->dev,
7975 "Error deleting mac filter on macvlan err %s, aq_err %s\n",
7976 i40e_stat_str(hw, ret),
7977 i40e_aq_str(hw, aq_err));
7985 * i40e_setup_tc - configure multiple traffic classes
7986 * @netdev: net device to configure
7987 * @type_data: tc offload data
7989 static int i40e_setup_tc(struct net_device *netdev, void *type_data)
7991 struct tc_mqprio_qopt_offload *mqprio_qopt = type_data;
7992 struct i40e_netdev_priv *np = netdev_priv(netdev);
7993 struct i40e_vsi *vsi = np->vsi;
7994 struct i40e_pf *pf = vsi->back;
7995 u8 enabled_tc = 0, num_tc, hw;
7996 bool need_reset = false;
7997 int old_queue_pairs;
8002 old_queue_pairs = vsi->num_queue_pairs;
8003 num_tc = mqprio_qopt->qopt.num_tc;
8004 hw = mqprio_qopt->qopt.hw;
8005 mode = mqprio_qopt->mode;
8007 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
8008 memcpy(&vsi->mqprio_qopt, mqprio_qopt, sizeof(*mqprio_qopt));
8012 /* Check if MFP enabled */
8013 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
8015 "Configuring TC not supported in MFP mode\n");
8019 case TC_MQPRIO_MODE_DCB:
8020 pf->flags &= ~I40E_FLAG_TC_MQPRIO;
8022 /* Check if DCB enabled to continue */
8023 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
8025 "DCB is not enabled for adapter\n");
8029 /* Check whether tc count is within enabled limit */
8030 if (num_tc > i40e_pf_get_num_tc(pf)) {
8032 "TC count greater than enabled on link for adapter\n");
8036 case TC_MQPRIO_MODE_CHANNEL:
8037 if (pf->flags & I40E_FLAG_DCB_ENABLED) {
8039 "Full offload of TC Mqprio options is not supported when DCB is enabled\n");
8042 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
8044 ret = i40e_validate_mqprio_qopt(vsi, mqprio_qopt);
8047 memcpy(&vsi->mqprio_qopt, mqprio_qopt,
8048 sizeof(*mqprio_qopt));
8049 pf->flags |= I40E_FLAG_TC_MQPRIO;
8050 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
8057 /* Generate TC map for number of tc requested */
8058 for (i = 0; i < num_tc; i++)
8059 enabled_tc |= BIT(i);
8061 /* Requesting same TC configuration as already enabled */
8062 if (enabled_tc == vsi->tc_config.enabled_tc &&
8063 mode != TC_MQPRIO_MODE_CHANNEL)
8066 /* Quiesce VSI queues */
8067 i40e_quiesce_vsi(vsi);
8069 if (!hw && !(pf->flags & I40E_FLAG_TC_MQPRIO))
8070 i40e_remove_queue_channels(vsi);
8072 /* Configure VSI for enabled TCs */
8073 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8075 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
8079 } else if (enabled_tc &&
8080 (!is_power_of_2(vsi->tc_config.tc_info[0].qcount))) {
8082 "Failed to create channel. Override queues (%u) not power of 2\n",
8083 vsi->tc_config.tc_info[0].qcount);
8089 dev_info(&vsi->back->pdev->dev,
8090 "Setup channel (id:%u) utilizing num_queues %d\n",
8091 vsi->seid, vsi->tc_config.tc_info[0].qcount);
8093 if (pf->flags & I40E_FLAG_TC_MQPRIO) {
8094 if (vsi->mqprio_qopt.max_rate[0]) {
8095 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
8097 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
8098 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
8100 u64 credits = max_tx_rate;
8102 do_div(credits, I40E_BW_CREDIT_DIVISOR);
8103 dev_dbg(&vsi->back->pdev->dev,
8104 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
8113 ret = i40e_configure_queue_channels(vsi);
8115 vsi->num_queue_pairs = old_queue_pairs;
8117 "Failed configuring queue channels\n");
8124 /* Reset the configuration data to defaults, only TC0 is enabled */
8126 i40e_vsi_set_default_tc_config(vsi);
8131 i40e_unquiesce_vsi(vsi);
8136 * i40e_set_cld_element - sets cloud filter element data
8137 * @filter: cloud filter rule
8138 * @cld: ptr to cloud filter element data
8140 * This is helper function to copy data into cloud filter element
8143 i40e_set_cld_element(struct i40e_cloud_filter *filter,
8144 struct i40e_aqc_cloud_filters_element_data *cld)
8149 memset(cld, 0, sizeof(*cld));
8150 ether_addr_copy(cld->outer_mac, filter->dst_mac);
8151 ether_addr_copy(cld->inner_mac, filter->src_mac);
8153 if (filter->n_proto != ETH_P_IP && filter->n_proto != ETH_P_IPV6)
8156 if (filter->n_proto == ETH_P_IPV6) {
8157 #define IPV6_MAX_INDEX (ARRAY_SIZE(filter->dst_ipv6) - 1)
8158 for (i = 0; i < ARRAY_SIZE(filter->dst_ipv6); i++) {
8159 ipa = be32_to_cpu(filter->dst_ipv6[IPV6_MAX_INDEX - i]);
8161 *(__le32 *)&cld->ipaddr.raw_v6.data[i * 2] = cpu_to_le32(ipa);
8164 ipa = be32_to_cpu(filter->dst_ipv4);
8166 memcpy(&cld->ipaddr.v4.data, &ipa, sizeof(ipa));
8169 cld->inner_vlan = cpu_to_le16(ntohs(filter->vlan_id));
8171 /* tenant_id is not supported by FW now, once the support is enabled
8172 * fill the cld->tenant_id with cpu_to_le32(filter->tenant_id)
8174 if (filter->tenant_id)
8179 * i40e_add_del_cloud_filter - Add/del cloud filter
8180 * @vsi: pointer to VSI
8181 * @filter: cloud filter rule
8182 * @add: if true, add, if false, delete
8184 * Add or delete a cloud filter for a specific flow spec.
8185 * Returns 0 if the filter were successfully added.
8187 int i40e_add_del_cloud_filter(struct i40e_vsi *vsi,
8188 struct i40e_cloud_filter *filter, bool add)
8190 struct i40e_aqc_cloud_filters_element_data cld_filter;
8191 struct i40e_pf *pf = vsi->back;
8193 static const u16 flag_table[128] = {
8194 [I40E_CLOUD_FILTER_FLAGS_OMAC] =
8195 I40E_AQC_ADD_CLOUD_FILTER_OMAC,
8196 [I40E_CLOUD_FILTER_FLAGS_IMAC] =
8197 I40E_AQC_ADD_CLOUD_FILTER_IMAC,
8198 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN] =
8199 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN,
8200 [I40E_CLOUD_FILTER_FLAGS_IMAC_TEN_ID] =
8201 I40E_AQC_ADD_CLOUD_FILTER_IMAC_TEN_ID,
8202 [I40E_CLOUD_FILTER_FLAGS_OMAC_TEN_ID_IMAC] =
8203 I40E_AQC_ADD_CLOUD_FILTER_OMAC_TEN_ID_IMAC,
8204 [I40E_CLOUD_FILTER_FLAGS_IMAC_IVLAN_TEN_ID] =
8205 I40E_AQC_ADD_CLOUD_FILTER_IMAC_IVLAN_TEN_ID,
8206 [I40E_CLOUD_FILTER_FLAGS_IIP] =
8207 I40E_AQC_ADD_CLOUD_FILTER_IIP,
8210 if (filter->flags >= ARRAY_SIZE(flag_table))
8211 return I40E_ERR_CONFIG;
8213 memset(&cld_filter, 0, sizeof(cld_filter));
8215 /* copy element needed to add cloud filter from filter */
8216 i40e_set_cld_element(filter, &cld_filter);
8218 if (filter->tunnel_type != I40E_CLOUD_TNL_TYPE_NONE)
8219 cld_filter.flags = cpu_to_le16(filter->tunnel_type <<
8220 I40E_AQC_ADD_CLOUD_TNL_TYPE_SHIFT);
8222 if (filter->n_proto == ETH_P_IPV6)
8223 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8224 I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8226 cld_filter.flags |= cpu_to_le16(flag_table[filter->flags] |
8227 I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8230 ret = i40e_aq_add_cloud_filters(&pf->hw, filter->seid,
8233 ret = i40e_aq_rem_cloud_filters(&pf->hw, filter->seid,
8236 dev_dbg(&pf->pdev->dev,
8237 "Failed to %s cloud filter using l4 port %u, err %d aq_err %d\n",
8238 add ? "add" : "delete", filter->dst_port, ret,
8239 pf->hw.aq.asq_last_status);
8241 dev_info(&pf->pdev->dev,
8242 "%s cloud filter for VSI: %d\n",
8243 add ? "Added" : "Deleted", filter->seid);
8248 * i40e_add_del_cloud_filter_big_buf - Add/del cloud filter using big_buf
8249 * @vsi: pointer to VSI
8250 * @filter: cloud filter rule
8251 * @add: if true, add, if false, delete
8253 * Add or delete a cloud filter for a specific flow spec using big buffer.
8254 * Returns 0 if the filter were successfully added.
8256 int i40e_add_del_cloud_filter_big_buf(struct i40e_vsi *vsi,
8257 struct i40e_cloud_filter *filter,
8260 struct i40e_aqc_cloud_filters_element_bb cld_filter;
8261 struct i40e_pf *pf = vsi->back;
8264 /* Both (src/dst) valid mac_addr are not supported */
8265 if ((is_valid_ether_addr(filter->dst_mac) &&
8266 is_valid_ether_addr(filter->src_mac)) ||
8267 (is_multicast_ether_addr(filter->dst_mac) &&
8268 is_multicast_ether_addr(filter->src_mac)))
8271 /* Big buffer cloud filter needs 'L4 port' to be non-zero. Also, UDP
8272 * ports are not supported via big buffer now.
8274 if (!filter->dst_port || filter->ip_proto == IPPROTO_UDP)
8277 /* adding filter using src_port/src_ip is not supported at this stage */
8278 if (filter->src_port ||
8279 (filter->src_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8280 !ipv6_addr_any(&filter->ip.v6.src_ip6))
8283 memset(&cld_filter, 0, sizeof(cld_filter));
8285 /* copy element needed to add cloud filter from filter */
8286 i40e_set_cld_element(filter, &cld_filter.element);
8288 if (is_valid_ether_addr(filter->dst_mac) ||
8289 is_valid_ether_addr(filter->src_mac) ||
8290 is_multicast_ether_addr(filter->dst_mac) ||
8291 is_multicast_ether_addr(filter->src_mac)) {
8292 /* MAC + IP : unsupported mode */
8293 if (filter->dst_ipv4)
8296 /* since we validated that L4 port must be valid before
8297 * we get here, start with respective "flags" value
8298 * and update if vlan is present or not
8300 cld_filter.element.flags =
8301 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_PORT);
8303 if (filter->vlan_id) {
8304 cld_filter.element.flags =
8305 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_MAC_VLAN_PORT);
8308 } else if ((filter->dst_ipv4 && filter->n_proto != ETH_P_IPV6) ||
8309 !ipv6_addr_any(&filter->ip.v6.dst_ip6)) {
8310 cld_filter.element.flags =
8311 cpu_to_le16(I40E_AQC_ADD_CLOUD_FILTER_IP_PORT);
8312 if (filter->n_proto == ETH_P_IPV6)
8313 cld_filter.element.flags |=
8314 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV6);
8316 cld_filter.element.flags |=
8317 cpu_to_le16(I40E_AQC_ADD_CLOUD_FLAGS_IPV4);
8319 dev_err(&pf->pdev->dev,
8320 "either mac or ip has to be valid for cloud filter\n");
8324 /* Now copy L4 port in Byte 6..7 in general fields */
8325 cld_filter.general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X16_WORD0] =
8326 be16_to_cpu(filter->dst_port);
8329 /* Validate current device switch mode, change if necessary */
8330 ret = i40e_validate_and_set_switch_mode(vsi);
8332 dev_err(&pf->pdev->dev,
8333 "failed to set switch mode, ret %d\n",
8338 ret = i40e_aq_add_cloud_filters_bb(&pf->hw, filter->seid,
8341 ret = i40e_aq_rem_cloud_filters_bb(&pf->hw, filter->seid,
8346 dev_dbg(&pf->pdev->dev,
8347 "Failed to %s cloud filter(big buffer) err %d aq_err %d\n",
8348 add ? "add" : "delete", ret, pf->hw.aq.asq_last_status);
8350 dev_info(&pf->pdev->dev,
8351 "%s cloud filter for VSI: %d, L4 port: %d\n",
8352 add ? "add" : "delete", filter->seid,
8353 ntohs(filter->dst_port));
8358 * i40e_parse_cls_flower - Parse tc flower filters provided by kernel
8359 * @vsi: Pointer to VSI
8360 * @f: Pointer to struct flow_cls_offload
8361 * @filter: Pointer to cloud filter structure
8364 static int i40e_parse_cls_flower(struct i40e_vsi *vsi,
8365 struct flow_cls_offload *f,
8366 struct i40e_cloud_filter *filter)
8368 struct flow_rule *rule = flow_cls_offload_flow_rule(f);
8369 struct flow_dissector *dissector = rule->match.dissector;
8370 u16 n_proto_mask = 0, n_proto_key = 0, addr_type = 0;
8371 struct i40e_pf *pf = vsi->back;
8374 if (dissector->used_keys &
8375 ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) |
8376 BIT(FLOW_DISSECTOR_KEY_BASIC) |
8377 BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) |
8378 BIT(FLOW_DISSECTOR_KEY_VLAN) |
8379 BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) |
8380 BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) |
8381 BIT(FLOW_DISSECTOR_KEY_PORTS) |
8382 BIT(FLOW_DISSECTOR_KEY_ENC_KEYID))) {
8383 dev_err(&pf->pdev->dev, "Unsupported key used: 0x%x\n",
8384 dissector->used_keys);
8388 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ENC_KEYID)) {
8389 struct flow_match_enc_keyid match;
8391 flow_rule_match_enc_keyid(rule, &match);
8392 if (match.mask->keyid != 0)
8393 field_flags |= I40E_CLOUD_FIELD_TEN_ID;
8395 filter->tenant_id = be32_to_cpu(match.key->keyid);
8398 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
8399 struct flow_match_basic match;
8401 flow_rule_match_basic(rule, &match);
8402 n_proto_key = ntohs(match.key->n_proto);
8403 n_proto_mask = ntohs(match.mask->n_proto);
8405 if (n_proto_key == ETH_P_ALL) {
8409 filter->n_proto = n_proto_key & n_proto_mask;
8410 filter->ip_proto = match.key->ip_proto;
8413 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
8414 struct flow_match_eth_addrs match;
8416 flow_rule_match_eth_addrs(rule, &match);
8418 /* use is_broadcast and is_zero to check for all 0xf or 0 */
8419 if (!is_zero_ether_addr(match.mask->dst)) {
8420 if (is_broadcast_ether_addr(match.mask->dst)) {
8421 field_flags |= I40E_CLOUD_FIELD_OMAC;
8423 dev_err(&pf->pdev->dev, "Bad ether dest mask %pM\n",
8425 return I40E_ERR_CONFIG;
8429 if (!is_zero_ether_addr(match.mask->src)) {
8430 if (is_broadcast_ether_addr(match.mask->src)) {
8431 field_flags |= I40E_CLOUD_FIELD_IMAC;
8433 dev_err(&pf->pdev->dev, "Bad ether src mask %pM\n",
8435 return I40E_ERR_CONFIG;
8438 ether_addr_copy(filter->dst_mac, match.key->dst);
8439 ether_addr_copy(filter->src_mac, match.key->src);
8442 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_VLAN)) {
8443 struct flow_match_vlan match;
8445 flow_rule_match_vlan(rule, &match);
8446 if (match.mask->vlan_id) {
8447 if (match.mask->vlan_id == VLAN_VID_MASK) {
8448 field_flags |= I40E_CLOUD_FIELD_IVLAN;
8451 dev_err(&pf->pdev->dev, "Bad vlan mask 0x%04x\n",
8452 match.mask->vlan_id);
8453 return I40E_ERR_CONFIG;
8457 filter->vlan_id = cpu_to_be16(match.key->vlan_id);
8460 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
8461 struct flow_match_control match;
8463 flow_rule_match_control(rule, &match);
8464 addr_type = match.key->addr_type;
8467 if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
8468 struct flow_match_ipv4_addrs match;
8470 flow_rule_match_ipv4_addrs(rule, &match);
8471 if (match.mask->dst) {
8472 if (match.mask->dst == cpu_to_be32(0xffffffff)) {
8473 field_flags |= I40E_CLOUD_FIELD_IIP;
8475 dev_err(&pf->pdev->dev, "Bad ip dst mask %pI4b\n",
8477 return I40E_ERR_CONFIG;
8481 if (match.mask->src) {
8482 if (match.mask->src == cpu_to_be32(0xffffffff)) {
8483 field_flags |= I40E_CLOUD_FIELD_IIP;
8485 dev_err(&pf->pdev->dev, "Bad ip src mask %pI4b\n",
8487 return I40E_ERR_CONFIG;
8491 if (field_flags & I40E_CLOUD_FIELD_TEN_ID) {
8492 dev_err(&pf->pdev->dev, "Tenant id not allowed for ip filter\n");
8493 return I40E_ERR_CONFIG;
8495 filter->dst_ipv4 = match.key->dst;
8496 filter->src_ipv4 = match.key->src;
8499 if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
8500 struct flow_match_ipv6_addrs match;
8502 flow_rule_match_ipv6_addrs(rule, &match);
8504 /* src and dest IPV6 address should not be LOOPBACK
8505 * (0:0:0:0:0:0:0:1), which can be represented as ::1
8507 if (ipv6_addr_loopback(&match.key->dst) ||
8508 ipv6_addr_loopback(&match.key->src)) {
8509 dev_err(&pf->pdev->dev,
8510 "Bad ipv6, addr is LOOPBACK\n");
8511 return I40E_ERR_CONFIG;
8513 if (!ipv6_addr_any(&match.mask->dst) ||
8514 !ipv6_addr_any(&match.mask->src))
8515 field_flags |= I40E_CLOUD_FIELD_IIP;
8517 memcpy(&filter->src_ipv6, &match.key->src.s6_addr32,
8518 sizeof(filter->src_ipv6));
8519 memcpy(&filter->dst_ipv6, &match.key->dst.s6_addr32,
8520 sizeof(filter->dst_ipv6));
8523 if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
8524 struct flow_match_ports match;
8526 flow_rule_match_ports(rule, &match);
8527 if (match.mask->src) {
8528 if (match.mask->src == cpu_to_be16(0xffff)) {
8529 field_flags |= I40E_CLOUD_FIELD_IIP;
8531 dev_err(&pf->pdev->dev, "Bad src port mask 0x%04x\n",
8532 be16_to_cpu(match.mask->src));
8533 return I40E_ERR_CONFIG;
8537 if (match.mask->dst) {
8538 if (match.mask->dst == cpu_to_be16(0xffff)) {
8539 field_flags |= I40E_CLOUD_FIELD_IIP;
8541 dev_err(&pf->pdev->dev, "Bad dst port mask 0x%04x\n",
8542 be16_to_cpu(match.mask->dst));
8543 return I40E_ERR_CONFIG;
8547 filter->dst_port = match.key->dst;
8548 filter->src_port = match.key->src;
8550 switch (filter->ip_proto) {
8555 dev_err(&pf->pdev->dev,
8556 "Only UDP and TCP transport are supported\n");
8560 filter->flags = field_flags;
8565 * i40e_handle_tclass: Forward to a traffic class on the device
8566 * @vsi: Pointer to VSI
8567 * @tc: traffic class index on the device
8568 * @filter: Pointer to cloud filter structure
8571 static int i40e_handle_tclass(struct i40e_vsi *vsi, u32 tc,
8572 struct i40e_cloud_filter *filter)
8574 struct i40e_channel *ch, *ch_tmp;
8576 /* direct to a traffic class on the same device */
8578 filter->seid = vsi->seid;
8580 } else if (vsi->tc_config.enabled_tc & BIT(tc)) {
8581 if (!filter->dst_port) {
8582 dev_err(&vsi->back->pdev->dev,
8583 "Specify destination port to direct to traffic class that is not default\n");
8586 if (list_empty(&vsi->ch_list))
8588 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list,
8590 if (ch->seid == vsi->tc_seid_map[tc])
8591 filter->seid = ch->seid;
8595 dev_err(&vsi->back->pdev->dev, "TC is not enabled\n");
8600 * i40e_configure_clsflower - Configure tc flower filters
8601 * @vsi: Pointer to VSI
8602 * @cls_flower: Pointer to struct flow_cls_offload
8605 static int i40e_configure_clsflower(struct i40e_vsi *vsi,
8606 struct flow_cls_offload *cls_flower)
8608 int tc = tc_classid_to_hwtc(vsi->netdev, cls_flower->classid);
8609 struct i40e_cloud_filter *filter = NULL;
8610 struct i40e_pf *pf = vsi->back;
8614 dev_err(&vsi->back->pdev->dev, "Invalid traffic class\n");
8619 dev_err(&pf->pdev->dev, "Unable to add filter because of invalid destination");
8623 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
8624 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
8627 if (pf->fdir_pf_active_filters ||
8628 (!hlist_empty(&pf->fdir_filter_list))) {
8629 dev_err(&vsi->back->pdev->dev,
8630 "Flow Director Sideband filters exists, turn ntuple off to configure cloud filters\n");
8634 if (vsi->back->flags & I40E_FLAG_FD_SB_ENABLED) {
8635 dev_err(&vsi->back->pdev->dev,
8636 "Disable Flow Director Sideband, configuring Cloud filters via tc-flower\n");
8637 vsi->back->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8638 vsi->back->flags |= I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8641 filter = kzalloc(sizeof(*filter), GFP_KERNEL);
8645 filter->cookie = cls_flower->cookie;
8647 err = i40e_parse_cls_flower(vsi, cls_flower, filter);
8651 err = i40e_handle_tclass(vsi, tc, filter);
8655 /* Add cloud filter */
8656 if (filter->dst_port)
8657 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, true);
8659 err = i40e_add_del_cloud_filter(vsi, filter, true);
8662 dev_err(&pf->pdev->dev, "Failed to add cloud filter, err %d\n",
8667 /* add filter to the ordered list */
8668 INIT_HLIST_NODE(&filter->cloud_node);
8670 hlist_add_head(&filter->cloud_node, &pf->cloud_filter_list);
8672 pf->num_cloud_filters++;
8681 * i40e_find_cloud_filter - Find the could filter in the list
8682 * @vsi: Pointer to VSI
8683 * @cookie: filter specific cookie
8686 static struct i40e_cloud_filter *i40e_find_cloud_filter(struct i40e_vsi *vsi,
8687 unsigned long *cookie)
8689 struct i40e_cloud_filter *filter = NULL;
8690 struct hlist_node *node2;
8692 hlist_for_each_entry_safe(filter, node2,
8693 &vsi->back->cloud_filter_list, cloud_node)
8694 if (!memcmp(cookie, &filter->cookie, sizeof(filter->cookie)))
8700 * i40e_delete_clsflower - Remove tc flower filters
8701 * @vsi: Pointer to VSI
8702 * @cls_flower: Pointer to struct flow_cls_offload
8705 static int i40e_delete_clsflower(struct i40e_vsi *vsi,
8706 struct flow_cls_offload *cls_flower)
8708 struct i40e_cloud_filter *filter = NULL;
8709 struct i40e_pf *pf = vsi->back;
8712 filter = i40e_find_cloud_filter(vsi, &cls_flower->cookie);
8717 hash_del(&filter->cloud_node);
8719 if (filter->dst_port)
8720 err = i40e_add_del_cloud_filter_big_buf(vsi, filter, false);
8722 err = i40e_add_del_cloud_filter(vsi, filter, false);
8726 dev_err(&pf->pdev->dev,
8727 "Failed to delete cloud filter, err %s\n",
8728 i40e_stat_str(&pf->hw, err));
8729 return i40e_aq_rc_to_posix(err, pf->hw.aq.asq_last_status);
8732 pf->num_cloud_filters--;
8733 if (!pf->num_cloud_filters)
8734 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
8735 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
8736 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8737 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
8738 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
8744 * i40e_setup_tc_cls_flower - flower classifier offloads
8745 * @np: net device to configure
8746 * @cls_flower: offload data
8748 static int i40e_setup_tc_cls_flower(struct i40e_netdev_priv *np,
8749 struct flow_cls_offload *cls_flower)
8751 struct i40e_vsi *vsi = np->vsi;
8753 switch (cls_flower->command) {
8754 case FLOW_CLS_REPLACE:
8755 return i40e_configure_clsflower(vsi, cls_flower);
8756 case FLOW_CLS_DESTROY:
8757 return i40e_delete_clsflower(vsi, cls_flower);
8758 case FLOW_CLS_STATS:
8765 static int i40e_setup_tc_block_cb(enum tc_setup_type type, void *type_data,
8768 struct i40e_netdev_priv *np = cb_priv;
8770 if (!tc_cls_can_offload_and_chain0(np->vsi->netdev, type_data))
8774 case TC_SETUP_CLSFLOWER:
8775 return i40e_setup_tc_cls_flower(np, type_data);
8782 static LIST_HEAD(i40e_block_cb_list);
8784 static int __i40e_setup_tc(struct net_device *netdev, enum tc_setup_type type,
8787 struct i40e_netdev_priv *np = netdev_priv(netdev);
8790 case TC_SETUP_QDISC_MQPRIO:
8791 return i40e_setup_tc(netdev, type_data);
8792 case TC_SETUP_BLOCK:
8793 return flow_block_cb_setup_simple(type_data,
8794 &i40e_block_cb_list,
8795 i40e_setup_tc_block_cb,
8803 * i40e_open - Called when a network interface is made active
8804 * @netdev: network interface device structure
8806 * The open entry point is called when a network interface is made
8807 * active by the system (IFF_UP). At this point all resources needed
8808 * for transmit and receive operations are allocated, the interrupt
8809 * handler is registered with the OS, the netdev watchdog subtask is
8810 * enabled, and the stack is notified that the interface is ready.
8812 * Returns 0 on success, negative value on failure
8814 int i40e_open(struct net_device *netdev)
8816 struct i40e_netdev_priv *np = netdev_priv(netdev);
8817 struct i40e_vsi *vsi = np->vsi;
8818 struct i40e_pf *pf = vsi->back;
8821 /* disallow open during test or if eeprom is broken */
8822 if (test_bit(__I40E_TESTING, pf->state) ||
8823 test_bit(__I40E_BAD_EEPROM, pf->state))
8826 netif_carrier_off(netdev);
8828 if (i40e_force_link_state(pf, true))
8831 err = i40e_vsi_open(vsi);
8835 /* configure global TSO hardware offload settings */
8836 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
8837 TCP_FLAG_FIN) >> 16);
8838 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
8840 TCP_FLAG_CWR) >> 16);
8841 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
8842 udp_tunnel_get_rx_info(netdev);
8848 * i40e_netif_set_realnum_tx_rx_queues - Update number of tx/rx queues
8849 * @vsi: vsi structure
8851 * This updates netdev's number of tx/rx queues
8853 * Returns status of setting tx/rx queues
8855 static int i40e_netif_set_realnum_tx_rx_queues(struct i40e_vsi *vsi)
8859 ret = netif_set_real_num_rx_queues(vsi->netdev,
8860 vsi->num_queue_pairs);
8864 return netif_set_real_num_tx_queues(vsi->netdev,
8865 vsi->num_queue_pairs);
8870 * @vsi: the VSI to open
8872 * Finish initialization of the VSI.
8874 * Returns 0 on success, negative value on failure
8876 * Note: expects to be called while under rtnl_lock()
8878 int i40e_vsi_open(struct i40e_vsi *vsi)
8880 struct i40e_pf *pf = vsi->back;
8881 char int_name[I40E_INT_NAME_STR_LEN];
8884 /* allocate descriptors */
8885 err = i40e_vsi_setup_tx_resources(vsi);
8888 err = i40e_vsi_setup_rx_resources(vsi);
8892 err = i40e_vsi_configure(vsi);
8897 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
8898 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
8899 err = i40e_vsi_request_irq(vsi, int_name);
8903 /* Notify the stack of the actual queue counts. */
8904 err = i40e_netif_set_realnum_tx_rx_queues(vsi);
8906 goto err_set_queues;
8908 } else if (vsi->type == I40E_VSI_FDIR) {
8909 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
8910 dev_driver_string(&pf->pdev->dev),
8911 dev_name(&pf->pdev->dev));
8912 err = i40e_vsi_request_irq(vsi, int_name);
8921 err = i40e_up_complete(vsi);
8923 goto err_up_complete;
8930 i40e_vsi_free_irq(vsi);
8932 i40e_vsi_free_rx_resources(vsi);
8934 i40e_vsi_free_tx_resources(vsi);
8935 if (vsi == pf->vsi[pf->lan_vsi])
8936 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
8942 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
8943 * @pf: Pointer to PF
8945 * This function destroys the hlist where all the Flow Director
8946 * filters were saved.
8948 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
8950 struct i40e_fdir_filter *filter;
8951 struct i40e_flex_pit *pit_entry, *tmp;
8952 struct hlist_node *node2;
8954 hlist_for_each_entry_safe(filter, node2,
8955 &pf->fdir_filter_list, fdir_node) {
8956 hlist_del(&filter->fdir_node);
8960 list_for_each_entry_safe(pit_entry, tmp, &pf->l3_flex_pit_list, list) {
8961 list_del(&pit_entry->list);
8964 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
8966 list_for_each_entry_safe(pit_entry, tmp, &pf->l4_flex_pit_list, list) {
8967 list_del(&pit_entry->list);
8970 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
8972 pf->fdir_pf_active_filters = 0;
8973 i40e_reset_fdir_filter_cnt(pf);
8975 /* Reprogram the default input set for TCP/IPv4 */
8976 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
8977 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8978 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8980 /* Reprogram the default input set for TCP/IPv6 */
8981 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_TCP,
8982 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8983 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8985 /* Reprogram the default input set for UDP/IPv4 */
8986 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_UDP,
8987 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8988 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8990 /* Reprogram the default input set for UDP/IPv6 */
8991 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_UDP,
8992 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
8993 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
8995 /* Reprogram the default input set for SCTP/IPv4 */
8996 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_SCTP,
8997 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
8998 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9000 /* Reprogram the default input set for SCTP/IPv6 */
9001 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_SCTP,
9002 I40E_L3_V6_SRC_MASK | I40E_L3_V6_DST_MASK |
9003 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9005 /* Reprogram the default input set for Other/IPv4 */
9006 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_OTHER,
9007 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9009 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
9010 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9012 /* Reprogram the default input set for Other/IPv6 */
9013 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV6_OTHER,
9014 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9016 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV6,
9017 I40E_L3_SRC_MASK | I40E_L3_DST_MASK);
9021 * i40e_cloud_filter_exit - Cleans up the cloud filters
9022 * @pf: Pointer to PF
9024 * This function destroys the hlist where all the cloud filters
9027 static void i40e_cloud_filter_exit(struct i40e_pf *pf)
9029 struct i40e_cloud_filter *cfilter;
9030 struct hlist_node *node;
9032 hlist_for_each_entry_safe(cfilter, node,
9033 &pf->cloud_filter_list, cloud_node) {
9034 hlist_del(&cfilter->cloud_node);
9037 pf->num_cloud_filters = 0;
9039 if ((pf->flags & I40E_FLAG_FD_SB_TO_CLOUD_FILTER) &&
9040 !(pf->flags & I40E_FLAG_FD_SB_INACTIVE)) {
9041 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
9042 pf->flags &= ~I40E_FLAG_FD_SB_TO_CLOUD_FILTER;
9043 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
9048 * i40e_close - Disables a network interface
9049 * @netdev: network interface device structure
9051 * The close entry point is called when an interface is de-activated
9052 * by the OS. The hardware is still under the driver's control, but
9053 * this netdev interface is disabled.
9055 * Returns 0, this is not allowed to fail
9057 int i40e_close(struct net_device *netdev)
9059 struct i40e_netdev_priv *np = netdev_priv(netdev);
9060 struct i40e_vsi *vsi = np->vsi;
9062 i40e_vsi_close(vsi);
9068 * i40e_do_reset - Start a PF or Core Reset sequence
9069 * @pf: board private structure
9070 * @reset_flags: which reset is requested
9071 * @lock_acquired: indicates whether or not the lock has been acquired
9072 * before this function was called.
9074 * The essential difference in resets is that the PF Reset
9075 * doesn't clear the packet buffers, doesn't reset the PE
9076 * firmware, and doesn't bother the other PFs on the chip.
9078 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags, bool lock_acquired)
9082 /* do the biggest reset indicated */
9083 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
9085 /* Request a Global Reset
9087 * This will start the chip's countdown to the actual full
9088 * chip reset event, and a warning interrupt to be sent
9089 * to all PFs, including the requestor. Our handler
9090 * for the warning interrupt will deal with the shutdown
9091 * and recovery of the switch setup.
9093 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
9094 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9095 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
9096 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9098 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
9100 /* Request a Core Reset
9102 * Same as Global Reset, except does *not* include the MAC/PHY
9104 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
9105 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
9106 val |= I40E_GLGEN_RTRIG_CORER_MASK;
9107 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
9108 i40e_flush(&pf->hw);
9110 } else if (reset_flags & I40E_PF_RESET_FLAG) {
9112 /* Request a PF Reset
9114 * Resets only the PF-specific registers
9116 * This goes directly to the tear-down and rebuild of
9117 * the switch, since we need to do all the recovery as
9118 * for the Core Reset.
9120 dev_dbg(&pf->pdev->dev, "PFR requested\n");
9121 i40e_handle_reset_warning(pf, lock_acquired);
9123 } else if (reset_flags & I40E_PF_RESET_AND_REBUILD_FLAG) {
9124 /* Request a PF Reset
9126 * Resets PF and reinitializes PFs VSI.
9128 i40e_prep_for_reset(pf);
9129 i40e_reset_and_rebuild(pf, true, lock_acquired);
9130 dev_info(&pf->pdev->dev,
9131 pf->flags & I40E_FLAG_DISABLE_FW_LLDP ?
9132 "FW LLDP is disabled\n" :
9133 "FW LLDP is enabled\n");
9135 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
9138 /* Find the VSI(s) that requested a re-init */
9139 dev_info(&pf->pdev->dev,
9140 "VSI reinit requested\n");
9141 for (v = 0; v < pf->num_alloc_vsi; v++) {
9142 struct i40e_vsi *vsi = pf->vsi[v];
9145 test_and_clear_bit(__I40E_VSI_REINIT_REQUESTED,
9147 i40e_vsi_reinit_locked(pf->vsi[v]);
9149 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
9152 /* Find the VSI(s) that needs to be brought down */
9153 dev_info(&pf->pdev->dev, "VSI down requested\n");
9154 for (v = 0; v < pf->num_alloc_vsi; v++) {
9155 struct i40e_vsi *vsi = pf->vsi[v];
9158 test_and_clear_bit(__I40E_VSI_DOWN_REQUESTED,
9160 set_bit(__I40E_VSI_DOWN, vsi->state);
9165 dev_info(&pf->pdev->dev,
9166 "bad reset request 0x%08x\n", reset_flags);
9170 #ifdef CONFIG_I40E_DCB
9172 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
9173 * @pf: board private structure
9174 * @old_cfg: current DCB config
9175 * @new_cfg: new DCB config
9177 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
9178 struct i40e_dcbx_config *old_cfg,
9179 struct i40e_dcbx_config *new_cfg)
9181 bool need_reconfig = false;
9183 /* Check if ETS configuration has changed */
9184 if (memcmp(&new_cfg->etscfg,
9186 sizeof(new_cfg->etscfg))) {
9187 /* If Priority Table has changed reconfig is needed */
9188 if (memcmp(&new_cfg->etscfg.prioritytable,
9189 &old_cfg->etscfg.prioritytable,
9190 sizeof(new_cfg->etscfg.prioritytable))) {
9191 need_reconfig = true;
9192 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
9195 if (memcmp(&new_cfg->etscfg.tcbwtable,
9196 &old_cfg->etscfg.tcbwtable,
9197 sizeof(new_cfg->etscfg.tcbwtable)))
9198 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
9200 if (memcmp(&new_cfg->etscfg.tsatable,
9201 &old_cfg->etscfg.tsatable,
9202 sizeof(new_cfg->etscfg.tsatable)))
9203 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
9206 /* Check if PFC configuration has changed */
9207 if (memcmp(&new_cfg->pfc,
9209 sizeof(new_cfg->pfc))) {
9210 need_reconfig = true;
9211 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
9214 /* Check if APP Table has changed */
9215 if (memcmp(&new_cfg->app,
9217 sizeof(new_cfg->app))) {
9218 need_reconfig = true;
9219 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
9222 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
9223 return need_reconfig;
9227 * i40e_handle_lldp_event - Handle LLDP Change MIB event
9228 * @pf: board private structure
9229 * @e: event info posted on ARQ
9231 static int i40e_handle_lldp_event(struct i40e_pf *pf,
9232 struct i40e_arq_event_info *e)
9234 struct i40e_aqc_lldp_get_mib *mib =
9235 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
9236 struct i40e_hw *hw = &pf->hw;
9237 struct i40e_dcbx_config tmp_dcbx_cfg;
9238 bool need_reconfig = false;
9242 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9243 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9244 (hw->phy.link_info.link_speed &
9245 ~(I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB)) &&
9246 !(pf->flags & I40E_FLAG_DCB_CAPABLE))
9247 /* let firmware decide if the DCB should be disabled */
9248 pf->flags |= I40E_FLAG_DCB_CAPABLE;
9250 /* Not DCB capable or capability disabled */
9251 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
9254 /* Ignore if event is not for Nearest Bridge */
9255 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
9256 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
9257 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
9258 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
9261 /* Check MIB Type and return if event for Remote MIB update */
9262 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
9263 dev_dbg(&pf->pdev->dev,
9264 "LLDP event mib type %s\n", type ? "remote" : "local");
9265 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
9266 /* Update the remote cached instance and return */
9267 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
9268 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
9269 &hw->remote_dcbx_config);
9273 /* Store the old configuration */
9274 tmp_dcbx_cfg = hw->local_dcbx_config;
9276 /* Reset the old DCBx configuration data */
9277 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
9278 /* Get updated DCBX data from firmware */
9279 ret = i40e_get_dcb_config(&pf->hw);
9281 /* X710-T*L 2.5G and 5G speeds don't support DCB */
9282 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
9283 (hw->phy.link_info.link_speed &
9284 (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
9285 dev_warn(&pf->pdev->dev,
9286 "DCB is not supported for X710-T*L 2.5/5G speeds\n");
9287 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9289 dev_info(&pf->pdev->dev,
9290 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
9291 i40e_stat_str(&pf->hw, ret),
9292 i40e_aq_str(&pf->hw,
9293 pf->hw.aq.asq_last_status));
9298 /* No change detected in DCBX configs */
9299 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
9300 sizeof(tmp_dcbx_cfg))) {
9301 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
9305 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
9306 &hw->local_dcbx_config);
9308 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
9313 /* Enable DCB tagging only when more than one TC */
9314 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
9315 pf->flags |= I40E_FLAG_DCB_ENABLED;
9317 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9319 set_bit(__I40E_PORT_SUSPENDED, pf->state);
9320 /* Reconfiguration needed quiesce all VSIs */
9321 i40e_pf_quiesce_all_vsi(pf);
9323 /* Changes in configuration update VEB/VSI */
9324 i40e_dcb_reconfigure(pf);
9326 ret = i40e_resume_port_tx(pf);
9328 clear_bit(__I40E_PORT_SUSPENDED, pf->state);
9329 /* In case of error no point in resuming VSIs */
9333 /* Wait for the PF's queues to be disabled */
9334 ret = i40e_pf_wait_queues_disabled(pf);
9336 /* Schedule PF reset to recover */
9337 set_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9338 i40e_service_event_schedule(pf);
9340 i40e_pf_unquiesce_all_vsi(pf);
9341 set_bit(__I40E_CLIENT_SERVICE_REQUESTED, pf->state);
9342 set_bit(__I40E_CLIENT_L2_CHANGE, pf->state);
9348 #endif /* CONFIG_I40E_DCB */
9351 * i40e_do_reset_safe - Protected reset path for userland calls.
9352 * @pf: board private structure
9353 * @reset_flags: which reset is requested
9356 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
9359 i40e_do_reset(pf, reset_flags, true);
9364 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
9365 * @pf: board private structure
9366 * @e: event info posted on ARQ
9368 * Handler for LAN Queue Overflow Event generated by the firmware for PF
9371 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
9372 struct i40e_arq_event_info *e)
9374 struct i40e_aqc_lan_overflow *data =
9375 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
9376 u32 queue = le32_to_cpu(data->prtdcb_rupto);
9377 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
9378 struct i40e_hw *hw = &pf->hw;
9382 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
9385 /* Queue belongs to VF, find the VF and issue VF reset */
9386 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
9387 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
9388 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
9389 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
9390 vf_id -= hw->func_caps.vf_base_id;
9391 vf = &pf->vf[vf_id];
9392 i40e_vc_notify_vf_reset(vf);
9393 /* Allow VF to process pending reset notification */
9395 i40e_reset_vf(vf, false);
9400 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
9401 * @pf: board private structure
9403 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
9407 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9408 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
9413 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
9414 * @pf: board private structure
9416 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
9420 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
9421 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
9422 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
9423 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
9428 * i40e_get_global_fd_count - Get total FD filters programmed on device
9429 * @pf: board private structure
9431 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
9435 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
9436 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
9437 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
9438 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
9443 * i40e_reenable_fdir_sb - Restore FDir SB capability
9444 * @pf: board private structure
9446 static void i40e_reenable_fdir_sb(struct i40e_pf *pf)
9448 if (test_and_clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
9449 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
9450 (I40E_DEBUG_FD & pf->hw.debug_mask))
9451 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
9455 * i40e_reenable_fdir_atr - Restore FDir ATR capability
9456 * @pf: board private structure
9458 static void i40e_reenable_fdir_atr(struct i40e_pf *pf)
9460 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state)) {
9461 /* ATR uses the same filtering logic as SB rules. It only
9462 * functions properly if the input set mask is at the default
9463 * settings. It is safe to restore the default input set
9464 * because there are no active TCPv4 filter rules.
9466 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_NONF_IPV4_TCP,
9467 I40E_L3_SRC_MASK | I40E_L3_DST_MASK |
9468 I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
9470 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
9471 (I40E_DEBUG_FD & pf->hw.debug_mask))
9472 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
9477 * i40e_delete_invalid_filter - Delete an invalid FDIR filter
9478 * @pf: board private structure
9479 * @filter: FDir filter to remove
9481 static void i40e_delete_invalid_filter(struct i40e_pf *pf,
9482 struct i40e_fdir_filter *filter)
9484 /* Update counters */
9485 pf->fdir_pf_active_filters--;
9488 switch (filter->flow_type) {
9490 pf->fd_tcp4_filter_cnt--;
9493 pf->fd_udp4_filter_cnt--;
9496 pf->fd_sctp4_filter_cnt--;
9499 pf->fd_tcp6_filter_cnt--;
9502 pf->fd_udp6_filter_cnt--;
9505 pf->fd_udp6_filter_cnt--;
9508 switch (filter->ipl4_proto) {
9510 pf->fd_tcp4_filter_cnt--;
9513 pf->fd_udp4_filter_cnt--;
9516 pf->fd_sctp4_filter_cnt--;
9519 pf->fd_ip4_filter_cnt--;
9523 case IPV6_USER_FLOW:
9524 switch (filter->ipl4_proto) {
9526 pf->fd_tcp6_filter_cnt--;
9529 pf->fd_udp6_filter_cnt--;
9532 pf->fd_sctp6_filter_cnt--;
9535 pf->fd_ip6_filter_cnt--;
9541 /* Remove the filter from the list and free memory */
9542 hlist_del(&filter->fdir_node);
9547 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
9548 * @pf: board private structure
9550 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
9552 struct i40e_fdir_filter *filter;
9553 u32 fcnt_prog, fcnt_avail;
9554 struct hlist_node *node;
9556 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9559 /* Check if we have enough room to re-enable FDir SB capability. */
9560 fcnt_prog = i40e_get_global_fd_count(pf);
9561 fcnt_avail = pf->fdir_pf_filter_count;
9562 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
9563 (pf->fd_add_err == 0) ||
9564 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt))
9565 i40e_reenable_fdir_sb(pf);
9567 /* We should wait for even more space before re-enabling ATR.
9568 * Additionally, we cannot enable ATR as long as we still have TCP SB
9571 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) &&
9572 pf->fd_tcp4_filter_cnt == 0 && pf->fd_tcp6_filter_cnt == 0)
9573 i40e_reenable_fdir_atr(pf);
9575 /* if hw had a problem adding a filter, delete it */
9576 if (pf->fd_inv > 0) {
9577 hlist_for_each_entry_safe(filter, node,
9578 &pf->fdir_filter_list, fdir_node)
9579 if (filter->fd_id == pf->fd_inv)
9580 i40e_delete_invalid_filter(pf, filter);
9584 #define I40E_MIN_FD_FLUSH_INTERVAL 10
9585 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
9587 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
9588 * @pf: board private structure
9590 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
9592 unsigned long min_flush_time;
9593 int flush_wait_retry = 50;
9594 bool disable_atr = false;
9598 if (!time_after(jiffies, pf->fd_flush_timestamp +
9599 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
9602 /* If the flush is happening too quick and we have mostly SB rules we
9603 * should not re-enable ATR for some time.
9605 min_flush_time = pf->fd_flush_timestamp +
9606 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
9607 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
9609 if (!(time_after(jiffies, min_flush_time)) &&
9610 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
9611 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9612 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
9616 pf->fd_flush_timestamp = jiffies;
9617 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9618 /* flush all filters */
9619 wr32(&pf->hw, I40E_PFQF_CTL_1,
9620 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
9621 i40e_flush(&pf->hw);
9625 /* Check FD flush status every 5-6msec */
9626 usleep_range(5000, 6000);
9627 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
9628 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
9630 } while (flush_wait_retry--);
9631 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
9632 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
9634 /* replay sideband filters */
9635 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
9636 if (!disable_atr && !pf->fd_tcp4_filter_cnt)
9637 clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
9638 clear_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
9639 if (I40E_DEBUG_FD & pf->hw.debug_mask)
9640 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
9645 * i40e_get_current_atr_cnt - Get the count of total FD ATR filters programmed
9646 * @pf: board private structure
9648 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
9650 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
9654 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
9655 * @pf: board private structure
9657 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
9660 /* if interface is down do nothing */
9661 if (test_bit(__I40E_DOWN, pf->state))
9664 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
9665 i40e_fdir_flush_and_replay(pf);
9667 i40e_fdir_check_and_reenable(pf);
9672 * i40e_vsi_link_event - notify VSI of a link event
9673 * @vsi: vsi to be notified
9674 * @link_up: link up or down
9676 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
9678 if (!vsi || test_bit(__I40E_VSI_DOWN, vsi->state))
9681 switch (vsi->type) {
9683 if (!vsi->netdev || !vsi->netdev_registered)
9687 netif_carrier_on(vsi->netdev);
9688 netif_tx_wake_all_queues(vsi->netdev);
9690 netif_carrier_off(vsi->netdev);
9691 netif_tx_stop_all_queues(vsi->netdev);
9695 case I40E_VSI_SRIOV:
9696 case I40E_VSI_VMDQ2:
9698 case I40E_VSI_IWARP:
9699 case I40E_VSI_MIRROR:
9701 /* there is no notification for other VSIs */
9707 * i40e_veb_link_event - notify elements on the veb of a link event
9708 * @veb: veb to be notified
9709 * @link_up: link up or down
9711 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
9716 if (!veb || !veb->pf)
9720 /* depth first... */
9721 for (i = 0; i < I40E_MAX_VEB; i++)
9722 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
9723 i40e_veb_link_event(pf->veb[i], link_up);
9725 /* ... now the local VSIs */
9726 for (i = 0; i < pf->num_alloc_vsi; i++)
9727 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
9728 i40e_vsi_link_event(pf->vsi[i], link_up);
9732 * i40e_link_event - Update netif_carrier status
9733 * @pf: board private structure
9735 static void i40e_link_event(struct i40e_pf *pf)
9737 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
9738 u8 new_link_speed, old_link_speed;
9740 bool new_link, old_link;
9741 #ifdef CONFIG_I40E_DCB
9743 #endif /* CONFIG_I40E_DCB */
9745 /* set this to force the get_link_status call to refresh state */
9746 pf->hw.phy.get_link_info = true;
9747 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
9748 status = i40e_get_link_status(&pf->hw, &new_link);
9750 /* On success, disable temp link polling */
9751 if (status == I40E_SUCCESS) {
9752 clear_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9754 /* Enable link polling temporarily until i40e_get_link_status
9755 * returns I40E_SUCCESS
9757 set_bit(__I40E_TEMP_LINK_POLLING, pf->state);
9758 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
9763 old_link_speed = pf->hw.phy.link_info_old.link_speed;
9764 new_link_speed = pf->hw.phy.link_info.link_speed;
9766 if (new_link == old_link &&
9767 new_link_speed == old_link_speed &&
9768 (test_bit(__I40E_VSI_DOWN, vsi->state) ||
9769 new_link == netif_carrier_ok(vsi->netdev)))
9772 i40e_print_link_message(vsi, new_link);
9774 /* Notify the base of the switch tree connected to
9775 * the link. Floating VEBs are not notified.
9777 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
9778 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
9780 i40e_vsi_link_event(vsi, new_link);
9783 i40e_vc_notify_link_state(pf);
9785 if (pf->flags & I40E_FLAG_PTP)
9786 i40e_ptp_set_increment(pf);
9787 #ifdef CONFIG_I40E_DCB
9788 if (new_link == old_link)
9790 /* Not SW DCB so firmware will take care of default settings */
9791 if (pf->dcbx_cap & DCB_CAP_DCBX_LLD_MANAGED)
9794 /* We cover here only link down, as after link up in case of SW DCB
9795 * SW LLDP agent will take care of setting it up
9798 dev_dbg(&pf->pdev->dev, "Reconfig DCB to single TC as result of Link Down\n");
9799 memset(&pf->tmp_cfg, 0, sizeof(pf->tmp_cfg));
9800 err = i40e_dcb_sw_default_config(pf);
9802 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
9803 I40E_FLAG_DCB_ENABLED);
9805 pf->dcbx_cap = DCB_CAP_DCBX_HOST |
9806 DCB_CAP_DCBX_VER_IEEE;
9807 pf->flags |= I40E_FLAG_DCB_CAPABLE;
9808 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
9811 #endif /* CONFIG_I40E_DCB */
9815 * i40e_watchdog_subtask - periodic checks not using event driven response
9816 * @pf: board private structure
9818 static void i40e_watchdog_subtask(struct i40e_pf *pf)
9822 /* if interface is down do nothing */
9823 if (test_bit(__I40E_DOWN, pf->state) ||
9824 test_bit(__I40E_CONFIG_BUSY, pf->state))
9827 /* make sure we don't do these things too often */
9828 if (time_before(jiffies, (pf->service_timer_previous +
9829 pf->service_timer_period)))
9831 pf->service_timer_previous = jiffies;
9833 if ((pf->flags & I40E_FLAG_LINK_POLLING_ENABLED) ||
9834 test_bit(__I40E_TEMP_LINK_POLLING, pf->state))
9835 i40e_link_event(pf);
9837 /* Update the stats for active netdevs so the network stack
9838 * can look at updated numbers whenever it cares to
9840 for (i = 0; i < pf->num_alloc_vsi; i++)
9841 if (pf->vsi[i] && pf->vsi[i]->netdev)
9842 i40e_update_stats(pf->vsi[i]);
9844 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
9845 /* Update the stats for the active switching components */
9846 for (i = 0; i < I40E_MAX_VEB; i++)
9848 i40e_update_veb_stats(pf->veb[i]);
9851 i40e_ptp_rx_hang(pf);
9852 i40e_ptp_tx_hang(pf);
9856 * i40e_reset_subtask - Set up for resetting the device and driver
9857 * @pf: board private structure
9859 static void i40e_reset_subtask(struct i40e_pf *pf)
9861 u32 reset_flags = 0;
9863 if (test_bit(__I40E_REINIT_REQUESTED, pf->state)) {
9864 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
9865 clear_bit(__I40E_REINIT_REQUESTED, pf->state);
9867 if (test_bit(__I40E_PF_RESET_REQUESTED, pf->state)) {
9868 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
9869 clear_bit(__I40E_PF_RESET_REQUESTED, pf->state);
9871 if (test_bit(__I40E_CORE_RESET_REQUESTED, pf->state)) {
9872 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
9873 clear_bit(__I40E_CORE_RESET_REQUESTED, pf->state);
9875 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state)) {
9876 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
9877 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, pf->state);
9879 if (test_bit(__I40E_DOWN_REQUESTED, pf->state)) {
9880 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
9881 clear_bit(__I40E_DOWN_REQUESTED, pf->state);
9884 /* If there's a recovery already waiting, it takes
9885 * precedence before starting a new reset sequence.
9887 if (test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
9888 i40e_prep_for_reset(pf);
9890 i40e_rebuild(pf, false, false);
9893 /* If we're already down or resetting, just bail */
9895 !test_bit(__I40E_DOWN, pf->state) &&
9896 !test_bit(__I40E_CONFIG_BUSY, pf->state)) {
9897 i40e_do_reset(pf, reset_flags, false);
9902 * i40e_handle_link_event - Handle link event
9903 * @pf: board private structure
9904 * @e: event info posted on ARQ
9906 static void i40e_handle_link_event(struct i40e_pf *pf,
9907 struct i40e_arq_event_info *e)
9909 struct i40e_aqc_get_link_status *status =
9910 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
9912 /* Do a new status request to re-enable LSE reporting
9913 * and load new status information into the hw struct
9914 * This completely ignores any state information
9915 * in the ARQ event info, instead choosing to always
9916 * issue the AQ update link status command.
9918 i40e_link_event(pf);
9920 /* Check if module meets thermal requirements */
9921 if (status->phy_type == I40E_PHY_TYPE_NOT_SUPPORTED_HIGH_TEMP) {
9922 dev_err(&pf->pdev->dev,
9923 "Rx/Tx is disabled on this device because the module does not meet thermal requirements.\n");
9924 dev_err(&pf->pdev->dev,
9925 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9927 /* check for unqualified module, if link is down, suppress
9928 * the message if link was forced to be down.
9930 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
9931 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
9932 (!(status->link_info & I40E_AQ_LINK_UP)) &&
9933 (!(pf->flags & I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED))) {
9934 dev_err(&pf->pdev->dev,
9935 "Rx/Tx is disabled on this device because an unsupported SFP module type was detected.\n");
9936 dev_err(&pf->pdev->dev,
9937 "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for a list of supported modules.\n");
9943 * i40e_clean_adminq_subtask - Clean the AdminQ rings
9944 * @pf: board private structure
9946 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
9948 struct i40e_arq_event_info event;
9949 struct i40e_hw *hw = &pf->hw;
9956 /* Do not run clean AQ when PF reset fails */
9957 if (test_bit(__I40E_RESET_FAILED, pf->state))
9960 /* check for error indications */
9961 val = rd32(&pf->hw, pf->hw.aq.arq.len);
9963 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
9964 if (hw->debug_mask & I40E_DEBUG_AQ)
9965 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
9966 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
9968 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
9969 if (hw->debug_mask & I40E_DEBUG_AQ)
9970 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
9971 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
9972 pf->arq_overflows++;
9974 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
9975 if (hw->debug_mask & I40E_DEBUG_AQ)
9976 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
9977 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
9980 wr32(&pf->hw, pf->hw.aq.arq.len, val);
9982 val = rd32(&pf->hw, pf->hw.aq.asq.len);
9984 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
9985 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9986 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
9987 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
9989 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
9990 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9991 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
9992 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
9994 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
9995 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
9996 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
9997 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
10000 wr32(&pf->hw, pf->hw.aq.asq.len, val);
10002 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
10003 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
10004 if (!event.msg_buf)
10008 ret = i40e_clean_arq_element(hw, &event, &pending);
10009 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
10012 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
10016 opcode = le16_to_cpu(event.desc.opcode);
10019 case i40e_aqc_opc_get_link_status:
10021 i40e_handle_link_event(pf, &event);
10024 case i40e_aqc_opc_send_msg_to_pf:
10025 ret = i40e_vc_process_vf_msg(pf,
10026 le16_to_cpu(event.desc.retval),
10027 le32_to_cpu(event.desc.cookie_high),
10028 le32_to_cpu(event.desc.cookie_low),
10032 case i40e_aqc_opc_lldp_update_mib:
10033 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
10034 #ifdef CONFIG_I40E_DCB
10036 i40e_handle_lldp_event(pf, &event);
10038 #endif /* CONFIG_I40E_DCB */
10040 case i40e_aqc_opc_event_lan_overflow:
10041 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
10042 i40e_handle_lan_overflow_event(pf, &event);
10044 case i40e_aqc_opc_send_msg_to_peer:
10045 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
10047 case i40e_aqc_opc_nvm_erase:
10048 case i40e_aqc_opc_nvm_update:
10049 case i40e_aqc_opc_oem_post_update:
10050 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
10051 "ARQ NVM operation 0x%04x completed\n",
10055 dev_info(&pf->pdev->dev,
10056 "ARQ: Unknown event 0x%04x ignored\n",
10060 } while (i++ < pf->adminq_work_limit);
10062 if (i < pf->adminq_work_limit)
10063 clear_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state);
10065 /* re-enable Admin queue interrupt cause */
10066 val = rd32(hw, I40E_PFINT_ICR0_ENA);
10067 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
10068 wr32(hw, I40E_PFINT_ICR0_ENA, val);
10071 kfree(event.msg_buf);
10075 * i40e_verify_eeprom - make sure eeprom is good to use
10076 * @pf: board private structure
10078 static void i40e_verify_eeprom(struct i40e_pf *pf)
10082 err = i40e_diag_eeprom_test(&pf->hw);
10084 /* retry in case of garbage read */
10085 err = i40e_diag_eeprom_test(&pf->hw);
10087 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
10089 set_bit(__I40E_BAD_EEPROM, pf->state);
10093 if (!err && test_bit(__I40E_BAD_EEPROM, pf->state)) {
10094 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
10095 clear_bit(__I40E_BAD_EEPROM, pf->state);
10100 * i40e_enable_pf_switch_lb
10101 * @pf: pointer to the PF structure
10103 * enable switch loop back or die - no point in a return value
10105 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
10107 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10108 struct i40e_vsi_context ctxt;
10111 ctxt.seid = pf->main_vsi_seid;
10112 ctxt.pf_num = pf->hw.pf_id;
10114 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10116 dev_info(&pf->pdev->dev,
10117 "couldn't get PF vsi config, err %s aq_err %s\n",
10118 i40e_stat_str(&pf->hw, ret),
10119 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10122 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10123 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10124 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10126 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
10128 dev_info(&pf->pdev->dev,
10129 "update vsi switch failed, err %s aq_err %s\n",
10130 i40e_stat_str(&pf->hw, ret),
10131 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10136 * i40e_disable_pf_switch_lb
10137 * @pf: pointer to the PF structure
10139 * disable switch loop back or die - no point in a return value
10141 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
10143 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10144 struct i40e_vsi_context ctxt;
10147 ctxt.seid = pf->main_vsi_seid;
10148 ctxt.pf_num = pf->hw.pf_id;
10150 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
10152 dev_info(&pf->pdev->dev,
10153 "couldn't get PF vsi config, err %s aq_err %s\n",
10154 i40e_stat_str(&pf->hw, ret),
10155 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10158 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
10159 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
10160 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
10162 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
10164 dev_info(&pf->pdev->dev,
10165 "update vsi switch failed, err %s aq_err %s\n",
10166 i40e_stat_str(&pf->hw, ret),
10167 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10172 * i40e_config_bridge_mode - Configure the HW bridge mode
10173 * @veb: pointer to the bridge instance
10175 * Configure the loop back mode for the LAN VSI that is downlink to the
10176 * specified HW bridge instance. It is expected this function is called
10177 * when a new HW bridge is instantiated.
10179 static void i40e_config_bridge_mode(struct i40e_veb *veb)
10181 struct i40e_pf *pf = veb->pf;
10183 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
10184 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
10185 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
10186 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
10187 i40e_disable_pf_switch_lb(pf);
10189 i40e_enable_pf_switch_lb(pf);
10193 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
10194 * @veb: pointer to the VEB instance
10196 * This is a recursive function that first builds the attached VSIs then
10197 * recurses in to build the next layer of VEB. We track the connections
10198 * through our own index numbers because the seid's from the HW could
10199 * change across the reset.
10201 static int i40e_reconstitute_veb(struct i40e_veb *veb)
10203 struct i40e_vsi *ctl_vsi = NULL;
10204 struct i40e_pf *pf = veb->pf;
10208 /* build VSI that owns this VEB, temporarily attached to base VEB */
10209 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
10211 pf->vsi[v]->veb_idx == veb->idx &&
10212 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
10213 ctl_vsi = pf->vsi[v];
10218 dev_info(&pf->pdev->dev,
10219 "missing owner VSI for veb_idx %d\n", veb->idx);
10221 goto end_reconstitute;
10223 if (ctl_vsi != pf->vsi[pf->lan_vsi])
10224 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10225 ret = i40e_add_vsi(ctl_vsi);
10227 dev_info(&pf->pdev->dev,
10228 "rebuild of veb_idx %d owner VSI failed: %d\n",
10230 goto end_reconstitute;
10232 i40e_vsi_reset_stats(ctl_vsi);
10234 /* create the VEB in the switch and move the VSI onto the VEB */
10235 ret = i40e_add_veb(veb, ctl_vsi);
10237 goto end_reconstitute;
10239 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10240 veb->bridge_mode = BRIDGE_MODE_VEB;
10242 veb->bridge_mode = BRIDGE_MODE_VEPA;
10243 i40e_config_bridge_mode(veb);
10245 /* create the remaining VSIs attached to this VEB */
10246 for (v = 0; v < pf->num_alloc_vsi; v++) {
10247 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
10250 if (pf->vsi[v]->veb_idx == veb->idx) {
10251 struct i40e_vsi *vsi = pf->vsi[v];
10253 vsi->uplink_seid = veb->seid;
10254 ret = i40e_add_vsi(vsi);
10256 dev_info(&pf->pdev->dev,
10257 "rebuild of vsi_idx %d failed: %d\n",
10259 goto end_reconstitute;
10261 i40e_vsi_reset_stats(vsi);
10265 /* create any VEBs attached to this VEB - RECURSION */
10266 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10267 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
10268 pf->veb[veb_idx]->uplink_seid = veb->seid;
10269 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
10280 * i40e_get_capabilities - get info about the HW
10281 * @pf: the PF struct
10282 * @list_type: AQ capability to be queried
10284 static int i40e_get_capabilities(struct i40e_pf *pf,
10285 enum i40e_admin_queue_opc list_type)
10287 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
10292 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
10294 cap_buf = kzalloc(buf_len, GFP_KERNEL);
10298 /* this loads the data into the hw struct for us */
10299 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
10300 &data_size, list_type,
10302 /* data loaded, buffer no longer needed */
10305 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
10306 /* retry with a larger buffer */
10307 buf_len = data_size;
10308 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK || err) {
10309 dev_info(&pf->pdev->dev,
10310 "capability discovery failed, err %s aq_err %s\n",
10311 i40e_stat_str(&pf->hw, err),
10312 i40e_aq_str(&pf->hw,
10313 pf->hw.aq.asq_last_status));
10318 if (pf->hw.debug_mask & I40E_DEBUG_USER) {
10319 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10320 dev_info(&pf->pdev->dev,
10321 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
10322 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
10323 pf->hw.func_caps.num_msix_vectors,
10324 pf->hw.func_caps.num_msix_vectors_vf,
10325 pf->hw.func_caps.fd_filters_guaranteed,
10326 pf->hw.func_caps.fd_filters_best_effort,
10327 pf->hw.func_caps.num_tx_qp,
10328 pf->hw.func_caps.num_vsis);
10329 } else if (list_type == i40e_aqc_opc_list_dev_capabilities) {
10330 dev_info(&pf->pdev->dev,
10331 "switch_mode=0x%04x, function_valid=0x%08x\n",
10332 pf->hw.dev_caps.switch_mode,
10333 pf->hw.dev_caps.valid_functions);
10334 dev_info(&pf->pdev->dev,
10335 "SR-IOV=%d, num_vfs for all function=%u\n",
10336 pf->hw.dev_caps.sr_iov_1_1,
10337 pf->hw.dev_caps.num_vfs);
10338 dev_info(&pf->pdev->dev,
10339 "num_vsis=%u, num_rx:%u, num_tx=%u\n",
10340 pf->hw.dev_caps.num_vsis,
10341 pf->hw.dev_caps.num_rx_qp,
10342 pf->hw.dev_caps.num_tx_qp);
10345 if (list_type == i40e_aqc_opc_list_func_capabilities) {
10346 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
10347 + pf->hw.func_caps.num_vfs)
10348 if (pf->hw.revision_id == 0 &&
10349 pf->hw.func_caps.num_vsis < DEF_NUM_VSI) {
10350 dev_info(&pf->pdev->dev,
10351 "got num_vsis %d, setting num_vsis to %d\n",
10352 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
10353 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
10359 static int i40e_vsi_clear(struct i40e_vsi *vsi);
10362 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
10363 * @pf: board private structure
10365 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
10367 struct i40e_vsi *vsi;
10369 /* quick workaround for an NVM issue that leaves a critical register
10372 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
10373 static const u32 hkey[] = {
10374 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
10375 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
10376 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
10380 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
10381 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
10384 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
10387 /* find existing VSI and see if it needs configuring */
10388 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10390 /* create a new VSI if none exists */
10392 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
10393 pf->vsi[pf->lan_vsi]->seid, 0);
10395 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
10396 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10397 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
10402 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
10406 * i40e_fdir_teardown - release the Flow Director resources
10407 * @pf: board private structure
10409 static void i40e_fdir_teardown(struct i40e_pf *pf)
10411 struct i40e_vsi *vsi;
10413 i40e_fdir_filter_exit(pf);
10414 vsi = i40e_find_vsi_by_type(pf, I40E_VSI_FDIR);
10416 i40e_vsi_release(vsi);
10420 * i40e_rebuild_cloud_filters - Rebuilds cloud filters for VSIs
10421 * @vsi: PF main vsi
10422 * @seid: seid of main or channel VSIs
10424 * Rebuilds cloud filters associated with main VSI and channel VSIs if they
10425 * existed before reset
10427 static int i40e_rebuild_cloud_filters(struct i40e_vsi *vsi, u16 seid)
10429 struct i40e_cloud_filter *cfilter;
10430 struct i40e_pf *pf = vsi->back;
10431 struct hlist_node *node;
10434 /* Add cloud filters back if they exist */
10435 hlist_for_each_entry_safe(cfilter, node, &pf->cloud_filter_list,
10437 if (cfilter->seid != seid)
10440 if (cfilter->dst_port)
10441 ret = i40e_add_del_cloud_filter_big_buf(vsi, cfilter,
10444 ret = i40e_add_del_cloud_filter(vsi, cfilter, true);
10447 dev_dbg(&pf->pdev->dev,
10448 "Failed to rebuild cloud filter, err %s aq_err %s\n",
10449 i40e_stat_str(&pf->hw, ret),
10450 i40e_aq_str(&pf->hw,
10451 pf->hw.aq.asq_last_status));
10459 * i40e_rebuild_channels - Rebuilds channel VSIs if they existed before reset
10460 * @vsi: PF main vsi
10462 * Rebuilds channel VSIs if they existed before reset
10464 static int i40e_rebuild_channels(struct i40e_vsi *vsi)
10466 struct i40e_channel *ch, *ch_tmp;
10469 if (list_empty(&vsi->ch_list))
10472 list_for_each_entry_safe(ch, ch_tmp, &vsi->ch_list, list) {
10473 if (!ch->initialized)
10475 /* Proceed with creation of channel (VMDq2) VSI */
10476 ret = i40e_add_channel(vsi->back, vsi->uplink_seid, ch);
10478 dev_info(&vsi->back->pdev->dev,
10479 "failed to rebuild channels using uplink_seid %u\n",
10483 /* Reconfigure TX queues using QTX_CTL register */
10484 ret = i40e_channel_config_tx_ring(vsi->back, vsi, ch);
10486 dev_info(&vsi->back->pdev->dev,
10487 "failed to configure TX rings for channel %u\n",
10491 /* update 'next_base_queue' */
10492 vsi->next_base_queue = vsi->next_base_queue +
10493 ch->num_queue_pairs;
10494 if (ch->max_tx_rate) {
10495 u64 credits = ch->max_tx_rate;
10497 if (i40e_set_bw_limit(vsi, ch->seid,
10501 do_div(credits, I40E_BW_CREDIT_DIVISOR);
10502 dev_dbg(&vsi->back->pdev->dev,
10503 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10508 ret = i40e_rebuild_cloud_filters(vsi, ch->seid);
10510 dev_dbg(&vsi->back->pdev->dev,
10511 "Failed to rebuild cloud filters for channel VSI %u\n",
10520 * i40e_prep_for_reset - prep for the core to reset
10521 * @pf: board private structure
10523 * Close up the VFs and other things in prep for PF Reset.
10525 static void i40e_prep_for_reset(struct i40e_pf *pf)
10527 struct i40e_hw *hw = &pf->hw;
10528 i40e_status ret = 0;
10531 clear_bit(__I40E_RESET_INTR_RECEIVED, pf->state);
10532 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
10534 if (i40e_check_asq_alive(&pf->hw))
10535 i40e_vc_notify_reset(pf);
10537 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
10539 /* quiesce the VSIs and their queues that are not already DOWN */
10540 i40e_pf_quiesce_all_vsi(pf);
10542 for (v = 0; v < pf->num_alloc_vsi; v++) {
10544 pf->vsi[v]->seid = 0;
10547 i40e_shutdown_adminq(&pf->hw);
10549 /* call shutdown HMC */
10550 if (hw->hmc.hmc_obj) {
10551 ret = i40e_shutdown_lan_hmc(hw);
10553 dev_warn(&pf->pdev->dev,
10554 "shutdown_lan_hmc failed: %d\n", ret);
10557 /* Save the current PTP time so that we can restore the time after the
10560 i40e_ptp_save_hw_time(pf);
10564 * i40e_send_version - update firmware with driver version
10567 static void i40e_send_version(struct i40e_pf *pf)
10569 struct i40e_driver_version dv;
10571 dv.major_version = 0xff;
10572 dv.minor_version = 0xff;
10573 dv.build_version = 0xff;
10574 dv.subbuild_version = 0;
10575 strlcpy(dv.driver_string, UTS_RELEASE, sizeof(dv.driver_string));
10576 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
10580 * i40e_get_oem_version - get OEM specific version information
10581 * @hw: pointer to the hardware structure
10583 static void i40e_get_oem_version(struct i40e_hw *hw)
10585 u16 block_offset = 0xffff;
10586 u16 block_length = 0;
10587 u16 capabilities = 0;
10591 #define I40E_SR_NVM_OEM_VERSION_PTR 0x1B
10592 #define I40E_NVM_OEM_LENGTH_OFFSET 0x00
10593 #define I40E_NVM_OEM_CAPABILITIES_OFFSET 0x01
10594 #define I40E_NVM_OEM_GEN_OFFSET 0x02
10595 #define I40E_NVM_OEM_RELEASE_OFFSET 0x03
10596 #define I40E_NVM_OEM_CAPABILITIES_MASK 0x000F
10597 #define I40E_NVM_OEM_LENGTH 3
10599 /* Check if pointer to OEM version block is valid. */
10600 i40e_read_nvm_word(hw, I40E_SR_NVM_OEM_VERSION_PTR, &block_offset);
10601 if (block_offset == 0xffff)
10604 /* Check if OEM version block has correct length. */
10605 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_LENGTH_OFFSET,
10607 if (block_length < I40E_NVM_OEM_LENGTH)
10610 /* Check if OEM version format is as expected. */
10611 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_CAPABILITIES_OFFSET,
10613 if ((capabilities & I40E_NVM_OEM_CAPABILITIES_MASK) != 0)
10616 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_GEN_OFFSET,
10618 i40e_read_nvm_word(hw, block_offset + I40E_NVM_OEM_RELEASE_OFFSET,
10620 hw->nvm.oem_ver = (gen_snap << I40E_OEM_SNAP_SHIFT) | release;
10621 hw->nvm.eetrack = I40E_OEM_EETRACK_ID;
10625 * i40e_reset - wait for core reset to finish reset, reset pf if corer not seen
10626 * @pf: board private structure
10628 static int i40e_reset(struct i40e_pf *pf)
10630 struct i40e_hw *hw = &pf->hw;
10633 ret = i40e_pf_reset(hw);
10635 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
10636 set_bit(__I40E_RESET_FAILED, pf->state);
10637 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10645 * i40e_rebuild - rebuild using a saved config
10646 * @pf: board private structure
10647 * @reinit: if the Main VSI needs to re-initialized.
10648 * @lock_acquired: indicates whether or not the lock has been acquired
10649 * before this function was called.
10651 static void i40e_rebuild(struct i40e_pf *pf, bool reinit, bool lock_acquired)
10653 int old_recovery_mode_bit = test_bit(__I40E_RECOVERY_MODE, pf->state);
10654 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
10655 struct i40e_hw *hw = &pf->hw;
10660 if (test_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state) &&
10661 i40e_check_recovery_mode(pf)) {
10662 i40e_set_ethtool_ops(pf->vsi[pf->lan_vsi]->netdev);
10665 if (test_bit(__I40E_DOWN, pf->state) &&
10666 !test_bit(__I40E_RECOVERY_MODE, pf->state) &&
10667 !old_recovery_mode_bit)
10668 goto clear_recovery;
10669 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
10671 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
10672 ret = i40e_init_adminq(&pf->hw);
10674 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
10675 i40e_stat_str(&pf->hw, ret),
10676 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10677 goto clear_recovery;
10679 i40e_get_oem_version(&pf->hw);
10681 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state)) {
10682 /* The following delay is necessary for firmware update. */
10686 /* re-verify the eeprom if we just had an EMP reset */
10687 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, pf->state))
10688 i40e_verify_eeprom(pf);
10690 /* if we are going out of or into recovery mode we have to act
10691 * accordingly with regard to resources initialization
10692 * and deinitialization
10694 if (test_bit(__I40E_RECOVERY_MODE, pf->state) ||
10695 old_recovery_mode_bit) {
10696 if (i40e_get_capabilities(pf,
10697 i40e_aqc_opc_list_func_capabilities))
10700 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
10701 /* we're staying in recovery mode so we'll reinitialize
10704 if (i40e_setup_misc_vector_for_recovery_mode(pf))
10707 if (!lock_acquired)
10709 /* we're going out of recovery mode so we'll free
10710 * the IRQ allocated specifically for recovery mode
10711 * and restore the interrupt scheme
10713 free_irq(pf->pdev->irq, pf);
10714 i40e_clear_interrupt_scheme(pf);
10715 if (i40e_restore_interrupt_scheme(pf))
10719 /* tell the firmware that we're starting */
10720 i40e_send_version(pf);
10722 /* bail out in case recovery mode was detected, as there is
10723 * no need for further configuration.
10728 i40e_clear_pxe_mode(hw);
10729 ret = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
10731 goto end_core_reset;
10733 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10734 hw->func_caps.num_rx_qp, 0, 0);
10736 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
10737 goto end_core_reset;
10739 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10741 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
10742 goto end_core_reset;
10745 #ifdef CONFIG_I40E_DCB
10746 /* Enable FW to write a default DCB config on link-up
10747 * unless I40E_FLAG_TC_MQPRIO was enabled or DCB
10748 * is not supported with new link speed
10750 if (pf->flags & I40E_FLAG_TC_MQPRIO) {
10751 i40e_aq_set_dcb_parameters(hw, false, NULL);
10753 if (I40E_IS_X710TL_DEVICE(hw->device_id) &&
10754 (hw->phy.link_info.link_speed &
10755 (I40E_LINK_SPEED_2_5GB | I40E_LINK_SPEED_5GB))) {
10756 i40e_aq_set_dcb_parameters(hw, false, NULL);
10757 dev_warn(&pf->pdev->dev,
10758 "DCB is not supported for X710-T*L 2.5/5G speeds\n");
10759 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10761 i40e_aq_set_dcb_parameters(hw, true, NULL);
10762 ret = i40e_init_pf_dcb(pf);
10764 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n",
10766 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
10767 /* Continue without DCB enabled */
10772 #endif /* CONFIG_I40E_DCB */
10773 if (!lock_acquired)
10775 ret = i40e_setup_pf_switch(pf, reinit, true);
10779 /* The driver only wants link up/down and module qualification
10780 * reports from firmware. Note the negative logic.
10782 ret = i40e_aq_set_phy_int_mask(&pf->hw,
10783 ~(I40E_AQ_EVENT_LINK_UPDOWN |
10784 I40E_AQ_EVENT_MEDIA_NA |
10785 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
10787 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
10788 i40e_stat_str(&pf->hw, ret),
10789 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10791 /* Rebuild the VSIs and VEBs that existed before reset.
10792 * They are still in our local switch element arrays, so only
10793 * need to rebuild the switch model in the HW.
10795 * If there were VEBs but the reconstitution failed, we'll try
10796 * to recover minimal use by getting the basic PF VSI working.
10798 if (vsi->uplink_seid != pf->mac_seid) {
10799 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
10800 /* find the one VEB connected to the MAC, and find orphans */
10801 for (v = 0; v < I40E_MAX_VEB; v++) {
10805 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
10806 pf->veb[v]->uplink_seid == 0) {
10807 ret = i40e_reconstitute_veb(pf->veb[v]);
10812 /* If Main VEB failed, we're in deep doodoo,
10813 * so give up rebuilding the switch and set up
10814 * for minimal rebuild of PF VSI.
10815 * If orphan failed, we'll report the error
10816 * but try to keep going.
10818 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
10819 dev_info(&pf->pdev->dev,
10820 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
10822 vsi->uplink_seid = pf->mac_seid;
10824 } else if (pf->veb[v]->uplink_seid == 0) {
10825 dev_info(&pf->pdev->dev,
10826 "rebuild of orphan VEB failed: %d\n",
10833 if (vsi->uplink_seid == pf->mac_seid) {
10834 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
10835 /* no VEB, so rebuild only the Main VSI */
10836 ret = i40e_add_vsi(vsi);
10838 dev_info(&pf->pdev->dev,
10839 "rebuild of Main VSI failed: %d\n", ret);
10844 if (vsi->mqprio_qopt.max_rate[0]) {
10845 u64 max_tx_rate = vsi->mqprio_qopt.max_rate[0];
10848 do_div(max_tx_rate, I40E_BW_MBPS_DIVISOR);
10849 ret = i40e_set_bw_limit(vsi, vsi->seid, max_tx_rate);
10853 credits = max_tx_rate;
10854 do_div(credits, I40E_BW_CREDIT_DIVISOR);
10855 dev_dbg(&vsi->back->pdev->dev,
10856 "Set tx rate of %llu Mbps (count of 50Mbps %llu) for vsi->seid %u\n",
10862 ret = i40e_rebuild_cloud_filters(vsi, vsi->seid);
10866 /* PF Main VSI is rebuild by now, go ahead and rebuild channel VSIs
10867 * for this main VSI if they exist
10869 ret = i40e_rebuild_channels(vsi);
10873 /* Reconfigure hardware for allowing smaller MSS in the case
10874 * of TSO, so that we avoid the MDD being fired and causing
10875 * a reset in the case of small MSS+TSO.
10877 #define I40E_REG_MSS 0x000E64DC
10878 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
10879 #define I40E_64BYTE_MSS 0x400000
10880 val = rd32(hw, I40E_REG_MSS);
10881 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
10882 val &= ~I40E_REG_MSS_MIN_MASK;
10883 val |= I40E_64BYTE_MSS;
10884 wr32(hw, I40E_REG_MSS, val);
10887 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
10889 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
10891 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
10892 i40e_stat_str(&pf->hw, ret),
10893 i40e_aq_str(&pf->hw,
10894 pf->hw.aq.asq_last_status));
10896 /* reinit the misc interrupt */
10897 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
10898 ret = i40e_setup_misc_vector(pf);
10900 /* Add a filter to drop all Flow control frames from any VSI from being
10901 * transmitted. By doing so we stop a malicious VF from sending out
10902 * PAUSE or PFC frames and potentially controlling traffic for other
10904 * The FW can still send Flow control frames if enabled.
10906 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
10907 pf->main_vsi_seid);
10909 /* restart the VSIs that were rebuilt and running before the reset */
10910 i40e_pf_unquiesce_all_vsi(pf);
10912 /* Release the RTNL lock before we start resetting VFs */
10913 if (!lock_acquired)
10916 /* Restore promiscuous settings */
10917 ret = i40e_set_promiscuous(pf, pf->cur_promisc);
10919 dev_warn(&pf->pdev->dev,
10920 "Failed to restore promiscuous setting: %s, err %s aq_err %s\n",
10921 pf->cur_promisc ? "on" : "off",
10922 i40e_stat_str(&pf->hw, ret),
10923 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10925 i40e_reset_all_vfs(pf, true);
10927 /* tell the firmware that we're starting */
10928 i40e_send_version(pf);
10930 /* We've already released the lock, so don't do it again */
10931 goto end_core_reset;
10934 if (!lock_acquired)
10937 clear_bit(__I40E_RESET_FAILED, pf->state);
10939 clear_bit(__I40E_RESET_RECOVERY_PENDING, pf->state);
10940 clear_bit(__I40E_TIMEOUT_RECOVERY_PENDING, pf->state);
10944 * i40e_reset_and_rebuild - reset and rebuild using a saved config
10945 * @pf: board private structure
10946 * @reinit: if the Main VSI needs to re-initialized.
10947 * @lock_acquired: indicates whether or not the lock has been acquired
10948 * before this function was called.
10950 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit,
10951 bool lock_acquired)
10955 if (test_bit(__I40E_IN_REMOVE, pf->state))
10957 /* Now we wait for GRST to settle out.
10958 * We don't have to delete the VEBs or VSIs from the hw switch
10959 * because the reset will make them disappear.
10961 ret = i40e_reset(pf);
10963 i40e_rebuild(pf, reinit, lock_acquired);
10967 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
10968 * @pf: board private structure
10970 * Close up the VFs and other things in prep for a Core Reset,
10971 * then get ready to rebuild the world.
10972 * @lock_acquired: indicates whether or not the lock has been acquired
10973 * before this function was called.
10975 static void i40e_handle_reset_warning(struct i40e_pf *pf, bool lock_acquired)
10977 i40e_prep_for_reset(pf);
10978 i40e_reset_and_rebuild(pf, false, lock_acquired);
10982 * i40e_handle_mdd_event
10983 * @pf: pointer to the PF structure
10985 * Called from the MDD irq handler to identify possibly malicious vfs
10987 static void i40e_handle_mdd_event(struct i40e_pf *pf)
10989 struct i40e_hw *hw = &pf->hw;
10990 bool mdd_detected = false;
10991 struct i40e_vf *vf;
10995 if (!test_bit(__I40E_MDD_EVENT_PENDING, pf->state))
10998 /* find what triggered the MDD event */
10999 reg = rd32(hw, I40E_GL_MDET_TX);
11000 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
11001 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
11002 I40E_GL_MDET_TX_PF_NUM_SHIFT;
11003 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
11004 I40E_GL_MDET_TX_VF_NUM_SHIFT;
11005 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
11006 I40E_GL_MDET_TX_EVENT_SHIFT;
11007 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
11008 I40E_GL_MDET_TX_QUEUE_SHIFT) -
11009 pf->hw.func_caps.base_queue;
11010 if (netif_msg_tx_err(pf))
11011 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
11012 event, queue, pf_num, vf_num);
11013 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
11014 mdd_detected = true;
11016 reg = rd32(hw, I40E_GL_MDET_RX);
11017 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
11018 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
11019 I40E_GL_MDET_RX_FUNCTION_SHIFT;
11020 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
11021 I40E_GL_MDET_RX_EVENT_SHIFT;
11022 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
11023 I40E_GL_MDET_RX_QUEUE_SHIFT) -
11024 pf->hw.func_caps.base_queue;
11025 if (netif_msg_rx_err(pf))
11026 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
11027 event, queue, func);
11028 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
11029 mdd_detected = true;
11032 if (mdd_detected) {
11033 reg = rd32(hw, I40E_PF_MDET_TX);
11034 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
11035 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
11036 dev_dbg(&pf->pdev->dev, "TX driver issue detected on PF\n");
11038 reg = rd32(hw, I40E_PF_MDET_RX);
11039 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
11040 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
11041 dev_dbg(&pf->pdev->dev, "RX driver issue detected on PF\n");
11045 /* see if one of the VFs needs its hand slapped */
11046 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
11048 reg = rd32(hw, I40E_VP_MDET_TX(i));
11049 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
11050 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
11051 vf->num_mdd_events++;
11052 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
11054 dev_info(&pf->pdev->dev,
11055 "Use PF Control I/F to re-enable the VF\n");
11056 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
11059 reg = rd32(hw, I40E_VP_MDET_RX(i));
11060 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
11061 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
11062 vf->num_mdd_events++;
11063 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
11065 dev_info(&pf->pdev->dev,
11066 "Use PF Control I/F to re-enable the VF\n");
11067 set_bit(I40E_VF_STATE_DISABLED, &vf->vf_states);
11071 /* re-enable mdd interrupt cause */
11072 clear_bit(__I40E_MDD_EVENT_PENDING, pf->state);
11073 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
11074 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
11075 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
11080 * i40e_service_task - Run the driver's async subtasks
11081 * @work: pointer to work_struct containing our data
11083 static void i40e_service_task(struct work_struct *work)
11085 struct i40e_pf *pf = container_of(work,
11088 unsigned long start_time = jiffies;
11090 /* don't bother with service tasks if a reset is in progress */
11091 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
11092 test_bit(__I40E_SUSPENDED, pf->state))
11095 if (test_and_set_bit(__I40E_SERVICE_SCHED, pf->state))
11098 if (!test_bit(__I40E_RECOVERY_MODE, pf->state)) {
11099 i40e_detect_recover_hung(pf->vsi[pf->lan_vsi]);
11100 i40e_sync_filters_subtask(pf);
11101 i40e_reset_subtask(pf);
11102 i40e_handle_mdd_event(pf);
11103 i40e_vc_process_vflr_event(pf);
11104 i40e_watchdog_subtask(pf);
11105 i40e_fdir_reinit_subtask(pf);
11106 if (test_and_clear_bit(__I40E_CLIENT_RESET, pf->state)) {
11107 /* Client subtask will reopen next time through. */
11108 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi],
11111 i40e_client_subtask(pf);
11112 if (test_and_clear_bit(__I40E_CLIENT_L2_CHANGE,
11114 i40e_notify_client_of_l2_param_changes(
11115 pf->vsi[pf->lan_vsi]);
11117 i40e_sync_filters_subtask(pf);
11119 i40e_reset_subtask(pf);
11122 i40e_clean_adminq_subtask(pf);
11124 /* flush memory to make sure state is correct before next watchdog */
11125 smp_mb__before_atomic();
11126 clear_bit(__I40E_SERVICE_SCHED, pf->state);
11128 /* If the tasks have taken longer than one timer cycle or there
11129 * is more work to be done, reschedule the service task now
11130 * rather than wait for the timer to tick again.
11132 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
11133 test_bit(__I40E_ADMINQ_EVENT_PENDING, pf->state) ||
11134 test_bit(__I40E_MDD_EVENT_PENDING, pf->state) ||
11135 test_bit(__I40E_VFLR_EVENT_PENDING, pf->state))
11136 i40e_service_event_schedule(pf);
11140 * i40e_service_timer - timer callback
11141 * @t: timer list pointer
11143 static void i40e_service_timer(struct timer_list *t)
11145 struct i40e_pf *pf = from_timer(pf, t, service_timer);
11147 mod_timer(&pf->service_timer,
11148 round_jiffies(jiffies + pf->service_timer_period));
11149 i40e_service_event_schedule(pf);
11153 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
11154 * @vsi: the VSI being configured
11156 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
11158 struct i40e_pf *pf = vsi->back;
11160 switch (vsi->type) {
11161 case I40E_VSI_MAIN:
11162 vsi->alloc_queue_pairs = pf->num_lan_qps;
11163 if (!vsi->num_tx_desc)
11164 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11165 I40E_REQ_DESCRIPTOR_MULTIPLE);
11166 if (!vsi->num_rx_desc)
11167 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11168 I40E_REQ_DESCRIPTOR_MULTIPLE);
11169 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11170 vsi->num_q_vectors = pf->num_lan_msix;
11172 vsi->num_q_vectors = 1;
11176 case I40E_VSI_FDIR:
11177 vsi->alloc_queue_pairs = 1;
11178 vsi->num_tx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11179 I40E_REQ_DESCRIPTOR_MULTIPLE);
11180 vsi->num_rx_desc = ALIGN(I40E_FDIR_RING_COUNT,
11181 I40E_REQ_DESCRIPTOR_MULTIPLE);
11182 vsi->num_q_vectors = pf->num_fdsb_msix;
11185 case I40E_VSI_VMDQ2:
11186 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
11187 if (!vsi->num_tx_desc)
11188 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11189 I40E_REQ_DESCRIPTOR_MULTIPLE);
11190 if (!vsi->num_rx_desc)
11191 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11192 I40E_REQ_DESCRIPTOR_MULTIPLE);
11193 vsi->num_q_vectors = pf->num_vmdq_msix;
11196 case I40E_VSI_SRIOV:
11197 vsi->alloc_queue_pairs = pf->num_vf_qps;
11198 if (!vsi->num_tx_desc)
11199 vsi->num_tx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11200 I40E_REQ_DESCRIPTOR_MULTIPLE);
11201 if (!vsi->num_rx_desc)
11202 vsi->num_rx_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
11203 I40E_REQ_DESCRIPTOR_MULTIPLE);
11211 if (is_kdump_kernel()) {
11212 vsi->num_tx_desc = I40E_MIN_NUM_DESCRIPTORS;
11213 vsi->num_rx_desc = I40E_MIN_NUM_DESCRIPTORS;
11220 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
11221 * @vsi: VSI pointer
11222 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
11224 * On error: returns error code (negative)
11225 * On success: returns 0
11227 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
11229 struct i40e_ring **next_rings;
11233 /* allocate memory for both Tx, XDP Tx and Rx ring pointers */
11234 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs *
11235 (i40e_enabled_xdp_vsi(vsi) ? 3 : 2);
11236 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
11237 if (!vsi->tx_rings)
11239 next_rings = vsi->tx_rings + vsi->alloc_queue_pairs;
11240 if (i40e_enabled_xdp_vsi(vsi)) {
11241 vsi->xdp_rings = next_rings;
11242 next_rings += vsi->alloc_queue_pairs;
11244 vsi->rx_rings = next_rings;
11246 if (alloc_qvectors) {
11247 /* allocate memory for q_vector pointers */
11248 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
11249 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
11250 if (!vsi->q_vectors) {
11258 kfree(vsi->tx_rings);
11263 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
11264 * @pf: board private structure
11265 * @type: type of VSI
11267 * On error: returns error code (negative)
11268 * On success: returns vsi index in PF (positive)
11270 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
11273 struct i40e_vsi *vsi;
11277 /* Need to protect the allocation of the VSIs at the PF level */
11278 mutex_lock(&pf->switch_mutex);
11280 /* VSI list may be fragmented if VSI creation/destruction has
11281 * been happening. We can afford to do a quick scan to look
11282 * for any free VSIs in the list.
11284 * find next empty vsi slot, looping back around if necessary
11287 while (i < pf->num_alloc_vsi && pf->vsi[i])
11289 if (i >= pf->num_alloc_vsi) {
11291 while (i < pf->next_vsi && pf->vsi[i])
11295 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
11296 vsi_idx = i; /* Found one! */
11299 goto unlock_pf; /* out of VSI slots! */
11301 pf->next_vsi = ++i;
11303 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
11310 set_bit(__I40E_VSI_DOWN, vsi->state);
11312 vsi->idx = vsi_idx;
11313 vsi->int_rate_limit = 0;
11314 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
11315 pf->rss_table_size : 64;
11316 vsi->netdev_registered = false;
11317 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
11318 hash_init(vsi->mac_filter_hash);
11319 vsi->irqs_ready = false;
11321 if (type == I40E_VSI_MAIN) {
11322 vsi->af_xdp_zc_qps = bitmap_zalloc(pf->num_lan_qps, GFP_KERNEL);
11323 if (!vsi->af_xdp_zc_qps)
11327 ret = i40e_set_num_rings_in_vsi(vsi);
11331 ret = i40e_vsi_alloc_arrays(vsi, true);
11335 /* Setup default MSIX irq handler for VSI */
11336 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
11338 /* Initialize VSI lock */
11339 spin_lock_init(&vsi->mac_filter_hash_lock);
11340 pf->vsi[vsi_idx] = vsi;
11345 bitmap_free(vsi->af_xdp_zc_qps);
11346 pf->next_vsi = i - 1;
11349 mutex_unlock(&pf->switch_mutex);
11354 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
11355 * @vsi: VSI pointer
11356 * @free_qvectors: a bool to specify if q_vectors need to be freed.
11358 * On error: returns error code (negative)
11359 * On success: returns 0
11361 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
11363 /* free the ring and vector containers */
11364 if (free_qvectors) {
11365 kfree(vsi->q_vectors);
11366 vsi->q_vectors = NULL;
11368 kfree(vsi->tx_rings);
11369 vsi->tx_rings = NULL;
11370 vsi->rx_rings = NULL;
11371 vsi->xdp_rings = NULL;
11375 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
11377 * @vsi: Pointer to VSI structure
11379 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
11384 kfree(vsi->rss_hkey_user);
11385 vsi->rss_hkey_user = NULL;
11387 kfree(vsi->rss_lut_user);
11388 vsi->rss_lut_user = NULL;
11392 * i40e_vsi_clear - Deallocate the VSI provided
11393 * @vsi: the VSI being un-configured
11395 static int i40e_vsi_clear(struct i40e_vsi *vsi)
11397 struct i40e_pf *pf;
11406 mutex_lock(&pf->switch_mutex);
11407 if (!pf->vsi[vsi->idx]) {
11408 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](type %d)\n",
11409 vsi->idx, vsi->idx, vsi->type);
11413 if (pf->vsi[vsi->idx] != vsi) {
11414 dev_err(&pf->pdev->dev,
11415 "pf->vsi[%d](type %d) != vsi[%d](type %d): no free!\n",
11416 pf->vsi[vsi->idx]->idx,
11417 pf->vsi[vsi->idx]->type,
11418 vsi->idx, vsi->type);
11422 /* updates the PF for this cleared vsi */
11423 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
11424 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
11426 bitmap_free(vsi->af_xdp_zc_qps);
11427 i40e_vsi_free_arrays(vsi, true);
11428 i40e_clear_rss_config_user(vsi);
11430 pf->vsi[vsi->idx] = NULL;
11431 if (vsi->idx < pf->next_vsi)
11432 pf->next_vsi = vsi->idx;
11435 mutex_unlock(&pf->switch_mutex);
11443 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
11444 * @vsi: the VSI being cleaned
11446 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
11450 if (vsi->tx_rings && vsi->tx_rings[0]) {
11451 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11452 kfree_rcu(vsi->tx_rings[i], rcu);
11453 WRITE_ONCE(vsi->tx_rings[i], NULL);
11454 WRITE_ONCE(vsi->rx_rings[i], NULL);
11455 if (vsi->xdp_rings)
11456 WRITE_ONCE(vsi->xdp_rings[i], NULL);
11462 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
11463 * @vsi: the VSI being configured
11465 static int i40e_alloc_rings(struct i40e_vsi *vsi)
11467 int i, qpv = i40e_enabled_xdp_vsi(vsi) ? 3 : 2;
11468 struct i40e_pf *pf = vsi->back;
11469 struct i40e_ring *ring;
11471 /* Set basic values in the rings to be used later during open() */
11472 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
11473 /* allocate space for both Tx and Rx in one shot */
11474 ring = kcalloc(qpv, sizeof(struct i40e_ring), GFP_KERNEL);
11478 ring->queue_index = i;
11479 ring->reg_idx = vsi->base_queue + i;
11480 ring->ring_active = false;
11482 ring->netdev = vsi->netdev;
11483 ring->dev = &pf->pdev->dev;
11484 ring->count = vsi->num_tx_desc;
11487 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11488 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11489 ring->itr_setting = pf->tx_itr_default;
11490 WRITE_ONCE(vsi->tx_rings[i], ring++);
11492 if (!i40e_enabled_xdp_vsi(vsi))
11495 ring->queue_index = vsi->alloc_queue_pairs + i;
11496 ring->reg_idx = vsi->base_queue + ring->queue_index;
11497 ring->ring_active = false;
11499 ring->netdev = NULL;
11500 ring->dev = &pf->pdev->dev;
11501 ring->count = vsi->num_tx_desc;
11504 if (vsi->back->hw_features & I40E_HW_WB_ON_ITR_CAPABLE)
11505 ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
11506 set_ring_xdp(ring);
11507 ring->itr_setting = pf->tx_itr_default;
11508 WRITE_ONCE(vsi->xdp_rings[i], ring++);
11511 ring->queue_index = i;
11512 ring->reg_idx = vsi->base_queue + i;
11513 ring->ring_active = false;
11515 ring->netdev = vsi->netdev;
11516 ring->dev = &pf->pdev->dev;
11517 ring->count = vsi->num_rx_desc;
11520 ring->itr_setting = pf->rx_itr_default;
11521 WRITE_ONCE(vsi->rx_rings[i], ring);
11527 i40e_vsi_clear_rings(vsi);
11532 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
11533 * @pf: board private structure
11534 * @vectors: the number of MSI-X vectors to request
11536 * Returns the number of vectors reserved, or error
11538 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
11540 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
11541 I40E_MIN_MSIX, vectors);
11543 dev_info(&pf->pdev->dev,
11544 "MSI-X vector reservation failed: %d\n", vectors);
11552 * i40e_init_msix - Setup the MSIX capability
11553 * @pf: board private structure
11555 * Work with the OS to set up the MSIX vectors needed.
11557 * Returns the number of vectors reserved or negative on failure
11559 static int i40e_init_msix(struct i40e_pf *pf)
11561 struct i40e_hw *hw = &pf->hw;
11562 int cpus, extra_vectors;
11566 int iwarp_requested = 0;
11568 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
11571 /* The number of vectors we'll request will be comprised of:
11572 * - Add 1 for "other" cause for Admin Queue events, etc.
11573 * - The number of LAN queue pairs
11574 * - Queues being used for RSS.
11575 * We don't need as many as max_rss_size vectors.
11576 * use rss_size instead in the calculation since that
11577 * is governed by number of cpus in the system.
11578 * - assumes symmetric Tx/Rx pairing
11579 * - The number of VMDq pairs
11580 * - The CPU count within the NUMA node if iWARP is enabled
11581 * Once we count this up, try the request.
11583 * If we can't get what we want, we'll simplify to nearly nothing
11584 * and try again. If that still fails, we punt.
11586 vectors_left = hw->func_caps.num_msix_vectors;
11589 /* reserve one vector for miscellaneous handler */
11590 if (vectors_left) {
11595 /* reserve some vectors for the main PF traffic queues. Initially we
11596 * only reserve at most 50% of the available vectors, in the case that
11597 * the number of online CPUs is large. This ensures that we can enable
11598 * extra features as well. Once we've enabled the other features, we
11599 * will use any remaining vectors to reach as close as we can to the
11600 * number of online CPUs.
11602 cpus = num_online_cpus();
11603 pf->num_lan_msix = min_t(int, cpus, vectors_left / 2);
11604 vectors_left -= pf->num_lan_msix;
11606 /* reserve one vector for sideband flow director */
11607 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11608 if (vectors_left) {
11609 pf->num_fdsb_msix = 1;
11613 pf->num_fdsb_msix = 0;
11617 /* can we reserve enough for iWARP? */
11618 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11619 iwarp_requested = pf->num_iwarp_msix;
11622 pf->num_iwarp_msix = 0;
11623 else if (vectors_left < pf->num_iwarp_msix)
11624 pf->num_iwarp_msix = 1;
11625 v_budget += pf->num_iwarp_msix;
11626 vectors_left -= pf->num_iwarp_msix;
11629 /* any vectors left over go for VMDq support */
11630 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
11631 if (!vectors_left) {
11632 pf->num_vmdq_msix = 0;
11633 pf->num_vmdq_qps = 0;
11635 int vmdq_vecs_wanted =
11636 pf->num_vmdq_vsis * pf->num_vmdq_qps;
11638 min_t(int, vectors_left, vmdq_vecs_wanted);
11640 /* if we're short on vectors for what's desired, we limit
11641 * the queues per vmdq. If this is still more than are
11642 * available, the user will need to change the number of
11643 * queues/vectors used by the PF later with the ethtool
11646 if (vectors_left < vmdq_vecs_wanted) {
11647 pf->num_vmdq_qps = 1;
11648 vmdq_vecs_wanted = pf->num_vmdq_vsis;
11649 vmdq_vecs = min_t(int,
11653 pf->num_vmdq_msix = pf->num_vmdq_qps;
11655 v_budget += vmdq_vecs;
11656 vectors_left -= vmdq_vecs;
11660 /* On systems with a large number of SMP cores, we previously limited
11661 * the number of vectors for num_lan_msix to be at most 50% of the
11662 * available vectors, to allow for other features. Now, we add back
11663 * the remaining vectors. However, we ensure that the total
11664 * num_lan_msix will not exceed num_online_cpus(). To do this, we
11665 * calculate the number of vectors we can add without going over the
11666 * cap of CPUs. For systems with a small number of CPUs this will be
11669 extra_vectors = min_t(int, cpus - pf->num_lan_msix, vectors_left);
11670 pf->num_lan_msix += extra_vectors;
11671 vectors_left -= extra_vectors;
11673 WARN(vectors_left < 0,
11674 "Calculation of remaining vectors underflowed. This is an accounting bug when determining total MSI-X vectors.\n");
11676 v_budget += pf->num_lan_msix;
11677 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
11679 if (!pf->msix_entries)
11682 for (i = 0; i < v_budget; i++)
11683 pf->msix_entries[i].entry = i;
11684 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
11686 if (v_actual < I40E_MIN_MSIX) {
11687 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
11688 kfree(pf->msix_entries);
11689 pf->msix_entries = NULL;
11690 pci_disable_msix(pf->pdev);
11693 } else if (v_actual == I40E_MIN_MSIX) {
11694 /* Adjust for minimal MSIX use */
11695 pf->num_vmdq_vsis = 0;
11696 pf->num_vmdq_qps = 0;
11697 pf->num_lan_qps = 1;
11698 pf->num_lan_msix = 1;
11700 } else if (v_actual != v_budget) {
11701 /* If we have limited resources, we will start with no vectors
11702 * for the special features and then allocate vectors to some
11703 * of these features based on the policy and at the end disable
11704 * the features that did not get any vectors.
11708 dev_info(&pf->pdev->dev,
11709 "MSI-X vector limit reached with %d, wanted %d, attempting to redistribute vectors\n",
11710 v_actual, v_budget);
11711 /* reserve the misc vector */
11712 vec = v_actual - 1;
11714 /* Scale vector usage down */
11715 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
11716 pf->num_vmdq_vsis = 1;
11717 pf->num_vmdq_qps = 1;
11719 /* partition out the remaining vectors */
11722 pf->num_lan_msix = 1;
11725 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11726 pf->num_lan_msix = 1;
11727 pf->num_iwarp_msix = 1;
11729 pf->num_lan_msix = 2;
11733 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11734 pf->num_iwarp_msix = min_t(int, (vec / 3),
11736 pf->num_vmdq_vsis = min_t(int, (vec / 3),
11737 I40E_DEFAULT_NUM_VMDQ_VSI);
11739 pf->num_vmdq_vsis = min_t(int, (vec / 2),
11740 I40E_DEFAULT_NUM_VMDQ_VSI);
11742 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
11743 pf->num_fdsb_msix = 1;
11746 pf->num_lan_msix = min_t(int,
11747 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
11749 pf->num_lan_qps = pf->num_lan_msix;
11754 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
11755 (pf->num_fdsb_msix == 0)) {
11756 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
11757 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
11758 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11760 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
11761 (pf->num_vmdq_msix == 0)) {
11762 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
11763 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
11766 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
11767 (pf->num_iwarp_msix == 0)) {
11768 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
11769 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11771 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
11772 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
11774 pf->num_vmdq_msix * pf->num_vmdq_vsis,
11776 pf->num_iwarp_msix);
11782 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
11783 * @vsi: the VSI being configured
11784 * @v_idx: index of the vector in the vsi struct
11786 * We allocate one q_vector. If allocation fails we return -ENOMEM.
11788 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
11790 struct i40e_q_vector *q_vector;
11792 /* allocate q_vector */
11793 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
11797 q_vector->vsi = vsi;
11798 q_vector->v_idx = v_idx;
11799 cpumask_copy(&q_vector->affinity_mask, cpu_possible_mask);
11802 netif_napi_add(vsi->netdev, &q_vector->napi,
11803 i40e_napi_poll, NAPI_POLL_WEIGHT);
11805 /* tie q_vector and vsi together */
11806 vsi->q_vectors[v_idx] = q_vector;
11812 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
11813 * @vsi: the VSI being configured
11815 * We allocate one q_vector per queue interrupt. If allocation fails we
11818 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
11820 struct i40e_pf *pf = vsi->back;
11821 int err, v_idx, num_q_vectors;
11823 /* if not MSIX, give the one vector only to the LAN VSI */
11824 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
11825 num_q_vectors = vsi->num_q_vectors;
11826 else if (vsi == pf->vsi[pf->lan_vsi])
11831 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
11832 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
11841 i40e_free_q_vector(vsi, v_idx);
11847 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
11848 * @pf: board private structure to initialize
11850 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
11855 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11856 vectors = i40e_init_msix(pf);
11858 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
11859 I40E_FLAG_IWARP_ENABLED |
11860 I40E_FLAG_RSS_ENABLED |
11861 I40E_FLAG_DCB_CAPABLE |
11862 I40E_FLAG_DCB_ENABLED |
11863 I40E_FLAG_SRIOV_ENABLED |
11864 I40E_FLAG_FD_SB_ENABLED |
11865 I40E_FLAG_FD_ATR_ENABLED |
11866 I40E_FLAG_VMDQ_ENABLED);
11867 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
11869 /* rework the queue expectations without MSIX */
11870 i40e_determine_queue_usage(pf);
11874 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11875 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
11876 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
11877 vectors = pci_enable_msi(pf->pdev);
11879 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
11881 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
11883 vectors = 1; /* one MSI or Legacy vector */
11886 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
11887 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
11889 /* set up vector assignment tracking */
11890 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
11891 pf->irq_pile = kzalloc(size, GFP_KERNEL);
11895 pf->irq_pile->num_entries = vectors;
11897 /* track first vector for misc interrupts, ignore return */
11898 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
11904 * i40e_restore_interrupt_scheme - Restore the interrupt scheme
11905 * @pf: private board data structure
11907 * Restore the interrupt scheme that was cleared when we suspended the
11908 * device. This should be called during resume to re-allocate the q_vectors
11909 * and reacquire IRQs.
11911 static int i40e_restore_interrupt_scheme(struct i40e_pf *pf)
11915 /* We cleared the MSI and MSI-X flags when disabling the old interrupt
11916 * scheme. We need to re-enabled them here in order to attempt to
11917 * re-acquire the MSI or MSI-X vectors
11919 pf->flags |= (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
11921 err = i40e_init_interrupt_scheme(pf);
11925 /* Now that we've re-acquired IRQs, we need to remap the vectors and
11926 * rings together again.
11928 for (i = 0; i < pf->num_alloc_vsi; i++) {
11930 err = i40e_vsi_alloc_q_vectors(pf->vsi[i]);
11933 i40e_vsi_map_rings_to_vectors(pf->vsi[i]);
11937 err = i40e_setup_misc_vector(pf);
11941 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
11942 i40e_client_update_msix_info(pf);
11949 i40e_vsi_free_q_vectors(pf->vsi[i]);
11956 * i40e_setup_misc_vector_for_recovery_mode - Setup the misc vector to handle
11957 * non queue events in recovery mode
11958 * @pf: board private structure
11960 * This sets up the handler for MSIX 0 or MSI/legacy, which is used to manage
11961 * the non-queue interrupts, e.g. AdminQ and errors in recovery mode.
11962 * This is handled differently than in recovery mode since no Tx/Rx resources
11963 * are being allocated.
11965 static int i40e_setup_misc_vector_for_recovery_mode(struct i40e_pf *pf)
11969 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11970 err = i40e_setup_misc_vector(pf);
11973 dev_info(&pf->pdev->dev,
11974 "MSI-X misc vector request failed, error %d\n",
11979 u32 flags = pf->flags & I40E_FLAG_MSI_ENABLED ? 0 : IRQF_SHARED;
11981 err = request_irq(pf->pdev->irq, i40e_intr, flags,
11985 dev_info(&pf->pdev->dev,
11986 "MSI/legacy misc vector request failed, error %d\n",
11990 i40e_enable_misc_int_causes(pf);
11991 i40e_irq_dynamic_enable_icr0(pf);
11998 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
11999 * @pf: board private structure
12001 * This sets up the handler for MSIX 0, which is used to manage the
12002 * non-queue interrupts, e.g. AdminQ and errors. This is not used
12003 * when in MSI or Legacy interrupt mode.
12005 static int i40e_setup_misc_vector(struct i40e_pf *pf)
12007 struct i40e_hw *hw = &pf->hw;
12010 /* Only request the IRQ once, the first time through. */
12011 if (!test_and_set_bit(__I40E_MISC_IRQ_REQUESTED, pf->state)) {
12012 err = request_irq(pf->msix_entries[0].vector,
12013 i40e_intr, 0, pf->int_name, pf);
12015 clear_bit(__I40E_MISC_IRQ_REQUESTED, pf->state);
12016 dev_info(&pf->pdev->dev,
12017 "request_irq for %s failed: %d\n",
12018 pf->int_name, err);
12023 i40e_enable_misc_int_causes(pf);
12025 /* associate no queues to the misc vector */
12026 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
12027 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K >> 1);
12031 i40e_irq_dynamic_enable_icr0(pf);
12037 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
12038 * @vsi: Pointer to vsi structure
12039 * @seed: Buffter to store the hash keys
12040 * @lut: Buffer to store the lookup table entries
12041 * @lut_size: Size of buffer to store the lookup table entries
12043 * Return 0 on success, negative on failure
12045 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
12046 u8 *lut, u16 lut_size)
12048 struct i40e_pf *pf = vsi->back;
12049 struct i40e_hw *hw = &pf->hw;
12053 ret = i40e_aq_get_rss_key(hw, vsi->id,
12054 (struct i40e_aqc_get_set_rss_key_data *)seed);
12056 dev_info(&pf->pdev->dev,
12057 "Cannot get RSS key, err %s aq_err %s\n",
12058 i40e_stat_str(&pf->hw, ret),
12059 i40e_aq_str(&pf->hw,
12060 pf->hw.aq.asq_last_status));
12066 bool pf_lut = vsi->type == I40E_VSI_MAIN;
12068 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
12070 dev_info(&pf->pdev->dev,
12071 "Cannot get RSS lut, err %s aq_err %s\n",
12072 i40e_stat_str(&pf->hw, ret),
12073 i40e_aq_str(&pf->hw,
12074 pf->hw.aq.asq_last_status));
12083 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
12084 * @vsi: Pointer to vsi structure
12085 * @seed: RSS hash seed
12086 * @lut: Lookup table
12087 * @lut_size: Lookup table size
12089 * Returns 0 on success, negative on failure
12091 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
12092 const u8 *lut, u16 lut_size)
12094 struct i40e_pf *pf = vsi->back;
12095 struct i40e_hw *hw = &pf->hw;
12096 u16 vf_id = vsi->vf_id;
12099 /* Fill out hash function seed */
12101 u32 *seed_dw = (u32 *)seed;
12103 if (vsi->type == I40E_VSI_MAIN) {
12104 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12105 wr32(hw, I40E_PFQF_HKEY(i), seed_dw[i]);
12106 } else if (vsi->type == I40E_VSI_SRIOV) {
12107 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
12108 wr32(hw, I40E_VFQF_HKEY1(i, vf_id), seed_dw[i]);
12110 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
12115 u32 *lut_dw = (u32 *)lut;
12117 if (vsi->type == I40E_VSI_MAIN) {
12118 if (lut_size != I40E_HLUT_ARRAY_SIZE)
12120 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12121 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
12122 } else if (vsi->type == I40E_VSI_SRIOV) {
12123 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
12125 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12126 wr32(hw, I40E_VFQF_HLUT1(i, vf_id), lut_dw[i]);
12128 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12137 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
12138 * @vsi: Pointer to VSI structure
12139 * @seed: Buffer to store the keys
12140 * @lut: Buffer to store the lookup table entries
12141 * @lut_size: Size of buffer to store the lookup table entries
12143 * Returns 0 on success, negative on failure
12145 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
12146 u8 *lut, u16 lut_size)
12148 struct i40e_pf *pf = vsi->back;
12149 struct i40e_hw *hw = &pf->hw;
12153 u32 *seed_dw = (u32 *)seed;
12155 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
12156 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
12159 u32 *lut_dw = (u32 *)lut;
12161 if (lut_size != I40E_HLUT_ARRAY_SIZE)
12163 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12164 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
12171 * i40e_config_rss - Configure RSS keys and lut
12172 * @vsi: Pointer to VSI structure
12173 * @seed: RSS hash seed
12174 * @lut: Lookup table
12175 * @lut_size: Lookup table size
12177 * Returns 0 on success, negative on failure
12179 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12181 struct i40e_pf *pf = vsi->back;
12183 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12184 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
12186 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
12190 * i40e_get_rss - Get RSS keys and lut
12191 * @vsi: Pointer to VSI structure
12192 * @seed: Buffer to store the keys
12193 * @lut: Buffer to store the lookup table entries
12194 * @lut_size: Size of buffer to store the lookup table entries
12196 * Returns 0 on success, negative on failure
12198 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
12200 struct i40e_pf *pf = vsi->back;
12202 if (pf->hw_features & I40E_HW_RSS_AQ_CAPABLE)
12203 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
12205 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
12209 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
12210 * @pf: Pointer to board private structure
12211 * @lut: Lookup table
12212 * @rss_table_size: Lookup table size
12213 * @rss_size: Range of queue number for hashing
12215 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
12216 u16 rss_table_size, u16 rss_size)
12220 for (i = 0; i < rss_table_size; i++)
12221 lut[i] = i % rss_size;
12225 * i40e_pf_config_rss - Prepare for RSS if used
12226 * @pf: board private structure
12228 static int i40e_pf_config_rss(struct i40e_pf *pf)
12230 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12231 u8 seed[I40E_HKEY_ARRAY_SIZE];
12233 struct i40e_hw *hw = &pf->hw;
12238 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
12239 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
12240 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
12241 hena |= i40e_pf_get_default_rss_hena(pf);
12243 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
12244 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
12246 /* Determine the RSS table size based on the hardware capabilities */
12247 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
12248 reg_val = (pf->rss_table_size == 512) ?
12249 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
12250 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
12251 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
12253 /* Determine the RSS size of the VSI */
12254 if (!vsi->rss_size) {
12256 /* If the firmware does something weird during VSI init, we
12257 * could end up with zero TCs. Check for that to avoid
12258 * divide-by-zero. It probably won't pass traffic, but it also
12261 qcount = vsi->num_queue_pairs /
12262 (vsi->tc_config.numtc ? vsi->tc_config.numtc : 1);
12263 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12265 if (!vsi->rss_size)
12268 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
12272 /* Use user configured lut if there is one, otherwise use default */
12273 if (vsi->rss_lut_user)
12274 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
12276 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
12278 /* Use user configured hash key if there is one, otherwise
12281 if (vsi->rss_hkey_user)
12282 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
12284 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
12285 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
12292 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
12293 * @pf: board private structure
12294 * @queue_count: the requested queue count for rss.
12296 * returns 0 if rss is not enabled, if enabled returns the final rss queue
12297 * count which may be different from the requested queue count.
12298 * Note: expects to be called while under rtnl_lock()
12300 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
12302 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
12305 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
12308 queue_count = min_t(int, queue_count, num_online_cpus());
12309 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
12311 if (queue_count != vsi->num_queue_pairs) {
12314 vsi->req_queue_pairs = queue_count;
12315 i40e_prep_for_reset(pf);
12316 if (test_bit(__I40E_IN_REMOVE, pf->state))
12317 return pf->alloc_rss_size;
12319 pf->alloc_rss_size = new_rss_size;
12321 i40e_reset_and_rebuild(pf, true, true);
12323 /* Discard the user configured hash keys and lut, if less
12324 * queues are enabled.
12326 if (queue_count < vsi->rss_size) {
12327 i40e_clear_rss_config_user(vsi);
12328 dev_dbg(&pf->pdev->dev,
12329 "discard user configured hash keys and lut\n");
12332 /* Reset vsi->rss_size, as number of enabled queues changed */
12333 qcount = vsi->num_queue_pairs / vsi->tc_config.numtc;
12334 vsi->rss_size = min_t(int, pf->alloc_rss_size, qcount);
12336 i40e_pf_config_rss(pf);
12338 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
12339 vsi->req_queue_pairs, pf->rss_size_max);
12340 return pf->alloc_rss_size;
12344 * i40e_get_partition_bw_setting - Retrieve BW settings for this PF partition
12345 * @pf: board private structure
12347 i40e_status i40e_get_partition_bw_setting(struct i40e_pf *pf)
12349 i40e_status status;
12350 bool min_valid, max_valid;
12351 u32 max_bw, min_bw;
12353 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
12354 &min_valid, &max_valid);
12358 pf->min_bw = min_bw;
12360 pf->max_bw = max_bw;
12367 * i40e_set_partition_bw_setting - Set BW settings for this PF partition
12368 * @pf: board private structure
12370 i40e_status i40e_set_partition_bw_setting(struct i40e_pf *pf)
12372 struct i40e_aqc_configure_partition_bw_data bw_data;
12373 i40e_status status;
12375 memset(&bw_data, 0, sizeof(bw_data));
12377 /* Set the valid bit for this PF */
12378 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
12379 bw_data.max_bw[pf->hw.pf_id] = pf->max_bw & I40E_ALT_BW_VALUE_MASK;
12380 bw_data.min_bw[pf->hw.pf_id] = pf->min_bw & I40E_ALT_BW_VALUE_MASK;
12382 /* Set the new bandwidths */
12383 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
12389 * i40e_commit_partition_bw_setting - Commit BW settings for this PF partition
12390 * @pf: board private structure
12392 i40e_status i40e_commit_partition_bw_setting(struct i40e_pf *pf)
12394 /* Commit temporary BW setting to permanent NVM image */
12395 enum i40e_admin_queue_err last_aq_status;
12399 if (pf->hw.partition_id != 1) {
12400 dev_info(&pf->pdev->dev,
12401 "Commit BW only works on partition 1! This is partition %d",
12402 pf->hw.partition_id);
12403 ret = I40E_NOT_SUPPORTED;
12404 goto bw_commit_out;
12407 /* Acquire NVM for read access */
12408 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
12409 last_aq_status = pf->hw.aq.asq_last_status;
12411 dev_info(&pf->pdev->dev,
12412 "Cannot acquire NVM for read access, err %s aq_err %s\n",
12413 i40e_stat_str(&pf->hw, ret),
12414 i40e_aq_str(&pf->hw, last_aq_status));
12415 goto bw_commit_out;
12418 /* Read word 0x10 of NVM - SW compatibility word 1 */
12419 ret = i40e_aq_read_nvm(&pf->hw,
12420 I40E_SR_NVM_CONTROL_WORD,
12421 0x10, sizeof(nvm_word), &nvm_word,
12423 /* Save off last admin queue command status before releasing
12426 last_aq_status = pf->hw.aq.asq_last_status;
12427 i40e_release_nvm(&pf->hw);
12429 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
12430 i40e_stat_str(&pf->hw, ret),
12431 i40e_aq_str(&pf->hw, last_aq_status));
12432 goto bw_commit_out;
12435 /* Wait a bit for NVM release to complete */
12438 /* Acquire NVM for write access */
12439 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
12440 last_aq_status = pf->hw.aq.asq_last_status;
12442 dev_info(&pf->pdev->dev,
12443 "Cannot acquire NVM for write access, err %s aq_err %s\n",
12444 i40e_stat_str(&pf->hw, ret),
12445 i40e_aq_str(&pf->hw, last_aq_status));
12446 goto bw_commit_out;
12448 /* Write it back out unchanged to initiate update NVM,
12449 * which will force a write of the shadow (alt) RAM to
12450 * the NVM - thus storing the bandwidth values permanently.
12452 ret = i40e_aq_update_nvm(&pf->hw,
12453 I40E_SR_NVM_CONTROL_WORD,
12454 0x10, sizeof(nvm_word),
12455 &nvm_word, true, 0, NULL);
12456 /* Save off last admin queue command status before releasing
12459 last_aq_status = pf->hw.aq.asq_last_status;
12460 i40e_release_nvm(&pf->hw);
12462 dev_info(&pf->pdev->dev,
12463 "BW settings NOT SAVED, err %s aq_err %s\n",
12464 i40e_stat_str(&pf->hw, ret),
12465 i40e_aq_str(&pf->hw, last_aq_status));
12472 * i40e_is_total_port_shutdown_enabled - read NVM and return value
12473 * if total port shutdown feature is enabled for this PF
12474 * @pf: board private structure
12476 static bool i40e_is_total_port_shutdown_enabled(struct i40e_pf *pf)
12478 #define I40E_TOTAL_PORT_SHUTDOWN_ENABLED BIT(4)
12479 #define I40E_FEATURES_ENABLE_PTR 0x2A
12480 #define I40E_CURRENT_SETTING_PTR 0x2B
12481 #define I40E_LINK_BEHAVIOR_WORD_OFFSET 0x2D
12482 #define I40E_LINK_BEHAVIOR_WORD_LENGTH 0x1
12483 #define I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED BIT(0)
12484 #define I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH 4
12485 i40e_status read_status = I40E_SUCCESS;
12486 u16 sr_emp_sr_settings_ptr = 0;
12487 u16 features_enable = 0;
12488 u16 link_behavior = 0;
12491 read_status = i40e_read_nvm_word(&pf->hw,
12492 I40E_SR_EMP_SR_SETTINGS_PTR,
12493 &sr_emp_sr_settings_ptr);
12496 read_status = i40e_read_nvm_word(&pf->hw,
12497 sr_emp_sr_settings_ptr +
12498 I40E_FEATURES_ENABLE_PTR,
12502 if (I40E_TOTAL_PORT_SHUTDOWN_ENABLED & features_enable) {
12503 read_status = i40e_read_nvm_module_data(&pf->hw,
12504 I40E_SR_EMP_SR_SETTINGS_PTR,
12505 I40E_CURRENT_SETTING_PTR,
12506 I40E_LINK_BEHAVIOR_WORD_OFFSET,
12507 I40E_LINK_BEHAVIOR_WORD_LENGTH,
12511 link_behavior >>= (pf->hw.port * I40E_LINK_BEHAVIOR_PORT_BIT_LENGTH);
12512 ret = I40E_LINK_BEHAVIOR_OS_FORCED_ENABLED & link_behavior;
12517 dev_warn(&pf->pdev->dev,
12518 "total-port-shutdown feature is off due to read nvm error: %s\n",
12519 i40e_stat_str(&pf->hw, read_status));
12524 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
12525 * @pf: board private structure to initialize
12527 * i40e_sw_init initializes the Adapter private data structure.
12528 * Fields are initialized based on PCI device information and
12529 * OS network device settings (MTU size).
12531 static int i40e_sw_init(struct i40e_pf *pf)
12537 /* Set default capability flags */
12538 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
12539 I40E_FLAG_MSI_ENABLED |
12540 I40E_FLAG_MSIX_ENABLED;
12542 /* Set default ITR */
12543 pf->rx_itr_default = I40E_ITR_RX_DEF;
12544 pf->tx_itr_default = I40E_ITR_TX_DEF;
12546 /* Depending on PF configurations, it is possible that the RSS
12547 * maximum might end up larger than the available queues
12549 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
12550 pf->alloc_rss_size = 1;
12551 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
12552 pf->rss_size_max = min_t(int, pf->rss_size_max,
12553 pf->hw.func_caps.num_tx_qp);
12555 /* find the next higher power-of-2 of num cpus */
12556 pow = roundup_pow_of_two(num_online_cpus());
12557 pf->rss_size_max = min_t(int, pf->rss_size_max, pow);
12559 if (pf->hw.func_caps.rss) {
12560 pf->flags |= I40E_FLAG_RSS_ENABLED;
12561 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
12562 num_online_cpus());
12565 /* MFP mode enabled */
12566 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
12567 pf->flags |= I40E_FLAG_MFP_ENABLED;
12568 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
12569 if (i40e_get_partition_bw_setting(pf)) {
12570 dev_warn(&pf->pdev->dev,
12571 "Could not get partition bw settings\n");
12573 dev_info(&pf->pdev->dev,
12574 "Partition BW Min = %8.8x, Max = %8.8x\n",
12575 pf->min_bw, pf->max_bw);
12577 /* nudge the Tx scheduler */
12578 i40e_set_partition_bw_setting(pf);
12582 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
12583 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
12584 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
12585 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
12586 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
12587 pf->hw.num_partitions > 1)
12588 dev_info(&pf->pdev->dev,
12589 "Flow Director Sideband mode Disabled in MFP mode\n");
12591 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12592 pf->fdir_pf_filter_count =
12593 pf->hw.func_caps.fd_filters_guaranteed;
12594 pf->hw.fdir_shared_filter_count =
12595 pf->hw.func_caps.fd_filters_best_effort;
12598 if (pf->hw.mac.type == I40E_MAC_X722) {
12599 pf->hw_features |= (I40E_HW_RSS_AQ_CAPABLE |
12600 I40E_HW_128_QP_RSS_CAPABLE |
12601 I40E_HW_ATR_EVICT_CAPABLE |
12602 I40E_HW_WB_ON_ITR_CAPABLE |
12603 I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE |
12604 I40E_HW_NO_PCI_LINK_CHECK |
12605 I40E_HW_USE_SET_LLDP_MIB |
12606 I40E_HW_GENEVE_OFFLOAD_CAPABLE |
12607 I40E_HW_PTP_L4_CAPABLE |
12608 I40E_HW_WOL_MC_MAGIC_PKT_WAKE |
12609 I40E_HW_OUTER_UDP_CSUM_CAPABLE);
12611 #define I40E_FDEVICT_PCTYPE_DEFAULT 0xc03
12612 if (rd32(&pf->hw, I40E_GLQF_FDEVICTENA(1)) !=
12613 I40E_FDEVICT_PCTYPE_DEFAULT) {
12614 dev_warn(&pf->pdev->dev,
12615 "FD EVICT PCTYPES are not right, disable FD HW EVICT\n");
12616 pf->hw_features &= ~I40E_HW_ATR_EVICT_CAPABLE;
12618 } else if ((pf->hw.aq.api_maj_ver > 1) ||
12619 ((pf->hw.aq.api_maj_ver == 1) &&
12620 (pf->hw.aq.api_min_ver > 4))) {
12621 /* Supported in FW API version higher than 1.4 */
12622 pf->hw_features |= I40E_HW_GENEVE_OFFLOAD_CAPABLE;
12625 /* Enable HW ATR eviction if possible */
12626 if (pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE)
12627 pf->flags |= I40E_FLAG_HW_ATR_EVICT_ENABLED;
12629 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12630 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
12631 (pf->hw.aq.fw_maj_ver < 4))) {
12632 pf->hw_features |= I40E_HW_RESTART_AUTONEG;
12633 /* No DCB support for FW < v4.33 */
12634 pf->hw_features |= I40E_HW_NO_DCB_SUPPORT;
12637 /* Disable FW LLDP if FW < v4.3 */
12638 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12639 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
12640 (pf->hw.aq.fw_maj_ver < 4)))
12641 pf->hw_features |= I40E_HW_STOP_FW_LLDP;
12643 /* Use the FW Set LLDP MIB API if FW > v4.40 */
12644 if ((pf->hw.mac.type == I40E_MAC_XL710) &&
12645 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
12646 (pf->hw.aq.fw_maj_ver >= 5)))
12647 pf->hw_features |= I40E_HW_USE_SET_LLDP_MIB;
12649 /* Enable PTP L4 if FW > v6.0 */
12650 if (pf->hw.mac.type == I40E_MAC_XL710 &&
12651 pf->hw.aq.fw_maj_ver >= 6)
12652 pf->hw_features |= I40E_HW_PTP_L4_CAPABLE;
12654 if (pf->hw.func_caps.vmdq && num_online_cpus() != 1) {
12655 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
12656 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
12657 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
12660 if (pf->hw.func_caps.iwarp && num_online_cpus() != 1) {
12661 pf->flags |= I40E_FLAG_IWARP_ENABLED;
12662 /* IWARP needs one extra vector for CQP just like MISC.*/
12663 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
12665 /* Stopping FW LLDP engine is supported on XL710 and X722
12666 * starting from FW versions determined in i40e_init_adminq.
12667 * Stopping the FW LLDP engine is not supported on XL710
12668 * if NPAR is functioning so unset this hw flag in this case.
12670 if (pf->hw.mac.type == I40E_MAC_XL710 &&
12671 pf->hw.func_caps.npar_enable &&
12672 (pf->hw.flags & I40E_HW_FLAG_FW_LLDP_STOPPABLE))
12673 pf->hw.flags &= ~I40E_HW_FLAG_FW_LLDP_STOPPABLE;
12675 #ifdef CONFIG_PCI_IOV
12676 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
12677 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
12678 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
12679 pf->num_req_vfs = min_t(int,
12680 pf->hw.func_caps.num_vfs,
12681 I40E_MAX_VF_COUNT);
12683 #endif /* CONFIG_PCI_IOV */
12684 pf->eeprom_version = 0xDEAD;
12685 pf->lan_veb = I40E_NO_VEB;
12686 pf->lan_vsi = I40E_NO_VSI;
12688 /* By default FW has this off for performance reasons */
12689 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
12691 /* set up queue assignment tracking */
12692 size = sizeof(struct i40e_lump_tracking)
12693 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
12694 pf->qp_pile = kzalloc(size, GFP_KERNEL);
12695 if (!pf->qp_pile) {
12699 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
12701 pf->tx_timeout_recovery_level = 1;
12703 if (pf->hw.mac.type != I40E_MAC_X722 &&
12704 i40e_is_total_port_shutdown_enabled(pf)) {
12705 /* Link down on close must be on when total port shutdown
12706 * is enabled for a given port
12708 pf->flags |= (I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENABLED |
12709 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENABLED);
12710 dev_info(&pf->pdev->dev,
12711 "total-port-shutdown was enabled, link-down-on-close is forced on\n");
12713 mutex_init(&pf->switch_mutex);
12720 * i40e_set_ntuple - set the ntuple feature flag and take action
12721 * @pf: board private structure to initialize
12722 * @features: the feature set that the stack is suggesting
12724 * returns a bool to indicate if reset needs to happen
12726 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
12728 bool need_reset = false;
12730 /* Check if Flow Director n-tuple support was enabled or disabled. If
12731 * the state changed, we need to reset.
12733 if (features & NETIF_F_NTUPLE) {
12734 /* Enable filters and mark for reset */
12735 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
12737 /* enable FD_SB only if there is MSI-X vector and no cloud
12740 if (pf->num_fdsb_msix > 0 && !pf->num_cloud_filters) {
12741 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
12742 pf->flags &= ~I40E_FLAG_FD_SB_INACTIVE;
12745 /* turn off filters, mark for reset and clear SW filter list */
12746 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
12748 i40e_fdir_filter_exit(pf);
12750 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
12751 clear_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state);
12752 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
12754 /* reset fd counters */
12755 pf->fd_add_err = 0;
12756 pf->fd_atr_cnt = 0;
12757 /* if ATR was auto disabled it can be re-enabled. */
12758 if (test_and_clear_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state))
12759 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
12760 (I40E_DEBUG_FD & pf->hw.debug_mask))
12761 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
12767 * i40e_clear_rss_lut - clear the rx hash lookup table
12768 * @vsi: the VSI being configured
12770 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
12772 struct i40e_pf *pf = vsi->back;
12773 struct i40e_hw *hw = &pf->hw;
12774 u16 vf_id = vsi->vf_id;
12777 if (vsi->type == I40E_VSI_MAIN) {
12778 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
12779 wr32(hw, I40E_PFQF_HLUT(i), 0);
12780 } else if (vsi->type == I40E_VSI_SRIOV) {
12781 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
12782 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
12784 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
12789 * i40e_set_features - set the netdev feature flags
12790 * @netdev: ptr to the netdev being adjusted
12791 * @features: the feature set that the stack is suggesting
12792 * Note: expects to be called while under rtnl_lock()
12794 static int i40e_set_features(struct net_device *netdev,
12795 netdev_features_t features)
12797 struct i40e_netdev_priv *np = netdev_priv(netdev);
12798 struct i40e_vsi *vsi = np->vsi;
12799 struct i40e_pf *pf = vsi->back;
12802 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
12803 i40e_pf_config_rss(pf);
12804 else if (!(features & NETIF_F_RXHASH) &&
12805 netdev->features & NETIF_F_RXHASH)
12806 i40e_clear_rss_lut(vsi);
12808 if (features & NETIF_F_HW_VLAN_CTAG_RX)
12809 i40e_vlan_stripping_enable(vsi);
12811 i40e_vlan_stripping_disable(vsi);
12813 if (!(features & NETIF_F_HW_TC) &&
12814 (netdev->features & NETIF_F_HW_TC) && pf->num_cloud_filters) {
12815 dev_err(&pf->pdev->dev,
12816 "Offloaded tc filters active, can't turn hw_tc_offload off");
12820 if (!(features & NETIF_F_HW_L2FW_DOFFLOAD) && vsi->macvlan_cnt)
12821 i40e_del_all_macvlans(vsi);
12823 need_reset = i40e_set_ntuple(pf, features);
12826 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
12831 static int i40e_udp_tunnel_set_port(struct net_device *netdev,
12832 unsigned int table, unsigned int idx,
12833 struct udp_tunnel_info *ti)
12835 struct i40e_netdev_priv *np = netdev_priv(netdev);
12836 struct i40e_hw *hw = &np->vsi->back->hw;
12837 u8 type, filter_index;
12840 type = ti->type == UDP_TUNNEL_TYPE_VXLAN ? I40E_AQC_TUNNEL_TYPE_VXLAN :
12841 I40E_AQC_TUNNEL_TYPE_NGE;
12843 ret = i40e_aq_add_udp_tunnel(hw, ntohs(ti->port), type, &filter_index,
12846 netdev_info(netdev, "add UDP port failed, err %s aq_err %s\n",
12847 i40e_stat_str(hw, ret),
12848 i40e_aq_str(hw, hw->aq.asq_last_status));
12852 udp_tunnel_nic_set_port_priv(netdev, table, idx, filter_index);
12856 static int i40e_udp_tunnel_unset_port(struct net_device *netdev,
12857 unsigned int table, unsigned int idx,
12858 struct udp_tunnel_info *ti)
12860 struct i40e_netdev_priv *np = netdev_priv(netdev);
12861 struct i40e_hw *hw = &np->vsi->back->hw;
12864 ret = i40e_aq_del_udp_tunnel(hw, ti->hw_priv, NULL);
12866 netdev_info(netdev, "delete UDP port failed, err %s aq_err %s\n",
12867 i40e_stat_str(hw, ret),
12868 i40e_aq_str(hw, hw->aq.asq_last_status));
12875 static int i40e_get_phys_port_id(struct net_device *netdev,
12876 struct netdev_phys_item_id *ppid)
12878 struct i40e_netdev_priv *np = netdev_priv(netdev);
12879 struct i40e_pf *pf = np->vsi->back;
12880 struct i40e_hw *hw = &pf->hw;
12882 if (!(pf->hw_features & I40E_HW_PORT_ID_VALID))
12883 return -EOPNOTSUPP;
12885 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
12886 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
12892 * i40e_ndo_fdb_add - add an entry to the hardware database
12893 * @ndm: the input from the stack
12894 * @tb: pointer to array of nladdr (unused)
12895 * @dev: the net device pointer
12896 * @addr: the MAC address entry being added
12898 * @flags: instructions from stack about fdb operation
12899 * @extack: netlink extended ack, unused currently
12901 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
12902 struct net_device *dev,
12903 const unsigned char *addr, u16 vid,
12905 struct netlink_ext_ack *extack)
12907 struct i40e_netdev_priv *np = netdev_priv(dev);
12908 struct i40e_pf *pf = np->vsi->back;
12911 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
12912 return -EOPNOTSUPP;
12915 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
12919 /* Hardware does not support aging addresses so if a
12920 * ndm_state is given only allow permanent addresses
12922 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
12923 netdev_info(dev, "FDB only supports static addresses\n");
12927 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
12928 err = dev_uc_add_excl(dev, addr);
12929 else if (is_multicast_ether_addr(addr))
12930 err = dev_mc_add_excl(dev, addr);
12934 /* Only return duplicate errors if NLM_F_EXCL is set */
12935 if (err == -EEXIST && !(flags & NLM_F_EXCL))
12942 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
12943 * @dev: the netdev being configured
12944 * @nlh: RTNL message
12945 * @flags: bridge flags
12946 * @extack: netlink extended ack
12948 * Inserts a new hardware bridge if not already created and
12949 * enables the bridging mode requested (VEB or VEPA). If the
12950 * hardware bridge has already been inserted and the request
12951 * is to change the mode then that requires a PF reset to
12952 * allow rebuild of the components with required hardware
12953 * bridge mode enabled.
12955 * Note: expects to be called while under rtnl_lock()
12957 static int i40e_ndo_bridge_setlink(struct net_device *dev,
12958 struct nlmsghdr *nlh,
12960 struct netlink_ext_ack *extack)
12962 struct i40e_netdev_priv *np = netdev_priv(dev);
12963 struct i40e_vsi *vsi = np->vsi;
12964 struct i40e_pf *pf = vsi->back;
12965 struct i40e_veb *veb = NULL;
12966 struct nlattr *attr, *br_spec;
12969 /* Only for PF VSI for now */
12970 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
12971 return -EOPNOTSUPP;
12973 /* Find the HW bridge for PF VSI */
12974 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
12975 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
12979 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
12981 nla_for_each_nested(attr, br_spec, rem) {
12984 if (nla_type(attr) != IFLA_BRIDGE_MODE)
12987 mode = nla_get_u16(attr);
12988 if ((mode != BRIDGE_MODE_VEPA) &&
12989 (mode != BRIDGE_MODE_VEB))
12992 /* Insert a new HW bridge */
12994 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
12995 vsi->tc_config.enabled_tc);
12997 veb->bridge_mode = mode;
12998 i40e_config_bridge_mode(veb);
13000 /* No Bridge HW offload available */
13004 } else if (mode != veb->bridge_mode) {
13005 /* Existing HW bridge but different mode needs reset */
13006 veb->bridge_mode = mode;
13007 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
13008 if (mode == BRIDGE_MODE_VEB)
13009 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
13011 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
13012 i40e_do_reset(pf, I40E_PF_RESET_FLAG, true);
13021 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
13024 * @seq: RTNL message seq #
13025 * @dev: the netdev being configured
13026 * @filter_mask: unused
13027 * @nlflags: netlink flags passed in
13029 * Return the mode in which the hardware bridge is operating in
13032 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
13033 struct net_device *dev,
13034 u32 __always_unused filter_mask,
13037 struct i40e_netdev_priv *np = netdev_priv(dev);
13038 struct i40e_vsi *vsi = np->vsi;
13039 struct i40e_pf *pf = vsi->back;
13040 struct i40e_veb *veb = NULL;
13043 /* Only for PF VSI for now */
13044 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
13045 return -EOPNOTSUPP;
13047 /* Find the HW bridge for the PF VSI */
13048 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
13049 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
13056 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
13057 0, 0, nlflags, filter_mask, NULL);
13061 * i40e_features_check - Validate encapsulated packet conforms to limits
13063 * @dev: This physical port's netdev
13064 * @features: Offload features that the stack believes apply
13066 static netdev_features_t i40e_features_check(struct sk_buff *skb,
13067 struct net_device *dev,
13068 netdev_features_t features)
13072 /* No point in doing any of this if neither checksum nor GSO are
13073 * being requested for this frame. We can rule out both by just
13074 * checking for CHECKSUM_PARTIAL
13076 if (skb->ip_summed != CHECKSUM_PARTIAL)
13079 /* We cannot support GSO if the MSS is going to be less than
13080 * 64 bytes. If it is then we need to drop support for GSO.
13082 if (skb_is_gso(skb) && (skb_shinfo(skb)->gso_size < 64))
13083 features &= ~NETIF_F_GSO_MASK;
13085 /* MACLEN can support at most 63 words */
13086 len = skb_network_header(skb) - skb->data;
13087 if (len & ~(63 * 2))
13090 /* IPLEN and EIPLEN can support at most 127 dwords */
13091 len = skb_transport_header(skb) - skb_network_header(skb);
13092 if (len & ~(127 * 4))
13095 if (skb->encapsulation) {
13096 /* L4TUNLEN can support 127 words */
13097 len = skb_inner_network_header(skb) - skb_transport_header(skb);
13098 if (len & ~(127 * 2))
13101 /* IPLEN can support at most 127 dwords */
13102 len = skb_inner_transport_header(skb) -
13103 skb_inner_network_header(skb);
13104 if (len & ~(127 * 4))
13108 /* No need to validate L4LEN as TCP is the only protocol with a
13109 * a flexible value and we support all possible values supported
13110 * by TCP, which is at most 15 dwords
13115 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
13119 * i40e_xdp_setup - add/remove an XDP program
13120 * @vsi: VSI to changed
13121 * @prog: XDP program
13122 * @extack: netlink extended ack
13124 static int i40e_xdp_setup(struct i40e_vsi *vsi, struct bpf_prog *prog,
13125 struct netlink_ext_ack *extack)
13127 int frame_size = vsi->netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
13128 struct i40e_pf *pf = vsi->back;
13129 struct bpf_prog *old_prog;
13133 /* Don't allow frames that span over multiple buffers */
13134 if (frame_size > vsi->rx_buf_len) {
13135 NL_SET_ERR_MSG_MOD(extack, "MTU too large to enable XDP");
13139 /* When turning XDP on->off/off->on we reset and rebuild the rings. */
13140 need_reset = (i40e_enabled_xdp_vsi(vsi) != !!prog);
13143 i40e_prep_for_reset(pf);
13145 /* VSI shall be deleted in a moment, just return EINVAL */
13146 if (test_bit(__I40E_IN_REMOVE, pf->state))
13149 old_prog = xchg(&vsi->xdp_prog, prog);
13153 /* Wait until ndo_xsk_wakeup completes. */
13155 i40e_reset_and_rebuild(pf, true, true);
13158 for (i = 0; i < vsi->num_queue_pairs; i++)
13159 WRITE_ONCE(vsi->rx_rings[i]->xdp_prog, vsi->xdp_prog);
13162 bpf_prog_put(old_prog);
13164 /* Kick start the NAPI context if there is an AF_XDP socket open
13165 * on that queue id. This so that receiving will start.
13167 if (need_reset && prog)
13168 for (i = 0; i < vsi->num_queue_pairs; i++)
13169 if (vsi->xdp_rings[i]->xsk_pool)
13170 (void)i40e_xsk_wakeup(vsi->netdev, i,
13177 * i40e_enter_busy_conf - Enters busy config state
13180 * Returns 0 on success, <0 for failure.
13182 static int i40e_enter_busy_conf(struct i40e_vsi *vsi)
13184 struct i40e_pf *pf = vsi->back;
13187 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
13191 usleep_range(1000, 2000);
13198 * i40e_exit_busy_conf - Exits busy config state
13201 static void i40e_exit_busy_conf(struct i40e_vsi *vsi)
13203 struct i40e_pf *pf = vsi->back;
13205 clear_bit(__I40E_CONFIG_BUSY, pf->state);
13209 * i40e_queue_pair_reset_stats - Resets all statistics for a queue pair
13211 * @queue_pair: queue pair
13213 static void i40e_queue_pair_reset_stats(struct i40e_vsi *vsi, int queue_pair)
13215 memset(&vsi->rx_rings[queue_pair]->rx_stats, 0,
13216 sizeof(vsi->rx_rings[queue_pair]->rx_stats));
13217 memset(&vsi->tx_rings[queue_pair]->stats, 0,
13218 sizeof(vsi->tx_rings[queue_pair]->stats));
13219 if (i40e_enabled_xdp_vsi(vsi)) {
13220 memset(&vsi->xdp_rings[queue_pair]->stats, 0,
13221 sizeof(vsi->xdp_rings[queue_pair]->stats));
13226 * i40e_queue_pair_clean_rings - Cleans all the rings of a queue pair
13228 * @queue_pair: queue pair
13230 static void i40e_queue_pair_clean_rings(struct i40e_vsi *vsi, int queue_pair)
13232 i40e_clean_tx_ring(vsi->tx_rings[queue_pair]);
13233 if (i40e_enabled_xdp_vsi(vsi)) {
13234 /* Make sure that in-progress ndo_xdp_xmit calls are
13238 i40e_clean_tx_ring(vsi->xdp_rings[queue_pair]);
13240 i40e_clean_rx_ring(vsi->rx_rings[queue_pair]);
13244 * i40e_queue_pair_toggle_napi - Enables/disables NAPI for a queue pair
13246 * @queue_pair: queue pair
13247 * @enable: true for enable, false for disable
13249 static void i40e_queue_pair_toggle_napi(struct i40e_vsi *vsi, int queue_pair,
13252 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13253 struct i40e_q_vector *q_vector = rxr->q_vector;
13258 /* All rings in a qp belong to the same qvector. */
13259 if (q_vector->rx.ring || q_vector->tx.ring) {
13261 napi_enable(&q_vector->napi);
13263 napi_disable(&q_vector->napi);
13268 * i40e_queue_pair_toggle_rings - Enables/disables all rings for a queue pair
13270 * @queue_pair: queue pair
13271 * @enable: true for enable, false for disable
13273 * Returns 0 on success, <0 on failure.
13275 static int i40e_queue_pair_toggle_rings(struct i40e_vsi *vsi, int queue_pair,
13278 struct i40e_pf *pf = vsi->back;
13281 pf_q = vsi->base_queue + queue_pair;
13282 ret = i40e_control_wait_tx_q(vsi->seid, pf, pf_q,
13283 false /*is xdp*/, enable);
13285 dev_info(&pf->pdev->dev,
13286 "VSI seid %d Tx ring %d %sable timeout\n",
13287 vsi->seid, pf_q, (enable ? "en" : "dis"));
13291 i40e_control_rx_q(pf, pf_q, enable);
13292 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
13294 dev_info(&pf->pdev->dev,
13295 "VSI seid %d Rx ring %d %sable timeout\n",
13296 vsi->seid, pf_q, (enable ? "en" : "dis"));
13300 /* Due to HW errata, on Rx disable only, the register can
13301 * indicate done before it really is. Needs 50ms to be sure
13306 if (!i40e_enabled_xdp_vsi(vsi))
13309 ret = i40e_control_wait_tx_q(vsi->seid, pf,
13310 pf_q + vsi->alloc_queue_pairs,
13311 true /*is xdp*/, enable);
13313 dev_info(&pf->pdev->dev,
13314 "VSI seid %d XDP Tx ring %d %sable timeout\n",
13315 vsi->seid, pf_q, (enable ? "en" : "dis"));
13322 * i40e_queue_pair_enable_irq - Enables interrupts for a queue pair
13324 * @queue_pair: queue_pair
13326 static void i40e_queue_pair_enable_irq(struct i40e_vsi *vsi, int queue_pair)
13328 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13329 struct i40e_pf *pf = vsi->back;
13330 struct i40e_hw *hw = &pf->hw;
13332 /* All rings in a qp belong to the same qvector. */
13333 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
13334 i40e_irq_dynamic_enable(vsi, rxr->q_vector->v_idx);
13336 i40e_irq_dynamic_enable_icr0(pf);
13342 * i40e_queue_pair_disable_irq - Disables interrupts for a queue pair
13344 * @queue_pair: queue_pair
13346 static void i40e_queue_pair_disable_irq(struct i40e_vsi *vsi, int queue_pair)
13348 struct i40e_ring *rxr = vsi->rx_rings[queue_pair];
13349 struct i40e_pf *pf = vsi->back;
13350 struct i40e_hw *hw = &pf->hw;
13352 /* For simplicity, instead of removing the qp interrupt causes
13353 * from the interrupt linked list, we simply disable the interrupt, and
13354 * leave the list intact.
13356 * All rings in a qp belong to the same qvector.
13358 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
13359 u32 intpf = vsi->base_vector + rxr->q_vector->v_idx;
13361 wr32(hw, I40E_PFINT_DYN_CTLN(intpf - 1), 0);
13363 synchronize_irq(pf->msix_entries[intpf].vector);
13365 /* Legacy and MSI mode - this stops all interrupt handling */
13366 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
13367 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
13369 synchronize_irq(pf->pdev->irq);
13374 * i40e_queue_pair_disable - Disables a queue pair
13376 * @queue_pair: queue pair
13378 * Returns 0 on success, <0 on failure.
13380 int i40e_queue_pair_disable(struct i40e_vsi *vsi, int queue_pair)
13384 err = i40e_enter_busy_conf(vsi);
13388 i40e_queue_pair_disable_irq(vsi, queue_pair);
13389 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, false /* off */);
13390 i40e_queue_pair_toggle_napi(vsi, queue_pair, false /* off */);
13391 i40e_queue_pair_clean_rings(vsi, queue_pair);
13392 i40e_queue_pair_reset_stats(vsi, queue_pair);
13398 * i40e_queue_pair_enable - Enables a queue pair
13400 * @queue_pair: queue pair
13402 * Returns 0 on success, <0 on failure.
13404 int i40e_queue_pair_enable(struct i40e_vsi *vsi, int queue_pair)
13408 err = i40e_configure_tx_ring(vsi->tx_rings[queue_pair]);
13412 if (i40e_enabled_xdp_vsi(vsi)) {
13413 err = i40e_configure_tx_ring(vsi->xdp_rings[queue_pair]);
13418 err = i40e_configure_rx_ring(vsi->rx_rings[queue_pair]);
13422 err = i40e_queue_pair_toggle_rings(vsi, queue_pair, true /* on */);
13423 i40e_queue_pair_toggle_napi(vsi, queue_pair, true /* on */);
13424 i40e_queue_pair_enable_irq(vsi, queue_pair);
13426 i40e_exit_busy_conf(vsi);
13432 * i40e_xdp - implements ndo_bpf for i40e
13434 * @xdp: XDP command
13436 static int i40e_xdp(struct net_device *dev,
13437 struct netdev_bpf *xdp)
13439 struct i40e_netdev_priv *np = netdev_priv(dev);
13440 struct i40e_vsi *vsi = np->vsi;
13442 if (vsi->type != I40E_VSI_MAIN)
13445 switch (xdp->command) {
13446 case XDP_SETUP_PROG:
13447 return i40e_xdp_setup(vsi, xdp->prog, xdp->extack);
13448 case XDP_SETUP_XSK_POOL:
13449 return i40e_xsk_pool_setup(vsi, xdp->xsk.pool,
13450 xdp->xsk.queue_id);
13456 static const struct net_device_ops i40e_netdev_ops = {
13457 .ndo_open = i40e_open,
13458 .ndo_stop = i40e_close,
13459 .ndo_start_xmit = i40e_lan_xmit_frame,
13460 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
13461 .ndo_set_rx_mode = i40e_set_rx_mode,
13462 .ndo_validate_addr = eth_validate_addr,
13463 .ndo_set_mac_address = i40e_set_mac,
13464 .ndo_change_mtu = i40e_change_mtu,
13465 .ndo_eth_ioctl = i40e_ioctl,
13466 .ndo_tx_timeout = i40e_tx_timeout,
13467 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
13468 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
13469 #ifdef CONFIG_NET_POLL_CONTROLLER
13470 .ndo_poll_controller = i40e_netpoll,
13472 .ndo_setup_tc = __i40e_setup_tc,
13473 .ndo_select_queue = i40e_lan_select_queue,
13474 .ndo_set_features = i40e_set_features,
13475 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
13476 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
13477 .ndo_get_vf_stats = i40e_get_vf_stats,
13478 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
13479 .ndo_get_vf_config = i40e_ndo_get_vf_config,
13480 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
13481 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
13482 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
13483 .ndo_get_phys_port_id = i40e_get_phys_port_id,
13484 .ndo_fdb_add = i40e_ndo_fdb_add,
13485 .ndo_features_check = i40e_features_check,
13486 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
13487 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
13488 .ndo_bpf = i40e_xdp,
13489 .ndo_xdp_xmit = i40e_xdp_xmit,
13490 .ndo_xsk_wakeup = i40e_xsk_wakeup,
13491 .ndo_dfwd_add_station = i40e_fwd_add,
13492 .ndo_dfwd_del_station = i40e_fwd_del,
13496 * i40e_config_netdev - Setup the netdev flags
13497 * @vsi: the VSI being configured
13499 * Returns 0 on success, negative value on failure
13501 static int i40e_config_netdev(struct i40e_vsi *vsi)
13503 struct i40e_pf *pf = vsi->back;
13504 struct i40e_hw *hw = &pf->hw;
13505 struct i40e_netdev_priv *np;
13506 struct net_device *netdev;
13507 u8 broadcast[ETH_ALEN];
13508 u8 mac_addr[ETH_ALEN];
13510 netdev_features_t hw_enc_features;
13511 netdev_features_t hw_features;
13513 etherdev_size = sizeof(struct i40e_netdev_priv);
13514 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
13518 vsi->netdev = netdev;
13519 np = netdev_priv(netdev);
13522 hw_enc_features = NETIF_F_SG |
13525 NETIF_F_SOFT_FEATURES |
13530 NETIF_F_GSO_GRE_CSUM |
13531 NETIF_F_GSO_PARTIAL |
13532 NETIF_F_GSO_IPXIP4 |
13533 NETIF_F_GSO_IPXIP6 |
13534 NETIF_F_GSO_UDP_TUNNEL |
13535 NETIF_F_GSO_UDP_TUNNEL_CSUM |
13536 NETIF_F_GSO_UDP_L4 |
13542 if (!(pf->hw_features & I40E_HW_OUTER_UDP_CSUM_CAPABLE))
13543 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
13545 netdev->udp_tunnel_nic_info = &pf->udp_tunnel_nic;
13547 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
13549 netdev->hw_enc_features |= hw_enc_features;
13551 /* record features VLANs can make use of */
13552 netdev->vlan_features |= hw_enc_features | NETIF_F_TSO_MANGLEID;
13554 #define I40E_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
13555 NETIF_F_GSO_GRE_CSUM | \
13556 NETIF_F_GSO_IPXIP4 | \
13557 NETIF_F_GSO_IPXIP6 | \
13558 NETIF_F_GSO_UDP_TUNNEL | \
13559 NETIF_F_GSO_UDP_TUNNEL_CSUM)
13561 netdev->gso_partial_features = I40E_GSO_PARTIAL_FEATURES;
13562 netdev->features |= NETIF_F_GSO_PARTIAL |
13563 I40E_GSO_PARTIAL_FEATURES;
13565 netdev->mpls_features |= NETIF_F_SG;
13566 netdev->mpls_features |= NETIF_F_HW_CSUM;
13567 netdev->mpls_features |= NETIF_F_TSO;
13568 netdev->mpls_features |= NETIF_F_TSO6;
13569 netdev->mpls_features |= I40E_GSO_PARTIAL_FEATURES;
13571 /* enable macvlan offloads */
13572 netdev->hw_features |= NETIF_F_HW_L2FW_DOFFLOAD;
13574 hw_features = hw_enc_features |
13575 NETIF_F_HW_VLAN_CTAG_TX |
13576 NETIF_F_HW_VLAN_CTAG_RX;
13578 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
13579 hw_features |= NETIF_F_NTUPLE | NETIF_F_HW_TC;
13581 netdev->hw_features |= hw_features;
13583 netdev->features |= hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
13584 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
13586 netdev->features &= ~NETIF_F_HW_TC;
13588 if (vsi->type == I40E_VSI_MAIN) {
13589 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
13590 ether_addr_copy(mac_addr, hw->mac.perm_addr);
13591 /* The following steps are necessary for two reasons. First,
13592 * some older NVM configurations load a default MAC-VLAN
13593 * filter that will accept any tagged packet, and we want to
13594 * replace this with a normal filter. Additionally, it is
13595 * possible our MAC address was provided by the platform using
13596 * Open Firmware or similar.
13598 * Thus, we need to remove the default filter and install one
13599 * specific to the MAC address.
13601 i40e_rm_default_mac_filter(vsi, mac_addr);
13602 spin_lock_bh(&vsi->mac_filter_hash_lock);
13603 i40e_add_mac_filter(vsi, mac_addr);
13604 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13606 /* Relate the VSI_VMDQ name to the VSI_MAIN name. Note that we
13607 * are still limited by IFNAMSIZ, but we're adding 'v%d\0' to
13608 * the end, which is 4 bytes long, so force truncation of the
13609 * original name by IFNAMSIZ - 4
13611 snprintf(netdev->name, IFNAMSIZ, "%.*sv%%d",
13613 pf->vsi[pf->lan_vsi]->netdev->name);
13614 eth_random_addr(mac_addr);
13616 spin_lock_bh(&vsi->mac_filter_hash_lock);
13617 i40e_add_mac_filter(vsi, mac_addr);
13618 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13621 /* Add the broadcast filter so that we initially will receive
13622 * broadcast packets. Note that when a new VLAN is first added the
13623 * driver will convert all filters marked I40E_VLAN_ANY into VLAN
13624 * specific filters as part of transitioning into "vlan" operation.
13625 * When more VLANs are added, the driver will copy each existing MAC
13626 * filter and add it for the new VLAN.
13628 * Broadcast filters are handled specially by
13629 * i40e_sync_filters_subtask, as the driver must to set the broadcast
13630 * promiscuous bit instead of adding this directly as a MAC/VLAN
13631 * filter. The subtask will update the correct broadcast promiscuous
13632 * bits as VLANs become active or inactive.
13634 eth_broadcast_addr(broadcast);
13635 spin_lock_bh(&vsi->mac_filter_hash_lock);
13636 i40e_add_mac_filter(vsi, broadcast);
13637 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13639 eth_hw_addr_set(netdev, mac_addr);
13640 ether_addr_copy(netdev->perm_addr, mac_addr);
13642 /* i40iw_net_event() reads 16 bytes from neigh->primary_key */
13643 netdev->neigh_priv_len = sizeof(u32) * 4;
13645 netdev->priv_flags |= IFF_UNICAST_FLT;
13646 netdev->priv_flags |= IFF_SUPP_NOFCS;
13647 /* Setup netdev TC information */
13648 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
13650 netdev->netdev_ops = &i40e_netdev_ops;
13651 netdev->watchdog_timeo = 5 * HZ;
13652 i40e_set_ethtool_ops(netdev);
13654 /* MTU range: 68 - 9706 */
13655 netdev->min_mtu = ETH_MIN_MTU;
13656 netdev->max_mtu = I40E_MAX_RXBUFFER - I40E_PACKET_HDR_PAD;
13662 * i40e_vsi_delete - Delete a VSI from the switch
13663 * @vsi: the VSI being removed
13665 * Returns 0 on success, negative value on failure
13667 static void i40e_vsi_delete(struct i40e_vsi *vsi)
13669 /* remove default VSI is not allowed */
13670 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
13673 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
13677 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
13678 * @vsi: the VSI being queried
13680 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
13682 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
13684 struct i40e_veb *veb;
13685 struct i40e_pf *pf = vsi->back;
13687 /* Uplink is not a bridge so default to VEB */
13688 if (vsi->veb_idx >= I40E_MAX_VEB)
13691 veb = pf->veb[vsi->veb_idx];
13693 dev_info(&pf->pdev->dev,
13694 "There is no veb associated with the bridge\n");
13698 /* Uplink is a bridge in VEPA mode */
13699 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
13702 /* Uplink is a bridge in VEB mode */
13706 /* VEPA is now default bridge, so return 0 */
13711 * i40e_add_vsi - Add a VSI to the switch
13712 * @vsi: the VSI being configured
13714 * This initializes a VSI context depending on the VSI type to be added and
13715 * passes it down to the add_vsi aq command.
13717 static int i40e_add_vsi(struct i40e_vsi *vsi)
13720 struct i40e_pf *pf = vsi->back;
13721 struct i40e_hw *hw = &pf->hw;
13722 struct i40e_vsi_context ctxt;
13723 struct i40e_mac_filter *f;
13724 struct hlist_node *h;
13727 u8 enabled_tc = 0x1; /* TC0 enabled */
13730 memset(&ctxt, 0, sizeof(ctxt));
13731 switch (vsi->type) {
13732 case I40E_VSI_MAIN:
13733 /* The PF's main VSI is already setup as part of the
13734 * device initialization, so we'll not bother with
13735 * the add_vsi call, but we will retrieve the current
13738 ctxt.seid = pf->main_vsi_seid;
13739 ctxt.pf_num = pf->hw.pf_id;
13741 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
13742 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13744 dev_info(&pf->pdev->dev,
13745 "couldn't get PF vsi config, err %s aq_err %s\n",
13746 i40e_stat_str(&pf->hw, ret),
13747 i40e_aq_str(&pf->hw,
13748 pf->hw.aq.asq_last_status));
13751 vsi->info = ctxt.info;
13752 vsi->info.valid_sections = 0;
13754 vsi->seid = ctxt.seid;
13755 vsi->id = ctxt.vsi_number;
13757 enabled_tc = i40e_pf_get_tc_map(pf);
13759 /* Source pruning is enabled by default, so the flag is
13760 * negative logic - if it's set, we need to fiddle with
13761 * the VSI to disable source pruning.
13763 if (pf->flags & I40E_FLAG_SOURCE_PRUNING_DISABLED) {
13764 memset(&ctxt, 0, sizeof(ctxt));
13765 ctxt.seid = pf->main_vsi_seid;
13766 ctxt.pf_num = pf->hw.pf_id;
13768 ctxt.info.valid_sections |=
13769 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13770 ctxt.info.switch_id =
13771 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_LOCAL_LB);
13772 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13774 dev_info(&pf->pdev->dev,
13775 "update vsi failed, err %s aq_err %s\n",
13776 i40e_stat_str(&pf->hw, ret),
13777 i40e_aq_str(&pf->hw,
13778 pf->hw.aq.asq_last_status));
13784 /* MFP mode setup queue map and update VSI */
13785 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
13786 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
13787 memset(&ctxt, 0, sizeof(ctxt));
13788 ctxt.seid = pf->main_vsi_seid;
13789 ctxt.pf_num = pf->hw.pf_id;
13791 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
13792 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
13794 dev_info(&pf->pdev->dev,
13795 "update vsi failed, err %s aq_err %s\n",
13796 i40e_stat_str(&pf->hw, ret),
13797 i40e_aq_str(&pf->hw,
13798 pf->hw.aq.asq_last_status));
13802 /* update the local VSI info queue map */
13803 i40e_vsi_update_queue_map(vsi, &ctxt);
13804 vsi->info.valid_sections = 0;
13806 /* Default/Main VSI is only enabled for TC0
13807 * reconfigure it to enable all TCs that are
13808 * available on the port in SFP mode.
13809 * For MFP case the iSCSI PF would use this
13810 * flow to enable LAN+iSCSI TC.
13812 ret = i40e_vsi_config_tc(vsi, enabled_tc);
13814 /* Single TC condition is not fatal,
13815 * message and continue
13817 dev_info(&pf->pdev->dev,
13818 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
13820 i40e_stat_str(&pf->hw, ret),
13821 i40e_aq_str(&pf->hw,
13822 pf->hw.aq.asq_last_status));
13827 case I40E_VSI_FDIR:
13828 ctxt.pf_num = hw->pf_id;
13830 ctxt.uplink_seid = vsi->uplink_seid;
13831 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13832 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
13833 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
13834 (i40e_is_vsi_uplink_mode_veb(vsi))) {
13835 ctxt.info.valid_sections |=
13836 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13837 ctxt.info.switch_id =
13838 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13840 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13843 case I40E_VSI_VMDQ2:
13844 ctxt.pf_num = hw->pf_id;
13846 ctxt.uplink_seid = vsi->uplink_seid;
13847 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13848 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
13850 /* This VSI is connected to VEB so the switch_id
13851 * should be set to zero by default.
13853 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13854 ctxt.info.valid_sections |=
13855 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13856 ctxt.info.switch_id =
13857 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13860 /* Setup the VSI tx/rx queue map for TC0 only for now */
13861 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13864 case I40E_VSI_SRIOV:
13865 ctxt.pf_num = hw->pf_id;
13866 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
13867 ctxt.uplink_seid = vsi->uplink_seid;
13868 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
13869 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
13871 /* This VSI is connected to VEB so the switch_id
13872 * should be set to zero by default.
13874 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
13875 ctxt.info.valid_sections |=
13876 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
13877 ctxt.info.switch_id =
13878 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
13881 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
13882 ctxt.info.valid_sections |=
13883 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
13884 ctxt.info.queueing_opt_flags |=
13885 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
13886 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
13889 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
13890 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
13891 if (pf->vf[vsi->vf_id].spoofchk) {
13892 ctxt.info.valid_sections |=
13893 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
13894 ctxt.info.sec_flags |=
13895 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
13896 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
13898 /* Setup the VSI tx/rx queue map for TC0 only for now */
13899 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
13902 case I40E_VSI_IWARP:
13903 /* send down message to iWARP */
13910 if (vsi->type != I40E_VSI_MAIN) {
13911 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
13913 dev_info(&vsi->back->pdev->dev,
13914 "add vsi failed, err %s aq_err %s\n",
13915 i40e_stat_str(&pf->hw, ret),
13916 i40e_aq_str(&pf->hw,
13917 pf->hw.aq.asq_last_status));
13921 vsi->info = ctxt.info;
13922 vsi->info.valid_sections = 0;
13923 vsi->seid = ctxt.seid;
13924 vsi->id = ctxt.vsi_number;
13927 vsi->active_filters = 0;
13928 clear_bit(__I40E_VSI_OVERFLOW_PROMISC, vsi->state);
13929 spin_lock_bh(&vsi->mac_filter_hash_lock);
13930 /* If macvlan filters already exist, force them to get loaded */
13931 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist) {
13932 f->state = I40E_FILTER_NEW;
13935 spin_unlock_bh(&vsi->mac_filter_hash_lock);
13938 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
13939 set_bit(__I40E_MACVLAN_SYNC_PENDING, pf->state);
13942 /* Update VSI BW information */
13943 ret = i40e_vsi_get_bw_info(vsi);
13945 dev_info(&pf->pdev->dev,
13946 "couldn't get vsi bw info, err %s aq_err %s\n",
13947 i40e_stat_str(&pf->hw, ret),
13948 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
13949 /* VSI is already added so not tearing that up */
13958 * i40e_vsi_release - Delete a VSI and free its resources
13959 * @vsi: the VSI being removed
13961 * Returns 0 on success or < 0 on error
13963 int i40e_vsi_release(struct i40e_vsi *vsi)
13965 struct i40e_mac_filter *f;
13966 struct hlist_node *h;
13967 struct i40e_veb *veb = NULL;
13968 struct i40e_pf *pf;
13974 /* release of a VEB-owner or last VSI is not allowed */
13975 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
13976 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
13977 vsi->seid, vsi->uplink_seid);
13980 if (vsi == pf->vsi[pf->lan_vsi] &&
13981 !test_bit(__I40E_DOWN, pf->state)) {
13982 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
13985 set_bit(__I40E_VSI_RELEASING, vsi->state);
13986 uplink_seid = vsi->uplink_seid;
13987 if (vsi->type != I40E_VSI_SRIOV) {
13988 if (vsi->netdev_registered) {
13989 vsi->netdev_registered = false;
13991 /* results in a call to i40e_close() */
13992 unregister_netdev(vsi->netdev);
13995 i40e_vsi_close(vsi);
13997 i40e_vsi_disable_irq(vsi);
14000 spin_lock_bh(&vsi->mac_filter_hash_lock);
14002 /* clear the sync flag on all filters */
14004 __dev_uc_unsync(vsi->netdev, NULL);
14005 __dev_mc_unsync(vsi->netdev, NULL);
14008 /* make sure any remaining filters are marked for deletion */
14009 hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
14010 __i40e_del_filter(vsi, f);
14012 spin_unlock_bh(&vsi->mac_filter_hash_lock);
14014 i40e_sync_vsi_filters(vsi);
14016 i40e_vsi_delete(vsi);
14017 i40e_vsi_free_q_vectors(vsi);
14019 free_netdev(vsi->netdev);
14020 vsi->netdev = NULL;
14022 i40e_vsi_clear_rings(vsi);
14023 i40e_vsi_clear(vsi);
14025 /* If this was the last thing on the VEB, except for the
14026 * controlling VSI, remove the VEB, which puts the controlling
14027 * VSI onto the next level down in the switch.
14029 * Well, okay, there's one more exception here: don't remove
14030 * the orphan VEBs yet. We'll wait for an explicit remove request
14031 * from up the network stack.
14033 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
14035 pf->vsi[i]->uplink_seid == uplink_seid &&
14036 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14037 n++; /* count the VSIs */
14040 for (i = 0; i < I40E_MAX_VEB; i++) {
14043 if (pf->veb[i]->uplink_seid == uplink_seid)
14044 n++; /* count the VEBs */
14045 if (pf->veb[i]->seid == uplink_seid)
14048 if (n == 0 && veb && veb->uplink_seid != 0)
14049 i40e_veb_release(veb);
14055 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
14056 * @vsi: ptr to the VSI
14058 * This should only be called after i40e_vsi_mem_alloc() which allocates the
14059 * corresponding SW VSI structure and initializes num_queue_pairs for the
14060 * newly allocated VSI.
14062 * Returns 0 on success or negative on failure
14064 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
14067 struct i40e_pf *pf = vsi->back;
14069 if (vsi->q_vectors[0]) {
14070 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
14075 if (vsi->base_vector) {
14076 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
14077 vsi->seid, vsi->base_vector);
14081 ret = i40e_vsi_alloc_q_vectors(vsi);
14083 dev_info(&pf->pdev->dev,
14084 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
14085 vsi->num_q_vectors, vsi->seid, ret);
14086 vsi->num_q_vectors = 0;
14087 goto vector_setup_out;
14090 /* In Legacy mode, we do not have to get any other vector since we
14091 * piggyback on the misc/ICR0 for queue interrupts.
14093 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
14095 if (vsi->num_q_vectors)
14096 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
14097 vsi->num_q_vectors, vsi->idx);
14098 if (vsi->base_vector < 0) {
14099 dev_info(&pf->pdev->dev,
14100 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
14101 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
14102 i40e_vsi_free_q_vectors(vsi);
14104 goto vector_setup_out;
14112 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
14113 * @vsi: pointer to the vsi.
14115 * This re-allocates a vsi's queue resources.
14117 * Returns pointer to the successfully allocated and configured VSI sw struct
14118 * on success, otherwise returns NULL on failure.
14120 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
14122 u16 alloc_queue_pairs;
14123 struct i40e_pf *pf;
14132 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
14133 i40e_vsi_clear_rings(vsi);
14135 i40e_vsi_free_arrays(vsi, false);
14136 i40e_set_num_rings_in_vsi(vsi);
14137 ret = i40e_vsi_alloc_arrays(vsi, false);
14141 alloc_queue_pairs = vsi->alloc_queue_pairs *
14142 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14144 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14146 dev_info(&pf->pdev->dev,
14147 "failed to get tracking for %d queues for VSI %d err %d\n",
14148 alloc_queue_pairs, vsi->seid, ret);
14151 vsi->base_queue = ret;
14153 /* Update the FW view of the VSI. Force a reset of TC and queue
14154 * layout configurations.
14156 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14157 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14158 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14159 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14160 if (vsi->type == I40E_VSI_MAIN)
14161 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
14163 /* assign it some queues */
14164 ret = i40e_alloc_rings(vsi);
14168 /* map all of the rings to the q_vectors */
14169 i40e_vsi_map_rings_to_vectors(vsi);
14173 i40e_vsi_free_q_vectors(vsi);
14174 if (vsi->netdev_registered) {
14175 vsi->netdev_registered = false;
14176 unregister_netdev(vsi->netdev);
14177 free_netdev(vsi->netdev);
14178 vsi->netdev = NULL;
14180 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14182 i40e_vsi_clear(vsi);
14187 * i40e_vsi_setup - Set up a VSI by a given type
14188 * @pf: board private structure
14190 * @uplink_seid: the switch element to link to
14191 * @param1: usage depends upon VSI type. For VF types, indicates VF id
14193 * This allocates the sw VSI structure and its queue resources, then add a VSI
14194 * to the identified VEB.
14196 * Returns pointer to the successfully allocated and configure VSI sw struct on
14197 * success, otherwise returns NULL on failure.
14199 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
14200 u16 uplink_seid, u32 param1)
14202 struct i40e_vsi *vsi = NULL;
14203 struct i40e_veb *veb = NULL;
14204 u16 alloc_queue_pairs;
14208 /* The requested uplink_seid must be either
14209 * - the PF's port seid
14210 * no VEB is needed because this is the PF
14211 * or this is a Flow Director special case VSI
14212 * - seid of an existing VEB
14213 * - seid of a VSI that owns an existing VEB
14214 * - seid of a VSI that doesn't own a VEB
14215 * a new VEB is created and the VSI becomes the owner
14216 * - seid of the PF VSI, which is what creates the first VEB
14217 * this is a special case of the previous
14219 * Find which uplink_seid we were given and create a new VEB if needed
14221 for (i = 0; i < I40E_MAX_VEB; i++) {
14222 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
14228 if (!veb && uplink_seid != pf->mac_seid) {
14230 for (i = 0; i < pf->num_alloc_vsi; i++) {
14231 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
14237 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
14242 if (vsi->uplink_seid == pf->mac_seid)
14243 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
14244 vsi->tc_config.enabled_tc);
14245 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
14246 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
14247 vsi->tc_config.enabled_tc);
14249 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
14250 dev_info(&vsi->back->pdev->dev,
14251 "New VSI creation error, uplink seid of LAN VSI expected.\n");
14254 /* We come up by default in VEPA mode if SRIOV is not
14255 * already enabled, in which case we can't force VEPA
14258 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
14259 veb->bridge_mode = BRIDGE_MODE_VEPA;
14260 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
14262 i40e_config_bridge_mode(veb);
14264 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
14265 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
14269 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
14273 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14274 uplink_seid = veb->seid;
14277 /* get vsi sw struct */
14278 v_idx = i40e_vsi_mem_alloc(pf, type);
14281 vsi = pf->vsi[v_idx];
14285 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
14287 if (type == I40E_VSI_MAIN)
14288 pf->lan_vsi = v_idx;
14289 else if (type == I40E_VSI_SRIOV)
14290 vsi->vf_id = param1;
14291 /* assign it some queues */
14292 alloc_queue_pairs = vsi->alloc_queue_pairs *
14293 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
14295 ret = i40e_get_lump(pf, pf->qp_pile, alloc_queue_pairs, vsi->idx);
14297 dev_info(&pf->pdev->dev,
14298 "failed to get tracking for %d queues for VSI %d err=%d\n",
14299 alloc_queue_pairs, vsi->seid, ret);
14302 vsi->base_queue = ret;
14304 /* get a VSI from the hardware */
14305 vsi->uplink_seid = uplink_seid;
14306 ret = i40e_add_vsi(vsi);
14310 switch (vsi->type) {
14311 /* setup the netdev if needed */
14312 case I40E_VSI_MAIN:
14313 case I40E_VSI_VMDQ2:
14314 ret = i40e_config_netdev(vsi);
14317 ret = i40e_netif_set_realnum_tx_rx_queues(vsi);
14320 ret = register_netdev(vsi->netdev);
14323 vsi->netdev_registered = true;
14324 netif_carrier_off(vsi->netdev);
14325 #ifdef CONFIG_I40E_DCB
14326 /* Setup DCB netlink interface */
14327 i40e_dcbnl_setup(vsi);
14328 #endif /* CONFIG_I40E_DCB */
14330 case I40E_VSI_FDIR:
14331 /* set up vectors and rings if needed */
14332 ret = i40e_vsi_setup_vectors(vsi);
14336 ret = i40e_alloc_rings(vsi);
14340 /* map all of the rings to the q_vectors */
14341 i40e_vsi_map_rings_to_vectors(vsi);
14343 i40e_vsi_reset_stats(vsi);
14346 /* no netdev or rings for the other VSI types */
14350 if ((pf->hw_features & I40E_HW_RSS_AQ_CAPABLE) &&
14351 (vsi->type == I40E_VSI_VMDQ2)) {
14352 ret = i40e_vsi_config_rss(vsi);
14357 i40e_vsi_free_q_vectors(vsi);
14359 if (vsi->netdev_registered) {
14360 vsi->netdev_registered = false;
14361 unregister_netdev(vsi->netdev);
14362 free_netdev(vsi->netdev);
14363 vsi->netdev = NULL;
14366 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
14368 i40e_vsi_clear(vsi);
14374 * i40e_veb_get_bw_info - Query VEB BW information
14375 * @veb: the veb to query
14377 * Query the Tx scheduler BW configuration data for given VEB
14379 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
14381 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
14382 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
14383 struct i40e_pf *pf = veb->pf;
14384 struct i40e_hw *hw = &pf->hw;
14389 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
14392 dev_info(&pf->pdev->dev,
14393 "query veb bw config failed, err %s aq_err %s\n",
14394 i40e_stat_str(&pf->hw, ret),
14395 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14399 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
14402 dev_info(&pf->pdev->dev,
14403 "query veb bw ets config failed, err %s aq_err %s\n",
14404 i40e_stat_str(&pf->hw, ret),
14405 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
14409 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
14410 veb->bw_max_quanta = ets_data.tc_bw_max;
14411 veb->is_abs_credits = bw_data.absolute_credits_enable;
14412 veb->enabled_tc = ets_data.tc_valid_bits;
14413 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
14414 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
14415 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
14416 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
14417 veb->bw_tc_limit_credits[i] =
14418 le16_to_cpu(bw_data.tc_bw_limits[i]);
14419 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
14427 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
14428 * @pf: board private structure
14430 * On error: returns error code (negative)
14431 * On success: returns vsi index in PF (positive)
14433 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
14436 struct i40e_veb *veb;
14439 /* Need to protect the allocation of switch elements at the PF level */
14440 mutex_lock(&pf->switch_mutex);
14442 /* VEB list may be fragmented if VEB creation/destruction has
14443 * been happening. We can afford to do a quick scan to look
14444 * for any free slots in the list.
14446 * find next empty veb slot, looping back around if necessary
14449 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
14451 if (i >= I40E_MAX_VEB) {
14453 goto err_alloc_veb; /* out of VEB slots! */
14456 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
14459 goto err_alloc_veb;
14463 veb->enabled_tc = 1;
14468 mutex_unlock(&pf->switch_mutex);
14473 * i40e_switch_branch_release - Delete a branch of the switch tree
14474 * @branch: where to start deleting
14476 * This uses recursion to find the tips of the branch to be
14477 * removed, deleting until we get back to and can delete this VEB.
14479 static void i40e_switch_branch_release(struct i40e_veb *branch)
14481 struct i40e_pf *pf = branch->pf;
14482 u16 branch_seid = branch->seid;
14483 u16 veb_idx = branch->idx;
14486 /* release any VEBs on this VEB - RECURSION */
14487 for (i = 0; i < I40E_MAX_VEB; i++) {
14490 if (pf->veb[i]->uplink_seid == branch->seid)
14491 i40e_switch_branch_release(pf->veb[i]);
14494 /* Release the VSIs on this VEB, but not the owner VSI.
14496 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
14497 * the VEB itself, so don't use (*branch) after this loop.
14499 for (i = 0; i < pf->num_alloc_vsi; i++) {
14502 if (pf->vsi[i]->uplink_seid == branch_seid &&
14503 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
14504 i40e_vsi_release(pf->vsi[i]);
14508 /* There's one corner case where the VEB might not have been
14509 * removed, so double check it here and remove it if needed.
14510 * This case happens if the veb was created from the debugfs
14511 * commands and no VSIs were added to it.
14513 if (pf->veb[veb_idx])
14514 i40e_veb_release(pf->veb[veb_idx]);
14518 * i40e_veb_clear - remove veb struct
14519 * @veb: the veb to remove
14521 static void i40e_veb_clear(struct i40e_veb *veb)
14527 struct i40e_pf *pf = veb->pf;
14529 mutex_lock(&pf->switch_mutex);
14530 if (pf->veb[veb->idx] == veb)
14531 pf->veb[veb->idx] = NULL;
14532 mutex_unlock(&pf->switch_mutex);
14539 * i40e_veb_release - Delete a VEB and free its resources
14540 * @veb: the VEB being removed
14542 void i40e_veb_release(struct i40e_veb *veb)
14544 struct i40e_vsi *vsi = NULL;
14545 struct i40e_pf *pf;
14550 /* find the remaining VSI and check for extras */
14551 for (i = 0; i < pf->num_alloc_vsi; i++) {
14552 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
14558 dev_info(&pf->pdev->dev,
14559 "can't remove VEB %d with %d VSIs left\n",
14564 /* move the remaining VSI to uplink veb */
14565 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
14566 if (veb->uplink_seid) {
14567 vsi->uplink_seid = veb->uplink_seid;
14568 if (veb->uplink_seid == pf->mac_seid)
14569 vsi->veb_idx = I40E_NO_VEB;
14571 vsi->veb_idx = veb->veb_idx;
14574 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
14575 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
14578 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14579 i40e_veb_clear(veb);
14583 * i40e_add_veb - create the VEB in the switch
14584 * @veb: the VEB to be instantiated
14585 * @vsi: the controlling VSI
14587 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
14589 struct i40e_pf *pf = veb->pf;
14590 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
14593 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
14594 veb->enabled_tc, false,
14595 &veb->seid, enable_stats, NULL);
14597 /* get a VEB from the hardware */
14599 dev_info(&pf->pdev->dev,
14600 "couldn't add VEB, err %s aq_err %s\n",
14601 i40e_stat_str(&pf->hw, ret),
14602 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14606 /* get statistics counter */
14607 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
14608 &veb->stats_idx, NULL, NULL, NULL);
14610 dev_info(&pf->pdev->dev,
14611 "couldn't get VEB statistics idx, err %s aq_err %s\n",
14612 i40e_stat_str(&pf->hw, ret),
14613 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14616 ret = i40e_veb_get_bw_info(veb);
14618 dev_info(&pf->pdev->dev,
14619 "couldn't get VEB bw info, err %s aq_err %s\n",
14620 i40e_stat_str(&pf->hw, ret),
14621 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14622 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
14626 vsi->uplink_seid = veb->seid;
14627 vsi->veb_idx = veb->idx;
14628 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
14634 * i40e_veb_setup - Set up a VEB
14635 * @pf: board private structure
14636 * @flags: VEB setup flags
14637 * @uplink_seid: the switch element to link to
14638 * @vsi_seid: the initial VSI seid
14639 * @enabled_tc: Enabled TC bit-map
14641 * This allocates the sw VEB structure and links it into the switch
14642 * It is possible and legal for this to be a duplicate of an already
14643 * existing VEB. It is also possible for both uplink and vsi seids
14644 * to be zero, in order to create a floating VEB.
14646 * Returns pointer to the successfully allocated VEB sw struct on
14647 * success, otherwise returns NULL on failure.
14649 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
14650 u16 uplink_seid, u16 vsi_seid,
14653 struct i40e_veb *veb, *uplink_veb = NULL;
14654 int vsi_idx, veb_idx;
14657 /* if one seid is 0, the other must be 0 to create a floating relay */
14658 if ((uplink_seid == 0 || vsi_seid == 0) &&
14659 (uplink_seid + vsi_seid != 0)) {
14660 dev_info(&pf->pdev->dev,
14661 "one, not both seid's are 0: uplink=%d vsi=%d\n",
14662 uplink_seid, vsi_seid);
14666 /* make sure there is such a vsi and uplink */
14667 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
14668 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
14670 if (vsi_idx == pf->num_alloc_vsi && vsi_seid != 0) {
14671 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
14676 if (uplink_seid && uplink_seid != pf->mac_seid) {
14677 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
14678 if (pf->veb[veb_idx] &&
14679 pf->veb[veb_idx]->seid == uplink_seid) {
14680 uplink_veb = pf->veb[veb_idx];
14685 dev_info(&pf->pdev->dev,
14686 "uplink seid %d not found\n", uplink_seid);
14691 /* get veb sw struct */
14692 veb_idx = i40e_veb_mem_alloc(pf);
14695 veb = pf->veb[veb_idx];
14696 veb->flags = flags;
14697 veb->uplink_seid = uplink_seid;
14698 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
14699 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
14701 /* create the VEB in the switch */
14702 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
14705 if (vsi_idx == pf->lan_vsi)
14706 pf->lan_veb = veb->idx;
14711 i40e_veb_clear(veb);
14717 * i40e_setup_pf_switch_element - set PF vars based on switch type
14718 * @pf: board private structure
14719 * @ele: element we are building info from
14720 * @num_reported: total number of elements
14721 * @printconfig: should we print the contents
14723 * helper function to assist in extracting a few useful SEID values.
14725 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
14726 struct i40e_aqc_switch_config_element_resp *ele,
14727 u16 num_reported, bool printconfig)
14729 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
14730 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
14731 u8 element_type = ele->element_type;
14732 u16 seid = le16_to_cpu(ele->seid);
14735 dev_info(&pf->pdev->dev,
14736 "type=%d seid=%d uplink=%d downlink=%d\n",
14737 element_type, seid, uplink_seid, downlink_seid);
14739 switch (element_type) {
14740 case I40E_SWITCH_ELEMENT_TYPE_MAC:
14741 pf->mac_seid = seid;
14743 case I40E_SWITCH_ELEMENT_TYPE_VEB:
14745 if (uplink_seid != pf->mac_seid)
14747 if (pf->lan_veb >= I40E_MAX_VEB) {
14750 /* find existing or else empty VEB */
14751 for (v = 0; v < I40E_MAX_VEB; v++) {
14752 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
14757 if (pf->lan_veb >= I40E_MAX_VEB) {
14758 v = i40e_veb_mem_alloc(pf);
14764 if (pf->lan_veb >= I40E_MAX_VEB)
14767 pf->veb[pf->lan_veb]->seid = seid;
14768 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
14769 pf->veb[pf->lan_veb]->pf = pf;
14770 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
14772 case I40E_SWITCH_ELEMENT_TYPE_VSI:
14773 if (num_reported != 1)
14775 /* This is immediately after a reset so we can assume this is
14778 pf->mac_seid = uplink_seid;
14779 pf->pf_seid = downlink_seid;
14780 pf->main_vsi_seid = seid;
14782 dev_info(&pf->pdev->dev,
14783 "pf_seid=%d main_vsi_seid=%d\n",
14784 pf->pf_seid, pf->main_vsi_seid);
14786 case I40E_SWITCH_ELEMENT_TYPE_PF:
14787 case I40E_SWITCH_ELEMENT_TYPE_VF:
14788 case I40E_SWITCH_ELEMENT_TYPE_EMP:
14789 case I40E_SWITCH_ELEMENT_TYPE_BMC:
14790 case I40E_SWITCH_ELEMENT_TYPE_PE:
14791 case I40E_SWITCH_ELEMENT_TYPE_PA:
14792 /* ignore these for now */
14795 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
14796 element_type, seid);
14802 * i40e_fetch_switch_configuration - Get switch config from firmware
14803 * @pf: board private structure
14804 * @printconfig: should we print the contents
14806 * Get the current switch configuration from the device and
14807 * extract a few useful SEID values.
14809 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
14811 struct i40e_aqc_get_switch_config_resp *sw_config;
14817 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
14821 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
14823 u16 num_reported, num_total;
14825 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
14829 dev_info(&pf->pdev->dev,
14830 "get switch config failed err %s aq_err %s\n",
14831 i40e_stat_str(&pf->hw, ret),
14832 i40e_aq_str(&pf->hw,
14833 pf->hw.aq.asq_last_status));
14838 num_reported = le16_to_cpu(sw_config->header.num_reported);
14839 num_total = le16_to_cpu(sw_config->header.num_total);
14842 dev_info(&pf->pdev->dev,
14843 "header: %d reported %d total\n",
14844 num_reported, num_total);
14846 for (i = 0; i < num_reported; i++) {
14847 struct i40e_aqc_switch_config_element_resp *ele =
14848 &sw_config->element[i];
14850 i40e_setup_pf_switch_element(pf, ele, num_reported,
14853 } while (next_seid != 0);
14860 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
14861 * @pf: board private structure
14862 * @reinit: if the Main VSI needs to re-initialized.
14863 * @lock_acquired: indicates whether or not the lock has been acquired
14865 * Returns 0 on success, negative value on failure
14867 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit, bool lock_acquired)
14872 /* find out what's out there already */
14873 ret = i40e_fetch_switch_configuration(pf, false);
14875 dev_info(&pf->pdev->dev,
14876 "couldn't fetch switch config, err %s aq_err %s\n",
14877 i40e_stat_str(&pf->hw, ret),
14878 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
14881 i40e_pf_reset_stats(pf);
14883 /* set the switch config bit for the whole device to
14884 * support limited promisc or true promisc
14885 * when user requests promisc. The default is limited
14889 if ((pf->hw.pf_id == 0) &&
14890 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
14891 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14892 pf->last_sw_conf_flags = flags;
14895 if (pf->hw.pf_id == 0) {
14898 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
14899 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags, 0,
14901 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
14902 dev_info(&pf->pdev->dev,
14903 "couldn't set switch config bits, err %s aq_err %s\n",
14904 i40e_stat_str(&pf->hw, ret),
14905 i40e_aq_str(&pf->hw,
14906 pf->hw.aq.asq_last_status));
14907 /* not a fatal problem, just keep going */
14909 pf->last_sw_conf_valid_flags = valid_flags;
14912 /* first time setup */
14913 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
14914 struct i40e_vsi *vsi = NULL;
14917 /* Set up the PF VSI associated with the PF's main VSI
14918 * that is already in the HW switch
14920 if (pf->lan_veb < I40E_MAX_VEB && pf->veb[pf->lan_veb])
14921 uplink_seid = pf->veb[pf->lan_veb]->seid;
14923 uplink_seid = pf->mac_seid;
14924 if (pf->lan_vsi == I40E_NO_VSI)
14925 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
14927 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
14929 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
14930 i40e_cloud_filter_exit(pf);
14931 i40e_fdir_teardown(pf);
14935 /* force a reset of TC and queue layout configurations */
14936 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
14938 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
14939 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
14940 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
14942 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
14944 i40e_fdir_sb_setup(pf);
14946 /* Setup static PF queue filter control settings */
14947 ret = i40e_setup_pf_filter_control(pf);
14949 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
14951 /* Failure here should not stop continuing other steps */
14954 /* enable RSS in the HW, even for only one queue, as the stack can use
14957 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
14958 i40e_pf_config_rss(pf);
14960 /* fill in link information and enable LSE reporting */
14961 i40e_link_event(pf);
14963 /* Initialize user-specific link properties */
14964 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
14965 I40E_AQ_AN_COMPLETED) ? true : false);
14969 if (!lock_acquired)
14972 /* repopulate tunnel port filters */
14973 udp_tunnel_nic_reset_ntf(pf->vsi[pf->lan_vsi]->netdev);
14975 if (!lock_acquired)
14982 * i40e_determine_queue_usage - Work out queue distribution
14983 * @pf: board private structure
14985 static void i40e_determine_queue_usage(struct i40e_pf *pf)
14990 pf->num_lan_qps = 0;
14992 /* Find the max queues to be put into basic use. We'll always be
14993 * using TC0, whether or not DCB is running, and TC0 will get the
14996 queues_left = pf->hw.func_caps.num_tx_qp;
14998 if ((queues_left == 1) ||
14999 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
15000 /* one qp for PF, no queues for anything else */
15002 pf->alloc_rss_size = pf->num_lan_qps = 1;
15004 /* make sure all the fancies are disabled */
15005 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
15006 I40E_FLAG_IWARP_ENABLED |
15007 I40E_FLAG_FD_SB_ENABLED |
15008 I40E_FLAG_FD_ATR_ENABLED |
15009 I40E_FLAG_DCB_CAPABLE |
15010 I40E_FLAG_DCB_ENABLED |
15011 I40E_FLAG_SRIOV_ENABLED |
15012 I40E_FLAG_VMDQ_ENABLED);
15013 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15014 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
15015 I40E_FLAG_FD_SB_ENABLED |
15016 I40E_FLAG_FD_ATR_ENABLED |
15017 I40E_FLAG_DCB_CAPABLE))) {
15018 /* one qp for PF */
15019 pf->alloc_rss_size = pf->num_lan_qps = 1;
15020 queues_left -= pf->num_lan_qps;
15022 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
15023 I40E_FLAG_IWARP_ENABLED |
15024 I40E_FLAG_FD_SB_ENABLED |
15025 I40E_FLAG_FD_ATR_ENABLED |
15026 I40E_FLAG_DCB_ENABLED |
15027 I40E_FLAG_VMDQ_ENABLED);
15028 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15030 /* Not enough queues for all TCs */
15031 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
15032 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
15033 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
15034 I40E_FLAG_DCB_ENABLED);
15035 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
15038 /* limit lan qps to the smaller of qps, cpus or msix */
15039 q_max = max_t(int, pf->rss_size_max, num_online_cpus());
15040 q_max = min_t(int, q_max, pf->hw.func_caps.num_tx_qp);
15041 q_max = min_t(int, q_max, pf->hw.func_caps.num_msix_vectors);
15042 pf->num_lan_qps = q_max;
15044 queues_left -= pf->num_lan_qps;
15047 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
15048 if (queues_left > 1) {
15049 queues_left -= 1; /* save 1 queue for FD */
15051 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
15052 pf->flags |= I40E_FLAG_FD_SB_INACTIVE;
15053 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
15057 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15058 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
15059 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
15060 (queues_left / pf->num_vf_qps));
15061 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
15064 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
15065 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
15066 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
15067 (queues_left / pf->num_vmdq_qps));
15068 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
15071 pf->queues_left = queues_left;
15072 dev_dbg(&pf->pdev->dev,
15073 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
15074 pf->hw.func_caps.num_tx_qp,
15075 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
15076 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
15077 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
15082 * i40e_setup_pf_filter_control - Setup PF static filter control
15083 * @pf: PF to be setup
15085 * i40e_setup_pf_filter_control sets up a PF's initial filter control
15086 * settings. If PE/FCoE are enabled then it will also set the per PF
15087 * based filter sizes required for them. It also enables Flow director,
15088 * ethertype and macvlan type filter settings for the pf.
15090 * Returns 0 on success, negative on failure
15092 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
15094 struct i40e_filter_control_settings *settings = &pf->filter_settings;
15096 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
15098 /* Flow Director is enabled */
15099 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
15100 settings->enable_fdir = true;
15102 /* Ethtype and MACVLAN filters enabled for PF */
15103 settings->enable_ethtype = true;
15104 settings->enable_macvlan = true;
15106 if (i40e_set_filter_control(&pf->hw, settings))
15112 #define INFO_STRING_LEN 255
15113 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
15114 static void i40e_print_features(struct i40e_pf *pf)
15116 struct i40e_hw *hw = &pf->hw;
15120 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
15124 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
15125 #ifdef CONFIG_PCI_IOV
15126 i += scnprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
15128 i += scnprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
15129 pf->hw.func_caps.num_vsis,
15130 pf->vsi[pf->lan_vsi]->num_queue_pairs);
15131 if (pf->flags & I40E_FLAG_RSS_ENABLED)
15132 i += scnprintf(&buf[i], REMAIN(i), " RSS");
15133 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
15134 i += scnprintf(&buf[i], REMAIN(i), " FD_ATR");
15135 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
15136 i += scnprintf(&buf[i], REMAIN(i), " FD_SB");
15137 i += scnprintf(&buf[i], REMAIN(i), " NTUPLE");
15139 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
15140 i += scnprintf(&buf[i], REMAIN(i), " DCB");
15141 i += scnprintf(&buf[i], REMAIN(i), " VxLAN");
15142 i += scnprintf(&buf[i], REMAIN(i), " Geneve");
15143 if (pf->flags & I40E_FLAG_PTP)
15144 i += scnprintf(&buf[i], REMAIN(i), " PTP");
15145 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
15146 i += scnprintf(&buf[i], REMAIN(i), " VEB");
15148 i += scnprintf(&buf[i], REMAIN(i), " VEPA");
15150 dev_info(&pf->pdev->dev, "%s\n", buf);
15152 WARN_ON(i > INFO_STRING_LEN);
15156 * i40e_get_platform_mac_addr - get platform-specific MAC address
15157 * @pdev: PCI device information struct
15158 * @pf: board private structure
15160 * Look up the MAC address for the device. First we'll try
15161 * eth_platform_get_mac_address, which will check Open Firmware, or arch
15162 * specific fallback. Otherwise, we'll default to the stored value in
15165 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
15167 if (eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
15168 i40e_get_mac_addr(&pf->hw, pf->hw.mac.addr);
15172 * i40e_set_fec_in_flags - helper function for setting FEC options in flags
15173 * @fec_cfg: FEC option to set in flags
15174 * @flags: ptr to flags in which we set FEC option
15176 void i40e_set_fec_in_flags(u8 fec_cfg, u32 *flags)
15178 if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
15179 *flags |= I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC;
15180 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_RS) ||
15181 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_RS)) {
15182 *flags |= I40E_FLAG_RS_FEC;
15183 *flags &= ~I40E_FLAG_BASE_R_FEC;
15185 if ((fec_cfg & I40E_AQ_SET_FEC_REQUEST_KR) ||
15186 (fec_cfg & I40E_AQ_SET_FEC_ABILITY_KR)) {
15187 *flags |= I40E_FLAG_BASE_R_FEC;
15188 *flags &= ~I40E_FLAG_RS_FEC;
15191 *flags &= ~(I40E_FLAG_RS_FEC | I40E_FLAG_BASE_R_FEC);
15195 * i40e_check_recovery_mode - check if we are running transition firmware
15196 * @pf: board private structure
15198 * Check registers indicating the firmware runs in recovery mode. Sets the
15199 * appropriate driver state.
15201 * Returns true if the recovery mode was detected, false otherwise
15203 static bool i40e_check_recovery_mode(struct i40e_pf *pf)
15205 u32 val = rd32(&pf->hw, I40E_GL_FWSTS);
15207 if (val & I40E_GL_FWSTS_FWS1B_MASK) {
15208 dev_crit(&pf->pdev->dev, "Firmware recovery mode detected. Limiting functionality.\n");
15209 dev_crit(&pf->pdev->dev, "Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware recovery mode.\n");
15210 set_bit(__I40E_RECOVERY_MODE, pf->state);
15214 if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15215 dev_info(&pf->pdev->dev, "Please do Power-On Reset to initialize adapter in normal mode with full functionality.\n");
15221 * i40e_pf_loop_reset - perform reset in a loop.
15222 * @pf: board private structure
15224 * This function is useful when a NIC is about to enter recovery mode.
15225 * When a NIC's internal data structures are corrupted the NIC's
15226 * firmware is going to enter recovery mode.
15227 * Right after a POR it takes about 7 minutes for firmware to enter
15228 * recovery mode. Until that time a NIC is in some kind of intermediate
15229 * state. After that time period the NIC almost surely enters
15230 * recovery mode. The only way for a driver to detect intermediate
15231 * state is to issue a series of pf-resets and check a return value.
15232 * If a PF reset returns success then the firmware could be in recovery
15233 * mode so the caller of this code needs to check for recovery mode
15234 * if this function returns success. There is a little chance that
15235 * firmware will hang in intermediate state forever.
15236 * Since waiting 7 minutes is quite a lot of time this function waits
15237 * 10 seconds and then gives up by returning an error.
15239 * Return 0 on success, negative on failure.
15241 static i40e_status i40e_pf_loop_reset(struct i40e_pf *pf)
15243 /* wait max 10 seconds for PF reset to succeed */
15244 const unsigned long time_end = jiffies + 10 * HZ;
15246 struct i40e_hw *hw = &pf->hw;
15249 ret = i40e_pf_reset(hw);
15250 while (ret != I40E_SUCCESS && time_before(jiffies, time_end)) {
15251 usleep_range(10000, 20000);
15252 ret = i40e_pf_reset(hw);
15255 if (ret == I40E_SUCCESS)
15258 dev_info(&pf->pdev->dev, "PF reset failed: %d\n", ret);
15264 * i40e_check_fw_empr - check if FW issued unexpected EMP Reset
15265 * @pf: board private structure
15267 * Check FW registers to determine if FW issued unexpected EMP Reset.
15268 * Every time when unexpected EMP Reset occurs the FW increments
15269 * a counter of unexpected EMP Resets. When the counter reaches 10
15270 * the FW should enter the Recovery mode
15272 * Returns true if FW issued unexpected EMP Reset
15274 static bool i40e_check_fw_empr(struct i40e_pf *pf)
15276 const u32 fw_sts = rd32(&pf->hw, I40E_GL_FWSTS) &
15277 I40E_GL_FWSTS_FWS1B_MASK;
15278 return (fw_sts > I40E_GL_FWSTS_FWS1B_EMPR_0) &&
15279 (fw_sts <= I40E_GL_FWSTS_FWS1B_EMPR_10);
15283 * i40e_handle_resets - handle EMP resets and PF resets
15284 * @pf: board private structure
15286 * Handle both EMP resets and PF resets and conclude whether there are
15287 * any issues regarding these resets. If there are any issues then
15288 * generate log entry.
15290 * Return 0 if NIC is healthy or negative value when there are issues
15293 static i40e_status i40e_handle_resets(struct i40e_pf *pf)
15295 const i40e_status pfr = i40e_pf_loop_reset(pf);
15296 const bool is_empr = i40e_check_fw_empr(pf);
15298 if (is_empr || pfr != I40E_SUCCESS)
15299 dev_crit(&pf->pdev->dev, "Entering recovery mode due to repeated FW resets. This may take several minutes. Refer to the Intel(R) Ethernet Adapters and Devices User Guide.\n");
15301 return is_empr ? I40E_ERR_RESET_FAILED : pfr;
15305 * i40e_init_recovery_mode - initialize subsystems needed in recovery mode
15306 * @pf: board private structure
15307 * @hw: ptr to the hardware info
15309 * This function does a minimal setup of all subsystems needed for running
15312 * Returns 0 on success, negative on failure
15314 static int i40e_init_recovery_mode(struct i40e_pf *pf, struct i40e_hw *hw)
15316 struct i40e_vsi *vsi;
15320 pci_save_state(pf->pdev);
15322 /* set up periodic task facility */
15323 timer_setup(&pf->service_timer, i40e_service_timer, 0);
15324 pf->service_timer_period = HZ;
15326 INIT_WORK(&pf->service_task, i40e_service_task);
15327 clear_bit(__I40E_SERVICE_SCHED, pf->state);
15329 err = i40e_init_interrupt_scheme(pf);
15331 goto err_switch_setup;
15333 /* The number of VSIs reported by the FW is the minimum guaranteed
15334 * to us; HW supports far more and we share the remaining pool with
15335 * the other PFs. We allocate space for more than the guarantee with
15336 * the understanding that we might not get them all later.
15338 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15339 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15341 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15343 /* Set up the vsi struct and our local tracking of the MAIN PF vsi. */
15344 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15348 goto err_switch_setup;
15351 /* We allocate one VSI which is needed as absolute minimum
15352 * in order to register the netdev
15354 v_idx = i40e_vsi_mem_alloc(pf, I40E_VSI_MAIN);
15357 goto err_switch_setup;
15359 pf->lan_vsi = v_idx;
15360 vsi = pf->vsi[v_idx];
15363 goto err_switch_setup;
15365 vsi->alloc_queue_pairs = 1;
15366 err = i40e_config_netdev(vsi);
15368 goto err_switch_setup;
15369 err = register_netdev(vsi->netdev);
15371 goto err_switch_setup;
15372 vsi->netdev_registered = true;
15373 i40e_dbg_pf_init(pf);
15375 err = i40e_setup_misc_vector_for_recovery_mode(pf);
15377 goto err_switch_setup;
15379 /* tell the firmware that we're starting */
15380 i40e_send_version(pf);
15382 /* since everything's happy, start the service_task timer */
15383 mod_timer(&pf->service_timer,
15384 round_jiffies(jiffies + pf->service_timer_period));
15389 i40e_reset_interrupt_capability(pf);
15390 del_timer_sync(&pf->service_timer);
15391 i40e_shutdown_adminq(hw);
15392 iounmap(hw->hw_addr);
15393 pci_disable_pcie_error_reporting(pf->pdev);
15394 pci_release_mem_regions(pf->pdev);
15395 pci_disable_device(pf->pdev);
15402 * i40e_set_subsystem_device_id - set subsystem device id
15403 * @hw: pointer to the hardware info
15405 * Set PCI subsystem device id either from a pci_dev structure or
15406 * a specific FW register.
15408 static inline void i40e_set_subsystem_device_id(struct i40e_hw *hw)
15410 struct pci_dev *pdev = ((struct i40e_pf *)hw->back)->pdev;
15412 hw->subsystem_device_id = pdev->subsystem_device ?
15413 pdev->subsystem_device :
15414 (ushort)(rd32(hw, I40E_PFPCI_SUBSYSID) & USHRT_MAX);
15418 * i40e_probe - Device initialization routine
15419 * @pdev: PCI device information struct
15420 * @ent: entry in i40e_pci_tbl
15422 * i40e_probe initializes a PF identified by a pci_dev structure.
15423 * The OS initialization, configuring of the PF private structure,
15424 * and a hardware reset occur.
15426 * Returns 0 on success, negative on failure
15428 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
15430 struct i40e_aq_get_phy_abilities_resp abilities;
15431 #ifdef CONFIG_I40E_DCB
15432 enum i40e_get_fw_lldp_status_resp lldp_status;
15433 i40e_status status;
15434 #endif /* CONFIG_I40E_DCB */
15435 struct i40e_pf *pf;
15436 struct i40e_hw *hw;
15437 static u16 pfs_found;
15444 err = pci_enable_device_mem(pdev);
15448 /* set up for high or low dma */
15449 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
15451 dev_err(&pdev->dev,
15452 "DMA configuration failed: 0x%x\n", err);
15456 /* set up pci connections */
15457 err = pci_request_mem_regions(pdev, i40e_driver_name);
15459 dev_info(&pdev->dev,
15460 "pci_request_selected_regions failed %d\n", err);
15464 pci_enable_pcie_error_reporting(pdev);
15465 pci_set_master(pdev);
15467 /* Now that we have a PCI connection, we need to do the
15468 * low level device setup. This is primarily setting up
15469 * the Admin Queue structures and then querying for the
15470 * device's current profile information.
15472 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
15479 set_bit(__I40E_DOWN, pf->state);
15484 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
15485 I40E_MAX_CSR_SPACE);
15486 /* We believe that the highest register to read is
15487 * I40E_GLGEN_STAT_CLEAR, so we check if the BAR size
15488 * is not less than that before mapping to prevent a
15491 if (pf->ioremap_len < I40E_GLGEN_STAT_CLEAR) {
15492 dev_err(&pdev->dev, "Cannot map registers, bar size 0x%X too small, aborting\n",
15497 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
15498 if (!hw->hw_addr) {
15500 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
15501 (unsigned int)pci_resource_start(pdev, 0),
15502 pf->ioremap_len, err);
15505 hw->vendor_id = pdev->vendor;
15506 hw->device_id = pdev->device;
15507 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
15508 hw->subsystem_vendor_id = pdev->subsystem_vendor;
15509 i40e_set_subsystem_device_id(hw);
15510 hw->bus.device = PCI_SLOT(pdev->devfn);
15511 hw->bus.func = PCI_FUNC(pdev->devfn);
15512 hw->bus.bus_id = pdev->bus->number;
15513 pf->instance = pfs_found;
15515 /* Select something other than the 802.1ad ethertype for the
15516 * switch to use internally and drop on ingress.
15518 hw->switch_tag = 0xffff;
15519 hw->first_tag = ETH_P_8021AD;
15520 hw->second_tag = ETH_P_8021Q;
15522 INIT_LIST_HEAD(&pf->l3_flex_pit_list);
15523 INIT_LIST_HEAD(&pf->l4_flex_pit_list);
15524 INIT_LIST_HEAD(&pf->ddp_old_prof);
15526 /* set up the locks for the AQ, do this only once in probe
15527 * and destroy them only once in remove
15529 mutex_init(&hw->aq.asq_mutex);
15530 mutex_init(&hw->aq.arq_mutex);
15532 pf->msg_enable = netif_msg_init(debug,
15537 pf->hw.debug_mask = debug;
15539 /* do a special CORER for clearing PXE mode once at init */
15540 if (hw->revision_id == 0 &&
15541 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
15542 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
15547 i40e_clear_pxe_mode(hw);
15550 /* Reset here to make sure all is clean and to define PF 'n' */
15553 err = i40e_set_mac_type(hw);
15555 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15560 err = i40e_handle_resets(pf);
15564 i40e_check_recovery_mode(pf);
15566 if (is_kdump_kernel()) {
15567 hw->aq.num_arq_entries = I40E_MIN_ARQ_LEN;
15568 hw->aq.num_asq_entries = I40E_MIN_ASQ_LEN;
15570 hw->aq.num_arq_entries = I40E_AQ_LEN;
15571 hw->aq.num_asq_entries = I40E_AQ_LEN;
15573 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15574 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
15575 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
15577 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
15579 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
15581 err = i40e_init_shared_code(hw);
15583 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
15588 /* set up a default setting for link flow control */
15589 pf->hw.fc.requested_mode = I40E_FC_NONE;
15591 err = i40e_init_adminq(hw);
15593 if (err == I40E_ERR_FIRMWARE_API_VERSION)
15594 dev_info(&pdev->dev,
15595 "The driver for the device stopped because the NVM image v%u.%u is newer than expected v%u.%u. You must install the most recent version of the network driver.\n",
15596 hw->aq.api_maj_ver,
15597 hw->aq.api_min_ver,
15598 I40E_FW_API_VERSION_MAJOR,
15599 I40E_FW_MINOR_VERSION(hw));
15601 dev_info(&pdev->dev,
15602 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
15606 i40e_get_oem_version(hw);
15608 /* provide nvm, fw, api versions, vendor:device id, subsys vendor:device id */
15609 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s [%04x:%04x] [%04x:%04x]\n",
15610 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
15611 hw->aq.api_maj_ver, hw->aq.api_min_ver,
15612 i40e_nvm_version_str(hw), hw->vendor_id, hw->device_id,
15613 hw->subsystem_vendor_id, hw->subsystem_device_id);
15615 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
15616 hw->aq.api_min_ver > I40E_FW_MINOR_VERSION(hw))
15617 dev_dbg(&pdev->dev,
15618 "The driver for the device detected a newer version of the NVM image v%u.%u than v%u.%u.\n",
15619 hw->aq.api_maj_ver,
15620 hw->aq.api_min_ver,
15621 I40E_FW_API_VERSION_MAJOR,
15622 I40E_FW_MINOR_VERSION(hw));
15623 else if (hw->aq.api_maj_ver == 1 && hw->aq.api_min_ver < 4)
15624 dev_info(&pdev->dev,
15625 "The driver for the device detected an older version of the NVM image v%u.%u than expected v%u.%u. Please update the NVM image.\n",
15626 hw->aq.api_maj_ver,
15627 hw->aq.api_min_ver,
15628 I40E_FW_API_VERSION_MAJOR,
15629 I40E_FW_MINOR_VERSION(hw));
15631 i40e_verify_eeprom(pf);
15633 /* Rev 0 hardware was never productized */
15634 if (hw->revision_id < 1)
15635 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
15637 i40e_clear_pxe_mode(hw);
15639 err = i40e_get_capabilities(pf, i40e_aqc_opc_list_func_capabilities);
15641 goto err_adminq_setup;
15643 err = i40e_sw_init(pf);
15645 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
15649 if (test_bit(__I40E_RECOVERY_MODE, pf->state))
15650 return i40e_init_recovery_mode(pf, hw);
15652 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
15653 hw->func_caps.num_rx_qp, 0, 0);
15655 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
15656 goto err_init_lan_hmc;
15659 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
15661 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
15663 goto err_configure_lan_hmc;
15666 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
15667 * Ignore error return codes because if it was already disabled via
15668 * hardware settings this will fail
15670 if (pf->hw_features & I40E_HW_STOP_FW_LLDP) {
15671 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
15672 i40e_aq_stop_lldp(hw, true, false, NULL);
15675 /* allow a platform config to override the HW addr */
15676 i40e_get_platform_mac_addr(pdev, pf);
15678 if (!is_valid_ether_addr(hw->mac.addr)) {
15679 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
15683 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
15684 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
15685 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
15686 if (is_valid_ether_addr(hw->mac.port_addr))
15687 pf->hw_features |= I40E_HW_PORT_ID_VALID;
15689 i40e_ptp_alloc_pins(pf);
15690 pci_set_drvdata(pdev, pf);
15691 pci_save_state(pdev);
15693 #ifdef CONFIG_I40E_DCB
15694 status = i40e_get_fw_lldp_status(&pf->hw, &lldp_status);
15696 lldp_status == I40E_GET_FW_LLDP_STATUS_ENABLED) ?
15697 (pf->flags &= ~I40E_FLAG_DISABLE_FW_LLDP) :
15698 (pf->flags |= I40E_FLAG_DISABLE_FW_LLDP);
15699 dev_info(&pdev->dev,
15700 (pf->flags & I40E_FLAG_DISABLE_FW_LLDP) ?
15701 "FW LLDP is disabled\n" :
15702 "FW LLDP is enabled\n");
15704 /* Enable FW to write default DCB config on link-up */
15705 i40e_aq_set_dcb_parameters(hw, true, NULL);
15707 err = i40e_init_pf_dcb(pf);
15709 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
15710 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
15711 /* Continue without DCB enabled */
15713 #endif /* CONFIG_I40E_DCB */
15715 /* set up periodic task facility */
15716 timer_setup(&pf->service_timer, i40e_service_timer, 0);
15717 pf->service_timer_period = HZ;
15719 INIT_WORK(&pf->service_task, i40e_service_task);
15720 clear_bit(__I40E_SERVICE_SCHED, pf->state);
15722 /* NVM bit on means WoL disabled for the port */
15723 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
15724 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
15725 pf->wol_en = false;
15728 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
15730 /* set up the main switch operations */
15731 i40e_determine_queue_usage(pf);
15732 err = i40e_init_interrupt_scheme(pf);
15734 goto err_switch_setup;
15736 /* Reduce Tx and Rx pairs for kdump
15737 * When MSI-X is enabled, it's not allowed to use more TC queue
15738 * pairs than MSI-X vectors (pf->num_lan_msix) exist. Thus
15739 * vsi->num_queue_pairs will be equal to pf->num_lan_msix, i.e., 1.
15741 if (is_kdump_kernel())
15742 pf->num_lan_msix = 1;
15744 pf->udp_tunnel_nic.set_port = i40e_udp_tunnel_set_port;
15745 pf->udp_tunnel_nic.unset_port = i40e_udp_tunnel_unset_port;
15746 pf->udp_tunnel_nic.flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP;
15747 pf->udp_tunnel_nic.shared = &pf->udp_tunnel_shared;
15748 pf->udp_tunnel_nic.tables[0].n_entries = I40E_MAX_PF_UDP_OFFLOAD_PORTS;
15749 pf->udp_tunnel_nic.tables[0].tunnel_types = UDP_TUNNEL_TYPE_VXLAN |
15750 UDP_TUNNEL_TYPE_GENEVE;
15752 /* The number of VSIs reported by the FW is the minimum guaranteed
15753 * to us; HW supports far more and we share the remaining pool with
15754 * the other PFs. We allocate space for more than the guarantee with
15755 * the understanding that we might not get them all later.
15757 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
15758 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
15760 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
15761 if (pf->num_alloc_vsi > UDP_TUNNEL_NIC_MAX_SHARING_DEVICES) {
15762 dev_warn(&pf->pdev->dev,
15763 "limiting the VSI count due to UDP tunnel limitation %d > %d\n",
15764 pf->num_alloc_vsi, UDP_TUNNEL_NIC_MAX_SHARING_DEVICES);
15765 pf->num_alloc_vsi = UDP_TUNNEL_NIC_MAX_SHARING_DEVICES;
15768 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
15769 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
15773 goto err_switch_setup;
15776 #ifdef CONFIG_PCI_IOV
15777 /* prep for VF support */
15778 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15779 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15780 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15781 if (pci_num_vf(pdev))
15782 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
15785 err = i40e_setup_pf_switch(pf, false, false);
15787 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
15790 INIT_LIST_HEAD(&pf->vsi[pf->lan_vsi]->ch_list);
15792 /* if FDIR VSI was set up, start it now */
15793 for (i = 0; i < pf->num_alloc_vsi; i++) {
15794 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
15795 i40e_vsi_open(pf->vsi[i]);
15800 /* The driver only wants link up/down and module qualification
15801 * reports from firmware. Note the negative logic.
15803 err = i40e_aq_set_phy_int_mask(&pf->hw,
15804 ~(I40E_AQ_EVENT_LINK_UPDOWN |
15805 I40E_AQ_EVENT_MEDIA_NA |
15806 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
15808 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
15809 i40e_stat_str(&pf->hw, err),
15810 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15812 /* Reconfigure hardware for allowing smaller MSS in the case
15813 * of TSO, so that we avoid the MDD being fired and causing
15814 * a reset in the case of small MSS+TSO.
15816 val = rd32(hw, I40E_REG_MSS);
15817 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
15818 val &= ~I40E_REG_MSS_MIN_MASK;
15819 val |= I40E_64BYTE_MSS;
15820 wr32(hw, I40E_REG_MSS, val);
15823 if (pf->hw_features & I40E_HW_RESTART_AUTONEG) {
15825 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
15827 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
15828 i40e_stat_str(&pf->hw, err),
15829 i40e_aq_str(&pf->hw,
15830 pf->hw.aq.asq_last_status));
15832 /* The main driver is (mostly) up and happy. We need to set this state
15833 * before setting up the misc vector or we get a race and the vector
15834 * ends up disabled forever.
15836 clear_bit(__I40E_DOWN, pf->state);
15838 /* In case of MSIX we are going to setup the misc vector right here
15839 * to handle admin queue events etc. In case of legacy and MSI
15840 * the misc functionality and queue processing is combined in
15841 * the same vector and that gets setup at open.
15843 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
15844 err = i40e_setup_misc_vector(pf);
15846 dev_info(&pdev->dev,
15847 "setup of misc vector failed: %d\n", err);
15848 i40e_cloud_filter_exit(pf);
15849 i40e_fdir_teardown(pf);
15854 #ifdef CONFIG_PCI_IOV
15855 /* prep for VF support */
15856 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
15857 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
15858 !test_bit(__I40E_BAD_EEPROM, pf->state)) {
15859 /* disable link interrupts for VFs */
15860 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
15861 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
15862 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
15865 if (pci_num_vf(pdev)) {
15866 dev_info(&pdev->dev,
15867 "Active VFs found, allocating resources.\n");
15868 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
15870 dev_info(&pdev->dev,
15871 "Error %d allocating resources for existing VFs\n",
15875 #endif /* CONFIG_PCI_IOV */
15877 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15878 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
15879 pf->num_iwarp_msix,
15880 I40E_IWARP_IRQ_PILE_ID);
15881 if (pf->iwarp_base_vector < 0) {
15882 dev_info(&pdev->dev,
15883 "failed to get tracking for %d vectors for IWARP err=%d\n",
15884 pf->num_iwarp_msix, pf->iwarp_base_vector);
15885 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
15889 i40e_dbg_pf_init(pf);
15891 /* tell the firmware that we're starting */
15892 i40e_send_version(pf);
15894 /* since everything's happy, start the service_task timer */
15895 mod_timer(&pf->service_timer,
15896 round_jiffies(jiffies + pf->service_timer_period));
15898 /* add this PF to client device list and launch a client service task */
15899 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
15900 err = i40e_lan_add_device(pf);
15902 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
15906 #define PCI_SPEED_SIZE 8
15907 #define PCI_WIDTH_SIZE 8
15908 /* Devices on the IOSF bus do not have this information
15909 * and will report PCI Gen 1 x 1 by default so don't bother
15912 if (!(pf->hw_features & I40E_HW_NO_PCI_LINK_CHECK)) {
15913 char speed[PCI_SPEED_SIZE] = "Unknown";
15914 char width[PCI_WIDTH_SIZE] = "Unknown";
15916 /* Get the negotiated link width and speed from PCI config
15919 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
15922 i40e_set_pci_config_data(hw, link_status);
15924 switch (hw->bus.speed) {
15925 case i40e_bus_speed_8000:
15926 strlcpy(speed, "8.0", PCI_SPEED_SIZE); break;
15927 case i40e_bus_speed_5000:
15928 strlcpy(speed, "5.0", PCI_SPEED_SIZE); break;
15929 case i40e_bus_speed_2500:
15930 strlcpy(speed, "2.5", PCI_SPEED_SIZE); break;
15934 switch (hw->bus.width) {
15935 case i40e_bus_width_pcie_x8:
15936 strlcpy(width, "8", PCI_WIDTH_SIZE); break;
15937 case i40e_bus_width_pcie_x4:
15938 strlcpy(width, "4", PCI_WIDTH_SIZE); break;
15939 case i40e_bus_width_pcie_x2:
15940 strlcpy(width, "2", PCI_WIDTH_SIZE); break;
15941 case i40e_bus_width_pcie_x1:
15942 strlcpy(width, "1", PCI_WIDTH_SIZE); break;
15947 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
15950 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
15951 hw->bus.speed < i40e_bus_speed_8000) {
15952 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
15953 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
15957 /* get the requested speeds from the fw */
15958 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
15960 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
15961 i40e_stat_str(&pf->hw, err),
15962 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15963 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
15965 /* set the FEC config due to the board capabilities */
15966 i40e_set_fec_in_flags(abilities.fec_cfg_curr_mod_ext_info, &pf->flags);
15968 /* get the supported phy types from the fw */
15969 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
15971 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
15972 i40e_stat_str(&pf->hw, err),
15973 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
15975 /* make sure the MFS hasn't been set lower than the default */
15976 #define MAX_FRAME_SIZE_DEFAULT 0x2600
15977 val = (rd32(&pf->hw, I40E_PRTGL_SAH) &
15978 I40E_PRTGL_SAH_MFS_MASK) >> I40E_PRTGL_SAH_MFS_SHIFT;
15979 if (val < MAX_FRAME_SIZE_DEFAULT)
15980 dev_warn(&pdev->dev, "MFS for port %x has been set below the default: %x\n",
15983 /* Add a filter to drop all Flow control frames from any VSI from being
15984 * transmitted. By doing so we stop a malicious VF from sending out
15985 * PAUSE or PFC frames and potentially controlling traffic for other
15987 * The FW can still send Flow control frames if enabled.
15989 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
15990 pf->main_vsi_seid);
15992 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
15993 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
15994 pf->hw_features |= I40E_HW_PHY_CONTROLS_LEDS;
15995 if (pf->hw.device_id == I40E_DEV_ID_SFP_I_X722)
15996 pf->hw_features |= I40E_HW_HAVE_CRT_RETIMER;
15997 /* print a string summarizing features */
15998 i40e_print_features(pf);
16002 /* Unwind what we've done if something failed in the setup */
16004 set_bit(__I40E_DOWN, pf->state);
16005 i40e_clear_interrupt_scheme(pf);
16008 i40e_reset_interrupt_capability(pf);
16009 del_timer_sync(&pf->service_timer);
16011 err_configure_lan_hmc:
16012 (void)i40e_shutdown_lan_hmc(hw);
16014 kfree(pf->qp_pile);
16018 iounmap(hw->hw_addr);
16022 pci_disable_pcie_error_reporting(pdev);
16023 pci_release_mem_regions(pdev);
16026 pci_disable_device(pdev);
16031 * i40e_remove - Device removal routine
16032 * @pdev: PCI device information struct
16034 * i40e_remove is called by the PCI subsystem to alert the driver
16035 * that is should release a PCI device. This could be caused by a
16036 * Hot-Plug event, or because the driver is going to be removed from
16039 static void i40e_remove(struct pci_dev *pdev)
16041 struct i40e_pf *pf = pci_get_drvdata(pdev);
16042 struct i40e_hw *hw = &pf->hw;
16043 i40e_status ret_code;
16046 i40e_dbg_pf_exit(pf);
16050 /* Disable RSS in hw */
16051 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
16052 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
16054 /* Grab __I40E_RESET_RECOVERY_PENDING and set __I40E_IN_REMOVE
16055 * flags, once they are set, i40e_rebuild should not be called as
16056 * i40e_prep_for_reset always returns early.
16058 while (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, pf->state))
16059 usleep_range(1000, 2000);
16060 set_bit(__I40E_IN_REMOVE, pf->state);
16062 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
16063 set_bit(__I40E_VF_RESETS_DISABLED, pf->state);
16065 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
16067 /* no more scheduling of any task */
16068 set_bit(__I40E_SUSPENDED, pf->state);
16069 set_bit(__I40E_DOWN, pf->state);
16070 if (pf->service_timer.function)
16071 del_timer_sync(&pf->service_timer);
16072 if (pf->service_task.func)
16073 cancel_work_sync(&pf->service_task);
16075 if (test_bit(__I40E_RECOVERY_MODE, pf->state)) {
16076 struct i40e_vsi *vsi = pf->vsi[0];
16078 /* We know that we have allocated only one vsi for this PF,
16079 * it was just for registering netdevice, so the interface
16080 * could be visible in the 'ifconfig' output
16082 unregister_netdev(vsi->netdev);
16083 free_netdev(vsi->netdev);
16088 /* Client close must be called explicitly here because the timer
16089 * has been stopped.
16091 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16093 i40e_fdir_teardown(pf);
16095 /* If there is a switch structure or any orphans, remove them.
16096 * This will leave only the PF's VSI remaining.
16098 for (i = 0; i < I40E_MAX_VEB; i++) {
16102 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
16103 pf->veb[i]->uplink_seid == 0)
16104 i40e_switch_branch_release(pf->veb[i]);
16107 /* Now we can shutdown the PF's VSI, just before we kill
16110 if (pf->vsi[pf->lan_vsi])
16111 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
16113 i40e_cloud_filter_exit(pf);
16115 /* remove attached clients */
16116 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
16117 ret_code = i40e_lan_del_device(pf);
16119 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
16123 /* shutdown and destroy the HMC */
16124 if (hw->hmc.hmc_obj) {
16125 ret_code = i40e_shutdown_lan_hmc(hw);
16127 dev_warn(&pdev->dev,
16128 "Failed to destroy the HMC resources: %d\n",
16133 /* Free MSI/legacy interrupt 0 when in recovery mode. */
16134 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16135 !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16136 free_irq(pf->pdev->irq, pf);
16138 /* shutdown the adminq */
16139 i40e_shutdown_adminq(hw);
16141 /* destroy the locks only once, here */
16142 mutex_destroy(&hw->aq.arq_mutex);
16143 mutex_destroy(&hw->aq.asq_mutex);
16145 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
16147 i40e_clear_interrupt_scheme(pf);
16148 for (i = 0; i < pf->num_alloc_vsi; i++) {
16150 if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
16151 i40e_vsi_clear_rings(pf->vsi[i]);
16152 i40e_vsi_clear(pf->vsi[i]);
16158 for (i = 0; i < I40E_MAX_VEB; i++) {
16163 kfree(pf->qp_pile);
16166 iounmap(hw->hw_addr);
16168 pci_release_mem_regions(pdev);
16170 pci_disable_pcie_error_reporting(pdev);
16171 pci_disable_device(pdev);
16175 * i40e_pci_error_detected - warning that something funky happened in PCI land
16176 * @pdev: PCI device information struct
16177 * @error: the type of PCI error
16179 * Called to warn that something happened and the error handling steps
16180 * are in progress. Allows the driver to quiesce things, be ready for
16183 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
16184 pci_channel_state_t error)
16186 struct i40e_pf *pf = pci_get_drvdata(pdev);
16188 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
16191 dev_info(&pdev->dev,
16192 "Cannot recover - error happened during device probe\n");
16193 return PCI_ERS_RESULT_DISCONNECT;
16196 /* shutdown all operations */
16197 if (!test_bit(__I40E_SUSPENDED, pf->state))
16198 i40e_prep_for_reset(pf);
16200 /* Request a slot reset */
16201 return PCI_ERS_RESULT_NEED_RESET;
16205 * i40e_pci_error_slot_reset - a PCI slot reset just happened
16206 * @pdev: PCI device information struct
16208 * Called to find if the driver can work with the device now that
16209 * the pci slot has been reset. If a basic connection seems good
16210 * (registers are readable and have sane content) then return a
16211 * happy little PCI_ERS_RESULT_xxx.
16213 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
16215 struct i40e_pf *pf = pci_get_drvdata(pdev);
16216 pci_ers_result_t result;
16219 dev_dbg(&pdev->dev, "%s\n", __func__);
16220 if (pci_enable_device_mem(pdev)) {
16221 dev_info(&pdev->dev,
16222 "Cannot re-enable PCI device after reset.\n");
16223 result = PCI_ERS_RESULT_DISCONNECT;
16225 pci_set_master(pdev);
16226 pci_restore_state(pdev);
16227 pci_save_state(pdev);
16228 pci_wake_from_d3(pdev, false);
16230 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
16232 result = PCI_ERS_RESULT_RECOVERED;
16234 result = PCI_ERS_RESULT_DISCONNECT;
16241 * i40e_pci_error_reset_prepare - prepare device driver for pci reset
16242 * @pdev: PCI device information struct
16244 static void i40e_pci_error_reset_prepare(struct pci_dev *pdev)
16246 struct i40e_pf *pf = pci_get_drvdata(pdev);
16248 i40e_prep_for_reset(pf);
16252 * i40e_pci_error_reset_done - pci reset done, device driver reset can begin
16253 * @pdev: PCI device information struct
16255 static void i40e_pci_error_reset_done(struct pci_dev *pdev)
16257 struct i40e_pf *pf = pci_get_drvdata(pdev);
16259 if (test_bit(__I40E_IN_REMOVE, pf->state))
16262 i40e_reset_and_rebuild(pf, false, false);
16266 * i40e_pci_error_resume - restart operations after PCI error recovery
16267 * @pdev: PCI device information struct
16269 * Called to allow the driver to bring things back up after PCI error
16270 * and/or reset recovery has finished.
16272 static void i40e_pci_error_resume(struct pci_dev *pdev)
16274 struct i40e_pf *pf = pci_get_drvdata(pdev);
16276 dev_dbg(&pdev->dev, "%s\n", __func__);
16277 if (test_bit(__I40E_SUSPENDED, pf->state))
16280 i40e_handle_reset_warning(pf, false);
16284 * i40e_enable_mc_magic_wake - enable multicast magic packet wake up
16285 * using the mac_address_write admin q function
16286 * @pf: pointer to i40e_pf struct
16288 static void i40e_enable_mc_magic_wake(struct i40e_pf *pf)
16290 struct i40e_hw *hw = &pf->hw;
16295 /* Get current MAC address in case it's an LAA */
16296 if (pf->vsi[pf->lan_vsi] && pf->vsi[pf->lan_vsi]->netdev) {
16297 ether_addr_copy(mac_addr,
16298 pf->vsi[pf->lan_vsi]->netdev->dev_addr);
16300 dev_err(&pf->pdev->dev,
16301 "Failed to retrieve MAC address; using default\n");
16302 ether_addr_copy(mac_addr, hw->mac.addr);
16305 /* The FW expects the mac address write cmd to first be called with
16306 * one of these flags before calling it again with the multicast
16309 flags = I40E_AQC_WRITE_TYPE_LAA_WOL;
16311 if (hw->func_caps.flex10_enable && hw->partition_id != 1)
16312 flags = I40E_AQC_WRITE_TYPE_LAA_ONLY;
16314 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16316 dev_err(&pf->pdev->dev,
16317 "Failed to update MAC address registers; cannot enable Multicast Magic packet wake up");
16321 flags = I40E_AQC_MC_MAG_EN
16322 | I40E_AQC_WOL_PRESERVE_ON_PFR
16323 | I40E_AQC_WRITE_TYPE_UPDATE_MC_MAG;
16324 ret = i40e_aq_mac_address_write(hw, flags, mac_addr, NULL);
16326 dev_err(&pf->pdev->dev,
16327 "Failed to enable Multicast Magic Packet wake up\n");
16331 * i40e_shutdown - PCI callback for shutting down
16332 * @pdev: PCI device information struct
16334 static void i40e_shutdown(struct pci_dev *pdev)
16336 struct i40e_pf *pf = pci_get_drvdata(pdev);
16337 struct i40e_hw *hw = &pf->hw;
16339 set_bit(__I40E_SUSPENDED, pf->state);
16340 set_bit(__I40E_DOWN, pf->state);
16342 del_timer_sync(&pf->service_timer);
16343 cancel_work_sync(&pf->service_task);
16344 i40e_cloud_filter_exit(pf);
16345 i40e_fdir_teardown(pf);
16347 /* Client close must be called explicitly here because the timer
16348 * has been stopped.
16350 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16352 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16353 i40e_enable_mc_magic_wake(pf);
16355 i40e_prep_for_reset(pf);
16357 wr32(hw, I40E_PFPM_APM,
16358 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16359 wr32(hw, I40E_PFPM_WUFC,
16360 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16362 /* Free MSI/legacy interrupt 0 when in recovery mode. */
16363 if (test_bit(__I40E_RECOVERY_MODE, pf->state) &&
16364 !(pf->flags & I40E_FLAG_MSIX_ENABLED))
16365 free_irq(pf->pdev->irq, pf);
16367 /* Since we're going to destroy queues during the
16368 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16372 i40e_clear_interrupt_scheme(pf);
16375 if (system_state == SYSTEM_POWER_OFF) {
16376 pci_wake_from_d3(pdev, pf->wol_en);
16377 pci_set_power_state(pdev, PCI_D3hot);
16382 * i40e_suspend - PM callback for moving to D3
16383 * @dev: generic device information structure
16385 static int __maybe_unused i40e_suspend(struct device *dev)
16387 struct i40e_pf *pf = dev_get_drvdata(dev);
16388 struct i40e_hw *hw = &pf->hw;
16390 /* If we're already suspended, then there is nothing to do */
16391 if (test_and_set_bit(__I40E_SUSPENDED, pf->state))
16394 set_bit(__I40E_DOWN, pf->state);
16396 /* Ensure service task will not be running */
16397 del_timer_sync(&pf->service_timer);
16398 cancel_work_sync(&pf->service_task);
16400 /* Client close must be called explicitly here because the timer
16401 * has been stopped.
16403 i40e_notify_client_of_netdev_close(pf->vsi[pf->lan_vsi], false);
16405 if (pf->wol_en && (pf->hw_features & I40E_HW_WOL_MC_MAGIC_PKT_WAKE))
16406 i40e_enable_mc_magic_wake(pf);
16408 /* Since we're going to destroy queues during the
16409 * i40e_clear_interrupt_scheme() we should hold the RTNL lock for this
16414 i40e_prep_for_reset(pf);
16416 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
16417 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
16419 /* Clear the interrupt scheme and release our IRQs so that the system
16420 * can safely hibernate even when there are a large number of CPUs.
16421 * Otherwise hibernation might fail when mapping all the vectors back
16424 i40e_clear_interrupt_scheme(pf);
16432 * i40e_resume - PM callback for waking up from D3
16433 * @dev: generic device information structure
16435 static int __maybe_unused i40e_resume(struct device *dev)
16437 struct i40e_pf *pf = dev_get_drvdata(dev);
16440 /* If we're not suspended, then there is nothing to do */
16441 if (!test_bit(__I40E_SUSPENDED, pf->state))
16444 /* We need to hold the RTNL lock prior to restoring interrupt schemes,
16445 * since we're going to be restoring queues
16449 /* We cleared the interrupt scheme when we suspended, so we need to
16450 * restore it now to resume device functionality.
16452 err = i40e_restore_interrupt_scheme(pf);
16454 dev_err(dev, "Cannot restore interrupt scheme: %d\n",
16458 clear_bit(__I40E_DOWN, pf->state);
16459 i40e_reset_and_rebuild(pf, false, true);
16463 /* Clear suspended state last after everything is recovered */
16464 clear_bit(__I40E_SUSPENDED, pf->state);
16466 /* Restart the service task */
16467 mod_timer(&pf->service_timer,
16468 round_jiffies(jiffies + pf->service_timer_period));
16473 static const struct pci_error_handlers i40e_err_handler = {
16474 .error_detected = i40e_pci_error_detected,
16475 .slot_reset = i40e_pci_error_slot_reset,
16476 .reset_prepare = i40e_pci_error_reset_prepare,
16477 .reset_done = i40e_pci_error_reset_done,
16478 .resume = i40e_pci_error_resume,
16481 static SIMPLE_DEV_PM_OPS(i40e_pm_ops, i40e_suspend, i40e_resume);
16483 static struct pci_driver i40e_driver = {
16484 .name = i40e_driver_name,
16485 .id_table = i40e_pci_tbl,
16486 .probe = i40e_probe,
16487 .remove = i40e_remove,
16489 .pm = &i40e_pm_ops,
16491 .shutdown = i40e_shutdown,
16492 .err_handler = &i40e_err_handler,
16493 .sriov_configure = i40e_pci_sriov_configure,
16497 * i40e_init_module - Driver registration routine
16499 * i40e_init_module is the first routine called when the driver is
16500 * loaded. All it does is register with the PCI subsystem.
16502 static int __init i40e_init_module(void)
16504 pr_info("%s: %s\n", i40e_driver_name, i40e_driver_string);
16505 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
16507 /* There is no need to throttle the number of active tasks because
16508 * each device limits its own task using a state bit for scheduling
16509 * the service task, and the device tasks do not interfere with each
16510 * other, so we don't set a max task limit. We must set WQ_MEM_RECLAIM
16511 * since we need to be able to guarantee forward progress even under
16514 i40e_wq = alloc_workqueue("%s", WQ_MEM_RECLAIM, 0, i40e_driver_name);
16516 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
16521 return pci_register_driver(&i40e_driver);
16523 module_init(i40e_init_module);
16526 * i40e_exit_module - Driver exit cleanup routine
16528 * i40e_exit_module is called just before the driver is removed
16531 static void __exit i40e_exit_module(void)
16533 pci_unregister_driver(&i40e_driver);
16534 destroy_workqueue(i40e_wq);
16535 ida_destroy(&i40e_client_ida);
16538 module_exit(i40e_exit_module);