1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Intel Corporation. */
4 /* The driver transmit and receive code */
7 #include <linux/netdevice.h>
8 #include <linux/prefetch.h>
9 #include <linux/bpf_trace.h>
10 #include <net/dsfield.h>
13 #include "ice_txrx_lib.h"
16 #include "ice_trace.h"
17 #include "ice_dcb_lib.h"
19 #include "ice_eswitch.h"
21 #define ICE_RX_HDR_SIZE 256
23 #define FDIR_DESC_RXDID 0x40
24 #define ICE_FDIR_CLEAN_DELAY 10
27 * ice_prgm_fdir_fltr - Program a Flow Director filter
28 * @vsi: VSI to send dummy packet
29 * @fdir_desc: flow director descriptor
30 * @raw_packet: allocated buffer for flow director
33 ice_prgm_fdir_fltr(struct ice_vsi *vsi, struct ice_fltr_desc *fdir_desc,
36 struct ice_tx_buf *tx_buf, *first;
37 struct ice_fltr_desc *f_desc;
38 struct ice_tx_desc *tx_desc;
39 struct ice_tx_ring *tx_ring;
48 tx_ring = vsi->tx_rings[0];
49 if (!tx_ring || !tx_ring->desc)
53 /* we are using two descriptors to add/del a filter and we can wait */
54 for (i = ICE_FDIR_CLEAN_DELAY; ICE_DESC_UNUSED(tx_ring) < 2; i--) {
57 msleep_interruptible(1);
60 dma = dma_map_single(dev, raw_packet, ICE_FDIR_MAX_RAW_PKT_SIZE,
63 if (dma_mapping_error(dev, dma))
66 /* grab the next descriptor */
67 i = tx_ring->next_to_use;
68 first = &tx_ring->tx_buf[i];
69 f_desc = ICE_TX_FDIRDESC(tx_ring, i);
70 memcpy(f_desc, fdir_desc, sizeof(*f_desc));
73 i = (i < tx_ring->count) ? i : 0;
74 tx_desc = ICE_TX_DESC(tx_ring, i);
75 tx_buf = &tx_ring->tx_buf[i];
78 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
80 memset(tx_buf, 0, sizeof(*tx_buf));
81 dma_unmap_len_set(tx_buf, len, ICE_FDIR_MAX_RAW_PKT_SIZE);
82 dma_unmap_addr_set(tx_buf, dma, dma);
84 tx_desc->buf_addr = cpu_to_le64(dma);
85 td_cmd = ICE_TXD_LAST_DESC_CMD | ICE_TX_DESC_CMD_DUMMY |
88 tx_buf->tx_flags = ICE_TX_FLAGS_DUMMY_PKT;
89 tx_buf->raw_buf = raw_packet;
91 tx_desc->cmd_type_offset_bsz =
92 ice_build_ctob(td_cmd, 0, ICE_FDIR_MAX_RAW_PKT_SIZE, 0);
94 /* Force memory write to complete before letting h/w know
95 * there are new descriptors to fetch.
99 /* mark the data descriptor to be watched */
100 first->next_to_watch = tx_desc;
102 writel(tx_ring->next_to_use, tx_ring->tail);
108 * ice_unmap_and_free_tx_buf - Release a Tx buffer
109 * @ring: the ring that owns the buffer
110 * @tx_buf: the buffer to free
113 ice_unmap_and_free_tx_buf(struct ice_tx_ring *ring, struct ice_tx_buf *tx_buf)
116 if (tx_buf->tx_flags & ICE_TX_FLAGS_DUMMY_PKT)
117 devm_kfree(ring->dev, tx_buf->raw_buf);
118 else if (ice_ring_is_xdp(ring))
119 page_frag_free(tx_buf->raw_buf);
121 dev_kfree_skb_any(tx_buf->skb);
122 if (dma_unmap_len(tx_buf, len))
123 dma_unmap_single(ring->dev,
124 dma_unmap_addr(tx_buf, dma),
125 dma_unmap_len(tx_buf, len),
127 } else if (dma_unmap_len(tx_buf, len)) {
128 dma_unmap_page(ring->dev,
129 dma_unmap_addr(tx_buf, dma),
130 dma_unmap_len(tx_buf, len),
134 tx_buf->next_to_watch = NULL;
136 dma_unmap_len_set(tx_buf, len, 0);
137 /* tx_buf must be completely set up in the transmit path */
140 static struct netdev_queue *txring_txq(const struct ice_tx_ring *ring)
142 return netdev_get_tx_queue(ring->netdev, ring->q_index);
146 * ice_clean_tx_ring - Free any empty Tx buffers
147 * @tx_ring: ring to be cleaned
149 void ice_clean_tx_ring(struct ice_tx_ring *tx_ring)
154 if (ice_ring_is_xdp(tx_ring) && tx_ring->xsk_pool) {
155 ice_xsk_clean_xdp_ring(tx_ring);
159 /* ring already cleared, nothing to do */
160 if (!tx_ring->tx_buf)
163 /* Free all the Tx ring sk_buffs */
164 for (i = 0; i < tx_ring->count; i++)
165 ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
168 memset(tx_ring->tx_buf, 0, sizeof(*tx_ring->tx_buf) * tx_ring->count);
170 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
172 /* Zero out the descriptor ring */
173 memset(tx_ring->desc, 0, size);
175 tx_ring->next_to_use = 0;
176 tx_ring->next_to_clean = 0;
177 tx_ring->next_dd = ICE_RING_QUARTER(tx_ring) - 1;
178 tx_ring->next_rs = ICE_RING_QUARTER(tx_ring) - 1;
180 if (!tx_ring->netdev)
183 /* cleanup Tx queue statistics */
184 netdev_tx_reset_queue(txring_txq(tx_ring));
188 * ice_free_tx_ring - Free Tx resources per queue
189 * @tx_ring: Tx descriptor ring for a specific queue
191 * Free all transmit software resources
193 void ice_free_tx_ring(struct ice_tx_ring *tx_ring)
197 ice_clean_tx_ring(tx_ring);
198 devm_kfree(tx_ring->dev, tx_ring->tx_buf);
199 tx_ring->tx_buf = NULL;
202 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
204 dmam_free_coherent(tx_ring->dev, size,
205 tx_ring->desc, tx_ring->dma);
206 tx_ring->desc = NULL;
211 * ice_clean_tx_irq - Reclaim resources after transmit completes
212 * @tx_ring: Tx ring to clean
213 * @napi_budget: Used to determine if we are in netpoll
215 * Returns true if there's any budget left (e.g. the clean is finished)
217 static bool ice_clean_tx_irq(struct ice_tx_ring *tx_ring, int napi_budget)
219 unsigned int total_bytes = 0, total_pkts = 0;
220 unsigned int budget = ICE_DFLT_IRQ_WORK;
221 struct ice_vsi *vsi = tx_ring->vsi;
222 s16 i = tx_ring->next_to_clean;
223 struct ice_tx_desc *tx_desc;
224 struct ice_tx_buf *tx_buf;
226 /* get the bql data ready */
227 netdev_txq_bql_complete_prefetchw(txring_txq(tx_ring));
229 tx_buf = &tx_ring->tx_buf[i];
230 tx_desc = ICE_TX_DESC(tx_ring, i);
233 prefetch(&vsi->state);
236 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
238 /* if next_to_watch is not set then there is no work pending */
242 /* follow the guidelines of other drivers */
243 prefetchw(&tx_buf->skb->users);
245 smp_rmb(); /* prevent any other reads prior to eop_desc */
247 ice_trace(clean_tx_irq, tx_ring, tx_desc, tx_buf);
248 /* if the descriptor isn't done, no work yet to do */
249 if (!(eop_desc->cmd_type_offset_bsz &
250 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
253 /* clear next_to_watch to prevent false hangs */
254 tx_buf->next_to_watch = NULL;
256 /* update the statistics for this packet */
257 total_bytes += tx_buf->bytecount;
258 total_pkts += tx_buf->gso_segs;
261 napi_consume_skb(tx_buf->skb, napi_budget);
263 /* unmap skb header data */
264 dma_unmap_single(tx_ring->dev,
265 dma_unmap_addr(tx_buf, dma),
266 dma_unmap_len(tx_buf, len),
269 /* clear tx_buf data */
271 dma_unmap_len_set(tx_buf, len, 0);
273 /* unmap remaining buffers */
274 while (tx_desc != eop_desc) {
275 ice_trace(clean_tx_irq_unmap, tx_ring, tx_desc, tx_buf);
281 tx_buf = tx_ring->tx_buf;
282 tx_desc = ICE_TX_DESC(tx_ring, 0);
285 /* unmap any remaining paged data */
286 if (dma_unmap_len(tx_buf, len)) {
287 dma_unmap_page(tx_ring->dev,
288 dma_unmap_addr(tx_buf, dma),
289 dma_unmap_len(tx_buf, len),
291 dma_unmap_len_set(tx_buf, len, 0);
294 ice_trace(clean_tx_irq_unmap_eop, tx_ring, tx_desc, tx_buf);
296 /* move us one more past the eop_desc for start of next pkt */
302 tx_buf = tx_ring->tx_buf;
303 tx_desc = ICE_TX_DESC(tx_ring, 0);
308 /* update budget accounting */
310 } while (likely(budget));
313 tx_ring->next_to_clean = i;
315 ice_update_tx_ring_stats(tx_ring, total_pkts, total_bytes);
316 netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts, total_bytes);
318 #define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
319 if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
320 (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
321 /* Make sure that anybody stopping the queue after this
322 * sees the new next_to_clean.
325 if (netif_tx_queue_stopped(txring_txq(tx_ring)) &&
326 !test_bit(ICE_VSI_DOWN, vsi->state)) {
327 netif_tx_wake_queue(txring_txq(tx_ring));
328 ++tx_ring->tx_stats.restart_q;
336 * ice_setup_tx_ring - Allocate the Tx descriptors
337 * @tx_ring: the Tx ring to set up
339 * Return 0 on success, negative on error
341 int ice_setup_tx_ring(struct ice_tx_ring *tx_ring)
343 struct device *dev = tx_ring->dev;
349 /* warn if we are about to overwrite the pointer */
350 WARN_ON(tx_ring->tx_buf);
352 devm_kcalloc(dev, sizeof(*tx_ring->tx_buf), tx_ring->count,
354 if (!tx_ring->tx_buf)
357 /* round up to nearest page */
358 size = ALIGN(tx_ring->count * sizeof(struct ice_tx_desc),
360 tx_ring->desc = dmam_alloc_coherent(dev, size, &tx_ring->dma,
362 if (!tx_ring->desc) {
363 dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
368 tx_ring->next_to_use = 0;
369 tx_ring->next_to_clean = 0;
370 tx_ring->tx_stats.prev_pkt = -1;
374 devm_kfree(dev, tx_ring->tx_buf);
375 tx_ring->tx_buf = NULL;
380 * ice_clean_rx_ring - Free Rx buffers
381 * @rx_ring: ring to be cleaned
383 void ice_clean_rx_ring(struct ice_rx_ring *rx_ring)
385 struct device *dev = rx_ring->dev;
389 /* ring already cleared, nothing to do */
390 if (!rx_ring->rx_buf)
394 dev_kfree_skb(rx_ring->skb);
398 if (rx_ring->xsk_pool) {
399 ice_xsk_clean_rx_ring(rx_ring);
403 /* Free all the Rx ring sk_buffs */
404 for (i = 0; i < rx_ring->count; i++) {
405 struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
410 /* Invalidate cache lines that may have been written to by
411 * device so that we avoid corrupting memory.
413 dma_sync_single_range_for_cpu(dev, rx_buf->dma,
418 /* free resources associated with mapping */
419 dma_unmap_page_attrs(dev, rx_buf->dma, ice_rx_pg_size(rx_ring),
420 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
421 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
424 rx_buf->page_offset = 0;
428 if (rx_ring->xsk_pool)
429 memset(rx_ring->xdp_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->xdp_buf)));
431 memset(rx_ring->rx_buf, 0, array_size(rx_ring->count, sizeof(*rx_ring->rx_buf)));
433 /* Zero out the descriptor ring */
434 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
436 memset(rx_ring->desc, 0, size);
438 rx_ring->next_to_alloc = 0;
439 rx_ring->next_to_clean = 0;
440 rx_ring->next_to_use = 0;
444 * ice_free_rx_ring - Free Rx resources
445 * @rx_ring: ring to clean the resources from
447 * Free all receive software resources
449 void ice_free_rx_ring(struct ice_rx_ring *rx_ring)
453 ice_clean_rx_ring(rx_ring);
454 if (rx_ring->vsi->type == ICE_VSI_PF)
455 if (xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
456 xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
457 rx_ring->xdp_prog = NULL;
458 if (rx_ring->xsk_pool) {
459 kfree(rx_ring->xdp_buf);
460 rx_ring->xdp_buf = NULL;
462 kfree(rx_ring->rx_buf);
463 rx_ring->rx_buf = NULL;
467 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
469 dmam_free_coherent(rx_ring->dev, size,
470 rx_ring->desc, rx_ring->dma);
471 rx_ring->desc = NULL;
476 * ice_setup_rx_ring - Allocate the Rx descriptors
477 * @rx_ring: the Rx ring to set up
479 * Return 0 on success, negative on error
481 int ice_setup_rx_ring(struct ice_rx_ring *rx_ring)
483 struct device *dev = rx_ring->dev;
489 /* warn if we are about to overwrite the pointer */
490 WARN_ON(rx_ring->rx_buf);
492 kcalloc(rx_ring->count, sizeof(*rx_ring->rx_buf), GFP_KERNEL);
493 if (!rx_ring->rx_buf)
496 /* round up to nearest page */
497 size = ALIGN(rx_ring->count * sizeof(union ice_32byte_rx_desc),
499 rx_ring->desc = dmam_alloc_coherent(dev, size, &rx_ring->dma,
501 if (!rx_ring->desc) {
502 dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
507 rx_ring->next_to_use = 0;
508 rx_ring->next_to_clean = 0;
510 if (ice_is_xdp_ena_vsi(rx_ring->vsi))
511 WRITE_ONCE(rx_ring->xdp_prog, rx_ring->vsi->xdp_prog);
513 if (rx_ring->vsi->type == ICE_VSI_PF &&
514 !xdp_rxq_info_is_reg(&rx_ring->xdp_rxq))
515 if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, rx_ring->netdev,
516 rx_ring->q_index, rx_ring->q_vector->napi.napi_id))
521 kfree(rx_ring->rx_buf);
522 rx_ring->rx_buf = NULL;
527 ice_rx_frame_truesize(struct ice_rx_ring *rx_ring, unsigned int __maybe_unused size)
529 unsigned int truesize;
531 #if (PAGE_SIZE < 8192)
532 truesize = ice_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
534 truesize = rx_ring->rx_offset ?
535 SKB_DATA_ALIGN(rx_ring->rx_offset + size) +
536 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
537 SKB_DATA_ALIGN(size);
543 * ice_run_xdp - Executes an XDP program on initialized xdp_buff
545 * @xdp: xdp_buff used as input to the XDP program
546 * @xdp_prog: XDP program to run
547 * @xdp_ring: ring to be used for XDP_TX action
549 * Returns any of ICE_XDP_{PASS, CONSUMED, TX, REDIR}
552 ice_run_xdp(struct ice_rx_ring *rx_ring, struct xdp_buff *xdp,
553 struct bpf_prog *xdp_prog, struct ice_tx_ring *xdp_ring)
558 act = bpf_prog_run_xdp(xdp_prog, xdp);
563 if (static_branch_unlikely(&ice_xdp_locking_key))
564 spin_lock(&xdp_ring->tx_lock);
565 err = ice_xmit_xdp_ring(xdp->data, xdp->data_end - xdp->data, xdp_ring);
566 if (static_branch_unlikely(&ice_xdp_locking_key))
567 spin_unlock(&xdp_ring->tx_lock);
568 if (err == ICE_XDP_CONSUMED)
572 err = xdp_do_redirect(rx_ring->netdev, xdp, xdp_prog);
575 return ICE_XDP_REDIR;
577 bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act);
581 trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
584 return ICE_XDP_CONSUMED;
589 * ice_xdp_xmit - submit packets to XDP ring for transmission
591 * @n: number of XDP frames to be transmitted
592 * @frames: XDP frames to be transmitted
593 * @flags: transmit flags
595 * Returns number of frames successfully sent. Failed frames
596 * will be free'ed by XDP core.
597 * For error cases, a negative errno code is returned and no-frames
598 * are transmitted (caller must handle freeing frames).
601 ice_xdp_xmit(struct net_device *dev, int n, struct xdp_frame **frames,
604 struct ice_netdev_priv *np = netdev_priv(dev);
605 unsigned int queue_index = smp_processor_id();
606 struct ice_vsi *vsi = np->vsi;
607 struct ice_tx_ring *xdp_ring;
610 if (test_bit(ICE_VSI_DOWN, vsi->state))
613 if (!ice_is_xdp_ena_vsi(vsi))
616 if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
619 if (static_branch_unlikely(&ice_xdp_locking_key)) {
620 queue_index %= vsi->num_xdp_txq;
621 xdp_ring = vsi->xdp_rings[queue_index];
622 spin_lock(&xdp_ring->tx_lock);
624 /* Generally, should not happen */
625 if (unlikely(queue_index >= vsi->num_xdp_txq))
627 xdp_ring = vsi->xdp_rings[queue_index];
630 for (i = 0; i < n; i++) {
631 struct xdp_frame *xdpf = frames[i];
634 err = ice_xmit_xdp_ring(xdpf->data, xdpf->len, xdp_ring);
635 if (err != ICE_XDP_TX)
640 if (unlikely(flags & XDP_XMIT_FLUSH))
641 ice_xdp_ring_update_tail(xdp_ring);
643 if (static_branch_unlikely(&ice_xdp_locking_key))
644 spin_unlock(&xdp_ring->tx_lock);
650 * ice_alloc_mapped_page - recycle or make a new page
651 * @rx_ring: ring to use
652 * @bi: rx_buf struct to modify
654 * Returns true if the page was successfully allocated or
658 ice_alloc_mapped_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *bi)
660 struct page *page = bi->page;
663 /* since we are recycling buffers we should seldom need to alloc */
667 /* alloc new page for storage */
668 page = dev_alloc_pages(ice_rx_pg_order(rx_ring));
669 if (unlikely(!page)) {
670 rx_ring->rx_stats.alloc_page_failed++;
674 /* map page for use */
675 dma = dma_map_page_attrs(rx_ring->dev, page, 0, ice_rx_pg_size(rx_ring),
676 DMA_FROM_DEVICE, ICE_RX_DMA_ATTR);
678 /* if mapping failed free memory back to system since
679 * there isn't much point in holding memory we can't use
681 if (dma_mapping_error(rx_ring->dev, dma)) {
682 __free_pages(page, ice_rx_pg_order(rx_ring));
683 rx_ring->rx_stats.alloc_page_failed++;
689 bi->page_offset = rx_ring->rx_offset;
690 page_ref_add(page, USHRT_MAX - 1);
691 bi->pagecnt_bias = USHRT_MAX;
697 * ice_alloc_rx_bufs - Replace used receive buffers
698 * @rx_ring: ring to place buffers on
699 * @cleaned_count: number of buffers to replace
701 * Returns false if all allocations were successful, true if any fail. Returning
702 * true signals to the caller that we didn't replace cleaned_count buffers and
703 * there is more work to do.
705 * First, try to clean "cleaned_count" Rx buffers. Then refill the cleaned Rx
706 * buffers. Then bump tail at most one time. Grouping like this lets us avoid
707 * multiple tail writes per call.
709 bool ice_alloc_rx_bufs(struct ice_rx_ring *rx_ring, u16 cleaned_count)
711 union ice_32b_rx_flex_desc *rx_desc;
712 u16 ntu = rx_ring->next_to_use;
713 struct ice_rx_buf *bi;
715 /* do nothing if no valid netdev defined */
716 if ((!rx_ring->netdev && rx_ring->vsi->type != ICE_VSI_CTRL) ||
720 /* get the Rx descriptor and buffer based on next_to_use */
721 rx_desc = ICE_RX_DESC(rx_ring, ntu);
722 bi = &rx_ring->rx_buf[ntu];
725 /* if we fail here, we have work remaining */
726 if (!ice_alloc_mapped_page(rx_ring, bi))
729 /* sync the buffer for use by the device */
730 dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
735 /* Refresh the desc even if buffer_addrs didn't change
736 * because each write-back erases this info.
738 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
743 if (unlikely(ntu == rx_ring->count)) {
744 rx_desc = ICE_RX_DESC(rx_ring, 0);
745 bi = rx_ring->rx_buf;
749 /* clear the status bits for the next_to_use descriptor */
750 rx_desc->wb.status_error0 = 0;
753 } while (cleaned_count);
755 if (rx_ring->next_to_use != ntu)
756 ice_release_rx_desc(rx_ring, ntu);
758 return !!cleaned_count;
762 * ice_rx_buf_adjust_pg_offset - Prepare Rx buffer for reuse
763 * @rx_buf: Rx buffer to adjust
764 * @size: Size of adjustment
766 * Update the offset within page so that Rx buf will be ready to be reused.
767 * For systems with PAGE_SIZE < 8192 this function will flip the page offset
768 * so the second half of page assigned to Rx buffer will be used, otherwise
769 * the offset is moved by "size" bytes
772 ice_rx_buf_adjust_pg_offset(struct ice_rx_buf *rx_buf, unsigned int size)
774 #if (PAGE_SIZE < 8192)
775 /* flip page offset to other buffer */
776 rx_buf->page_offset ^= size;
778 /* move offset up to the next cache line */
779 rx_buf->page_offset += size;
784 * ice_can_reuse_rx_page - Determine if page can be reused for another Rx
785 * @rx_buf: buffer containing the page
786 * @rx_buf_pgcnt: rx_buf page refcount pre xdp_do_redirect() call
788 * If page is reusable, we have a green light for calling ice_reuse_rx_page,
789 * which will assign the current buffer to the buffer that next_to_alloc is
790 * pointing to; otherwise, the DMA mapping needs to be destroyed and
794 ice_can_reuse_rx_page(struct ice_rx_buf *rx_buf, int rx_buf_pgcnt)
796 unsigned int pagecnt_bias = rx_buf->pagecnt_bias;
797 struct page *page = rx_buf->page;
799 /* avoid re-using remote and pfmemalloc pages */
800 if (!dev_page_is_reusable(page))
803 #if (PAGE_SIZE < 8192)
804 /* if we are only owner of page we can reuse it */
805 if (unlikely((rx_buf_pgcnt - pagecnt_bias) > 1))
808 #define ICE_LAST_OFFSET \
809 (SKB_WITH_OVERHEAD(PAGE_SIZE) - ICE_RXBUF_2048)
810 if (rx_buf->page_offset > ICE_LAST_OFFSET)
812 #endif /* PAGE_SIZE < 8192) */
814 /* If we have drained the page fragment pool we need to update
815 * the pagecnt_bias and page count so that we fully restock the
816 * number of references the driver holds.
818 if (unlikely(pagecnt_bias == 1)) {
819 page_ref_add(page, USHRT_MAX - 1);
820 rx_buf->pagecnt_bias = USHRT_MAX;
827 * ice_add_rx_frag - Add contents of Rx buffer to sk_buff as a frag
828 * @rx_ring: Rx descriptor ring to transact packets on
829 * @rx_buf: buffer containing page to add
830 * @skb: sk_buff to place the data into
831 * @size: packet length from rx_desc
833 * This function will add the data contained in rx_buf->page to the skb.
834 * It will just attach the page as a frag to the skb.
835 * The function will then update the page offset.
838 ice_add_rx_frag(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf,
839 struct sk_buff *skb, unsigned int size)
841 #if (PAGE_SIZE >= 8192)
842 unsigned int truesize = SKB_DATA_ALIGN(size + rx_ring->rx_offset);
844 unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
849 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buf->page,
850 rx_buf->page_offset, size, truesize);
852 /* page is being used so we must update the page offset */
853 ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
857 * ice_reuse_rx_page - page flip buffer and store it back on the ring
858 * @rx_ring: Rx descriptor ring to store buffers on
859 * @old_buf: donor buffer to have page reused
861 * Synchronizes page for reuse by the adapter
864 ice_reuse_rx_page(struct ice_rx_ring *rx_ring, struct ice_rx_buf *old_buf)
866 u16 nta = rx_ring->next_to_alloc;
867 struct ice_rx_buf *new_buf;
869 new_buf = &rx_ring->rx_buf[nta];
871 /* update, and store next to alloc */
873 rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
875 /* Transfer page from old buffer to new buffer.
876 * Move each member individually to avoid possible store
877 * forwarding stalls and unnecessary copy of skb.
879 new_buf->dma = old_buf->dma;
880 new_buf->page = old_buf->page;
881 new_buf->page_offset = old_buf->page_offset;
882 new_buf->pagecnt_bias = old_buf->pagecnt_bias;
886 * ice_get_rx_buf - Fetch Rx buffer and synchronize data for use
887 * @rx_ring: Rx descriptor ring to transact packets on
888 * @size: size of buffer to add to skb
889 * @rx_buf_pgcnt: rx_buf page refcount
891 * This function will pull an Rx buffer from the ring and synchronize it
892 * for use by the CPU.
894 static struct ice_rx_buf *
895 ice_get_rx_buf(struct ice_rx_ring *rx_ring, const unsigned int size,
898 struct ice_rx_buf *rx_buf;
900 rx_buf = &rx_ring->rx_buf[rx_ring->next_to_clean];
902 #if (PAGE_SIZE < 8192)
903 page_count(rx_buf->page);
907 prefetchw(rx_buf->page);
911 /* we are reusing so sync this buffer for CPU use */
912 dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
913 rx_buf->page_offset, size,
916 /* We have pulled a buffer for use, so decrement pagecnt_bias */
917 rx_buf->pagecnt_bias--;
923 * ice_build_skb - Build skb around an existing buffer
924 * @rx_ring: Rx descriptor ring to transact packets on
925 * @rx_buf: Rx buffer to pull data from
926 * @xdp: xdp_buff pointing to the data
928 * This function builds an skb around an existing Rx buffer, taking care
929 * to set up the skb correctly and avoid any memcpy overhead.
931 static struct sk_buff *
932 ice_build_skb(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf,
933 struct xdp_buff *xdp)
935 u8 metasize = xdp->data - xdp->data_meta;
936 #if (PAGE_SIZE < 8192)
937 unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
939 unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
940 SKB_DATA_ALIGN(xdp->data_end -
941 xdp->data_hard_start);
945 /* Prefetch first cache line of first page. If xdp->data_meta
946 * is unused, this points exactly as xdp->data, otherwise we
947 * likely have a consumer accessing first few bytes of meta
948 * data, and then actual data.
950 net_prefetch(xdp->data_meta);
951 /* build an skb around the page buffer */
952 skb = napi_build_skb(xdp->data_hard_start, truesize);
956 /* must to record Rx queue, otherwise OS features such as
957 * symmetric queue won't work
959 skb_record_rx_queue(skb, rx_ring->q_index);
961 /* update pointers within the skb to store the data */
962 skb_reserve(skb, xdp->data - xdp->data_hard_start);
963 __skb_put(skb, xdp->data_end - xdp->data);
965 skb_metadata_set(skb, metasize);
967 /* buffer is used by skb, update page_offset */
968 ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
974 * ice_construct_skb - Allocate skb and populate it
975 * @rx_ring: Rx descriptor ring to transact packets on
976 * @rx_buf: Rx buffer to pull data from
977 * @xdp: xdp_buff pointing to the data
979 * This function allocates an skb. It then populates it with the page
980 * data from the current receive descriptor, taking care to set up the
983 static struct sk_buff *
984 ice_construct_skb(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf,
985 struct xdp_buff *xdp)
987 unsigned int metasize = xdp->data - xdp->data_meta;
988 unsigned int size = xdp->data_end - xdp->data;
989 unsigned int headlen;
992 /* prefetch first cache line of first page */
993 net_prefetch(xdp->data_meta);
995 /* allocate a skb to store the frags */
996 skb = __napi_alloc_skb(&rx_ring->q_vector->napi,
997 ICE_RX_HDR_SIZE + metasize,
998 GFP_ATOMIC | __GFP_NOWARN);
1002 skb_record_rx_queue(skb, rx_ring->q_index);
1003 /* Determine available headroom for copy */
1005 if (headlen > ICE_RX_HDR_SIZE)
1006 headlen = eth_get_headlen(skb->dev, xdp->data, ICE_RX_HDR_SIZE);
1008 /* align pull length to size of long to optimize memcpy performance */
1009 memcpy(__skb_put(skb, headlen + metasize), xdp->data_meta,
1010 ALIGN(headlen + metasize, sizeof(long)));
1013 skb_metadata_set(skb, metasize);
1014 __skb_pull(skb, metasize);
1017 /* if we exhaust the linear part then add what is left as a frag */
1020 #if (PAGE_SIZE >= 8192)
1021 unsigned int truesize = SKB_DATA_ALIGN(size);
1023 unsigned int truesize = ice_rx_pg_size(rx_ring) / 2;
1025 skb_add_rx_frag(skb, 0, rx_buf->page,
1026 rx_buf->page_offset + headlen, size, truesize);
1027 /* buffer is used by skb, update page_offset */
1028 ice_rx_buf_adjust_pg_offset(rx_buf, truesize);
1030 /* buffer is unused, reset bias back to rx_buf; data was copied
1031 * onto skb's linear part so there's no need for adjusting
1032 * page offset and we can reuse this buffer as-is
1034 rx_buf->pagecnt_bias++;
1041 * ice_put_rx_buf - Clean up used buffer and either recycle or free
1042 * @rx_ring: Rx descriptor ring to transact packets on
1043 * @rx_buf: Rx buffer to pull data from
1044 * @rx_buf_pgcnt: Rx buffer page count pre xdp_do_redirect()
1046 * This function will update next_to_clean and then clean up the contents
1047 * of the rx_buf. It will either recycle the buffer or unmap it and free
1048 * the associated resources.
1051 ice_put_rx_buf(struct ice_rx_ring *rx_ring, struct ice_rx_buf *rx_buf,
1054 u16 ntc = rx_ring->next_to_clean + 1;
1056 /* fetch, update, and store next to clean */
1057 ntc = (ntc < rx_ring->count) ? ntc : 0;
1058 rx_ring->next_to_clean = ntc;
1063 if (ice_can_reuse_rx_page(rx_buf, rx_buf_pgcnt)) {
1064 /* hand second half of page back to the ring */
1065 ice_reuse_rx_page(rx_ring, rx_buf);
1067 /* we are not reusing the buffer so unmap it */
1068 dma_unmap_page_attrs(rx_ring->dev, rx_buf->dma,
1069 ice_rx_pg_size(rx_ring), DMA_FROM_DEVICE,
1071 __page_frag_cache_drain(rx_buf->page, rx_buf->pagecnt_bias);
1074 /* clear contents of buffer_info */
1075 rx_buf->page = NULL;
1079 * ice_is_non_eop - process handling of non-EOP buffers
1080 * @rx_ring: Rx ring being processed
1081 * @rx_desc: Rx descriptor for current buffer
1083 * If the buffer is an EOP buffer, this function exits returning false,
1084 * otherwise return true indicating that this is in fact a non-EOP buffer.
1087 ice_is_non_eop(struct ice_rx_ring *rx_ring, union ice_32b_rx_flex_desc *rx_desc)
1089 /* if we are the last buffer then there is nothing else to do */
1090 #define ICE_RXD_EOF BIT(ICE_RX_FLEX_DESC_STATUS0_EOF_S)
1091 if (likely(ice_test_staterr(rx_desc->wb.status_error0, ICE_RXD_EOF)))
1094 rx_ring->rx_stats.non_eop_descs++;
1100 * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
1101 * @rx_ring: Rx descriptor ring to transact packets on
1102 * @budget: Total limit on number of packets to process
1104 * This function provides a "bounce buffer" approach to Rx interrupt
1105 * processing. The advantage to this is that on systems that have
1106 * expensive overhead for IOMMU access this provides a means of avoiding
1107 * it by maintaining the mapping of the page to the system.
1109 * Returns amount of work completed
1111 int ice_clean_rx_irq(struct ice_rx_ring *rx_ring, int budget)
1113 unsigned int total_rx_bytes = 0, total_rx_pkts = 0, frame_sz = 0;
1114 u16 cleaned_count = ICE_DESC_UNUSED(rx_ring);
1115 unsigned int offset = rx_ring->rx_offset;
1116 struct ice_tx_ring *xdp_ring = NULL;
1117 unsigned int xdp_res, xdp_xmit = 0;
1118 struct sk_buff *skb = rx_ring->skb;
1119 struct bpf_prog *xdp_prog = NULL;
1120 struct xdp_buff xdp;
1123 /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
1124 #if (PAGE_SIZE < 8192)
1125 frame_sz = ice_rx_frame_truesize(rx_ring, 0);
1127 xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
1129 xdp_prog = READ_ONCE(rx_ring->xdp_prog);
1131 xdp_ring = rx_ring->xdp_ring;
1133 /* start the loop to process Rx packets bounded by 'budget' */
1134 while (likely(total_rx_pkts < (unsigned int)budget)) {
1135 union ice_32b_rx_flex_desc *rx_desc;
1136 struct ice_rx_buf *rx_buf;
1137 unsigned char *hard_start;
1144 /* get the Rx desc from Rx ring based on 'next_to_clean' */
1145 rx_desc = ICE_RX_DESC(rx_ring, rx_ring->next_to_clean);
1147 /* status_error_len will always be zero for unused descriptors
1148 * because it's cleared in cleanup, and overlaps with hdr_addr
1149 * which is always zero because packet split isn't used, if the
1150 * hardware wrote DD then it will be non-zero
1152 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
1153 if (!ice_test_staterr(rx_desc->wb.status_error0, stat_err_bits))
1156 /* This memory barrier is needed to keep us from reading
1157 * any other fields out of the rx_desc until we know the
1162 ice_trace(clean_rx_irq, rx_ring, rx_desc);
1163 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID || !rx_ring->netdev) {
1164 struct ice_vsi *ctrl_vsi = rx_ring->vsi;
1166 if (rx_desc->wb.rxdid == FDIR_DESC_RXDID &&
1168 ice_vc_fdir_irq_handler(ctrl_vsi, rx_desc);
1169 ice_put_rx_buf(rx_ring, NULL, 0);
1174 size = le16_to_cpu(rx_desc->wb.pkt_len) &
1175 ICE_RX_FLX_DESC_PKT_LEN_M;
1177 /* retrieve a buffer from the ring */
1178 rx_buf = ice_get_rx_buf(rx_ring, size, &rx_buf_pgcnt);
1182 xdp.data_end = NULL;
1183 xdp.data_hard_start = NULL;
1184 xdp.data_meta = NULL;
1188 hard_start = page_address(rx_buf->page) + rx_buf->page_offset -
1190 xdp_prepare_buff(&xdp, hard_start, offset, size, true);
1191 #if (PAGE_SIZE > 4096)
1192 /* At larger PAGE_SIZE, frame_sz depend on len size */
1193 xdp.frame_sz = ice_rx_frame_truesize(rx_ring, size);
1199 xdp_res = ice_run_xdp(rx_ring, &xdp, xdp_prog, xdp_ring);
1202 if (xdp_res & (ICE_XDP_TX | ICE_XDP_REDIR)) {
1203 xdp_xmit |= xdp_res;
1204 ice_rx_buf_adjust_pg_offset(rx_buf, xdp.frame_sz);
1206 rx_buf->pagecnt_bias++;
1208 total_rx_bytes += size;
1212 ice_put_rx_buf(rx_ring, rx_buf, rx_buf_pgcnt);
1216 ice_add_rx_frag(rx_ring, rx_buf, skb, size);
1217 } else if (likely(xdp.data)) {
1218 if (ice_ring_uses_build_skb(rx_ring))
1219 skb = ice_build_skb(rx_ring, rx_buf, &xdp);
1221 skb = ice_construct_skb(rx_ring, rx_buf, &xdp);
1223 /* exit if we failed to retrieve a buffer */
1225 rx_ring->rx_stats.alloc_buf_failed++;
1227 rx_buf->pagecnt_bias++;
1231 ice_put_rx_buf(rx_ring, rx_buf, rx_buf_pgcnt);
1234 /* skip if it is NOP desc */
1235 if (ice_is_non_eop(rx_ring, rx_desc))
1238 stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
1239 if (unlikely(ice_test_staterr(rx_desc->wb.status_error0,
1241 dev_kfree_skb_any(skb);
1245 vlan_tag = ice_get_vlan_tag_from_rx_desc(rx_desc);
1247 /* pad the skb if needed, to make a valid ethernet frame */
1248 if (eth_skb_pad(skb)) {
1253 /* probably a little skewed due to removing CRC */
1254 total_rx_bytes += skb->len;
1256 /* populate checksum, VLAN, and protocol */
1257 rx_ptype = le16_to_cpu(rx_desc->wb.ptype_flex_flags0) &
1258 ICE_RX_FLEX_DESC_PTYPE_M;
1260 ice_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);
1262 ice_trace(clean_rx_irq_indicate, rx_ring, rx_desc, skb);
1263 /* send completed skb up the stack */
1264 ice_receive_skb(rx_ring, skb, vlan_tag);
1267 /* update budget accounting */
1271 /* return up to cleaned_count buffers to hardware */
1272 failure = ice_alloc_rx_bufs(rx_ring, cleaned_count);
1275 ice_finalize_xdp_rx(xdp_ring, xdp_xmit);
1278 ice_update_rx_ring_stats(rx_ring, total_rx_pkts, total_rx_bytes);
1280 /* guarantee a trip back through this routine if there was a failure */
1281 return failure ? budget : (int)total_rx_pkts;
1284 static void __ice_update_sample(struct ice_q_vector *q_vector,
1285 struct ice_ring_container *rc,
1286 struct dim_sample *sample,
1289 u64 packets = 0, bytes = 0;
1292 struct ice_tx_ring *tx_ring;
1294 ice_for_each_tx_ring(tx_ring, *rc) {
1295 packets += tx_ring->stats.pkts;
1296 bytes += tx_ring->stats.bytes;
1299 struct ice_rx_ring *rx_ring;
1301 ice_for_each_rx_ring(rx_ring, *rc) {
1302 packets += rx_ring->stats.pkts;
1303 bytes += rx_ring->stats.bytes;
1307 dim_update_sample(q_vector->total_events, packets, bytes, sample);
1308 sample->comp_ctr = 0;
1310 /* if dim settings get stale, like when not updated for 1
1311 * second or longer, force it to start again. This addresses the
1312 * frequent case of an idle queue being switched to by the
1313 * scheduler. The 1,000 here means 1,000 milliseconds.
1315 if (ktime_ms_delta(sample->time, rc->dim.start_sample.time) >= 1000)
1316 rc->dim.state = DIM_START_MEASURE;
1320 * ice_net_dim - Update net DIM algorithm
1321 * @q_vector: the vector associated with the interrupt
1323 * Create a DIM sample and notify net_dim() so that it can possibly decide
1324 * a new ITR value based on incoming packets, bytes, and interrupts.
1326 * This function is a no-op if the ring is not configured to dynamic ITR.
1328 static void ice_net_dim(struct ice_q_vector *q_vector)
1330 struct ice_ring_container *tx = &q_vector->tx;
1331 struct ice_ring_container *rx = &q_vector->rx;
1333 if (ITR_IS_DYNAMIC(tx)) {
1334 struct dim_sample dim_sample;
1336 __ice_update_sample(q_vector, tx, &dim_sample, true);
1337 net_dim(&tx->dim, dim_sample);
1340 if (ITR_IS_DYNAMIC(rx)) {
1341 struct dim_sample dim_sample;
1343 __ice_update_sample(q_vector, rx, &dim_sample, false);
1344 net_dim(&rx->dim, dim_sample);
1349 * ice_buildreg_itr - build value for writing to the GLINT_DYN_CTL register
1350 * @itr_idx: interrupt throttling index
1351 * @itr: interrupt throttling value in usecs
1353 static u32 ice_buildreg_itr(u16 itr_idx, u16 itr)
1355 /* The ITR value is reported in microseconds, and the register value is
1356 * recorded in 2 microsecond units. For this reason we only need to
1357 * shift by the GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S to apply this
1358 * granularity as a shift instead of division. The mask makes sure the
1359 * ITR value is never odd so we don't accidentally write into the field
1360 * prior to the ITR field.
1362 itr &= ICE_ITR_MASK;
1364 return GLINT_DYN_CTL_INTENA_M | GLINT_DYN_CTL_CLEARPBA_M |
1365 (itr_idx << GLINT_DYN_CTL_ITR_INDX_S) |
1366 (itr << (GLINT_DYN_CTL_INTERVAL_S - ICE_ITR_GRAN_S));
1370 * ice_enable_interrupt - re-enable MSI-X interrupt
1371 * @q_vector: the vector associated with the interrupt to enable
1373 * If the VSI is down, the interrupt will not be re-enabled. Also,
1374 * when enabling the interrupt always reset the wb_on_itr to false
1375 * and trigger a software interrupt to clean out internal state.
1377 static void ice_enable_interrupt(struct ice_q_vector *q_vector)
1379 struct ice_vsi *vsi = q_vector->vsi;
1380 bool wb_en = q_vector->wb_on_itr;
1383 if (test_bit(ICE_DOWN, vsi->state))
1386 /* trigger an ITR delayed software interrupt when exiting busy poll, to
1387 * make sure to catch any pending cleanups that might have been missed
1388 * due to interrupt state transition. If busy poll or poll isn't
1389 * enabled, then don't update ITR, and just enable the interrupt.
1392 itr_val = ice_buildreg_itr(ICE_ITR_NONE, 0);
1394 q_vector->wb_on_itr = false;
1396 /* do two things here with a single write. Set up the third ITR
1397 * index to be used for software interrupt moderation, and then
1398 * trigger a software interrupt with a rate limit of 20K on
1399 * software interrupts, this will help avoid high interrupt
1400 * loads due to frequently polling and exiting polling.
1402 itr_val = ice_buildreg_itr(ICE_IDX_ITR2, ICE_ITR_20K);
1403 itr_val |= GLINT_DYN_CTL_SWINT_TRIG_M |
1404 ICE_IDX_ITR2 << GLINT_DYN_CTL_SW_ITR_INDX_S |
1405 GLINT_DYN_CTL_SW_ITR_INDX_ENA_M;
1407 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx), itr_val);
1411 * ice_set_wb_on_itr - set WB_ON_ITR for this q_vector
1412 * @q_vector: q_vector to set WB_ON_ITR on
1414 * We need to tell hardware to write-back completed descriptors even when
1415 * interrupts are disabled. Descriptors will be written back on cache line
1416 * boundaries without WB_ON_ITR enabled, but if we don't enable WB_ON_ITR
1417 * descriptors may not be written back if they don't fill a cache line until
1418 * the next interrupt.
1420 * This sets the write-back frequency to whatever was set previously for the
1421 * ITR indices. Also, set the INTENA_MSK bit to make sure hardware knows we
1422 * aren't meddling with the INTENA_M bit.
1424 static void ice_set_wb_on_itr(struct ice_q_vector *q_vector)
1426 struct ice_vsi *vsi = q_vector->vsi;
1428 /* already in wb_on_itr mode no need to change it */
1429 if (q_vector->wb_on_itr)
1432 /* use previously set ITR values for all of the ITR indices by
1433 * specifying ICE_ITR_NONE, which will vary in adaptive (AIM) mode and
1434 * be static in non-adaptive mode (user configured)
1436 wr32(&vsi->back->hw, GLINT_DYN_CTL(q_vector->reg_idx),
1437 ((ICE_ITR_NONE << GLINT_DYN_CTL_ITR_INDX_S) &
1438 GLINT_DYN_CTL_ITR_INDX_M) | GLINT_DYN_CTL_INTENA_MSK_M |
1439 GLINT_DYN_CTL_WB_ON_ITR_M);
1441 q_vector->wb_on_itr = true;
1445 * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
1446 * @napi: napi struct with our devices info in it
1447 * @budget: amount of work driver is allowed to do this pass, in packets
1449 * This function will clean all queues associated with a q_vector.
1451 * Returns the amount of work done
1453 int ice_napi_poll(struct napi_struct *napi, int budget)
1455 struct ice_q_vector *q_vector =
1456 container_of(napi, struct ice_q_vector, napi);
1457 struct ice_tx_ring *tx_ring;
1458 struct ice_rx_ring *rx_ring;
1459 bool clean_complete = true;
1460 int budget_per_ring;
1463 /* Since the actual Tx work is minimal, we can give the Tx a larger
1464 * budget and be more aggressive about cleaning up the Tx descriptors.
1466 ice_for_each_tx_ring(tx_ring, q_vector->tx) {
1469 if (tx_ring->xsk_pool)
1470 wd = ice_xmit_zc(tx_ring, ICE_DESC_UNUSED(tx_ring), budget);
1471 else if (ice_ring_is_xdp(tx_ring))
1474 wd = ice_clean_tx_irq(tx_ring, budget);
1477 clean_complete = false;
1480 /* Handle case where we are called by netpoll with a budget of 0 */
1481 if (unlikely(budget <= 0))
1484 /* normally we have 1 Rx ring per q_vector */
1485 if (unlikely(q_vector->num_ring_rx > 1))
1486 /* We attempt to distribute budget to each Rx queue fairly, but
1487 * don't allow the budget to go below 1 because that would exit
1490 budget_per_ring = max_t(int, budget / q_vector->num_ring_rx, 1);
1492 /* Max of 1 Rx ring in this q_vector so give it the budget */
1493 budget_per_ring = budget;
1495 ice_for_each_rx_ring(rx_ring, q_vector->rx) {
1498 /* A dedicated path for zero-copy allows making a single
1499 * comparison in the irq context instead of many inside the
1500 * ice_clean_rx_irq function and makes the codebase cleaner.
1502 cleaned = rx_ring->xsk_pool ?
1503 ice_clean_rx_irq_zc(rx_ring, budget_per_ring) :
1504 ice_clean_rx_irq(rx_ring, budget_per_ring);
1505 work_done += cleaned;
1506 /* if we clean as many as budgeted, we must not be done */
1507 if (cleaned >= budget_per_ring)
1508 clean_complete = false;
1511 /* If work not completed, return budget and polling will return */
1512 if (!clean_complete) {
1513 /* Set the writeback on ITR so partial completions of
1514 * cache-lines will still continue even if we're polling.
1516 ice_set_wb_on_itr(q_vector);
1520 /* Exit the polling mode, but don't re-enable interrupts if stack might
1521 * poll us due to busy-polling
1523 if (napi_complete_done(napi, work_done)) {
1524 ice_net_dim(q_vector);
1525 ice_enable_interrupt(q_vector);
1527 ice_set_wb_on_itr(q_vector);
1530 return min_t(int, work_done, budget - 1);
1534 * __ice_maybe_stop_tx - 2nd level check for Tx stop conditions
1535 * @tx_ring: the ring to be checked
1536 * @size: the size buffer we want to assure is available
1538 * Returns -EBUSY if a stop is needed, else 0
1540 static int __ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1542 netif_tx_stop_queue(txring_txq(tx_ring));
1543 /* Memory barrier before checking head and tail */
1546 /* Check again in a case another CPU has just made room available. */
1547 if (likely(ICE_DESC_UNUSED(tx_ring) < size))
1550 /* A reprieve! - use start_queue because it doesn't call schedule */
1551 netif_tx_start_queue(txring_txq(tx_ring));
1552 ++tx_ring->tx_stats.restart_q;
1557 * ice_maybe_stop_tx - 1st level check for Tx stop conditions
1558 * @tx_ring: the ring to be checked
1559 * @size: the size buffer we want to assure is available
1561 * Returns 0 if stop is not needed
1563 static int ice_maybe_stop_tx(struct ice_tx_ring *tx_ring, unsigned int size)
1565 if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
1568 return __ice_maybe_stop_tx(tx_ring, size);
1572 * ice_tx_map - Build the Tx descriptor
1573 * @tx_ring: ring to send buffer on
1574 * @first: first buffer info buffer to use
1575 * @off: pointer to struct that holds offload parameters
1577 * This function loops over the skb data pointed to by *first
1578 * and gets a physical address for each memory location and programs
1579 * it and the length into the transmit descriptor.
1582 ice_tx_map(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first,
1583 struct ice_tx_offload_params *off)
1585 u64 td_offset, td_tag, td_cmd;
1586 u16 i = tx_ring->next_to_use;
1587 unsigned int data_len, size;
1588 struct ice_tx_desc *tx_desc;
1589 struct ice_tx_buf *tx_buf;
1590 struct sk_buff *skb;
1595 td_tag = off->td_l2tag1;
1596 td_cmd = off->td_cmd;
1597 td_offset = off->td_offset;
1600 data_len = skb->data_len;
1601 size = skb_headlen(skb);
1603 tx_desc = ICE_TX_DESC(tx_ring, i);
1605 if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
1606 td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
1607 td_tag = (first->tx_flags & ICE_TX_FLAGS_VLAN_M) >>
1608 ICE_TX_FLAGS_VLAN_S;
1611 dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
1615 for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
1616 unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1618 if (dma_mapping_error(tx_ring->dev, dma))
1621 /* record length, and DMA address */
1622 dma_unmap_len_set(tx_buf, len, size);
1623 dma_unmap_addr_set(tx_buf, dma, dma);
1625 /* align size to end of page */
1626 max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
1627 tx_desc->buf_addr = cpu_to_le64(dma);
1629 /* account for data chunks larger than the hardware
1632 while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
1633 tx_desc->cmd_type_offset_bsz =
1634 ice_build_ctob(td_cmd, td_offset, max_data,
1640 if (i == tx_ring->count) {
1641 tx_desc = ICE_TX_DESC(tx_ring, 0);
1648 max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
1649 tx_desc->buf_addr = cpu_to_le64(dma);
1652 if (likely(!data_len))
1655 tx_desc->cmd_type_offset_bsz = ice_build_ctob(td_cmd, td_offset,
1661 if (i == tx_ring->count) {
1662 tx_desc = ICE_TX_DESC(tx_ring, 0);
1666 size = skb_frag_size(frag);
1669 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
1672 tx_buf = &tx_ring->tx_buf[i];
1675 /* record SW timestamp if HW timestamp is not available */
1676 skb_tx_timestamp(first->skb);
1679 if (i == tx_ring->count)
1682 /* write last descriptor with RS and EOP bits */
1683 td_cmd |= (u64)ICE_TXD_LAST_DESC_CMD;
1684 tx_desc->cmd_type_offset_bsz =
1685 ice_build_ctob(td_cmd, td_offset, size, td_tag);
1687 /* Force memory writes to complete before letting h/w know there
1688 * are new descriptors to fetch.
1690 * We also use this memory barrier to make certain all of the
1691 * status bits have been updated before next_to_watch is written.
1695 /* set next_to_watch value indicating a packet is present */
1696 first->next_to_watch = tx_desc;
1698 tx_ring->next_to_use = i;
1700 ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
1702 /* notify HW of packet */
1703 kick = __netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount,
1704 netdev_xmit_more());
1706 /* notify HW of packet */
1707 writel(i, tx_ring->tail);
1712 /* clear DMA mappings for failed tx_buf map */
1714 tx_buf = &tx_ring->tx_buf[i];
1715 ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
1716 if (tx_buf == first)
1723 tx_ring->next_to_use = i;
1727 * ice_tx_csum - Enable Tx checksum offloads
1728 * @first: pointer to the first descriptor
1729 * @off: pointer to struct that holds offload parameters
1731 * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
1734 int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1736 u32 l4_len = 0, l3_len = 0, l2_len = 0;
1737 struct sk_buff *skb = first->skb;
1747 __be16 frag_off, protocol;
1748 unsigned char *exthdr;
1749 u32 offset, cmd = 0;
1752 if (skb->ip_summed != CHECKSUM_PARTIAL)
1755 protocol = vlan_get_protocol(skb);
1757 if (eth_p_mpls(protocol)) {
1758 ip.hdr = skb_inner_network_header(skb);
1759 l4.hdr = skb_checksum_start(skb);
1761 ip.hdr = skb_network_header(skb);
1762 l4.hdr = skb_transport_header(skb);
1765 /* compute outer L2 header size */
1766 l2_len = ip.hdr - skb->data;
1767 offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
1769 /* set the tx_flags to indicate the IP protocol type. this is
1770 * required so that checksum header computation below is accurate.
1772 if (ip.v4->version == 4)
1773 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1774 else if (ip.v6->version == 6)
1775 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1777 if (skb->encapsulation) {
1778 bool gso_ena = false;
1781 /* define outer network header type */
1782 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1783 tunnel |= (first->tx_flags & ICE_TX_FLAGS_TSO) ?
1784 ICE_TX_CTX_EIPT_IPV4 :
1785 ICE_TX_CTX_EIPT_IPV4_NO_CSUM;
1786 l4_proto = ip.v4->protocol;
1787 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1790 tunnel |= ICE_TX_CTX_EIPT_IPV6;
1791 exthdr = ip.hdr + sizeof(*ip.v6);
1792 l4_proto = ip.v6->nexthdr;
1793 ret = ipv6_skip_exthdr(skb, exthdr - skb->data,
1794 &l4_proto, &frag_off);
1799 /* define outer transport */
1802 tunnel |= ICE_TXD_CTX_UDP_TUNNELING;
1803 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1806 tunnel |= ICE_TXD_CTX_GRE_TUNNELING;
1807 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1811 first->tx_flags |= ICE_TX_FLAGS_TUNNEL;
1812 l4.hdr = skb_inner_network_header(skb);
1815 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1818 skb_checksum_help(skb);
1822 /* compute outer L3 header size */
1823 tunnel |= ((l4.hdr - ip.hdr) / 4) <<
1824 ICE_TXD_CTX_QW0_EIPLEN_S;
1826 /* switch IP header pointer from outer to inner header */
1827 ip.hdr = skb_inner_network_header(skb);
1829 /* compute tunnel header size */
1830 tunnel |= ((ip.hdr - l4.hdr) / 2) <<
1831 ICE_TXD_CTX_QW0_NATLEN_S;
1833 gso_ena = skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL;
1834 /* indicate if we need to offload outer UDP header */
1835 if ((first->tx_flags & ICE_TX_FLAGS_TSO) && !gso_ena &&
1836 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM))
1837 tunnel |= ICE_TXD_CTX_QW0_L4T_CS_M;
1839 /* record tunnel offload values */
1840 off->cd_tunnel_params |= tunnel;
1842 /* set DTYP=1 to indicate that it's an Tx context descriptor
1843 * in IPsec tunnel mode with Tx offloads in Quad word 1
1845 off->cd_qw1 |= (u64)ICE_TX_DESC_DTYPE_CTX;
1847 /* switch L4 header pointer from outer to inner */
1848 l4.hdr = skb_inner_transport_header(skb);
1851 /* reset type as we transition from outer to inner headers */
1852 first->tx_flags &= ~(ICE_TX_FLAGS_IPV4 | ICE_TX_FLAGS_IPV6);
1853 if (ip.v4->version == 4)
1854 first->tx_flags |= ICE_TX_FLAGS_IPV4;
1855 if (ip.v6->version == 6)
1856 first->tx_flags |= ICE_TX_FLAGS_IPV6;
1859 /* Enable IP checksum offloads */
1860 if (first->tx_flags & ICE_TX_FLAGS_IPV4) {
1861 l4_proto = ip.v4->protocol;
1862 /* the stack computes the IP header already, the only time we
1863 * need the hardware to recompute it is in the case of TSO.
1865 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1866 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
1868 cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
1870 } else if (first->tx_flags & ICE_TX_FLAGS_IPV6) {
1871 cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
1872 exthdr = ip.hdr + sizeof(*ip.v6);
1873 l4_proto = ip.v6->nexthdr;
1874 if (l4.hdr != exthdr)
1875 ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
1881 /* compute inner L3 header size */
1882 l3_len = l4.hdr - ip.hdr;
1883 offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
1885 /* Enable L4 checksum offloads */
1888 /* enable checksum offloads */
1889 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
1890 l4_len = l4.tcp->doff;
1891 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1894 /* enable UDP checksum offload */
1895 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
1896 l4_len = (sizeof(struct udphdr) >> 2);
1897 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1900 /* enable SCTP checksum offload */
1901 cmd |= ICE_TX_DESC_CMD_L4T_EOFT_SCTP;
1902 l4_len = sizeof(struct sctphdr) >> 2;
1903 offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
1907 if (first->tx_flags & ICE_TX_FLAGS_TSO)
1909 skb_checksum_help(skb);
1914 off->td_offset |= offset;
1919 * ice_tx_prepare_vlan_flags - prepare generic Tx VLAN tagging flags for HW
1920 * @tx_ring: ring to send buffer on
1921 * @first: pointer to struct ice_tx_buf
1923 * Checks the skb and set up correspondingly several generic transmit flags
1924 * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
1927 ice_tx_prepare_vlan_flags(struct ice_tx_ring *tx_ring, struct ice_tx_buf *first)
1929 struct sk_buff *skb = first->skb;
1931 /* nothing left to do, software offloaded VLAN */
1932 if (!skb_vlan_tag_present(skb) && eth_type_vlan(skb->protocol))
1935 /* the VLAN ethertype/tpid is determined by VSI configuration and netdev
1936 * feature flags, which the driver only allows either 802.1Q or 802.1ad
1937 * VLAN offloads exclusively so we only care about the VLAN ID here
1939 if (skb_vlan_tag_present(skb)) {
1940 first->tx_flags |= skb_vlan_tag_get(skb) << ICE_TX_FLAGS_VLAN_S;
1941 if (tx_ring->flags & ICE_TX_FLAGS_RING_VLAN_L2TAG2)
1942 first->tx_flags |= ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN;
1944 first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
1947 ice_tx_prepare_vlan_flags_dcb(tx_ring, first);
1951 * ice_tso - computes mss and TSO length to prepare for TSO
1952 * @first: pointer to struct ice_tx_buf
1953 * @off: pointer to struct that holds offload parameters
1955 * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
1958 int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
1960 struct sk_buff *skb = first->skb;
1971 u64 cd_mss, cd_tso_len;
1977 if (skb->ip_summed != CHECKSUM_PARTIAL)
1980 if (!skb_is_gso(skb))
1983 err = skb_cow_head(skb, 0);
1987 /* cppcheck-suppress unreadVariable */
1988 protocol = vlan_get_protocol(skb);
1990 if (eth_p_mpls(protocol))
1991 ip.hdr = skb_inner_network_header(skb);
1993 ip.hdr = skb_network_header(skb);
1994 l4.hdr = skb_checksum_start(skb);
1996 /* initialize outer IP header fields */
1997 if (ip.v4->version == 4) {
2001 ip.v6->payload_len = 0;
2004 if (skb_shinfo(skb)->gso_type & (SKB_GSO_GRE |
2008 SKB_GSO_UDP_TUNNEL |
2009 SKB_GSO_UDP_TUNNEL_CSUM)) {
2010 if (!(skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) &&
2011 (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_TUNNEL_CSUM)) {
2014 /* determine offset of outer transport header */
2015 l4_start = (u8)(l4.hdr - skb->data);
2017 /* remove payload length from outer checksum */
2018 paylen = skb->len - l4_start;
2019 csum_replace_by_diff(&l4.udp->check,
2020 (__force __wsum)htonl(paylen));
2023 /* reset pointers to inner headers */
2025 /* cppcheck-suppress unreadVariable */
2026 ip.hdr = skb_inner_network_header(skb);
2027 l4.hdr = skb_inner_transport_header(skb);
2029 /* initialize inner IP header fields */
2030 if (ip.v4->version == 4) {
2034 ip.v6->payload_len = 0;
2038 /* determine offset of transport header */
2039 l4_start = (u8)(l4.hdr - skb->data);
2041 /* remove payload length from checksum */
2042 paylen = skb->len - l4_start;
2044 if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) {
2045 csum_replace_by_diff(&l4.udp->check,
2046 (__force __wsum)htonl(paylen));
2047 /* compute length of UDP segmentation header */
2048 off->header_len = (u8)sizeof(l4.udp) + l4_start;
2050 csum_replace_by_diff(&l4.tcp->check,
2051 (__force __wsum)htonl(paylen));
2052 /* compute length of TCP segmentation header */
2053 off->header_len = (u8)((l4.tcp->doff * 4) + l4_start);
2056 /* update gso_segs and bytecount */
2057 first->gso_segs = skb_shinfo(skb)->gso_segs;
2058 first->bytecount += (first->gso_segs - 1) * off->header_len;
2060 cd_tso_len = skb->len - off->header_len;
2061 cd_mss = skb_shinfo(skb)->gso_size;
2063 /* record cdesc_qw1 with TSO parameters */
2064 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2065 (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
2066 (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
2067 (cd_mss << ICE_TXD_CTX_QW1_MSS_S));
2068 first->tx_flags |= ICE_TX_FLAGS_TSO;
2073 * ice_txd_use_count - estimate the number of descriptors needed for Tx
2074 * @size: transmit request size in bytes
2076 * Due to hardware alignment restrictions (4K alignment), we need to
2077 * assume that we can have no more than 12K of data per descriptor, even
2078 * though each descriptor can take up to 16K - 1 bytes of aligned memory.
2079 * Thus, we need to divide by 12K. But division is slow! Instead,
2080 * we decompose the operation into shifts and one relatively cheap
2081 * multiply operation.
2083 * To divide by 12K, we first divide by 4K, then divide by 3:
2084 * To divide by 4K, shift right by 12 bits
2085 * To divide by 3, multiply by 85, then divide by 256
2086 * (Divide by 256 is done by shifting right by 8 bits)
2087 * Finally, we add one to round up. Because 256 isn't an exact multiple of
2088 * 3, we'll underestimate near each multiple of 12K. This is actually more
2089 * accurate as we have 4K - 1 of wiggle room that we can fit into the last
2090 * segment. For our purposes this is accurate out to 1M which is orders of
2091 * magnitude greater than our largest possible GSO size.
2093 * This would then be implemented as:
2094 * return (((size >> 12) * 85) >> 8) + ICE_DESCS_FOR_SKB_DATA_PTR;
2096 * Since multiplication and division are commutative, we can reorder
2098 * return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2100 static unsigned int ice_txd_use_count(unsigned int size)
2102 return ((size * 85) >> 20) + ICE_DESCS_FOR_SKB_DATA_PTR;
2106 * ice_xmit_desc_count - calculate number of Tx descriptors needed
2109 * Returns number of data descriptors needed for this skb.
2111 static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
2113 const skb_frag_t *frag = &skb_shinfo(skb)->frags[0];
2114 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2115 unsigned int count = 0, size = skb_headlen(skb);
2118 count += ice_txd_use_count(size);
2123 size = skb_frag_size(frag++);
2130 * __ice_chk_linearize - Check if there are more than 8 buffers per packet
2133 * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
2134 * and so we need to figure out the cases where we need to linearize the skb.
2136 * For TSO we need to count the TSO header and segment payload separately.
2137 * As such we need to check cases where we have 7 fragments or more as we
2138 * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
2139 * the segment payload in the first descriptor, and another 7 for the
2142 static bool __ice_chk_linearize(struct sk_buff *skb)
2144 const skb_frag_t *frag, *stale;
2147 /* no need to check if number of frags is less than 7 */
2148 nr_frags = skb_shinfo(skb)->nr_frags;
2149 if (nr_frags < (ICE_MAX_BUF_TXD - 1))
2152 /* We need to walk through the list and validate that each group
2153 * of 6 fragments totals at least gso_size.
2155 nr_frags -= ICE_MAX_BUF_TXD - 2;
2156 frag = &skb_shinfo(skb)->frags[0];
2158 /* Initialize size to the negative value of gso_size minus 1. We
2159 * use this as the worst case scenario in which the frag ahead
2160 * of us only provides one byte which is why we are limited to 6
2161 * descriptors for a single transmit as the header and previous
2162 * fragment are already consuming 2 descriptors.
2164 sum = 1 - skb_shinfo(skb)->gso_size;
2166 /* Add size of frags 0 through 4 to create our initial sum */
2167 sum += skb_frag_size(frag++);
2168 sum += skb_frag_size(frag++);
2169 sum += skb_frag_size(frag++);
2170 sum += skb_frag_size(frag++);
2171 sum += skb_frag_size(frag++);
2173 /* Walk through fragments adding latest fragment, testing it, and
2174 * then removing stale fragments from the sum.
2176 for (stale = &skb_shinfo(skb)->frags[0];; stale++) {
2177 int stale_size = skb_frag_size(stale);
2179 sum += skb_frag_size(frag++);
2181 /* The stale fragment may present us with a smaller
2182 * descriptor than the actual fragment size. To account
2183 * for that we need to remove all the data on the front and
2184 * figure out what the remainder would be in the last
2185 * descriptor associated with the fragment.
2187 if (stale_size > ICE_MAX_DATA_PER_TXD) {
2188 int align_pad = -(skb_frag_off(stale)) &
2189 (ICE_MAX_READ_REQ_SIZE - 1);
2192 stale_size -= align_pad;
2195 sum -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2196 stale_size -= ICE_MAX_DATA_PER_TXD_ALIGNED;
2197 } while (stale_size > ICE_MAX_DATA_PER_TXD);
2200 /* if sum is negative we failed to make sufficient progress */
2214 * ice_chk_linearize - Check if there are more than 8 fragments per packet
2216 * @count: number of buffers used
2218 * Note: Our HW can't scatter-gather more than 8 fragments to build
2219 * a packet on the wire and so we need to figure out the cases where we
2220 * need to linearize the skb.
2222 static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
2224 /* Both TSO and single send will work if count is less than 8 */
2225 if (likely(count < ICE_MAX_BUF_TXD))
2228 if (skb_is_gso(skb))
2229 return __ice_chk_linearize(skb);
2231 /* we can support up to 8 data buffers for a single send */
2232 return count != ICE_MAX_BUF_TXD;
2236 * ice_tstamp - set up context descriptor for hardware timestamp
2237 * @tx_ring: pointer to the Tx ring to send buffer on
2238 * @skb: pointer to the SKB we're sending
2240 * @off: Tx offload parameters
2243 ice_tstamp(struct ice_tx_ring *tx_ring, struct sk_buff *skb,
2244 struct ice_tx_buf *first, struct ice_tx_offload_params *off)
2248 /* only timestamp the outbound packet if the user has requested it */
2249 if (likely(!(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)))
2252 if (!tx_ring->ptp_tx)
2255 /* Tx timestamps cannot be sampled when doing TSO */
2256 if (first->tx_flags & ICE_TX_FLAGS_TSO)
2259 /* Grab an open timestamp slot */
2260 idx = ice_ptp_request_ts(tx_ring->tx_tstamps, skb);
2264 off->cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2265 (ICE_TX_CTX_DESC_TSYN << ICE_TXD_CTX_QW1_CMD_S) |
2266 ((u64)idx << ICE_TXD_CTX_QW1_TSO_LEN_S));
2267 first->tx_flags |= ICE_TX_FLAGS_TSYN;
2271 * ice_xmit_frame_ring - Sends buffer on Tx ring
2273 * @tx_ring: ring to send buffer on
2275 * Returns NETDEV_TX_OK if sent, else an error code
2278 ice_xmit_frame_ring(struct sk_buff *skb, struct ice_tx_ring *tx_ring)
2280 struct ice_tx_offload_params offload = { 0 };
2281 struct ice_vsi *vsi = tx_ring->vsi;
2282 struct ice_tx_buf *first;
2287 ice_trace(xmit_frame_ring, tx_ring, skb);
2289 count = ice_xmit_desc_count(skb);
2290 if (ice_chk_linearize(skb, count)) {
2291 if (__skb_linearize(skb))
2293 count = ice_txd_use_count(skb->len);
2294 tx_ring->tx_stats.tx_linearize++;
2297 /* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
2298 * + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
2299 * + 4 desc gap to avoid the cache line where head is,
2300 * + 1 desc for context descriptor,
2301 * otherwise try next time
2303 if (ice_maybe_stop_tx(tx_ring, count + ICE_DESCS_PER_CACHE_LINE +
2304 ICE_DESCS_FOR_CTX_DESC)) {
2305 tx_ring->tx_stats.tx_busy++;
2306 return NETDEV_TX_BUSY;
2309 /* prefetch for bql data which is infrequently used */
2310 netdev_txq_bql_enqueue_prefetchw(txring_txq(tx_ring));
2312 offload.tx_ring = tx_ring;
2314 /* record the location of the first descriptor for this packet */
2315 first = &tx_ring->tx_buf[tx_ring->next_to_use];
2317 first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
2318 first->gso_segs = 1;
2319 first->tx_flags = 0;
2321 /* prepare the VLAN tagging flags for Tx */
2322 ice_tx_prepare_vlan_flags(tx_ring, first);
2323 if (first->tx_flags & ICE_TX_FLAGS_HW_OUTER_SINGLE_VLAN) {
2324 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2325 (ICE_TX_CTX_DESC_IL2TAG2 <<
2326 ICE_TXD_CTX_QW1_CMD_S));
2327 offload.cd_l2tag2 = (first->tx_flags & ICE_TX_FLAGS_VLAN_M) >>
2328 ICE_TX_FLAGS_VLAN_S;
2331 /* set up TSO offload */
2332 tso = ice_tso(first, &offload);
2336 /* always set up Tx checksum offload */
2337 csum = ice_tx_csum(first, &offload);
2341 /* allow CONTROL frames egress from main VSI if FW LLDP disabled */
2342 eth = (struct ethhdr *)skb_mac_header(skb);
2343 if (unlikely((skb->priority == TC_PRIO_CONTROL ||
2344 eth->h_proto == htons(ETH_P_LLDP)) &&
2345 vsi->type == ICE_VSI_PF &&
2346 vsi->port_info->qos_cfg.is_sw_lldp))
2347 offload.cd_qw1 |= (u64)(ICE_TX_DESC_DTYPE_CTX |
2348 ICE_TX_CTX_DESC_SWTCH_UPLINK <<
2349 ICE_TXD_CTX_QW1_CMD_S);
2351 ice_tstamp(tx_ring, skb, first, &offload);
2352 if (ice_is_switchdev_running(vsi->back))
2353 ice_eswitch_set_target_vsi(skb, &offload);
2355 if (offload.cd_qw1 & ICE_TX_DESC_DTYPE_CTX) {
2356 struct ice_tx_ctx_desc *cdesc;
2357 u16 i = tx_ring->next_to_use;
2359 /* grab the next descriptor */
2360 cdesc = ICE_TX_CTX_DESC(tx_ring, i);
2362 tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
2364 /* setup context descriptor */
2365 cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
2366 cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
2367 cdesc->rsvd = cpu_to_le16(0);
2368 cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
2371 ice_tx_map(tx_ring, first, &offload);
2372 return NETDEV_TX_OK;
2375 ice_trace(xmit_frame_ring_drop, tx_ring, skb);
2376 dev_kfree_skb_any(skb);
2377 return NETDEV_TX_OK;
2381 * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
2383 * @netdev: network interface device structure
2385 * Returns NETDEV_TX_OK if sent, else an error code
2387 netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2389 struct ice_netdev_priv *np = netdev_priv(netdev);
2390 struct ice_vsi *vsi = np->vsi;
2391 struct ice_tx_ring *tx_ring;
2393 tx_ring = vsi->tx_rings[skb->queue_mapping];
2395 /* hardware can't handle really short frames, hardware padding works
2398 if (skb_put_padto(skb, ICE_MIN_TX_LEN))
2399 return NETDEV_TX_OK;
2401 return ice_xmit_frame_ring(skb, tx_ring);
2405 * ice_get_dscp_up - return the UP/TC value for a SKB
2406 * @dcbcfg: DCB config that contains DSCP to UP/TC mapping
2407 * @skb: SKB to query for info to determine UP/TC
2409 * This function is to only be called when the PF is in L3 DSCP PFC mode
2411 static u8 ice_get_dscp_up(struct ice_dcbx_cfg *dcbcfg, struct sk_buff *skb)
2415 if (skb->protocol == htons(ETH_P_IP))
2416 dscp = ipv4_get_dsfield(ip_hdr(skb)) >> 2;
2417 else if (skb->protocol == htons(ETH_P_IPV6))
2418 dscp = ipv6_get_dsfield(ipv6_hdr(skb)) >> 2;
2420 return dcbcfg->dscp_map[dscp];
2424 ice_select_queue(struct net_device *netdev, struct sk_buff *skb,
2425 struct net_device *sb_dev)
2427 struct ice_pf *pf = ice_netdev_to_pf(netdev);
2428 struct ice_dcbx_cfg *dcbcfg;
2430 dcbcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg;
2431 if (dcbcfg->pfc_mode == ICE_QOS_MODE_DSCP)
2432 skb->priority = ice_get_dscp_up(dcbcfg, skb);
2434 return netdev_pick_tx(netdev, skb, sb_dev);
2438 * ice_clean_ctrl_tx_irq - interrupt handler for flow director Tx queue
2439 * @tx_ring: tx_ring to clean
2441 void ice_clean_ctrl_tx_irq(struct ice_tx_ring *tx_ring)
2443 struct ice_vsi *vsi = tx_ring->vsi;
2444 s16 i = tx_ring->next_to_clean;
2445 int budget = ICE_DFLT_IRQ_WORK;
2446 struct ice_tx_desc *tx_desc;
2447 struct ice_tx_buf *tx_buf;
2449 tx_buf = &tx_ring->tx_buf[i];
2450 tx_desc = ICE_TX_DESC(tx_ring, i);
2451 i -= tx_ring->count;
2454 struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
2456 /* if next_to_watch is not set then there is no pending work */
2460 /* prevent any other reads prior to eop_desc */
2463 /* if the descriptor isn't done, no work to do */
2464 if (!(eop_desc->cmd_type_offset_bsz &
2465 cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
2468 /* clear next_to_watch to prevent false hangs */
2469 tx_buf->next_to_watch = NULL;
2470 tx_desc->buf_addr = 0;
2471 tx_desc->cmd_type_offset_bsz = 0;
2473 /* move past filter desc */
2478 i -= tx_ring->count;
2479 tx_buf = tx_ring->tx_buf;
2480 tx_desc = ICE_TX_DESC(tx_ring, 0);
2483 /* unmap the data header */
2484 if (dma_unmap_len(tx_buf, len))
2485 dma_unmap_single(tx_ring->dev,
2486 dma_unmap_addr(tx_buf, dma),
2487 dma_unmap_len(tx_buf, len),
2489 if (tx_buf->tx_flags & ICE_TX_FLAGS_DUMMY_PKT)
2490 devm_kfree(tx_ring->dev, tx_buf->raw_buf);
2492 /* clear next_to_watch to prevent false hangs */
2493 tx_buf->raw_buf = NULL;
2494 tx_buf->tx_flags = 0;
2495 tx_buf->next_to_watch = NULL;
2496 dma_unmap_len_set(tx_buf, len, 0);
2497 tx_desc->buf_addr = 0;
2498 tx_desc->cmd_type_offset_bsz = 0;
2500 /* move past eop_desc for start of next FD desc */
2505 i -= tx_ring->count;
2506 tx_buf = tx_ring->tx_buf;
2507 tx_desc = ICE_TX_DESC(tx_ring, 0);
2511 } while (likely(budget));
2513 i += tx_ring->count;
2514 tx_ring->next_to_clean = i;
2516 /* re-enable interrupt if needed */
2517 ice_irq_dynamic_ena(&vsi->back->hw, vsi, vsi->q_vectors[0]);