git.itanic.dy.fi Git - linux-stable/blob - drivers/net/ethernet/sun/sunhme.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /* sunhme.c: Sparc HME/BigMac 10/100baseT half/full duplex auto switching,
   3  *           auto carrier detecting ethernet driver.  Also known as the
   4  *           "Happy Meal Ethernet" found on SunSwift SBUS cards.
   5  *
   6  * Copyright (C) 1996, 1998, 1999, 2002, 2003,
   7  *              2006, 2008 David S. Miller (davem@davemloft.net)
   8  *
   9  * Changes :
  10  * 2000/11/11 Willy Tarreau <willy AT meta-x.org>
  11  *   - port to non-sparc architectures. Tested only on x86 and
  12  *     only currently works with QFE PCI cards.
  13  *   - ability to specify the MAC address at module load time by passing this
  14  *     argument : macaddr=0x00,0x10,0x20,0x30,0x40,0x50
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/types.h>
  20 #include <linux/fcntl.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/ioport.h>
  23 #include <linux/in.h>
  24 #include <linux/slab.h>
  25 #include <linux/string.h>
  26 #include <linux/delay.h>
  27 #include <linux/init.h>
  28 #include <linux/ethtool.h>
  29 #include <linux/mii.h>
  30 #include <linux/crc32.h>
  31 #include <linux/random.h>
  32 #include <linux/errno.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/etherdevice.h>
  35 #include <linux/skbuff.h>
  36 #include <linux/mm.h>
  37 #include <linux/bitops.h>
  38 #include <linux/dma-mapping.h>
  39
  40 #include <asm/io.h>
  41 #include <asm/dma.h>
  42 #include <asm/byteorder.h>
  43
  44 #ifdef CONFIG_SPARC
  45 #include <linux/of.h>
  46 #include <linux/of_device.h>
  47 #include <asm/idprom.h>
  48 #include <asm/openprom.h>
  49 #include <asm/oplib.h>
  50 #include <asm/prom.h>
  51 #include <asm/auxio.h>
  52 #endif
  53 #include <linux/uaccess.h>
  54
  55 #include <asm/irq.h>
  56
  57 #ifdef CONFIG_PCI
  58 #include <linux/pci.h>
  59 #endif
  60
  61 #include "sunhme.h"
  62
  63 #define DRV_NAME        "sunhme"
  64 #define DRV_VERSION     "3.10"
  65 #define DRV_RELDATE     "August 26, 2008"
  66 #define DRV_AUTHOR      "David S. Miller (davem@davemloft.net)"
  67
  68 static char version[] =
  69         DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
  70
  71 MODULE_VERSION(DRV_VERSION);
  72 MODULE_AUTHOR(DRV_AUTHOR);
  73 MODULE_DESCRIPTION("Sun HappyMealEthernet(HME) 10/100baseT ethernet driver");
  74 MODULE_LICENSE("GPL");
  75
  76 static int macaddr[6];
  77
  78 /* accept MAC address of the form macaddr=0x08,0x00,0x20,0x30,0x40,0x50 */
  79 module_param_array(macaddr, int, NULL, 0);
  80 MODULE_PARM_DESC(macaddr, "Happy Meal MAC address to set");
  81
  82 #ifdef CONFIG_SBUS
  83 static struct quattro *qfe_sbus_list;
  84 #endif
  85
  86 #ifdef CONFIG_PCI
  87 static struct quattro *qfe_pci_list;
  88 #endif
  89
  90 #undef HMEDEBUG
  91 #undef SXDEBUG
  92 #undef RXDEBUG
  93 #undef TXDEBUG
  94 #undef TXLOGGING
  95
  96 #ifdef TXLOGGING
  97 struct hme_tx_logent {
  98         unsigned int tstamp;
  99         int tx_new, tx_old;
 100         unsigned int action;
 101 #define TXLOG_ACTION_IRQ        0x01
 102 #define TXLOG_ACTION_TXMIT      0x02
 103 #define TXLOG_ACTION_TBUSY      0x04
 104 #define TXLOG_ACTION_NBUFS      0x08
 105         unsigned int status;
 106 };
 107 #define TX_LOG_LEN      128
 108 static struct hme_tx_logent tx_log[TX_LOG_LEN];
 109 static int txlog_cur_entry;
 110 static __inline__ void tx_add_log(struct happy_meal *hp, unsigned int a, unsigned int s)
 111 {
 112         struct hme_tx_logent *tlp;
 113         unsigned long flags;
 114
 115         local_irq_save(flags);
 116         tlp = &tx_log[txlog_cur_entry];
 117         tlp->tstamp = (unsigned int)jiffies;
 118         tlp->tx_new = hp->tx_new;
 119         tlp->tx_old = hp->tx_old;
 120         tlp->action = a;
 121         tlp->status = s;
 122         txlog_cur_entry = (txlog_cur_entry + 1) & (TX_LOG_LEN - 1);
 123         local_irq_restore(flags);
 124 }
 125 static __inline__ void tx_dump_log(void)
 126 {
 127         int i, this;
 128
 129         this = txlog_cur_entry;
 130         for (i = 0; i < TX_LOG_LEN; i++) {
 131                 printk("TXLOG[%d]: j[%08x] tx[N(%d)O(%d)] action[%08x] stat[%08x]\n", i,
 132                        tx_log[this].tstamp,
 133                        tx_log[this].tx_new, tx_log[this].tx_old,
 134                        tx_log[this].action, tx_log[this].status);
 135                 this = (this + 1) & (TX_LOG_LEN - 1);
 136         }
 137 }
 138 static __inline__ void tx_dump_ring(struct happy_meal *hp)
 139 {
 140         struct hmeal_init_block *hb = hp->happy_block;
 141         struct happy_meal_txd *tp = &hb->happy_meal_txd[0];
 142         int i;
 143
 144         for (i = 0; i < TX_RING_SIZE; i+=4) {
 145                 printk("TXD[%d..%d]: [%08x:%08x] [%08x:%08x] [%08x:%08x] [%08x:%08x]\n",
 146                        i, i + 4,
 147                        le32_to_cpu(tp[i].tx_flags), le32_to_cpu(tp[i].tx_addr),
 148                        le32_to_cpu(tp[i + 1].tx_flags), le32_to_cpu(tp[i + 1].tx_addr),
 149                        le32_to_cpu(tp[i + 2].tx_flags), le32_to_cpu(tp[i + 2].tx_addr),
 150                        le32_to_cpu(tp[i + 3].tx_flags), le32_to_cpu(tp[i + 3].tx_addr));
 151         }
 152 }
 153 #else
 154 #define tx_add_log(hp, a, s)            do { } while(0)
 155 #define tx_dump_log()                   do { } while(0)
 156 #define tx_dump_ring(hp)                do { } while(0)
 157 #endif
 158
 159 #ifdef HMEDEBUG
 160 #define HMD(x)  printk x
 161 #else
 162 #define HMD(x)
 163 #endif
 164
 165 /* #define AUTO_SWITCH_DEBUG */
 166
 167 #ifdef AUTO_SWITCH_DEBUG
 168 #define ASD(x)  printk x
 169 #else
 170 #define ASD(x)
 171 #endif
 172
 173 #define DEFAULT_IPG0      16 /* For lance-mode only */
 174 #define DEFAULT_IPG1       8 /* For all modes */
 175 #define DEFAULT_IPG2       4 /* For all modes */
 176 #define DEFAULT_JAMSIZE    4 /* Toe jam */
 177
 178 /* NOTE: In the descriptor writes one _must_ write the address
 179  *       member _first_.  The card must not be allowed to see
 180  *       the updated descriptor flags until the address is
 181  *       correct.  I've added a write memory barrier between
 182  *       the two stores so that I can sleep well at night... -DaveM
 183  */
 184
 185 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
 186 static void sbus_hme_write32(void __iomem *reg, u32 val)
 187 {
 188         sbus_writel(val, reg);
 189 }
 190
 191 static u32 sbus_hme_read32(void __iomem *reg)
 192 {
 193         return sbus_readl(reg);
 194 }
 195
 196 static void sbus_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
 197 {
 198         rxd->rx_addr = (__force hme32)addr;
 199         dma_wmb();
 200         rxd->rx_flags = (__force hme32)flags;
 201 }
 202
 203 static void sbus_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
 204 {
 205         txd->tx_addr = (__force hme32)addr;
 206         dma_wmb();
 207         txd->tx_flags = (__force hme32)flags;
 208 }
 209
 210 static u32 sbus_hme_read_desc32(hme32 *p)
 211 {
 212         return (__force u32)*p;
 213 }
 214
 215 static void pci_hme_write32(void __iomem *reg, u32 val)
 216 {
 217         writel(val, reg);
 218 }
 219
 220 static u32 pci_hme_read32(void __iomem *reg)
 221 {
 222         return readl(reg);
 223 }
 224
 225 static void pci_hme_write_rxd(struct happy_meal_rxd *rxd, u32 flags, u32 addr)
 226 {
 227         rxd->rx_addr = (__force hme32)cpu_to_le32(addr);
 228         dma_wmb();
 229         rxd->rx_flags = (__force hme32)cpu_to_le32(flags);
 230 }
 231
 232 static void pci_hme_write_txd(struct happy_meal_txd *txd, u32 flags, u32 addr)
 233 {
 234         txd->tx_addr = (__force hme32)cpu_to_le32(addr);
 235         dma_wmb();
 236         txd->tx_flags = (__force hme32)cpu_to_le32(flags);
 237 }
 238
 239 static u32 pci_hme_read_desc32(hme32 *p)
 240 {
 241         return le32_to_cpup((__le32 *)p);
 242 }
 243
 244 #define hme_write32(__hp, __reg, __val) \
 245         ((__hp)->write32((__reg), (__val)))
 246 #define hme_read32(__hp, __reg) \
 247         ((__hp)->read32(__reg))
 248 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 249         ((__hp)->write_rxd((__rxd), (__flags), (__addr)))
 250 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 251         ((__hp)->write_txd((__txd), (__flags), (__addr)))
 252 #define hme_read_desc32(__hp, __p) \
 253         ((__hp)->read_desc32(__p))
 254 #else
 255 #ifdef CONFIG_SBUS
 256 /* SBUS only compilation */
 257 #define hme_write32(__hp, __reg, __val) \
 258         sbus_writel((__val), (__reg))
 259 #define hme_read32(__hp, __reg) \
 260         sbus_readl(__reg)
 261 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 262 do {    (__rxd)->rx_addr = (__force hme32)(u32)(__addr); \
 263         dma_wmb(); \
 264         (__rxd)->rx_flags = (__force hme32)(u32)(__flags); \
 265 } while(0)
 266 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 267 do {    (__txd)->tx_addr = (__force hme32)(u32)(__addr); \
 268         dma_wmb(); \
 269         (__txd)->tx_flags = (__force hme32)(u32)(__flags); \
 270 } while(0)
 271 #define hme_read_desc32(__hp, __p)      ((__force u32)(hme32)*(__p))
 272 #else
 273 /* PCI only compilation */
 274 #define hme_write32(__hp, __reg, __val) \
 275         writel((__val), (__reg))
 276 #define hme_read32(__hp, __reg) \
 277         readl(__reg)
 278 #define hme_write_rxd(__hp, __rxd, __flags, __addr) \
 279 do {    (__rxd)->rx_addr = (__force hme32)cpu_to_le32(__addr); \
 280         dma_wmb(); \
 281         (__rxd)->rx_flags = (__force hme32)cpu_to_le32(__flags); \
 282 } while(0)
 283 #define hme_write_txd(__hp, __txd, __flags, __addr) \
 284 do {    (__txd)->tx_addr = (__force hme32)cpu_to_le32(__addr); \
 285         dma_wmb(); \
 286         (__txd)->tx_flags = (__force hme32)cpu_to_le32(__flags); \
 287 } while(0)
 288 static inline u32 hme_read_desc32(struct happy_meal *hp, hme32 *p)
 289 {
 290         return le32_to_cpup((__le32 *)p);
 291 }
 292 #endif
 293 #endif
 294
 295
 296 /* Oh yes, the MIF BitBang is mighty fun to program.  BitBucket is more like it. */
 297 static void BB_PUT_BIT(struct happy_meal *hp, void __iomem *tregs, int bit)
 298 {
 299         hme_write32(hp, tregs + TCVR_BBDATA, bit);
 300         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 301         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 302 }
 303
 304 #if 0
 305 static u32 BB_GET_BIT(struct happy_meal *hp, void __iomem *tregs, int internal)
 306 {
 307         u32 ret;
 308
 309         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 310         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 311         ret = hme_read32(hp, tregs + TCVR_CFG);
 312         if (internal)
 313                 ret &= TCV_CFG_MDIO0;
 314         else
 315                 ret &= TCV_CFG_MDIO1;
 316
 317         return ret;
 318 }
 319 #endif
 320
 321 static u32 BB_GET_BIT2(struct happy_meal *hp, void __iomem *tregs, int internal)
 322 {
 323         u32 retval;
 324
 325         hme_write32(hp, tregs + TCVR_BBCLOCK, 0);
 326         udelay(1);
 327         retval = hme_read32(hp, tregs + TCVR_CFG);
 328         if (internal)
 329                 retval &= TCV_CFG_MDIO0;
 330         else
 331                 retval &= TCV_CFG_MDIO1;
 332         hme_write32(hp, tregs + TCVR_BBCLOCK, 1);
 333
 334         return retval;
 335 }
 336
 337 #define TCVR_FAILURE      0x80000000     /* Impossible MIF read value */
 338
 339 static int happy_meal_bb_read(struct happy_meal *hp,
 340                               void __iomem *tregs, int reg)
 341 {
 342         u32 tmp;
 343         int retval = 0;
 344         int i;
 345
 346         ASD(("happy_meal_bb_read: reg=%d ", reg));
 347
 348         /* Enable the MIF BitBang outputs. */
 349         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
 350
 351         /* Force BitBang into the idle state. */
 352         for (i = 0; i < 32; i++)
 353                 BB_PUT_BIT(hp, tregs, 1);
 354
 355         /* Give it the read sequence. */
 356         BB_PUT_BIT(hp, tregs, 0);
 357         BB_PUT_BIT(hp, tregs, 1);
 358         BB_PUT_BIT(hp, tregs, 1);
 359         BB_PUT_BIT(hp, tregs, 0);
 360
 361         /* Give it the PHY address. */
 362         tmp = hp->paddr & 0xff;
 363         for (i = 4; i >= 0; i--)
 364                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 365
 366         /* Tell it what register we want to read. */
 367         tmp = (reg & 0xff);
 368         for (i = 4; i >= 0; i--)
 369                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 370
 371         /* Close down the MIF BitBang outputs. */
 372         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
 373
 374         /* Now read in the value. */
 375         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 376         for (i = 15; i >= 0; i--)
 377                 retval |= BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 378         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 379         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 380         (void) BB_GET_BIT2(hp, tregs, (hp->tcvr_type == internal));
 381         ASD(("value=%x\n", retval));
 382         return retval;
 383 }
 384
 385 static void happy_meal_bb_write(struct happy_meal *hp,
 386                                 void __iomem *tregs, int reg,
 387                                 unsigned short value)
 388 {
 389         u32 tmp;
 390         int i;
 391
 392         ASD(("happy_meal_bb_write: reg=%d value=%x\n", reg, value));
 393
 394         /* Enable the MIF BitBang outputs. */
 395         hme_write32(hp, tregs + TCVR_BBOENAB, 1);
 396
 397         /* Force BitBang into the idle state. */
 398         for (i = 0; i < 32; i++)
 399                 BB_PUT_BIT(hp, tregs, 1);
 400
 401         /* Give it write sequence. */
 402         BB_PUT_BIT(hp, tregs, 0);
 403         BB_PUT_BIT(hp, tregs, 1);
 404         BB_PUT_BIT(hp, tregs, 0);
 405         BB_PUT_BIT(hp, tregs, 1);
 406
 407         /* Give it the PHY address. */
 408         tmp = (hp->paddr & 0xff);
 409         for (i = 4; i >= 0; i--)
 410                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 411
 412         /* Tell it what register we will be writing. */
 413         tmp = (reg & 0xff);
 414         for (i = 4; i >= 0; i--)
 415                 BB_PUT_BIT(hp, tregs, ((tmp >> i) & 1));
 416
 417         /* Tell it to become ready for the bits. */
 418         BB_PUT_BIT(hp, tregs, 1);
 419         BB_PUT_BIT(hp, tregs, 0);
 420
 421         for (i = 15; i >= 0; i--)
 422                 BB_PUT_BIT(hp, tregs, ((value >> i) & 1));
 423
 424         /* Close down the MIF BitBang outputs. */
 425         hme_write32(hp, tregs + TCVR_BBOENAB, 0);
 426 }
 427
 428 #define TCVR_READ_TRIES   16
 429
 430 static int happy_meal_tcvr_read(struct happy_meal *hp,
 431                                 void __iomem *tregs, int reg)
 432 {
 433         int tries = TCVR_READ_TRIES;
 434         int retval;
 435
 436         ASD(("happy_meal_tcvr_read: reg=0x%02x ", reg));
 437         if (hp->tcvr_type == none) {
 438                 ASD(("no transceiver, value=TCVR_FAILURE\n"));
 439                 return TCVR_FAILURE;
 440         }
 441
 442         if (!(hp->happy_flags & HFLAG_FENABLE)) {
 443                 ASD(("doing bit bang\n"));
 444                 return happy_meal_bb_read(hp, tregs, reg);
 445         }
 446
 447         hme_write32(hp, tregs + TCVR_FRAME,
 448                     (FRAME_READ | (hp->paddr << 23) | ((reg & 0xff) << 18)));
 449         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
 450                 udelay(20);
 451         if (!tries) {
 452                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF read bolixed\n");
 453                 return TCVR_FAILURE;
 454         }
 455         retval = hme_read32(hp, tregs + TCVR_FRAME) & 0xffff;
 456         ASD(("value=%04x\n", retval));
 457         return retval;
 458 }
 459
 460 #define TCVR_WRITE_TRIES  16
 461
 462 static void happy_meal_tcvr_write(struct happy_meal *hp,
 463                                   void __iomem *tregs, int reg,
 464                                   unsigned short value)
 465 {
 466         int tries = TCVR_WRITE_TRIES;
 467
 468         ASD(("happy_meal_tcvr_write: reg=0x%02x value=%04x\n", reg, value));
 469
 470         /* Welcome to Sun Microsystems, can I take your order please? */
 471         if (!(hp->happy_flags & HFLAG_FENABLE)) {
 472                 happy_meal_bb_write(hp, tregs, reg, value);
 473                 return;
 474         }
 475
 476         /* Would you like fries with that? */
 477         hme_write32(hp, tregs + TCVR_FRAME,
 478                     (FRAME_WRITE | (hp->paddr << 23) |
 479                      ((reg & 0xff) << 18) | (value & 0xffff)));
 480         while (!(hme_read32(hp, tregs + TCVR_FRAME) & 0x10000) && --tries)
 481                 udelay(20);
 482
 483         /* Anything else? */
 484         if (!tries)
 485                 printk(KERN_ERR "happy meal: Aieee, transceiver MIF write bolixed\n");
 486
 487         /* Fifty-two cents is your change, have a nice day. */
 488 }
 489
 490 /* Auto negotiation.  The scheme is very simple.  We have a timer routine
 491  * that keeps watching the auto negotiation process as it progresses.
 492  * The DP83840 is first told to start doing it's thing, we set up the time
 493  * and place the timer state machine in it's initial state.
 494  *
 495  * Here the timer peeks at the DP83840 status registers at each click to see
 496  * if the auto negotiation has completed, we assume here that the DP83840 PHY
 497  * will time out at some point and just tell us what (didn't) happen.  For
 498  * complete coverage we only allow so many of the ticks at this level to run,
 499  * when this has expired we print a warning message and try another strategy.
 500  * This "other" strategy is to force the interface into various speed/duplex
 501  * configurations and we stop when we see a link-up condition before the
 502  * maximum number of "peek" ticks have occurred.
 503  *
 504  * Once a valid link status has been detected we configure the BigMAC and
 505  * the rest of the Happy Meal to speak the most efficient protocol we could
 506  * get a clean link for.  The priority for link configurations, highest first
 507  * is:
 508  *                 100 Base-T Full Duplex
 509  *                 100 Base-T Half Duplex
 510  *                 10 Base-T Full Duplex
 511  *                 10 Base-T Half Duplex
 512  *
 513  * We start a new timer now, after a successful auto negotiation status has
 514  * been detected.  This timer just waits for the link-up bit to get set in
 515  * the BMCR of the DP83840.  When this occurs we print a kernel log message
 516  * describing the link type in use and the fact that it is up.
 517  *
 518  * If a fatal error of some sort is signalled and detected in the interrupt
 519  * service routine, and the chip is reset, or the link is ifconfig'd down
 520  * and then back up, this entire process repeats itself all over again.
 521  */
 522 static int try_next_permutation(struct happy_meal *hp, void __iomem *tregs)
 523 {
 524         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 525
 526         /* Downgrade from full to half duplex.  Only possible
 527          * via ethtool.
 528          */
 529         if (hp->sw_bmcr & BMCR_FULLDPLX) {
 530                 hp->sw_bmcr &= ~(BMCR_FULLDPLX);
 531                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 532                 return 0;
 533         }
 534
 535         /* Downgrade from 100 to 10. */
 536         if (hp->sw_bmcr & BMCR_SPEED100) {
 537                 hp->sw_bmcr &= ~(BMCR_SPEED100);
 538                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 539                 return 0;
 540         }
 541
 542         /* We've tried everything. */
 543         return -1;
 544 }
 545
 546 static void display_link_mode(struct happy_meal *hp, void __iomem *tregs)
 547 {
 548         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
 549
 550         netdev_info(hp->dev,
 551                     "Link is up using %s transceiver at %dMb/s, %s Duplex.\n",
 552                     hp->tcvr_type == external ? "external" : "internal",
 553                     hp->sw_lpa & (LPA_100HALF | LPA_100FULL) ? 100 : 10,
 554                     hp->sw_lpa & (LPA_100FULL | LPA_10FULL) ? "Full" : "Half");
 555 }
 556
 557 static void display_forced_link_mode(struct happy_meal *hp, void __iomem *tregs)
 558 {
 559         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 560
 561         netdev_info(hp->dev,
 562                     "Link has been forced up using %s transceiver at %dMb/s, %s Duplex.\n",
 563                     hp->tcvr_type == external ? "external" : "internal",
 564                     hp->sw_bmcr & BMCR_SPEED100 ? 100 : 10,
 565                     hp->sw_bmcr & BMCR_FULLDPLX ? "Full" : "Half");
 566 }
 567
 568 static int set_happy_link_modes(struct happy_meal *hp, void __iomem *tregs)
 569 {
 570         int full;
 571
 572         /* All we care about is making sure the bigmac tx_cfg has a
 573          * proper duplex setting.
 574          */
 575         if (hp->timer_state == arbwait) {
 576                 hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
 577                 if (!(hp->sw_lpa & (LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL)))
 578                         goto no_response;
 579                 if (hp->sw_lpa & LPA_100FULL)
 580                         full = 1;
 581                 else if (hp->sw_lpa & LPA_100HALF)
 582                         full = 0;
 583                 else if (hp->sw_lpa & LPA_10FULL)
 584                         full = 1;
 585                 else
 586                         full = 0;
 587         } else {
 588                 /* Forcing a link mode. */
 589                 hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 590                 if (hp->sw_bmcr & BMCR_FULLDPLX)
 591                         full = 1;
 592                 else
 593                         full = 0;
 594         }
 595
 596         /* Before changing other bits in the tx_cfg register, and in
 597          * general any of other the TX config registers too, you
 598          * must:
 599          * 1) Clear Enable
 600          * 2) Poll with reads until that bit reads back as zero
 601          * 3) Make TX configuration changes
 602          * 4) Set Enable once more
 603          */
 604         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 605                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
 606                     ~(BIGMAC_TXCFG_ENABLE));
 607         while (hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) & BIGMAC_TXCFG_ENABLE)
 608                 barrier();
 609         if (full) {
 610                 hp->happy_flags |= HFLAG_FULL;
 611                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 612                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
 613                             BIGMAC_TXCFG_FULLDPLX);
 614         } else {
 615                 hp->happy_flags &= ~(HFLAG_FULL);
 616                 hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 617                             hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) &
 618                             ~(BIGMAC_TXCFG_FULLDPLX));
 619         }
 620         hme_write32(hp, hp->bigmacregs + BMAC_TXCFG,
 621                     hme_read32(hp, hp->bigmacregs + BMAC_TXCFG) |
 622                     BIGMAC_TXCFG_ENABLE);
 623         return 0;
 624 no_response:
 625         return 1;
 626 }
 627
 628 static int happy_meal_init(struct happy_meal *hp);
 629
 630 static int is_lucent_phy(struct happy_meal *hp)
 631 {
 632         void __iomem *tregs = hp->tcvregs;
 633         unsigned short mr2, mr3;
 634         int ret = 0;
 635
 636         mr2 = happy_meal_tcvr_read(hp, tregs, 2);
 637         mr3 = happy_meal_tcvr_read(hp, tregs, 3);
 638         if ((mr2 & 0xffff) == 0x0180 &&
 639             ((mr3 & 0xffff) >> 10) == 0x1d)
 640                 ret = 1;
 641
 642         return ret;
 643 }
 644
 645 static void happy_meal_timer(struct timer_list *t)
 646 {
 647         struct happy_meal *hp = from_timer(hp, t, happy_timer);
 648         void __iomem *tregs = hp->tcvregs;
 649         int restart_timer = 0;
 650
 651         spin_lock_irq(&hp->happy_lock);
 652
 653         hp->timer_ticks++;
 654         switch(hp->timer_state) {
 655         case arbwait:
 656                 /* Only allow for 5 ticks, thats 10 seconds and much too
 657                  * long to wait for arbitration to complete.
 658                  */
 659                 if (hp->timer_ticks >= 10) {
 660                         /* Enter force mode. */
 661         do_force_mode:
 662                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 663                         printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful, trying force link mode\n",
 664                                hp->dev->name);
 665                         hp->sw_bmcr = BMCR_SPEED100;
 666                         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
 667
 668                         if (!is_lucent_phy(hp)) {
 669                                 /* OK, seems we need do disable the transceiver for the first
 670                                  * tick to make sure we get an accurate link state at the
 671                                  * second tick.
 672                                  */
 673                                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
 674                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
 675                                 happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG, hp->sw_csconfig);
 676                         }
 677                         hp->timer_state = ltrywait;
 678                         hp->timer_ticks = 0;
 679                         restart_timer = 1;
 680                 } else {
 681                         /* Anything interesting happen? */
 682                         hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 683                         if (hp->sw_bmsr & BMSR_ANEGCOMPLETE) {
 684                                 int ret;
 685
 686                                 /* Just what we've been waiting for... */
 687                                 ret = set_happy_link_modes(hp, tregs);
 688                                 if (ret) {
 689                                         /* Ooops, something bad happened, go to force
 690                                          * mode.
 691                                          *
 692                                          * XXX Broken hubs which don't support 802.3u
 693                                          * XXX auto-negotiation make this happen as well.
 694                                          */
 695                                         goto do_force_mode;
 696                                 }
 697
 698                                 /* Success, at least so far, advance our state engine. */
 699                                 hp->timer_state = lupwait;
 700                                 restart_timer = 1;
 701                         } else {
 702                                 restart_timer = 1;
 703                         }
 704                 }
 705                 break;
 706
 707         case lupwait:
 708                 /* Auto negotiation was successful and we are awaiting a
 709                  * link up status.  I have decided to let this timer run
 710                  * forever until some sort of error is signalled, reporting
 711                  * a message to the user at 10 second intervals.
 712                  */
 713                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 714                 if (hp->sw_bmsr & BMSR_LSTATUS) {
 715                         /* Wheee, it's up, display the link mode in use and put
 716                          * the timer to sleep.
 717                          */
 718                         display_link_mode(hp, tregs);
 719                         hp->timer_state = asleep;
 720                         restart_timer = 0;
 721                 } else {
 722                         if (hp->timer_ticks >= 10) {
 723                                 printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
 724                                        "not completely up.\n", hp->dev->name);
 725                                 hp->timer_ticks = 0;
 726                                 restart_timer = 1;
 727                         } else {
 728                                 restart_timer = 1;
 729                         }
 730                 }
 731                 break;
 732
 733         case ltrywait:
 734                 /* Making the timeout here too long can make it take
 735                  * annoyingly long to attempt all of the link mode
 736                  * permutations, but then again this is essentially
 737                  * error recovery code for the most part.
 738                  */
 739                 hp->sw_bmsr = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
 740                 hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs, DP83840_CSCONFIG);
 741                 if (hp->timer_ticks == 1) {
 742                         if (!is_lucent_phy(hp)) {
 743                                 /* Re-enable transceiver, we'll re-enable the transceiver next
 744                                  * tick, then check link state on the following tick.
 745                                  */
 746                                 hp->sw_csconfig |= CSCONFIG_TCVDISAB;
 747                                 happy_meal_tcvr_write(hp, tregs,
 748                                                       DP83840_CSCONFIG, hp->sw_csconfig);
 749                         }
 750                         restart_timer = 1;
 751                         break;
 752                 }
 753                 if (hp->timer_ticks == 2) {
 754                         if (!is_lucent_phy(hp)) {
 755                                 hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
 756                                 happy_meal_tcvr_write(hp, tregs,
 757                                                       DP83840_CSCONFIG, hp->sw_csconfig);
 758                         }
 759                         restart_timer = 1;
 760                         break;
 761                 }
 762                 if (hp->sw_bmsr & BMSR_LSTATUS) {
 763                         /* Force mode selection success. */
 764                         display_forced_link_mode(hp, tregs);
 765                         set_happy_link_modes(hp, tregs); /* XXX error? then what? */
 766                         hp->timer_state = asleep;
 767                         restart_timer = 0;
 768                 } else {
 769                         if (hp->timer_ticks >= 4) { /* 6 seconds or so... */
 770                                 int ret;
 771
 772                                 ret = try_next_permutation(hp, tregs);
 773                                 if (ret == -1) {
 774                                         /* Aieee, tried them all, reset the
 775                                          * chip and try all over again.
 776                                          */
 777
 778                                         /* Let the user know... */
 779                                         printk(KERN_NOTICE "%s: Link down, cable problem?\n",
 780                                                hp->dev->name);
 781
 782                                         ret = happy_meal_init(hp);
 783                                         if (ret) {
 784                                                 /* ho hum... */
 785                                                 printk(KERN_ERR "%s: Error, cannot re-init the "
 786                                                        "Happy Meal.\n", hp->dev->name);
 787                                         }
 788                                         goto out;
 789                                 }
 790                                 if (!is_lucent_phy(hp)) {
 791                                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
 792                                                                                DP83840_CSCONFIG);
 793                                         hp->sw_csconfig |= CSCONFIG_TCVDISAB;
 794                                         happy_meal_tcvr_write(hp, tregs,
 795                                                               DP83840_CSCONFIG, hp->sw_csconfig);
 796                                 }
 797                                 hp->timer_ticks = 0;
 798                                 restart_timer = 1;
 799                         } else {
 800                                 restart_timer = 1;
 801                         }
 802                 }
 803                 break;
 804
 805         case asleep:
 806         default:
 807                 /* Can't happens.... */
 808                 printk(KERN_ERR "%s: Aieee, link timer is asleep but we got one anyways!\n",
 809                        hp->dev->name);
 810                 restart_timer = 0;
 811                 hp->timer_ticks = 0;
 812                 hp->timer_state = asleep; /* foo on you */
 813                 break;
 814         }
 815
 816         if (restart_timer) {
 817                 hp->happy_timer.expires = jiffies + ((12 * HZ)/10); /* 1.2 sec. */
 818                 add_timer(&hp->happy_timer);
 819         }
 820
 821 out:
 822         spin_unlock_irq(&hp->happy_lock);
 823 }
 824
 825 #define TX_RESET_TRIES     32
 826 #define RX_RESET_TRIES     32
 827
 828 /* hp->happy_lock must be held */
 829 static void happy_meal_tx_reset(struct happy_meal *hp, void __iomem *bregs)
 830 {
 831         int tries = TX_RESET_TRIES;
 832
 833         HMD(("happy_meal_tx_reset: reset, "));
 834
 835         /* Would you like to try our SMCC Delux? */
 836         hme_write32(hp, bregs + BMAC_TXSWRESET, 0);
 837         while ((hme_read32(hp, bregs + BMAC_TXSWRESET) & 1) && --tries)
 838                 udelay(20);
 839
 840         /* Lettuce, tomato, buggy hardware (no extra charge)? */
 841         if (!tries)
 842                 printk(KERN_ERR "happy meal: Transceiver BigMac ATTACK!");
 843
 844         /* Take care. */
 845         HMD(("done\n"));
 846 }
 847
 848 /* hp->happy_lock must be held */
 849 static void happy_meal_rx_reset(struct happy_meal *hp, void __iomem *bregs)
 850 {
 851         int tries = RX_RESET_TRIES;
 852
 853         HMD(("happy_meal_rx_reset: reset, "));
 854
 855         /* We have a special on GNU/Viking hardware bugs today. */
 856         hme_write32(hp, bregs + BMAC_RXSWRESET, 0);
 857         while ((hme_read32(hp, bregs + BMAC_RXSWRESET) & 1) && --tries)
 858                 udelay(20);
 859
 860         /* Will that be all? */
 861         if (!tries)
 862                 printk(KERN_ERR "happy meal: Receiver BigMac ATTACK!");
 863
 864         /* Don't forget your vik_1137125_wa.  Have a nice day. */
 865         HMD(("done\n"));
 866 }
 867
 868 #define STOP_TRIES         16
 869
 870 /* hp->happy_lock must be held */
 871 static void happy_meal_stop(struct happy_meal *hp, void __iomem *gregs)
 872 {
 873         int tries = STOP_TRIES;
 874
 875         HMD(("happy_meal_stop: reset, "));
 876
 877         /* We're consolidating our STB products, it's your lucky day. */
 878         hme_write32(hp, gregs + GREG_SWRESET, GREG_RESET_ALL);
 879         while (hme_read32(hp, gregs + GREG_SWRESET) && --tries)
 880                 udelay(20);
 881
 882         /* Come back next week when we are "Sun Microelectronics". */
 883         if (!tries)
 884                 printk(KERN_ERR "happy meal: Fry guys.");
 885
 886         /* Remember: "Different name, same old buggy as shit hardware." */
 887         HMD(("done\n"));
 888 }
 889
 890 /* hp->happy_lock must be held */
 891 static void happy_meal_get_counters(struct happy_meal *hp, void __iomem *bregs)
 892 {
 893         struct net_device_stats *stats = &hp->dev->stats;
 894
 895         stats->rx_crc_errors += hme_read32(hp, bregs + BMAC_RCRCECTR);
 896         hme_write32(hp, bregs + BMAC_RCRCECTR, 0);
 897
 898         stats->rx_frame_errors += hme_read32(hp, bregs + BMAC_UNALECTR);
 899         hme_write32(hp, bregs + BMAC_UNALECTR, 0);
 900
 901         stats->rx_length_errors += hme_read32(hp, bregs + BMAC_GLECTR);
 902         hme_write32(hp, bregs + BMAC_GLECTR, 0);
 903
 904         stats->tx_aborted_errors += hme_read32(hp, bregs + BMAC_EXCTR);
 905
 906         stats->collisions +=
 907                 (hme_read32(hp, bregs + BMAC_EXCTR) +
 908                  hme_read32(hp, bregs + BMAC_LTCTR));
 909         hme_write32(hp, bregs + BMAC_EXCTR, 0);
 910         hme_write32(hp, bregs + BMAC_LTCTR, 0);
 911 }
 912
 913 /* hp->happy_lock must be held */
 914 static void happy_meal_poll_stop(struct happy_meal *hp, void __iomem *tregs)
 915 {
 916         ASD(("happy_meal_poll_stop: "));
 917
 918         /* If polling disabled or not polling already, nothing to do. */
 919         if ((hp->happy_flags & (HFLAG_POLLENABLE | HFLAG_POLL)) !=
 920            (HFLAG_POLLENABLE | HFLAG_POLL)) {
 921                 HMD(("not polling, return\n"));
 922                 return;
 923         }
 924
 925         /* Shut up the MIF. */
 926         ASD(("were polling, mif ints off, "));
 927         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
 928
 929         /* Turn off polling. */
 930         ASD(("polling off, "));
 931         hme_write32(hp, tregs + TCVR_CFG,
 932                     hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_PENABLE));
 933
 934         /* We are no longer polling. */
 935         hp->happy_flags &= ~(HFLAG_POLL);
 936
 937         /* Let the bits set. */
 938         udelay(200);
 939         ASD(("done\n"));
 940 }
 941
 942 /* Only Sun can take such nice parts and fuck up the programming interface
 943  * like this.  Good job guys...
 944  */
 945 #define TCVR_RESET_TRIES       16 /* It should reset quickly        */
 946 #define TCVR_UNISOLATE_TRIES   32 /* Dis-isolation can take longer. */
 947
 948 /* hp->happy_lock must be held */
 949 static int happy_meal_tcvr_reset(struct happy_meal *hp, void __iomem *tregs)
 950 {
 951         u32 tconfig;
 952         int result, tries = TCVR_RESET_TRIES;
 953
 954         tconfig = hme_read32(hp, tregs + TCVR_CFG);
 955         ASD(("happy_meal_tcvr_reset: tcfg<%08lx> ", tconfig));
 956         if (hp->tcvr_type == external) {
 957                 ASD(("external<"));
 958                 hme_write32(hp, tregs + TCVR_CFG, tconfig & ~(TCV_CFG_PSELECT));
 959                 hp->tcvr_type = internal;
 960                 hp->paddr = TCV_PADDR_ITX;
 961                 ASD(("ISOLATE,"));
 962                 happy_meal_tcvr_write(hp, tregs, MII_BMCR,
 963                                       (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
 964                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 965                 if (result == TCVR_FAILURE) {
 966                         ASD(("phyread_fail>\n"));
 967                         return -1;
 968                 }
 969                 ASD(("phyread_ok,PSELECT>"));
 970                 hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
 971                 hp->tcvr_type = external;
 972                 hp->paddr = TCV_PADDR_ETX;
 973         } else {
 974                 if (tconfig & TCV_CFG_MDIO1) {
 975                         ASD(("internal<PSELECT,"));
 976                         hme_write32(hp, tregs + TCVR_CFG, (tconfig | TCV_CFG_PSELECT));
 977                         ASD(("ISOLATE,"));
 978                         happy_meal_tcvr_write(hp, tregs, MII_BMCR,
 979                                               (BMCR_LOOPBACK|BMCR_PDOWN|BMCR_ISOLATE));
 980                         result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 981                         if (result == TCVR_FAILURE) {
 982                                 ASD(("phyread_fail>\n"));
 983                                 return -1;
 984                         }
 985                         ASD(("phyread_ok,~PSELECT>"));
 986                         hme_write32(hp, tregs + TCVR_CFG, (tconfig & ~(TCV_CFG_PSELECT)));
 987                         hp->tcvr_type = internal;
 988                         hp->paddr = TCV_PADDR_ITX;
 989                 }
 990         }
 991
 992         ASD(("BMCR_RESET "));
 993         happy_meal_tcvr_write(hp, tregs, MII_BMCR, BMCR_RESET);
 994
 995         while (--tries) {
 996                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
 997                 if (result == TCVR_FAILURE)
 998                         return -1;
 999                 hp->sw_bmcr = result;
1000                 if (!(result & BMCR_RESET))
1001                         break;
1002                 udelay(20);
1003         }
1004         if (!tries) {
1005                 ASD(("BMCR RESET FAILED!\n"));
1006                 return -1;
1007         }
1008         ASD(("RESET_OK\n"));
1009
1010         /* Get fresh copies of the PHY registers. */
1011         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1012         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1013         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1014         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1015
1016         ASD(("UNISOLATE"));
1017         hp->sw_bmcr &= ~(BMCR_ISOLATE);
1018         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1019
1020         tries = TCVR_UNISOLATE_TRIES;
1021         while (--tries) {
1022                 result = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1023                 if (result == TCVR_FAILURE)
1024                         return -1;
1025                 if (!(result & BMCR_ISOLATE))
1026                         break;
1027                 udelay(20);
1028         }
1029         if (!tries) {
1030                 ASD((" FAILED!\n"));
1031                 return -1;
1032         }
1033         ASD((" SUCCESS and CSCONFIG_DFBYPASS\n"));
1034         if (!is_lucent_phy(hp)) {
1035                 result = happy_meal_tcvr_read(hp, tregs,
1036                                               DP83840_CSCONFIG);
1037                 happy_meal_tcvr_write(hp, tregs,
1038                                       DP83840_CSCONFIG, (result | CSCONFIG_DFBYPASS));
1039         }
1040         return 0;
1041 }
1042
1043 /* Figure out whether we have an internal or external transceiver.
1044  *
1045  * hp->happy_lock must be held
1046  */
1047 static void happy_meal_transceiver_check(struct happy_meal *hp, void __iomem *tregs)
1048 {
1049         unsigned long tconfig = hme_read32(hp, tregs + TCVR_CFG);
1050
1051         ASD(("happy_meal_transceiver_check: tcfg=%08lx ", tconfig));
1052         if (hp->happy_flags & HFLAG_POLL) {
1053                 /* If we are polling, we must stop to get the transceiver type. */
1054                 ASD(("<polling> "));
1055                 if (hp->tcvr_type == internal) {
1056                         if (tconfig & TCV_CFG_MDIO1) {
1057                                 ASD(("<internal> <poll stop> "));
1058                                 happy_meal_poll_stop(hp, tregs);
1059                                 hp->paddr = TCV_PADDR_ETX;
1060                                 hp->tcvr_type = external;
1061                                 ASD(("<external>\n"));
1062                                 tconfig &= ~(TCV_CFG_PENABLE);
1063                                 tconfig |= TCV_CFG_PSELECT;
1064                                 hme_write32(hp, tregs + TCVR_CFG, tconfig);
1065                         }
1066                 } else {
1067                         if (hp->tcvr_type == external) {
1068                                 ASD(("<external> "));
1069                                 if (!(hme_read32(hp, tregs + TCVR_STATUS) >> 16)) {
1070                                         ASD(("<poll stop> "));
1071                                         happy_meal_poll_stop(hp, tregs);
1072                                         hp->paddr = TCV_PADDR_ITX;
1073                                         hp->tcvr_type = internal;
1074                                         ASD(("<internal>\n"));
1075                                         hme_write32(hp, tregs + TCVR_CFG,
1076                                                     hme_read32(hp, tregs + TCVR_CFG) &
1077                                                     ~(TCV_CFG_PSELECT));
1078                                 }
1079                                 ASD(("\n"));
1080                         } else {
1081                                 ASD(("<none>\n"));
1082                         }
1083                 }
1084         } else {
1085                 u32 reread = hme_read32(hp, tregs + TCVR_CFG);
1086
1087                 /* Else we can just work off of the MDIO bits. */
1088                 ASD(("<not polling> "));
1089                 if (reread & TCV_CFG_MDIO1) {
1090                         hme_write32(hp, tregs + TCVR_CFG, tconfig | TCV_CFG_PSELECT);
1091                         hp->paddr = TCV_PADDR_ETX;
1092                         hp->tcvr_type = external;
1093                         ASD(("<external>\n"));
1094                 } else {
1095                         if (reread & TCV_CFG_MDIO0) {
1096                                 hme_write32(hp, tregs + TCVR_CFG,
1097                                             tconfig & ~(TCV_CFG_PSELECT));
1098                                 hp->paddr = TCV_PADDR_ITX;
1099                                 hp->tcvr_type = internal;
1100                                 ASD(("<internal>\n"));
1101                         } else {
1102                                 printk(KERN_ERR "happy meal: Transceiver and a coke please.");
1103                                 hp->tcvr_type = none; /* Grrr... */
1104                                 ASD(("<none>\n"));
1105                         }
1106                 }
1107         }
1108 }
1109
1110 /* The receive ring buffers are a bit tricky to get right.  Here goes...
1111  *
1112  * The buffers we dma into must be 64 byte aligned.  So we use a special
1113  * alloc_skb() routine for the happy meal to allocate 64 bytes more than
1114  * we really need.
1115  *
1116  * We use skb_reserve() to align the data block we get in the skb.  We
1117  * also program the etxregs->cfg register to use an offset of 2.  This
1118  * imperical constant plus the ethernet header size will always leave
1119  * us with a nicely aligned ip header once we pass things up to the
1120  * protocol layers.
1121  *
1122  * The numbers work out to:
1123  *
1124  *         Max ethernet frame size         1518
1125  *         Ethernet header size              14
1126  *         Happy Meal base offset             2
1127  *
1128  * Say a skb data area is at 0xf001b010, and its size alloced is
1129  * (ETH_FRAME_LEN + 64 + 2) = (1514 + 64 + 2) = 1580 bytes.
1130  *
1131  * First our alloc_skb() routine aligns the data base to a 64 byte
1132  * boundary.  We now have 0xf001b040 as our skb data address.  We
1133  * plug this into the receive descriptor address.
1134  *
1135  * Next, we skb_reserve() 2 bytes to account for the Happy Meal offset.
1136  * So now the data we will end up looking at starts at 0xf001b042.  When
1137  * the packet arrives, we will check out the size received and subtract
1138  * this from the skb->length.  Then we just pass the packet up to the
1139  * protocols as is, and allocate a new skb to replace this slot we have
1140  * just received from.
1141  *
1142  * The ethernet layer will strip the ether header from the front of the
1143  * skb we just sent to it, this leaves us with the ip header sitting
1144  * nicely aligned at 0xf001b050.  Also, for tcp and udp packets the
1145  * Happy Meal has even checksummed the tcp/udp data for us.  The 16
1146  * bit checksum is obtained from the low bits of the receive descriptor
1147  * flags, thus:
1148  *
1149  *      skb->csum = rxd->rx_flags & 0xffff;
1150  *      skb->ip_summed = CHECKSUM_COMPLETE;
1151  *
1152  * before sending off the skb to the protocols, and we are good as gold.
1153  */
1154 static void happy_meal_clean_rings(struct happy_meal *hp)
1155 {
1156         int i;
1157
1158         for (i = 0; i < RX_RING_SIZE; i++) {
1159                 if (hp->rx_skbs[i] != NULL) {
1160                         struct sk_buff *skb = hp->rx_skbs[i];
1161                         struct happy_meal_rxd *rxd;
1162                         u32 dma_addr;
1163
1164                         rxd = &hp->happy_block->happy_meal_rxd[i];
1165                         dma_addr = hme_read_desc32(hp, &rxd->rx_addr);
1166                         dma_unmap_single(hp->dma_dev, dma_addr,
1167                                          RX_BUF_ALLOC_SIZE, DMA_FROM_DEVICE);
1168                         dev_kfree_skb_any(skb);
1169                         hp->rx_skbs[i] = NULL;
1170                 }
1171         }
1172
1173         for (i = 0; i < TX_RING_SIZE; i++) {
1174                 if (hp->tx_skbs[i] != NULL) {
1175                         struct sk_buff *skb = hp->tx_skbs[i];
1176                         struct happy_meal_txd *txd;
1177                         u32 dma_addr;
1178                         int frag;
1179
1180                         hp->tx_skbs[i] = NULL;
1181
1182                         for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1183                                 txd = &hp->happy_block->happy_meal_txd[i];
1184                                 dma_addr = hme_read_desc32(hp, &txd->tx_addr);
1185                                 if (!frag)
1186                                         dma_unmap_single(hp->dma_dev, dma_addr,
1187                                                          (hme_read_desc32(hp, &txd->tx_flags)
1188                                                           & TXFLAG_SIZE),
1189                                                          DMA_TO_DEVICE);
1190                                 else
1191                                         dma_unmap_page(hp->dma_dev, dma_addr,
1192                                                          (hme_read_desc32(hp, &txd->tx_flags)
1193                                                           & TXFLAG_SIZE),
1194                                                          DMA_TO_DEVICE);
1195
1196                                 if (frag != skb_shinfo(skb)->nr_frags)
1197                                         i++;
1198                         }
1199
1200                         dev_kfree_skb_any(skb);
1201                 }
1202         }
1203 }
1204
1205 /* hp->happy_lock must be held */
1206 static void happy_meal_init_rings(struct happy_meal *hp)
1207 {
1208         struct hmeal_init_block *hb = hp->happy_block;
1209         int i;
1210
1211         HMD(("happy_meal_init_rings: counters to zero, "));
1212         hp->rx_new = hp->rx_old = hp->tx_new = hp->tx_old = 0;
1213
1214         /* Free any skippy bufs left around in the rings. */
1215         HMD(("clean, "));
1216         happy_meal_clean_rings(hp);
1217
1218         /* Now get new skippy bufs for the receive ring. */
1219         HMD(("init rxring, "));
1220         for (i = 0; i < RX_RING_SIZE; i++) {
1221                 struct sk_buff *skb;
1222                 u32 mapping;
1223
1224                 skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
1225                 if (!skb) {
1226                         hme_write_rxd(hp, &hb->happy_meal_rxd[i], 0, 0);
1227                         continue;
1228                 }
1229                 hp->rx_skbs[i] = skb;
1230
1231                 /* Because we reserve afterwards. */
1232                 skb_put(skb, (ETH_FRAME_LEN + RX_OFFSET + 4));
1233                 mapping = dma_map_single(hp->dma_dev, skb->data, RX_BUF_ALLOC_SIZE,
1234                                          DMA_FROM_DEVICE);
1235                 if (dma_mapping_error(hp->dma_dev, mapping)) {
1236                         dev_kfree_skb_any(skb);
1237                         hme_write_rxd(hp, &hb->happy_meal_rxd[i], 0, 0);
1238                         continue;
1239                 }
1240                 hme_write_rxd(hp, &hb->happy_meal_rxd[i],
1241                               (RXFLAG_OWN | ((RX_BUF_ALLOC_SIZE - RX_OFFSET) << 16)),
1242                               mapping);
1243                 skb_reserve(skb, RX_OFFSET);
1244         }
1245
1246         HMD(("init txring, "));
1247         for (i = 0; i < TX_RING_SIZE; i++)
1248                 hme_write_txd(hp, &hb->happy_meal_txd[i], 0, 0);
1249
1250         HMD(("done\n"));
1251 }
1252
1253 /* hp->happy_lock must be held */
1254 static void
1255 happy_meal_begin_auto_negotiation(struct happy_meal *hp,
1256                                   void __iomem *tregs,
1257                                   const struct ethtool_link_ksettings *ep)
1258 {
1259         int timeout;
1260
1261         /* Read all of the registers we are interested in now. */
1262         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1263         hp->sw_bmcr      = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1264         hp->sw_physid1   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID1);
1265         hp->sw_physid2   = happy_meal_tcvr_read(hp, tregs, MII_PHYSID2);
1266
1267         /* XXX Check BMSR_ANEGCAPABLE, should not be necessary though. */
1268
1269         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1270         if (!ep || ep->base.autoneg == AUTONEG_ENABLE) {
1271                 /* Advertise everything we can support. */
1272                 if (hp->sw_bmsr & BMSR_10HALF)
1273                         hp->sw_advertise |= (ADVERTISE_10HALF);
1274                 else
1275                         hp->sw_advertise &= ~(ADVERTISE_10HALF);
1276
1277                 if (hp->sw_bmsr & BMSR_10FULL)
1278                         hp->sw_advertise |= (ADVERTISE_10FULL);
1279                 else
1280                         hp->sw_advertise &= ~(ADVERTISE_10FULL);
1281                 if (hp->sw_bmsr & BMSR_100HALF)
1282                         hp->sw_advertise |= (ADVERTISE_100HALF);
1283                 else
1284                         hp->sw_advertise &= ~(ADVERTISE_100HALF);
1285                 if (hp->sw_bmsr & BMSR_100FULL)
1286                         hp->sw_advertise |= (ADVERTISE_100FULL);
1287                 else
1288                         hp->sw_advertise &= ~(ADVERTISE_100FULL);
1289                 happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1290
1291                 /* XXX Currently no Happy Meal cards I know off support 100BaseT4,
1292                  * XXX and this is because the DP83840 does not support it, changes
1293                  * XXX would need to be made to the tx/rx logic in the driver as well
1294                  * XXX so I completely skip checking for it in the BMSR for now.
1295                  */
1296
1297 #ifdef AUTO_SWITCH_DEBUG
1298                 ASD(("%s: Advertising [ ", hp->dev->name));
1299                 if (hp->sw_advertise & ADVERTISE_10HALF)
1300                         ASD(("10H "));
1301                 if (hp->sw_advertise & ADVERTISE_10FULL)
1302                         ASD(("10F "));
1303                 if (hp->sw_advertise & ADVERTISE_100HALF)
1304                         ASD(("100H "));
1305                 if (hp->sw_advertise & ADVERTISE_100FULL)
1306                         ASD(("100F "));
1307 #endif
1308
1309                 /* Enable Auto-Negotiation, this is usually on already... */
1310                 hp->sw_bmcr |= BMCR_ANENABLE;
1311                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1312
1313                 /* Restart it to make sure it is going. */
1314                 hp->sw_bmcr |= BMCR_ANRESTART;
1315                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1316
1317                 /* BMCR_ANRESTART self clears when the process has begun. */
1318
1319                 timeout = 64;  /* More than enough. */
1320                 while (--timeout) {
1321                         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1322                         if (!(hp->sw_bmcr & BMCR_ANRESTART))
1323                                 break; /* got it. */
1324                         udelay(10);
1325                 }
1326                 if (!timeout) {
1327                         printk(KERN_ERR "%s: Happy Meal would not start auto negotiation "
1328                                "BMCR=0x%04x\n", hp->dev->name, hp->sw_bmcr);
1329                         printk(KERN_NOTICE "%s: Performing force link detection.\n",
1330                                hp->dev->name);
1331                         goto force_link;
1332                 } else {
1333                         hp->timer_state = arbwait;
1334                 }
1335         } else {
1336 force_link:
1337                 /* Force the link up, trying first a particular mode.
1338                  * Either we are here at the request of ethtool or
1339                  * because the Happy Meal would not start to autoneg.
1340                  */
1341
1342                 /* Disable auto-negotiation in BMCR, enable the duplex and
1343                  * speed setting, init the timer state machine, and fire it off.
1344                  */
1345                 if (!ep || ep->base.autoneg == AUTONEG_ENABLE) {
1346                         hp->sw_bmcr = BMCR_SPEED100;
1347                 } else {
1348                         if (ep->base.speed == SPEED_100)
1349                                 hp->sw_bmcr = BMCR_SPEED100;
1350                         else
1351                                 hp->sw_bmcr = 0;
1352                         if (ep->base.duplex == DUPLEX_FULL)
1353                                 hp->sw_bmcr |= BMCR_FULLDPLX;
1354                 }
1355                 happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1356
1357                 if (!is_lucent_phy(hp)) {
1358                         /* OK, seems we need do disable the transceiver for the first
1359                          * tick to make sure we get an accurate link state at the
1360                          * second tick.
1361                          */
1362                         hp->sw_csconfig = happy_meal_tcvr_read(hp, tregs,
1363                                                                DP83840_CSCONFIG);
1364                         hp->sw_csconfig &= ~(CSCONFIG_TCVDISAB);
1365                         happy_meal_tcvr_write(hp, tregs, DP83840_CSCONFIG,
1366                                               hp->sw_csconfig);
1367                 }
1368                 hp->timer_state = ltrywait;
1369         }
1370
1371         hp->timer_ticks = 0;
1372         hp->happy_timer.expires = jiffies + (12 * HZ)/10;  /* 1.2 sec. */
1373         add_timer(&hp->happy_timer);
1374 }
1375
1376 /* hp->happy_lock must be held */
1377 static int happy_meal_init(struct happy_meal *hp)
1378 {
1379         const unsigned char *e = &hp->dev->dev_addr[0];
1380         void __iomem *gregs        = hp->gregs;
1381         void __iomem *etxregs      = hp->etxregs;
1382         void __iomem *erxregs      = hp->erxregs;
1383         void __iomem *bregs        = hp->bigmacregs;
1384         void __iomem *tregs        = hp->tcvregs;
1385         u32 regtmp, rxcfg;
1386
1387         /* If auto-negotiation timer is running, kill it. */
1388         del_timer(&hp->happy_timer);
1389
1390         HMD(("happy_meal_init: happy_flags[%08x] ",
1391              hp->happy_flags));
1392         if (!(hp->happy_flags & HFLAG_INIT)) {
1393                 HMD(("set HFLAG_INIT, "));
1394                 hp->happy_flags |= HFLAG_INIT;
1395                 happy_meal_get_counters(hp, bregs);
1396         }
1397
1398         /* Stop polling. */
1399         HMD(("to happy_meal_poll_stop\n"));
1400         happy_meal_poll_stop(hp, tregs);
1401
1402         /* Stop transmitter and receiver. */
1403         HMD(("happy_meal_init: to happy_meal_stop\n"));
1404         happy_meal_stop(hp, gregs);
1405
1406         /* Alloc and reset the tx/rx descriptor chains. */
1407         HMD(("happy_meal_init: to happy_meal_init_rings\n"));
1408         happy_meal_init_rings(hp);
1409
1410         /* Shut up the MIF. */
1411         HMD(("happy_meal_init: Disable all MIF irqs (old[%08x]), ",
1412              hme_read32(hp, tregs + TCVR_IMASK)));
1413         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1414
1415         /* See if we can enable the MIF frame on this card to speak to the DP83840. */
1416         if (hp->happy_flags & HFLAG_FENABLE) {
1417                 HMD(("use frame old[%08x], ",
1418                      hme_read32(hp, tregs + TCVR_CFG)));
1419                 hme_write32(hp, tregs + TCVR_CFG,
1420                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1421         } else {
1422                 HMD(("use bitbang old[%08x], ",
1423                      hme_read32(hp, tregs + TCVR_CFG)));
1424                 hme_write32(hp, tregs + TCVR_CFG,
1425                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1426         }
1427
1428         /* Check the state of the transceiver. */
1429         HMD(("to happy_meal_transceiver_check\n"));
1430         happy_meal_transceiver_check(hp, tregs);
1431
1432         /* Put the Big Mac into a sane state. */
1433         HMD(("happy_meal_init: "));
1434         switch(hp->tcvr_type) {
1435         case none:
1436                 /* Cannot operate if we don't know the transceiver type! */
1437                 HMD(("AAIEEE no transceiver type, EAGAIN"));
1438                 return -EAGAIN;
1439
1440         case internal:
1441                 /* Using the MII buffers. */
1442                 HMD(("internal, using MII, "));
1443                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1444                 break;
1445
1446         case external:
1447                 /* Not using the MII, disable it. */
1448                 HMD(("external, disable MII, "));
1449                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1450                 break;
1451         }
1452
1453         if (happy_meal_tcvr_reset(hp, tregs))
1454                 return -EAGAIN;
1455
1456         /* Reset the Happy Meal Big Mac transceiver and the receiver. */
1457         HMD(("tx/rx reset, "));
1458         happy_meal_tx_reset(hp, bregs);
1459         happy_meal_rx_reset(hp, bregs);
1460
1461         /* Set jam size and inter-packet gaps to reasonable defaults. */
1462         HMD(("jsize/ipg1/ipg2, "));
1463         hme_write32(hp, bregs + BMAC_JSIZE, DEFAULT_JAMSIZE);
1464         hme_write32(hp, bregs + BMAC_IGAP1, DEFAULT_IPG1);
1465         hme_write32(hp, bregs + BMAC_IGAP2, DEFAULT_IPG2);
1466
1467         /* Load up the MAC address and random seed. */
1468         HMD(("rseed/macaddr, "));
1469
1470         /* The docs recommend to use the 10LSB of our MAC here. */
1471         hme_write32(hp, bregs + BMAC_RSEED, ((e[5] | e[4]<<8)&0x3ff));
1472
1473         hme_write32(hp, bregs + BMAC_MACADDR2, ((e[4] << 8) | e[5]));
1474         hme_write32(hp, bregs + BMAC_MACADDR1, ((e[2] << 8) | e[3]));
1475         hme_write32(hp, bregs + BMAC_MACADDR0, ((e[0] << 8) | e[1]));
1476
1477         HMD(("htable, "));
1478         if ((hp->dev->flags & IFF_ALLMULTI) ||
1479             (netdev_mc_count(hp->dev) > 64)) {
1480                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
1481                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
1482                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
1483                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
1484         } else if ((hp->dev->flags & IFF_PROMISC) == 0) {
1485                 u16 hash_table[4];
1486                 struct netdev_hw_addr *ha;
1487                 u32 crc;
1488
1489                 memset(hash_table, 0, sizeof(hash_table));
1490                 netdev_for_each_mc_addr(ha, hp->dev) {
1491                         crc = ether_crc_le(6, ha->addr);
1492                         crc >>= 26;
1493                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
1494                 }
1495                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
1496                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
1497                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
1498                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
1499         } else {
1500                 hme_write32(hp, bregs + BMAC_HTABLE3, 0);
1501                 hme_write32(hp, bregs + BMAC_HTABLE2, 0);
1502                 hme_write32(hp, bregs + BMAC_HTABLE1, 0);
1503                 hme_write32(hp, bregs + BMAC_HTABLE0, 0);
1504         }
1505
1506         /* Set the RX and TX ring ptrs. */
1507         HMD(("ring ptrs rxr[%08x] txr[%08x]\n",
1508              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)),
1509              ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0))));
1510         hme_write32(hp, erxregs + ERX_RING,
1511                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)));
1512         hme_write32(hp, etxregs + ETX_RING,
1513                     ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_txd, 0)));
1514
1515         /* Parity issues in the ERX unit of some HME revisions can cause some
1516          * registers to not be written unless their parity is even.  Detect such
1517          * lost writes and simply rewrite with a low bit set (which will be ignored
1518          * since the rxring needs to be 2K aligned).
1519          */
1520         if (hme_read32(hp, erxregs + ERX_RING) !=
1521             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0)))
1522                 hme_write32(hp, erxregs + ERX_RING,
1523                             ((__u32)hp->hblock_dvma + hblock_offset(happy_meal_rxd, 0))
1524                             | 0x4);
1525
1526         /* Set the supported burst sizes. */
1527         HMD(("happy_meal_init: old[%08x] bursts<",
1528              hme_read32(hp, gregs + GREG_CFG)));
1529
1530 #ifndef CONFIG_SPARC
1531         /* It is always PCI and can handle 64byte bursts. */
1532         hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST64);
1533 #else
1534         if ((hp->happy_bursts & DMA_BURST64) &&
1535             ((hp->happy_flags & HFLAG_PCI) != 0
1536 #ifdef CONFIG_SBUS
1537              || sbus_can_burst64()
1538 #endif
1539              || 0)) {
1540                 u32 gcfg = GREG_CFG_BURST64;
1541
1542                 /* I have no idea if I should set the extended
1543                  * transfer mode bit for Cheerio, so for now I
1544                  * do not.  -DaveM
1545                  */
1546 #ifdef CONFIG_SBUS
1547                 if ((hp->happy_flags & HFLAG_PCI) == 0) {
1548                         struct platform_device *op = hp->happy_dev;
1549                         if (sbus_can_dma_64bit()) {
1550                                 sbus_set_sbus64(&op->dev,
1551                                                 hp->happy_bursts);
1552                                 gcfg |= GREG_CFG_64BIT;
1553                         }
1554                 }
1555 #endif
1556
1557                 HMD(("64>"));
1558                 hme_write32(hp, gregs + GREG_CFG, gcfg);
1559         } else if (hp->happy_bursts & DMA_BURST32) {
1560                 HMD(("32>"));
1561                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST32);
1562         } else if (hp->happy_bursts & DMA_BURST16) {
1563                 HMD(("16>"));
1564                 hme_write32(hp, gregs + GREG_CFG, GREG_CFG_BURST16);
1565         } else {
1566                 HMD(("XXX>"));
1567                 hme_write32(hp, gregs + GREG_CFG, 0);
1568         }
1569 #endif /* CONFIG_SPARC */
1570
1571         /* Turn off interrupts we do not want to hear. */
1572         HMD((", enable global interrupts, "));
1573         hme_write32(hp, gregs + GREG_IMASK,
1574                     (GREG_IMASK_GOTFRAME | GREG_IMASK_RCNTEXP |
1575                      GREG_IMASK_SENTFRAME | GREG_IMASK_TXPERR));
1576
1577         /* Set the transmit ring buffer size. */
1578         HMD(("tx rsize=%d oreg[%08x], ", (int)TX_RING_SIZE,
1579              hme_read32(hp, etxregs + ETX_RSIZE)));
1580         hme_write32(hp, etxregs + ETX_RSIZE, (TX_RING_SIZE >> ETX_RSIZE_SHIFT) - 1);
1581
1582         /* Enable transmitter DVMA. */
1583         HMD(("tx dma enable old[%08x], ",
1584              hme_read32(hp, etxregs + ETX_CFG)));
1585         hme_write32(hp, etxregs + ETX_CFG,
1586                     hme_read32(hp, etxregs + ETX_CFG) | ETX_CFG_DMAENABLE);
1587
1588         /* This chip really rots, for the receiver sometimes when you
1589          * write to its control registers not all the bits get there
1590          * properly.  I cannot think of a sane way to provide complete
1591          * coverage for this hardware bug yet.
1592          */
1593         HMD(("erx regs bug old[%08x]\n",
1594              hme_read32(hp, erxregs + ERX_CFG)));
1595         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1596         regtmp = hme_read32(hp, erxregs + ERX_CFG);
1597         hme_write32(hp, erxregs + ERX_CFG, ERX_CFG_DEFAULT(RX_OFFSET));
1598         if (hme_read32(hp, erxregs + ERX_CFG) != ERX_CFG_DEFAULT(RX_OFFSET)) {
1599                 printk(KERN_ERR "happy meal: Eieee, rx config register gets greasy fries.\n");
1600                 printk(KERN_ERR "happy meal: Trying to set %08x, reread gives %08x\n",
1601                        ERX_CFG_DEFAULT(RX_OFFSET), regtmp);
1602                 /* XXX Should return failure here... */
1603         }
1604
1605         /* Enable Big Mac hash table filter. */
1606         HMD(("happy_meal_init: enable hash rx_cfg_old[%08x], ",
1607              hme_read32(hp, bregs + BMAC_RXCFG)));
1608         rxcfg = BIGMAC_RXCFG_HENABLE | BIGMAC_RXCFG_REJME;
1609         if (hp->dev->flags & IFF_PROMISC)
1610                 rxcfg |= BIGMAC_RXCFG_PMISC;
1611         hme_write32(hp, bregs + BMAC_RXCFG, rxcfg);
1612
1613         /* Let the bits settle in the chip. */
1614         udelay(10);
1615
1616         /* Ok, configure the Big Mac transmitter. */
1617         HMD(("BIGMAC init, "));
1618         regtmp = 0;
1619         if (hp->happy_flags & HFLAG_FULL)
1620                 regtmp |= BIGMAC_TXCFG_FULLDPLX;
1621
1622         /* Don't turn on the "don't give up" bit for now.  It could cause hme
1623          * to deadlock with the PHY if a Jabber occurs.
1624          */
1625         hme_write32(hp, bregs + BMAC_TXCFG, regtmp /*| BIGMAC_TXCFG_DGIVEUP*/);
1626
1627         /* Give up after 16 TX attempts. */
1628         hme_write32(hp, bregs + BMAC_ALIMIT, 16);
1629
1630         /* Enable the output drivers no matter what. */
1631         regtmp = BIGMAC_XCFG_ODENABLE;
1632
1633         /* If card can do lance mode, enable it. */
1634         if (hp->happy_flags & HFLAG_LANCE)
1635                 regtmp |= (DEFAULT_IPG0 << 5) | BIGMAC_XCFG_LANCE;
1636
1637         /* Disable the MII buffers if using external transceiver. */
1638         if (hp->tcvr_type == external)
1639                 regtmp |= BIGMAC_XCFG_MIIDISAB;
1640
1641         HMD(("XIF config old[%08x], ",
1642              hme_read32(hp, bregs + BMAC_XIFCFG)));
1643         hme_write32(hp, bregs + BMAC_XIFCFG, regtmp);
1644
1645         /* Start things up. */
1646         HMD(("tx old[%08x] and rx [%08x] ON!\n",
1647              hme_read32(hp, bregs + BMAC_TXCFG),
1648              hme_read32(hp, bregs + BMAC_RXCFG)));
1649
1650         /* Set larger TX/RX size to allow for 802.1q */
1651         hme_write32(hp, bregs + BMAC_TXMAX, ETH_FRAME_LEN + 8);
1652         hme_write32(hp, bregs + BMAC_RXMAX, ETH_FRAME_LEN + 8);
1653
1654         hme_write32(hp, bregs + BMAC_TXCFG,
1655                     hme_read32(hp, bregs + BMAC_TXCFG) | BIGMAC_TXCFG_ENABLE);
1656         hme_write32(hp, bregs + BMAC_RXCFG,
1657                     hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_ENABLE);
1658
1659         /* Get the autonegotiation started, and the watch timer ticking. */
1660         happy_meal_begin_auto_negotiation(hp, tregs, NULL);
1661
1662         /* Success. */
1663         return 0;
1664 }
1665
1666 /* hp->happy_lock must be held */
1667 static void happy_meal_set_initial_advertisement(struct happy_meal *hp)
1668 {
1669         void __iomem *tregs     = hp->tcvregs;
1670         void __iomem *bregs     = hp->bigmacregs;
1671         void __iomem *gregs     = hp->gregs;
1672
1673         happy_meal_stop(hp, gregs);
1674         hme_write32(hp, tregs + TCVR_IMASK, 0xffff);
1675         if (hp->happy_flags & HFLAG_FENABLE)
1676                 hme_write32(hp, tregs + TCVR_CFG,
1677                             hme_read32(hp, tregs + TCVR_CFG) & ~(TCV_CFG_BENABLE));
1678         else
1679                 hme_write32(hp, tregs + TCVR_CFG,
1680                             hme_read32(hp, tregs + TCVR_CFG) | TCV_CFG_BENABLE);
1681         happy_meal_transceiver_check(hp, tregs);
1682         switch(hp->tcvr_type) {
1683         case none:
1684                 return;
1685         case internal:
1686                 hme_write32(hp, bregs + BMAC_XIFCFG, 0);
1687                 break;
1688         case external:
1689                 hme_write32(hp, bregs + BMAC_XIFCFG, BIGMAC_XCFG_MIIDISAB);
1690                 break;
1691         }
1692         if (happy_meal_tcvr_reset(hp, tregs))
1693                 return;
1694
1695         /* Latch PHY registers as of now. */
1696         hp->sw_bmsr      = happy_meal_tcvr_read(hp, tregs, MII_BMSR);
1697         hp->sw_advertise = happy_meal_tcvr_read(hp, tregs, MII_ADVERTISE);
1698
1699         /* Advertise everything we can support. */
1700         if (hp->sw_bmsr & BMSR_10HALF)
1701                 hp->sw_advertise |= (ADVERTISE_10HALF);
1702         else
1703                 hp->sw_advertise &= ~(ADVERTISE_10HALF);
1704
1705         if (hp->sw_bmsr & BMSR_10FULL)
1706                 hp->sw_advertise |= (ADVERTISE_10FULL);
1707         else
1708                 hp->sw_advertise &= ~(ADVERTISE_10FULL);
1709         if (hp->sw_bmsr & BMSR_100HALF)
1710                 hp->sw_advertise |= (ADVERTISE_100HALF);
1711         else
1712                 hp->sw_advertise &= ~(ADVERTISE_100HALF);
1713         if (hp->sw_bmsr & BMSR_100FULL)
1714                 hp->sw_advertise |= (ADVERTISE_100FULL);
1715         else
1716                 hp->sw_advertise &= ~(ADVERTISE_100FULL);
1717
1718         /* Update the PHY advertisement register. */
1719         happy_meal_tcvr_write(hp, tregs, MII_ADVERTISE, hp->sw_advertise);
1720 }
1721
1722 /* Once status is latched (by happy_meal_interrupt) it is cleared by
1723  * the hardware, so we cannot re-read it and get a correct value.
1724  *
1725  * hp->happy_lock must be held
1726  */
1727 static int happy_meal_is_not_so_happy(struct happy_meal *hp, u32 status)
1728 {
1729         int reset = 0;
1730
1731         /* Only print messages for non-counter related interrupts. */
1732         if (status & (GREG_STAT_STSTERR | GREG_STAT_TFIFO_UND |
1733                       GREG_STAT_MAXPKTERR | GREG_STAT_RXERR |
1734                       GREG_STAT_RXPERR | GREG_STAT_RXTERR | GREG_STAT_EOPERR |
1735                       GREG_STAT_MIFIRQ | GREG_STAT_TXEACK | GREG_STAT_TXLERR |
1736                       GREG_STAT_TXPERR | GREG_STAT_TXTERR | GREG_STAT_SLVERR |
1737                       GREG_STAT_SLVPERR))
1738                 printk(KERN_ERR "%s: Error interrupt for happy meal, status = %08x\n",
1739                        hp->dev->name, status);
1740
1741         if (status & GREG_STAT_RFIFOVF) {
1742                 /* Receive FIFO overflow is harmless and the hardware will take
1743                    care of it, just some packets are lost. Who cares. */
1744                 printk(KERN_DEBUG "%s: Happy Meal receive FIFO overflow.\n", hp->dev->name);
1745         }
1746
1747         if (status & GREG_STAT_STSTERR) {
1748                 /* BigMAC SQE link test failed. */
1749                 printk(KERN_ERR "%s: Happy Meal BigMAC SQE test failed.\n", hp->dev->name);
1750                 reset = 1;
1751         }
1752
1753         if (status & GREG_STAT_TFIFO_UND) {
1754                 /* Transmit FIFO underrun, again DMA error likely. */
1755                 printk(KERN_ERR "%s: Happy Meal transmitter FIFO underrun, DMA error.\n",
1756                        hp->dev->name);
1757                 reset = 1;
1758         }
1759
1760         if (status & GREG_STAT_MAXPKTERR) {
1761                 /* Driver error, tried to transmit something larger
1762                  * than ethernet max mtu.
1763                  */
1764                 printk(KERN_ERR "%s: Happy Meal MAX Packet size error.\n", hp->dev->name);
1765                 reset = 1;
1766         }
1767
1768         if (status & GREG_STAT_NORXD) {
1769                 /* This is harmless, it just means the system is
1770                  * quite loaded and the incoming packet rate was
1771                  * faster than the interrupt handler could keep up
1772                  * with.
1773                  */
1774                 printk(KERN_INFO "%s: Happy Meal out of receive "
1775                        "descriptors, packet dropped.\n",
1776                        hp->dev->name);
1777         }
1778
1779         if (status & (GREG_STAT_RXERR|GREG_STAT_RXPERR|GREG_STAT_RXTERR)) {
1780                 /* All sorts of DMA receive errors. */
1781                 printk(KERN_ERR "%s: Happy Meal rx DMA errors [ ", hp->dev->name);
1782                 if (status & GREG_STAT_RXERR)
1783                         printk("GenericError ");
1784                 if (status & GREG_STAT_RXPERR)
1785                         printk("ParityError ");
1786                 if (status & GREG_STAT_RXTERR)
1787                         printk("RxTagBotch ");
1788                 printk("]\n");
1789                 reset = 1;
1790         }
1791
1792         if (status & GREG_STAT_EOPERR) {
1793                 /* Driver bug, didn't set EOP bit in tx descriptor given
1794                  * to the happy meal.
1795                  */
1796                 printk(KERN_ERR "%s: EOP not set in happy meal transmit descriptor!\n",
1797                        hp->dev->name);
1798                 reset = 1;
1799         }
1800
1801         if (status & GREG_STAT_MIFIRQ) {
1802                 /* MIF signalled an interrupt, were we polling it? */
1803                 printk(KERN_ERR "%s: Happy Meal MIF interrupt.\n", hp->dev->name);
1804         }
1805
1806         if (status &
1807             (GREG_STAT_TXEACK|GREG_STAT_TXLERR|GREG_STAT_TXPERR|GREG_STAT_TXTERR)) {
1808                 /* All sorts of transmit DMA errors. */
1809                 printk(KERN_ERR "%s: Happy Meal tx DMA errors [ ", hp->dev->name);
1810                 if (status & GREG_STAT_TXEACK)
1811                         printk("GenericError ");
1812                 if (status & GREG_STAT_TXLERR)
1813                         printk("LateError ");
1814                 if (status & GREG_STAT_TXPERR)
1815                         printk("ParityError ");
1816                 if (status & GREG_STAT_TXTERR)
1817                         printk("TagBotch ");
1818                 printk("]\n");
1819                 reset = 1;
1820         }
1821
1822         if (status & (GREG_STAT_SLVERR|GREG_STAT_SLVPERR)) {
1823                 /* Bus or parity error when cpu accessed happy meal registers
1824                  * or it's internal FIFO's.  Should never see this.
1825                  */
1826                 printk(KERN_ERR "%s: Happy Meal register access SBUS slave (%s) error.\n",
1827                        hp->dev->name,
1828                        (status & GREG_STAT_SLVPERR) ? "parity" : "generic");
1829                 reset = 1;
1830         }
1831
1832         if (reset) {
1833                 printk(KERN_NOTICE "%s: Resetting...\n", hp->dev->name);
1834                 happy_meal_init(hp);
1835                 return 1;
1836         }
1837         return 0;
1838 }
1839
1840 /* hp->happy_lock must be held */
1841 static void happy_meal_mif_interrupt(struct happy_meal *hp)
1842 {
1843         void __iomem *tregs = hp->tcvregs;
1844
1845         printk(KERN_INFO "%s: Link status change.\n", hp->dev->name);
1846         hp->sw_bmcr = happy_meal_tcvr_read(hp, tregs, MII_BMCR);
1847         hp->sw_lpa = happy_meal_tcvr_read(hp, tregs, MII_LPA);
1848
1849         /* Use the fastest transmission protocol possible. */
1850         if (hp->sw_lpa & LPA_100FULL) {
1851                 printk(KERN_INFO "%s: Switching to 100Mbps at full duplex.", hp->dev->name);
1852                 hp->sw_bmcr |= (BMCR_FULLDPLX | BMCR_SPEED100);
1853         } else if (hp->sw_lpa & LPA_100HALF) {
1854                 printk(KERN_INFO "%s: Switching to 100MBps at half duplex.", hp->dev->name);
1855                 hp->sw_bmcr |= BMCR_SPEED100;
1856         } else if (hp->sw_lpa & LPA_10FULL) {
1857                 printk(KERN_INFO "%s: Switching to 10MBps at full duplex.", hp->dev->name);
1858                 hp->sw_bmcr |= BMCR_FULLDPLX;
1859         } else {
1860                 printk(KERN_INFO "%s: Using 10Mbps at half duplex.", hp->dev->name);
1861         }
1862         happy_meal_tcvr_write(hp, tregs, MII_BMCR, hp->sw_bmcr);
1863
1864         /* Finally stop polling and shut up the MIF. */
1865         happy_meal_poll_stop(hp, tregs);
1866 }
1867
1868 #ifdef TXDEBUG
1869 #define TXD(x) printk x
1870 #else
1871 #define TXD(x)
1872 #endif
1873
1874 /* hp->happy_lock must be held */
1875 static void happy_meal_tx(struct happy_meal *hp)
1876 {
1877         struct happy_meal_txd *txbase = &hp->happy_block->happy_meal_txd[0];
1878         struct happy_meal_txd *this;
1879         struct net_device *dev = hp->dev;
1880         int elem;
1881
1882         elem = hp->tx_old;
1883         TXD(("TX<"));
1884         while (elem != hp->tx_new) {
1885                 struct sk_buff *skb;
1886                 u32 flags, dma_addr, dma_len;
1887                 int frag;
1888
1889                 TXD(("[%d]", elem));
1890                 this = &txbase[elem];
1891                 flags = hme_read_desc32(hp, &this->tx_flags);
1892                 if (flags & TXFLAG_OWN)
1893                         break;
1894                 skb = hp->tx_skbs[elem];
1895                 if (skb_shinfo(skb)->nr_frags) {
1896                         int last;
1897
1898                         last = elem + skb_shinfo(skb)->nr_frags;
1899                         last &= (TX_RING_SIZE - 1);
1900                         flags = hme_read_desc32(hp, &txbase[last].tx_flags);
1901                         if (flags & TXFLAG_OWN)
1902                                 break;
1903                 }
1904                 hp->tx_skbs[elem] = NULL;
1905                 dev->stats.tx_bytes += skb->len;
1906
1907                 for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
1908                         dma_addr = hme_read_desc32(hp, &this->tx_addr);
1909                         dma_len = hme_read_desc32(hp, &this->tx_flags);
1910
1911                         dma_len &= TXFLAG_SIZE;
1912                         if (!frag)
1913                                 dma_unmap_single(hp->dma_dev, dma_addr, dma_len, DMA_TO_DEVICE);
1914                         else
1915                                 dma_unmap_page(hp->dma_dev, dma_addr, dma_len, DMA_TO_DEVICE);
1916
1917                         elem = NEXT_TX(elem);
1918                         this = &txbase[elem];
1919                 }
1920
1921                 dev_consume_skb_irq(skb);
1922                 dev->stats.tx_packets++;
1923         }
1924         hp->tx_old = elem;
1925         TXD((">"));
1926
1927         if (netif_queue_stopped(dev) &&
1928             TX_BUFFS_AVAIL(hp) > (MAX_SKB_FRAGS + 1))
1929                 netif_wake_queue(dev);
1930 }
1931
1932 #ifdef RXDEBUG
1933 #define RXD(x) printk x
1934 #else
1935 #define RXD(x)
1936 #endif
1937
1938 /* Originally I used to handle the allocation failure by just giving back just
1939  * that one ring buffer to the happy meal.  Problem is that usually when that
1940  * condition is triggered, the happy meal expects you to do something reasonable
1941  * with all of the packets it has DMA'd in.  So now I just drop the entire
1942  * ring when we cannot get a new skb and give them all back to the happy meal,
1943  * maybe things will be "happier" now.
1944  *
1945  * hp->happy_lock must be held
1946  */
1947 static void happy_meal_rx(struct happy_meal *hp, struct net_device *dev)
1948 {
1949         struct happy_meal_rxd *rxbase = &hp->happy_block->happy_meal_rxd[0];
1950         struct happy_meal_rxd *this;
1951         int elem = hp->rx_new, drops = 0;
1952         u32 flags;
1953
1954         RXD(("RX<"));
1955         this = &rxbase[elem];
1956         while (!((flags = hme_read_desc32(hp, &this->rx_flags)) & RXFLAG_OWN)) {
1957                 struct sk_buff *skb;
1958                 int len = flags >> 16;
1959                 u16 csum = flags & RXFLAG_CSUM;
1960                 u32 dma_addr = hme_read_desc32(hp, &this->rx_addr);
1961
1962                 RXD(("[%d ", elem));
1963
1964                 /* Check for errors. */
1965                 if ((len < ETH_ZLEN) || (flags & RXFLAG_OVERFLOW)) {
1966                         RXD(("ERR(%08x)]", flags));
1967                         dev->stats.rx_errors++;
1968                         if (len < ETH_ZLEN)
1969                                 dev->stats.rx_length_errors++;
1970                         if (len & (RXFLAG_OVERFLOW >> 16)) {
1971                                 dev->stats.rx_over_errors++;
1972                                 dev->stats.rx_fifo_errors++;
1973                         }
1974
1975                         /* Return it to the Happy meal. */
1976         drop_it:
1977                         dev->stats.rx_dropped++;
1978                         hme_write_rxd(hp, this,
1979                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
1980                                       dma_addr);
1981                         goto next;
1982                 }
1983                 skb = hp->rx_skbs[elem];
1984                 if (len > RX_COPY_THRESHOLD) {
1985                         struct sk_buff *new_skb;
1986                         u32 mapping;
1987
1988                         /* Now refill the entry, if we can. */
1989                         new_skb = happy_meal_alloc_skb(RX_BUF_ALLOC_SIZE, GFP_ATOMIC);
1990                         if (new_skb == NULL) {
1991                                 drops++;
1992                                 goto drop_it;
1993                         }
1994                         skb_put(new_skb, (ETH_FRAME_LEN + RX_OFFSET + 4));
1995                         mapping = dma_map_single(hp->dma_dev, new_skb->data,
1996                                                  RX_BUF_ALLOC_SIZE,
1997                                                  DMA_FROM_DEVICE);
1998                         if (unlikely(dma_mapping_error(hp->dma_dev, mapping))) {
1999                                 dev_kfree_skb_any(new_skb);
2000                                 drops++;
2001                                 goto drop_it;
2002                         }
2003
2004                         dma_unmap_single(hp->dma_dev, dma_addr, RX_BUF_ALLOC_SIZE, DMA_FROM_DEVICE);
2005                         hp->rx_skbs[elem] = new_skb;
2006                         hme_write_rxd(hp, this,
2007                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2008                                       mapping);
2009                         skb_reserve(new_skb, RX_OFFSET);
2010
2011                         /* Trim the original skb for the netif. */
2012                         skb_trim(skb, len);
2013                 } else {
2014                         struct sk_buff *copy_skb = netdev_alloc_skb(dev, len + 2);
2015
2016                         if (copy_skb == NULL) {
2017                                 drops++;
2018                                 goto drop_it;
2019                         }
2020
2021                         skb_reserve(copy_skb, 2);
2022                         skb_put(copy_skb, len);
2023                         dma_sync_single_for_cpu(hp->dma_dev, dma_addr, len + 2, DMA_FROM_DEVICE);
2024                         skb_copy_from_linear_data(skb, copy_skb->data, len);
2025                         dma_sync_single_for_device(hp->dma_dev, dma_addr, len + 2, DMA_FROM_DEVICE);
2026                         /* Reuse original ring buffer. */
2027                         hme_write_rxd(hp, this,
2028                                       (RXFLAG_OWN|((RX_BUF_ALLOC_SIZE-RX_OFFSET)<<16)),
2029                                       dma_addr);
2030
2031                         skb = copy_skb;
2032                 }
2033
2034                 /* This card is _fucking_ hot... */
2035                 skb->csum = csum_unfold(~(__force __sum16)htons(csum));
2036                 skb->ip_summed = CHECKSUM_COMPLETE;
2037
2038                 RXD(("len=%d csum=%4x]", len, csum));
2039                 skb->protocol = eth_type_trans(skb, dev);
2040                 netif_rx(skb);
2041
2042                 dev->stats.rx_packets++;
2043                 dev->stats.rx_bytes += len;
2044         next:
2045                 elem = NEXT_RX(elem);
2046                 this = &rxbase[elem];
2047         }
2048         hp->rx_new = elem;
2049         if (drops)
2050                 printk(KERN_INFO "%s: Memory squeeze, deferring packet.\n", hp->dev->name);
2051         RXD((">"));
2052 }
2053
2054 static irqreturn_t happy_meal_interrupt(int irq, void *dev_id)
2055 {
2056         struct net_device *dev = dev_id;
2057         struct happy_meal *hp  = netdev_priv(dev);
2058         u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2059
2060         HMD(("happy_meal_interrupt: status=%08x ", happy_status));
2061
2062         spin_lock(&hp->happy_lock);
2063
2064         if (happy_status & GREG_STAT_ERRORS) {
2065                 HMD(("ERRORS "));
2066                 if (happy_meal_is_not_so_happy(hp, /* un- */ happy_status))
2067                         goto out;
2068         }
2069
2070         if (happy_status & GREG_STAT_MIFIRQ) {
2071                 HMD(("MIFIRQ "));
2072                 happy_meal_mif_interrupt(hp);
2073         }
2074
2075         if (happy_status & GREG_STAT_TXALL) {
2076                 HMD(("TXALL "));
2077                 happy_meal_tx(hp);
2078         }
2079
2080         if (happy_status & GREG_STAT_RXTOHOST) {
2081                 HMD(("RXTOHOST "));
2082                 happy_meal_rx(hp, dev);
2083         }
2084
2085         HMD(("done\n"));
2086 out:
2087         spin_unlock(&hp->happy_lock);
2088
2089         return IRQ_HANDLED;
2090 }
2091
2092 #ifdef CONFIG_SBUS
2093 static irqreturn_t quattro_sbus_interrupt(int irq, void *cookie)
2094 {
2095         struct quattro *qp = (struct quattro *) cookie;
2096         int i;
2097
2098         for (i = 0; i < 4; i++) {
2099                 struct net_device *dev = qp->happy_meals[i];
2100                 struct happy_meal *hp  = netdev_priv(dev);
2101                 u32 happy_status       = hme_read32(hp, hp->gregs + GREG_STAT);
2102
2103                 HMD(("quattro_interrupt: status=%08x ", happy_status));
2104
2105                 if (!(happy_status & (GREG_STAT_ERRORS |
2106                                       GREG_STAT_MIFIRQ |
2107                                       GREG_STAT_TXALL |
2108                                       GREG_STAT_RXTOHOST)))
2109                         continue;
2110
2111                 spin_lock(&hp->happy_lock);
2112
2113                 if (happy_status & GREG_STAT_ERRORS) {
2114                         HMD(("ERRORS "));
2115                         if (happy_meal_is_not_so_happy(hp, happy_status))
2116                                 goto next;
2117                 }
2118
2119                 if (happy_status & GREG_STAT_MIFIRQ) {
2120                         HMD(("MIFIRQ "));
2121                         happy_meal_mif_interrupt(hp);
2122                 }
2123
2124                 if (happy_status & GREG_STAT_TXALL) {
2125                         HMD(("TXALL "));
2126                         happy_meal_tx(hp);
2127                 }
2128
2129                 if (happy_status & GREG_STAT_RXTOHOST) {
2130                         HMD(("RXTOHOST "));
2131                         happy_meal_rx(hp, dev);
2132                 }
2133
2134         next:
2135                 spin_unlock(&hp->happy_lock);
2136         }
2137         HMD(("done\n"));
2138
2139         return IRQ_HANDLED;
2140 }
2141 #endif
2142
2143 static int happy_meal_open(struct net_device *dev)
2144 {
2145         struct happy_meal *hp = netdev_priv(dev);
2146         int res;
2147
2148         HMD(("happy_meal_open: "));
2149
2150         /* On SBUS Quattro QFE cards, all hme interrupts are concentrated
2151          * into a single source which we register handling at probe time.
2152          */
2153         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO) {
2154                 res = request_irq(hp->irq, happy_meal_interrupt, IRQF_SHARED,
2155                                   dev->name, dev);
2156                 if (res) {
2157                         HMD(("EAGAIN\n"));
2158                         printk(KERN_ERR "happy_meal(SBUS): Can't order irq %d to go.\n",
2159                                hp->irq);
2160
2161                         return -EAGAIN;
2162                 }
2163         }
2164
2165         HMD(("to happy_meal_init\n"));
2166
2167         spin_lock_irq(&hp->happy_lock);
2168         res = happy_meal_init(hp);
2169         spin_unlock_irq(&hp->happy_lock);
2170
2171         if (res && ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO))
2172                 free_irq(hp->irq, dev);
2173         return res;
2174 }
2175
2176 static int happy_meal_close(struct net_device *dev)
2177 {
2178         struct happy_meal *hp = netdev_priv(dev);
2179
2180         spin_lock_irq(&hp->happy_lock);
2181         happy_meal_stop(hp, hp->gregs);
2182         happy_meal_clean_rings(hp);
2183
2184         /* If auto-negotiation timer is running, kill it. */
2185         del_timer(&hp->happy_timer);
2186
2187         spin_unlock_irq(&hp->happy_lock);
2188
2189         /* On Quattro QFE cards, all hme interrupts are concentrated
2190          * into a single source which we register handling at probe
2191          * time and never unregister.
2192          */
2193         if ((hp->happy_flags & (HFLAG_QUATTRO|HFLAG_PCI)) != HFLAG_QUATTRO)
2194                 free_irq(hp->irq, dev);
2195
2196         return 0;
2197 }
2198
2199 #ifdef SXDEBUG
2200 #define SXD(x) printk x
2201 #else
2202 #define SXD(x)
2203 #endif
2204
2205 static void happy_meal_tx_timeout(struct net_device *dev, unsigned int txqueue)
2206 {
2207         struct happy_meal *hp = netdev_priv(dev);
2208
2209         printk (KERN_ERR "%s: transmit timed out, resetting\n", dev->name);
2210         tx_dump_log();
2211         printk (KERN_ERR "%s: Happy Status %08x TX[%08x:%08x]\n", dev->name,
2212                 hme_read32(hp, hp->gregs + GREG_STAT),
2213                 hme_read32(hp, hp->etxregs + ETX_CFG),
2214                 hme_read32(hp, hp->bigmacregs + BMAC_TXCFG));
2215
2216         spin_lock_irq(&hp->happy_lock);
2217         happy_meal_init(hp);
2218         spin_unlock_irq(&hp->happy_lock);
2219
2220         netif_wake_queue(dev);
2221 }
2222
2223 static void unmap_partial_tx_skb(struct happy_meal *hp, u32 first_mapping,
2224                                  u32 first_len, u32 first_entry, u32 entry)
2225 {
2226         struct happy_meal_txd *txbase = &hp->happy_block->happy_meal_txd[0];
2227
2228         dma_unmap_single(hp->dma_dev, first_mapping, first_len, DMA_TO_DEVICE);
2229
2230         first_entry = NEXT_TX(first_entry);
2231         while (first_entry != entry) {
2232                 struct happy_meal_txd *this = &txbase[first_entry];
2233                 u32 addr, len;
2234
2235                 addr = hme_read_desc32(hp, &this->tx_addr);
2236                 len = hme_read_desc32(hp, &this->tx_flags);
2237                 len &= TXFLAG_SIZE;
2238                 dma_unmap_page(hp->dma_dev, addr, len, DMA_TO_DEVICE);
2239         }
2240 }
2241
2242 static netdev_tx_t happy_meal_start_xmit(struct sk_buff *skb,
2243                                          struct net_device *dev)
2244 {
2245         struct happy_meal *hp = netdev_priv(dev);
2246         int entry;
2247         u32 tx_flags;
2248
2249         tx_flags = TXFLAG_OWN;
2250         if (skb->ip_summed == CHECKSUM_PARTIAL) {
2251                 const u32 csum_start_off = skb_checksum_start_offset(skb);
2252                 const u32 csum_stuff_off = csum_start_off + skb->csum_offset;
2253
2254                 tx_flags = (TXFLAG_OWN | TXFLAG_CSENABLE |
2255                             ((csum_start_off << 14) & TXFLAG_CSBUFBEGIN) |
2256                             ((csum_stuff_off << 20) & TXFLAG_CSLOCATION));
2257         }
2258
2259         spin_lock_irq(&hp->happy_lock);
2260
2261         if (TX_BUFFS_AVAIL(hp) <= (skb_shinfo(skb)->nr_frags + 1)) {
2262                 netif_stop_queue(dev);
2263                 spin_unlock_irq(&hp->happy_lock);
2264                 printk(KERN_ERR "%s: BUG! Tx Ring full when queue awake!\n",
2265                        dev->name);
2266                 return NETDEV_TX_BUSY;
2267         }
2268
2269         entry = hp->tx_new;
2270         SXD(("SX<l[%d]e[%d]>", len, entry));
2271         hp->tx_skbs[entry] = skb;
2272
2273         if (skb_shinfo(skb)->nr_frags == 0) {
2274                 u32 mapping, len;
2275
2276                 len = skb->len;
2277                 mapping = dma_map_single(hp->dma_dev, skb->data, len, DMA_TO_DEVICE);
2278                 if (unlikely(dma_mapping_error(hp->dma_dev, mapping)))
2279                         goto out_dma_error;
2280                 tx_flags |= (TXFLAG_SOP | TXFLAG_EOP);
2281                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2282                               (tx_flags | (len & TXFLAG_SIZE)),
2283                               mapping);
2284                 entry = NEXT_TX(entry);
2285         } else {
2286                 u32 first_len, first_mapping;
2287                 int frag, first_entry = entry;
2288
2289                 /* We must give this initial chunk to the device last.
2290                  * Otherwise we could race with the device.
2291                  */
2292                 first_len = skb_headlen(skb);
2293                 first_mapping = dma_map_single(hp->dma_dev, skb->data, first_len,
2294                                                DMA_TO_DEVICE);
2295                 if (unlikely(dma_mapping_error(hp->dma_dev, first_mapping)))
2296                         goto out_dma_error;
2297                 entry = NEXT_TX(entry);
2298
2299                 for (frag = 0; frag < skb_shinfo(skb)->nr_frags; frag++) {
2300                         const skb_frag_t *this_frag = &skb_shinfo(skb)->frags[frag];
2301                         u32 len, mapping, this_txflags;
2302
2303                         len = skb_frag_size(this_frag);
2304                         mapping = skb_frag_dma_map(hp->dma_dev, this_frag,
2305                                                    0, len, DMA_TO_DEVICE);
2306                         if (unlikely(dma_mapping_error(hp->dma_dev, mapping))) {
2307                                 unmap_partial_tx_skb(hp, first_mapping, first_len,
2308                                                      first_entry, entry);
2309                                 goto out_dma_error;
2310                         }
2311                         this_txflags = tx_flags;
2312                         if (frag == skb_shinfo(skb)->nr_frags - 1)
2313                                 this_txflags |= TXFLAG_EOP;
2314                         hme_write_txd(hp, &hp->happy_block->happy_meal_txd[entry],
2315                                       (this_txflags | (len & TXFLAG_SIZE)),
2316                                       mapping);
2317                         entry = NEXT_TX(entry);
2318                 }
2319                 hme_write_txd(hp, &hp->happy_block->happy_meal_txd[first_entry],
2320                               (tx_flags | TXFLAG_SOP | (first_len & TXFLAG_SIZE)),
2321                               first_mapping);
2322         }
2323
2324         hp->tx_new = entry;
2325
2326         if (TX_BUFFS_AVAIL(hp) <= (MAX_SKB_FRAGS + 1))
2327                 netif_stop_queue(dev);
2328
2329         /* Get it going. */
2330         hme_write32(hp, hp->etxregs + ETX_PENDING, ETX_TP_DMAWAKEUP);
2331
2332         spin_unlock_irq(&hp->happy_lock);
2333
2334         tx_add_log(hp, TXLOG_ACTION_TXMIT, 0);
2335         return NETDEV_TX_OK;
2336
2337 out_dma_error:
2338         hp->tx_skbs[hp->tx_new] = NULL;
2339         spin_unlock_irq(&hp->happy_lock);
2340
2341         dev_kfree_skb_any(skb);
2342         dev->stats.tx_dropped++;
2343         return NETDEV_TX_OK;
2344 }
2345
2346 static struct net_device_stats *happy_meal_get_stats(struct net_device *dev)
2347 {
2348         struct happy_meal *hp = netdev_priv(dev);
2349
2350         spin_lock_irq(&hp->happy_lock);
2351         happy_meal_get_counters(hp, hp->bigmacregs);
2352         spin_unlock_irq(&hp->happy_lock);
2353
2354         return &dev->stats;
2355 }
2356
2357 static void happy_meal_set_multicast(struct net_device *dev)
2358 {
2359         struct happy_meal *hp = netdev_priv(dev);
2360         void __iomem *bregs = hp->bigmacregs;
2361         struct netdev_hw_addr *ha;
2362         u32 crc;
2363
2364         spin_lock_irq(&hp->happy_lock);
2365
2366         if ((dev->flags & IFF_ALLMULTI) || (netdev_mc_count(dev) > 64)) {
2367                 hme_write32(hp, bregs + BMAC_HTABLE0, 0xffff);
2368                 hme_write32(hp, bregs + BMAC_HTABLE1, 0xffff);
2369                 hme_write32(hp, bregs + BMAC_HTABLE2, 0xffff);
2370                 hme_write32(hp, bregs + BMAC_HTABLE3, 0xffff);
2371         } else if (dev->flags & IFF_PROMISC) {
2372                 hme_write32(hp, bregs + BMAC_RXCFG,
2373                             hme_read32(hp, bregs + BMAC_RXCFG) | BIGMAC_RXCFG_PMISC);
2374         } else {
2375                 u16 hash_table[4];
2376
2377                 memset(hash_table, 0, sizeof(hash_table));
2378                 netdev_for_each_mc_addr(ha, dev) {
2379                         crc = ether_crc_le(6, ha->addr);
2380                         crc >>= 26;
2381                         hash_table[crc >> 4] |= 1 << (crc & 0xf);
2382                 }
2383                 hme_write32(hp, bregs + BMAC_HTABLE0, hash_table[0]);
2384                 hme_write32(hp, bregs + BMAC_HTABLE1, hash_table[1]);
2385                 hme_write32(hp, bregs + BMAC_HTABLE2, hash_table[2]);
2386                 hme_write32(hp, bregs + BMAC_HTABLE3, hash_table[3]);
2387         }
2388
2389         spin_unlock_irq(&hp->happy_lock);
2390 }
2391
2392 /* Ethtool support... */
2393 static int hme_get_link_ksettings(struct net_device *dev,
2394                                   struct ethtool_link_ksettings *cmd)
2395 {
2396         struct happy_meal *hp = netdev_priv(dev);
2397         u32 speed;
2398         u32 supported;
2399
2400         supported =
2401                 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2402                  SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2403                  SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII);
2404
2405         /* XXX hardcoded stuff for now */
2406         cmd->base.port = PORT_TP; /* XXX no MII support */
2407         cmd->base.phy_address = 0; /* XXX fixed PHYAD */
2408
2409         /* Record PHY settings. */
2410         spin_lock_irq(&hp->happy_lock);
2411         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2412         hp->sw_lpa = happy_meal_tcvr_read(hp, hp->tcvregs, MII_LPA);
2413         spin_unlock_irq(&hp->happy_lock);
2414
2415         if (hp->sw_bmcr & BMCR_ANENABLE) {
2416                 cmd->base.autoneg = AUTONEG_ENABLE;
2417                 speed = ((hp->sw_lpa & (LPA_100HALF | LPA_100FULL)) ?
2418                          SPEED_100 : SPEED_10);
2419                 if (speed == SPEED_100)
2420                         cmd->base.duplex =
2421                                 (hp->sw_lpa & (LPA_100FULL)) ?
2422                                 DUPLEX_FULL : DUPLEX_HALF;
2423                 else
2424                         cmd->base.duplex =
2425                                 (hp->sw_lpa & (LPA_10FULL)) ?
2426                                 DUPLEX_FULL : DUPLEX_HALF;
2427         } else {
2428                 cmd->base.autoneg = AUTONEG_DISABLE;
2429                 speed = (hp->sw_bmcr & BMCR_SPEED100) ? SPEED_100 : SPEED_10;
2430                 cmd->base.duplex =
2431                         (hp->sw_bmcr & BMCR_FULLDPLX) ?
2432                         DUPLEX_FULL : DUPLEX_HALF;
2433         }
2434         cmd->base.speed = speed;
2435         ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
2436                                                 supported);
2437
2438         return 0;
2439 }
2440
2441 static int hme_set_link_ksettings(struct net_device *dev,
2442                                   const struct ethtool_link_ksettings *cmd)
2443 {
2444         struct happy_meal *hp = netdev_priv(dev);
2445
2446         /* Verify the settings we care about. */
2447         if (cmd->base.autoneg != AUTONEG_ENABLE &&
2448             cmd->base.autoneg != AUTONEG_DISABLE)
2449                 return -EINVAL;
2450         if (cmd->base.autoneg == AUTONEG_DISABLE &&
2451             ((cmd->base.speed != SPEED_100 &&
2452               cmd->base.speed != SPEED_10) ||
2453              (cmd->base.duplex != DUPLEX_HALF &&
2454               cmd->base.duplex != DUPLEX_FULL)))
2455                 return -EINVAL;
2456
2457         /* Ok, do it to it. */
2458         spin_lock_irq(&hp->happy_lock);
2459         del_timer(&hp->happy_timer);
2460         happy_meal_begin_auto_negotiation(hp, hp->tcvregs, cmd);
2461         spin_unlock_irq(&hp->happy_lock);
2462
2463         return 0;
2464 }
2465
2466 static void hme_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2467 {
2468         struct happy_meal *hp = netdev_priv(dev);
2469
2470         strlcpy(info->driver, "sunhme", sizeof(info->driver));
2471         strlcpy(info->version, "2.02", sizeof(info->version));
2472         if (hp->happy_flags & HFLAG_PCI) {
2473                 struct pci_dev *pdev = hp->happy_dev;
2474                 strlcpy(info->bus_info, pci_name(pdev), sizeof(info->bus_info));
2475         }
2476 #ifdef CONFIG_SBUS
2477         else {
2478                 const struct linux_prom_registers *regs;
2479                 struct platform_device *op = hp->happy_dev;
2480                 regs = of_get_property(op->dev.of_node, "regs", NULL);
2481                 if (regs)
2482                         snprintf(info->bus_info, sizeof(info->bus_info),
2483                                 "SBUS:%d",
2484                                 regs->which_io);
2485         }
2486 #endif
2487 }
2488
2489 static u32 hme_get_link(struct net_device *dev)
2490 {
2491         struct happy_meal *hp = netdev_priv(dev);
2492
2493         spin_lock_irq(&hp->happy_lock);
2494         hp->sw_bmcr = happy_meal_tcvr_read(hp, hp->tcvregs, MII_BMCR);
2495         spin_unlock_irq(&hp->happy_lock);
2496
2497         return hp->sw_bmsr & BMSR_LSTATUS;
2498 }
2499
2500 static const struct ethtool_ops hme_ethtool_ops = {
2501         .get_drvinfo            = hme_get_drvinfo,
2502         .get_link               = hme_get_link,
2503         .get_link_ksettings     = hme_get_link_ksettings,
2504         .set_link_ksettings     = hme_set_link_ksettings,
2505 };
2506
2507 static int hme_version_printed;
2508
2509 #ifdef CONFIG_SBUS
2510 /* Given a happy meal sbus device, find it's quattro parent.
2511  * If none exist, allocate and return a new one.
2512  *
2513  * Return NULL on failure.
2514  */
2515 static struct quattro *quattro_sbus_find(struct platform_device *child)
2516 {
2517         struct device *parent = child->dev.parent;
2518         struct platform_device *op;
2519         struct quattro *qp;
2520
2521         op = to_platform_device(parent);
2522         qp = platform_get_drvdata(op);
2523         if (qp)
2524                 return qp;
2525
2526         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2527         if (qp != NULL) {
2528                 int i;
2529
2530                 for (i = 0; i < 4; i++)
2531                         qp->happy_meals[i] = NULL;
2532
2533                 qp->quattro_dev = child;
2534                 qp->next = qfe_sbus_list;
2535                 qfe_sbus_list = qp;
2536
2537                 platform_set_drvdata(op, qp);
2538         }
2539         return qp;
2540 }
2541
2542 /* After all quattro cards have been probed, we call these functions
2543  * to register the IRQ handlers for the cards that have been
2544  * successfully probed and skip the cards that failed to initialize
2545  */
2546 static int __init quattro_sbus_register_irqs(void)
2547 {
2548         struct quattro *qp;
2549
2550         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2551                 struct platform_device *op = qp->quattro_dev;
2552                 int err, qfe_slot, skip = 0;
2553
2554                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++) {
2555                         if (!qp->happy_meals[qfe_slot])
2556                                 skip = 1;
2557                 }
2558                 if (skip)
2559                         continue;
2560
2561                 err = request_irq(op->archdata.irqs[0],
2562                                   quattro_sbus_interrupt,
2563                                   IRQF_SHARED, "Quattro",
2564                                   qp);
2565                 if (err != 0) {
2566                         printk(KERN_ERR "Quattro HME: IRQ registration "
2567                                "error %d.\n", err);
2568                         return err;
2569                 }
2570         }
2571
2572         return 0;
2573 }
2574
2575 static void quattro_sbus_free_irqs(void)
2576 {
2577         struct quattro *qp;
2578
2579         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
2580                 struct platform_device *op = qp->quattro_dev;
2581                 int qfe_slot, skip = 0;
2582
2583                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++) {
2584                         if (!qp->happy_meals[qfe_slot])
2585                                 skip = 1;
2586                 }
2587                 if (skip)
2588                         continue;
2589
2590                 free_irq(op->archdata.irqs[0], qp);
2591         }
2592 }
2593 #endif /* CONFIG_SBUS */
2594
2595 #ifdef CONFIG_PCI
2596 static struct quattro *quattro_pci_find(struct pci_dev *pdev)
2597 {
2598         struct pci_dev *bdev = pdev->bus->self;
2599         struct quattro *qp;
2600
2601         if (!bdev) return NULL;
2602         for (qp = qfe_pci_list; qp != NULL; qp = qp->next) {
2603                 struct pci_dev *qpdev = qp->quattro_dev;
2604
2605                 if (qpdev == bdev)
2606                         return qp;
2607         }
2608         qp = kmalloc(sizeof(struct quattro), GFP_KERNEL);
2609         if (qp != NULL) {
2610                 int i;
2611
2612                 for (i = 0; i < 4; i++)
2613                         qp->happy_meals[i] = NULL;
2614
2615                 qp->quattro_dev = bdev;
2616                 qp->next = qfe_pci_list;
2617                 qfe_pci_list = qp;
2618
2619                 /* No range tricks necessary on PCI. */
2620                 qp->nranges = 0;
2621         }
2622         return qp;
2623 }
2624 #endif /* CONFIG_PCI */
2625
2626 static const struct net_device_ops hme_netdev_ops = {
2627         .ndo_open               = happy_meal_open,
2628         .ndo_stop               = happy_meal_close,
2629         .ndo_start_xmit         = happy_meal_start_xmit,
2630         .ndo_tx_timeout         = happy_meal_tx_timeout,
2631         .ndo_get_stats          = happy_meal_get_stats,
2632         .ndo_set_rx_mode        = happy_meal_set_multicast,
2633         .ndo_set_mac_address    = eth_mac_addr,
2634         .ndo_validate_addr      = eth_validate_addr,
2635 };
2636
2637 #ifdef CONFIG_SBUS
2638 static int happy_meal_sbus_probe_one(struct platform_device *op, int is_qfe)
2639 {
2640         struct device_node *dp = op->dev.of_node, *sbus_dp;
2641         struct quattro *qp = NULL;
2642         struct happy_meal *hp;
2643         struct net_device *dev;
2644         int i, qfe_slot = -1;
2645         u8 addr[ETH_ALEN];
2646         int err = -ENODEV;
2647
2648         sbus_dp = op->dev.parent->of_node;
2649
2650         /* We can match PCI devices too, do not accept those here. */
2651         if (!of_node_name_eq(sbus_dp, "sbus") && !of_node_name_eq(sbus_dp, "sbi"))
2652                 return err;
2653
2654         if (is_qfe) {
2655                 qp = quattro_sbus_find(op);
2656                 if (qp == NULL)
2657                         goto err_out;
2658                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
2659                         if (qp->happy_meals[qfe_slot] == NULL)
2660                                 break;
2661                 if (qfe_slot == 4)
2662                         goto err_out;
2663         }
2664
2665         err = -ENOMEM;
2666         dev = alloc_etherdev(sizeof(struct happy_meal));
2667         if (!dev)
2668                 goto err_out;
2669         SET_NETDEV_DEV(dev, &op->dev);
2670
2671         if (hme_version_printed++ == 0)
2672                 printk(KERN_INFO "%s", version);
2673
2674         /* If user did not specify a MAC address specifically, use
2675          * the Quattro local-mac-address property...
2676          */
2677         for (i = 0; i < 6; i++) {
2678                 if (macaddr[i] != 0)
2679                         break;
2680         }
2681         if (i < 6) { /* a mac address was given */
2682                 for (i = 0; i < 6; i++)
2683                         addr[i] = macaddr[i];
2684                 eth_hw_addr_set(dev, addr);
2685                 macaddr[5]++;
2686         } else {
2687                 const unsigned char *addr;
2688                 int len;
2689
2690                 addr = of_get_property(dp, "local-mac-address", &len);
2691
2692                 if (qfe_slot != -1 && addr && len == ETH_ALEN)
2693                         eth_hw_addr_set(dev, addr);
2694                 else
2695                         eth_hw_addr_set(dev, idprom->id_ethaddr);
2696         }
2697
2698         hp = netdev_priv(dev);
2699
2700         hp->happy_dev = op;
2701         hp->dma_dev = &op->dev;
2702
2703         spin_lock_init(&hp->happy_lock);
2704
2705         err = -ENODEV;
2706         if (qp != NULL) {
2707                 hp->qfe_parent = qp;
2708                 hp->qfe_ent = qfe_slot;
2709                 qp->happy_meals[qfe_slot] = dev;
2710         }
2711
2712         hp->gregs = of_ioremap(&op->resource[0], 0,
2713                                GREG_REG_SIZE, "HME Global Regs");
2714         if (!hp->gregs) {
2715                 printk(KERN_ERR "happymeal: Cannot map global registers.\n");
2716                 goto err_out_free_netdev;
2717         }
2718
2719         hp->etxregs = of_ioremap(&op->resource[1], 0,
2720                                  ETX_REG_SIZE, "HME TX Regs");
2721         if (!hp->etxregs) {
2722                 printk(KERN_ERR "happymeal: Cannot map MAC TX registers.\n");
2723                 goto err_out_iounmap;
2724         }
2725
2726         hp->erxregs = of_ioremap(&op->resource[2], 0,
2727                                  ERX_REG_SIZE, "HME RX Regs");
2728         if (!hp->erxregs) {
2729                 printk(KERN_ERR "happymeal: Cannot map MAC RX registers.\n");
2730                 goto err_out_iounmap;
2731         }
2732
2733         hp->bigmacregs = of_ioremap(&op->resource[3], 0,
2734                                     BMAC_REG_SIZE, "HME BIGMAC Regs");
2735         if (!hp->bigmacregs) {
2736                 printk(KERN_ERR "happymeal: Cannot map BIGMAC registers.\n");
2737                 goto err_out_iounmap;
2738         }
2739
2740         hp->tcvregs = of_ioremap(&op->resource[4], 0,
2741                                  TCVR_REG_SIZE, "HME Tranceiver Regs");
2742         if (!hp->tcvregs) {
2743                 printk(KERN_ERR "happymeal: Cannot map TCVR registers.\n");
2744                 goto err_out_iounmap;
2745         }
2746
2747         hp->hm_revision = of_getintprop_default(dp, "hm-rev", 0xff);
2748         if (hp->hm_revision == 0xff)
2749                 hp->hm_revision = 0xa0;
2750
2751         /* Now enable the feature flags we can. */
2752         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
2753                 hp->happy_flags = HFLAG_20_21;
2754         else if (hp->hm_revision != 0xa0)
2755                 hp->happy_flags = HFLAG_NOT_A0;
2756
2757         if (qp != NULL)
2758                 hp->happy_flags |= HFLAG_QUATTRO;
2759
2760         /* Get the supported DVMA burst sizes from our Happy SBUS. */
2761         hp->happy_bursts = of_getintprop_default(sbus_dp,
2762                                                  "burst-sizes", 0x00);
2763
2764         hp->happy_block = dma_alloc_coherent(hp->dma_dev,
2765                                              PAGE_SIZE,
2766                                              &hp->hblock_dvma,
2767                                              GFP_ATOMIC);
2768         err = -ENOMEM;
2769         if (!hp->happy_block)
2770                 goto err_out_iounmap;
2771
2772         /* Force check of the link first time we are brought up. */
2773         hp->linkcheck = 0;
2774
2775         /* Force timer state to 'asleep' with count of zero. */
2776         hp->timer_state = asleep;
2777         hp->timer_ticks = 0;
2778
2779         timer_setup(&hp->happy_timer, happy_meal_timer, 0);
2780
2781         hp->dev = dev;
2782         dev->netdev_ops = &hme_netdev_ops;
2783         dev->watchdog_timeo = 5*HZ;
2784         dev->ethtool_ops = &hme_ethtool_ops;
2785
2786         /* Happy Meal can do it all... */
2787         dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM;
2788         dev->features |= dev->hw_features | NETIF_F_RXCSUM;
2789
2790         hp->irq = op->archdata.irqs[0];
2791
2792 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
2793         /* Hook up SBUS register/descriptor accessors. */
2794         hp->read_desc32 = sbus_hme_read_desc32;
2795         hp->write_txd = sbus_hme_write_txd;
2796         hp->write_rxd = sbus_hme_write_rxd;
2797         hp->read32 = sbus_hme_read32;
2798         hp->write32 = sbus_hme_write32;
2799 #endif
2800
2801         /* Grrr, Happy Meal comes up by default not advertising
2802          * full duplex 100baseT capabilities, fix this.
2803          */
2804         spin_lock_irq(&hp->happy_lock);
2805         happy_meal_set_initial_advertisement(hp);
2806         spin_unlock_irq(&hp->happy_lock);
2807
2808         err = register_netdev(hp->dev);
2809         if (err) {
2810                 printk(KERN_ERR "happymeal: Cannot register net device, "
2811                        "aborting.\n");
2812                 goto err_out_free_coherent;
2813         }
2814
2815         platform_set_drvdata(op, hp);
2816
2817         if (qfe_slot != -1)
2818                 printk(KERN_INFO "%s: Quattro HME slot %d (SBUS) 10/100baseT Ethernet ",
2819                        dev->name, qfe_slot);
2820         else
2821                 printk(KERN_INFO "%s: HAPPY MEAL (SBUS) 10/100baseT Ethernet ",
2822                        dev->name);
2823
2824         printk("%pM\n", dev->dev_addr);
2825
2826         return 0;
2827
2828 err_out_free_coherent:
2829         dma_free_coherent(hp->dma_dev,
2830                           PAGE_SIZE,
2831                           hp->happy_block,
2832                           hp->hblock_dvma);
2833
2834 err_out_iounmap:
2835         if (hp->gregs)
2836                 of_iounmap(&op->resource[0], hp->gregs, GREG_REG_SIZE);
2837         if (hp->etxregs)
2838                 of_iounmap(&op->resource[1], hp->etxregs, ETX_REG_SIZE);
2839         if (hp->erxregs)
2840                 of_iounmap(&op->resource[2], hp->erxregs, ERX_REG_SIZE);
2841         if (hp->bigmacregs)
2842                 of_iounmap(&op->resource[3], hp->bigmacregs, BMAC_REG_SIZE);
2843         if (hp->tcvregs)
2844                 of_iounmap(&op->resource[4], hp->tcvregs, TCVR_REG_SIZE);
2845
2846         if (qp)
2847                 qp->happy_meals[qfe_slot] = NULL;
2848
2849 err_out_free_netdev:
2850         free_netdev(dev);
2851
2852 err_out:
2853         return err;
2854 }
2855 #endif
2856
2857 #ifdef CONFIG_PCI
2858 #ifndef CONFIG_SPARC
2859 static int is_quattro_p(struct pci_dev *pdev)
2860 {
2861         struct pci_dev *busdev = pdev->bus->self;
2862         struct pci_dev *this_pdev;
2863         int n_hmes;
2864
2865         if (busdev == NULL ||
2866             busdev->vendor != PCI_VENDOR_ID_DEC ||
2867             busdev->device != PCI_DEVICE_ID_DEC_21153)
2868                 return 0;
2869
2870         n_hmes = 0;
2871         list_for_each_entry(this_pdev, &pdev->bus->devices, bus_list) {
2872                 if (this_pdev->vendor == PCI_VENDOR_ID_SUN &&
2873                     this_pdev->device == PCI_DEVICE_ID_SUN_HAPPYMEAL)
2874                         n_hmes++;
2875         }
2876
2877         if (n_hmes != 4)
2878                 return 0;
2879
2880         return 1;
2881 }
2882
2883 /* Fetch MAC address from vital product data of PCI ROM. */
2884 static int find_eth_addr_in_vpd(void __iomem *rom_base, int len, int index, unsigned char *dev_addr)
2885 {
2886         int this_offset;
2887
2888         for (this_offset = 0x20; this_offset < len; this_offset++) {
2889                 void __iomem *p = rom_base + this_offset;
2890
2891                 if (readb(p + 0) != 0x90 ||
2892                     readb(p + 1) != 0x00 ||
2893                     readb(p + 2) != 0x09 ||
2894                     readb(p + 3) != 0x4e ||
2895                     readb(p + 4) != 0x41 ||
2896                     readb(p + 5) != 0x06)
2897                         continue;
2898
2899                 this_offset += 6;
2900                 p += 6;
2901
2902                 if (index == 0) {
2903                         int i;
2904
2905                         for (i = 0; i < 6; i++)
2906                                 dev_addr[i] = readb(p + i);
2907                         return 1;
2908                 }
2909                 index--;
2910         }
2911         return 0;
2912 }
2913
2914 static void get_hme_mac_nonsparc(struct pci_dev *pdev, unsigned char *dev_addr)
2915 {
2916         size_t size;
2917         void __iomem *p = pci_map_rom(pdev, &size);
2918
2919         if (p) {
2920                 int index = 0;
2921                 int found;
2922
2923                 if (is_quattro_p(pdev))
2924                         index = PCI_SLOT(pdev->devfn);
2925
2926                 found = readb(p) == 0x55 &&
2927                         readb(p + 1) == 0xaa &&
2928                         find_eth_addr_in_vpd(p, (64 * 1024), index, dev_addr);
2929                 pci_unmap_rom(pdev, p);
2930                 if (found)
2931                         return;
2932         }
2933
2934         /* Sun MAC prefix then 3 random bytes. */
2935         dev_addr[0] = 0x08;
2936         dev_addr[1] = 0x00;
2937         dev_addr[2] = 0x20;
2938         get_random_bytes(&dev_addr[3], 3);
2939 }
2940 #endif /* !(CONFIG_SPARC) */
2941
2942 static int happy_meal_pci_probe(struct pci_dev *pdev,
2943                                 const struct pci_device_id *ent)
2944 {
2945         struct quattro *qp = NULL;
2946 #ifdef CONFIG_SPARC
2947         struct device_node *dp;
2948 #endif
2949         struct happy_meal *hp;
2950         struct net_device *dev;
2951         void __iomem *hpreg_base;
2952         unsigned long hpreg_res;
2953         int i, qfe_slot = -1;
2954         char prom_name[64];
2955         u8 addr[ETH_ALEN];
2956         int err;
2957
2958         /* Now make sure pci_dev cookie is there. */
2959 #ifdef CONFIG_SPARC
2960         dp = pci_device_to_OF_node(pdev);
2961         snprintf(prom_name, sizeof(prom_name), "%pOFn", dp);
2962 #else
2963         if (is_quattro_p(pdev))
2964                 strcpy(prom_name, "SUNW,qfe");
2965         else
2966                 strcpy(prom_name, "SUNW,hme");
2967 #endif
2968
2969         err = -ENODEV;
2970
2971         if (pci_enable_device(pdev))
2972                 goto err_out;
2973         pci_set_master(pdev);
2974
2975         if (!strcmp(prom_name, "SUNW,qfe") || !strcmp(prom_name, "qfe")) {
2976                 qp = quattro_pci_find(pdev);
2977                 if (qp == NULL)
2978                         goto err_out;
2979                 for (qfe_slot = 0; qfe_slot < 4; qfe_slot++)
2980                         if (qp->happy_meals[qfe_slot] == NULL)
2981                                 break;
2982                 if (qfe_slot == 4)
2983                         goto err_out;
2984         }
2985
2986         dev = alloc_etherdev(sizeof(struct happy_meal));
2987         err = -ENOMEM;
2988         if (!dev)
2989                 goto err_out;
2990         SET_NETDEV_DEV(dev, &pdev->dev);
2991
2992         if (hme_version_printed++ == 0)
2993                 printk(KERN_INFO "%s", version);
2994
2995         hp = netdev_priv(dev);
2996
2997         hp->happy_dev = pdev;
2998         hp->dma_dev = &pdev->dev;
2999
3000         spin_lock_init(&hp->happy_lock);
3001
3002         if (qp != NULL) {
3003                 hp->qfe_parent = qp;
3004                 hp->qfe_ent = qfe_slot;
3005                 qp->happy_meals[qfe_slot] = dev;
3006         }
3007
3008         hpreg_res = pci_resource_start(pdev, 0);
3009         err = -ENODEV;
3010         if ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) != 0) {
3011                 printk(KERN_ERR "happymeal(PCI): Cannot find proper PCI device base address.\n");
3012                 goto err_out_clear_quattro;
3013         }
3014         if (pci_request_regions(pdev, DRV_NAME)) {
3015                 printk(KERN_ERR "happymeal(PCI): Cannot obtain PCI resources, "
3016                        "aborting.\n");
3017                 goto err_out_clear_quattro;
3018         }
3019
3020         if ((hpreg_base = ioremap(hpreg_res, 0x8000)) == NULL) {
3021                 printk(KERN_ERR "happymeal(PCI): Unable to remap card memory.\n");
3022                 goto err_out_free_res;
3023         }
3024
3025         for (i = 0; i < 6; i++) {
3026                 if (macaddr[i] != 0)
3027                         break;
3028         }
3029         if (i < 6) { /* a mac address was given */
3030                 for (i = 0; i < 6; i++)
3031                         addr[i] = macaddr[i];
3032                 eth_hw_addr_set(dev, addr);
3033                 macaddr[5]++;
3034         } else {
3035 #ifdef CONFIG_SPARC
3036                 const unsigned char *addr;
3037                 int len;
3038
3039                 if (qfe_slot != -1 &&
3040                     (addr = of_get_property(dp, "local-mac-address", &len))
3041                         != NULL &&
3042                     len == 6) {
3043                         eth_hw_addr_set(dev, addr);
3044                 } else {
3045                         eth_hw_addr_set(dev, idprom->id_ethaddr);
3046                 }
3047 #else
3048                 u8 addr[ETH_ALEN];
3049
3050                 get_hme_mac_nonsparc(pdev, addr);
3051                 eth_hw_addr_set(dev, addr);
3052 #endif
3053         }
3054
3055         /* Layout registers. */
3056         hp->gregs      = (hpreg_base + 0x0000UL);
3057         hp->etxregs    = (hpreg_base + 0x2000UL);
3058         hp->erxregs    = (hpreg_base + 0x4000UL);
3059         hp->bigmacregs = (hpreg_base + 0x6000UL);
3060         hp->tcvregs    = (hpreg_base + 0x7000UL);
3061
3062 #ifdef CONFIG_SPARC
3063         hp->hm_revision = of_getintprop_default(dp, "hm-rev", 0xff);
3064         if (hp->hm_revision == 0xff)
3065                 hp->hm_revision = 0xc0 | (pdev->revision & 0x0f);
3066 #else
3067         /* works with this on non-sparc hosts */
3068         hp->hm_revision = 0x20;
3069 #endif
3070
3071         /* Now enable the feature flags we can. */
3072         if (hp->hm_revision == 0x20 || hp->hm_revision == 0x21)
3073                 hp->happy_flags = HFLAG_20_21;
3074         else if (hp->hm_revision != 0xa0 && hp->hm_revision != 0xc0)
3075                 hp->happy_flags = HFLAG_NOT_A0;
3076
3077         if (qp != NULL)
3078                 hp->happy_flags |= HFLAG_QUATTRO;
3079
3080         /* And of course, indicate this is PCI. */
3081         hp->happy_flags |= HFLAG_PCI;
3082
3083 #ifdef CONFIG_SPARC
3084         /* Assume PCI happy meals can handle all burst sizes. */
3085         hp->happy_bursts = DMA_BURSTBITS;
3086 #endif
3087
3088         hp->happy_block = dma_alloc_coherent(&pdev->dev, PAGE_SIZE,
3089                                              &hp->hblock_dvma, GFP_KERNEL);
3090         err = -ENODEV;
3091         if (!hp->happy_block)
3092                 goto err_out_iounmap;
3093
3094         hp->linkcheck = 0;
3095         hp->timer_state = asleep;
3096         hp->timer_ticks = 0;
3097
3098         timer_setup(&hp->happy_timer, happy_meal_timer, 0);
3099
3100         hp->irq = pdev->irq;
3101         hp->dev = dev;
3102         dev->netdev_ops = &hme_netdev_ops;
3103         dev->watchdog_timeo = 5*HZ;
3104         dev->ethtool_ops = &hme_ethtool_ops;
3105
3106         /* Happy Meal can do it all... */
3107         dev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM;
3108         dev->features |= dev->hw_features | NETIF_F_RXCSUM;
3109
3110 #if defined(CONFIG_SBUS) && defined(CONFIG_PCI)
3111         /* Hook up PCI register/descriptor accessors. */
3112         hp->read_desc32 = pci_hme_read_desc32;
3113         hp->write_txd = pci_hme_write_txd;
3114         hp->write_rxd = pci_hme_write_rxd;
3115         hp->read32 = pci_hme_read32;
3116         hp->write32 = pci_hme_write32;
3117 #endif
3118
3119         /* Grrr, Happy Meal comes up by default not advertising
3120          * full duplex 100baseT capabilities, fix this.
3121          */
3122         spin_lock_irq(&hp->happy_lock);
3123         happy_meal_set_initial_advertisement(hp);
3124         spin_unlock_irq(&hp->happy_lock);
3125
3126         err = register_netdev(hp->dev);
3127         if (err) {
3128                 printk(KERN_ERR "happymeal(PCI): Cannot register net device, "
3129                        "aborting.\n");
3130                 goto err_out_free_coherent;
3131         }
3132
3133         pci_set_drvdata(pdev, hp);
3134
3135         if (!qfe_slot) {
3136                 struct pci_dev *qpdev = qp->quattro_dev;
3137
3138                 prom_name[0] = 0;
3139                 if (!strncmp(dev->name, "eth", 3)) {
3140                         int i = simple_strtoul(dev->name + 3, NULL, 10);
3141                         sprintf(prom_name, "-%d", i + 3);
3142                 }
3143                 printk(KERN_INFO "%s%s: Quattro HME (PCI/CheerIO) 10/100baseT Ethernet ", dev->name, prom_name);
3144                 if (qpdev->vendor == PCI_VENDOR_ID_DEC &&
3145                     qpdev->device == PCI_DEVICE_ID_DEC_21153)
3146                         printk("DEC 21153 PCI Bridge\n");
3147                 else
3148                         printk("unknown bridge %04x.%04x\n",
3149                                 qpdev->vendor, qpdev->device);
3150         }
3151
3152         if (qfe_slot != -1)
3153                 printk(KERN_INFO "%s: Quattro HME slot %d (PCI/CheerIO) 10/100baseT Ethernet ",
3154                        dev->name, qfe_slot);
3155         else
3156                 printk(KERN_INFO "%s: HAPPY MEAL (PCI/CheerIO) 10/100BaseT Ethernet ",
3157                        dev->name);
3158
3159         printk("%pM\n", dev->dev_addr);
3160
3161         return 0;
3162
3163 err_out_free_coherent:
3164         dma_free_coherent(hp->dma_dev, PAGE_SIZE,
3165                           hp->happy_block, hp->hblock_dvma);
3166
3167 err_out_iounmap:
3168         iounmap(hp->gregs);
3169
3170 err_out_free_res:
3171         pci_release_regions(pdev);
3172
3173 err_out_clear_quattro:
3174         if (qp != NULL)
3175                 qp->happy_meals[qfe_slot] = NULL;
3176
3177         free_netdev(dev);
3178
3179 err_out:
3180         return err;
3181 }
3182
3183 static void happy_meal_pci_remove(struct pci_dev *pdev)
3184 {
3185         struct happy_meal *hp = pci_get_drvdata(pdev);
3186         struct net_device *net_dev = hp->dev;
3187
3188         unregister_netdev(net_dev);
3189
3190         dma_free_coherent(hp->dma_dev, PAGE_SIZE,
3191                           hp->happy_block, hp->hblock_dvma);
3192         iounmap(hp->gregs);
3193         pci_release_regions(hp->happy_dev);
3194
3195         free_netdev(net_dev);
3196 }
3197
3198 static const struct pci_device_id happymeal_pci_ids[] = {
3199         { PCI_DEVICE(PCI_VENDOR_ID_SUN, PCI_DEVICE_ID_SUN_HAPPYMEAL) },
3200         { }                     /* Terminating entry */
3201 };
3202
3203 MODULE_DEVICE_TABLE(pci, happymeal_pci_ids);
3204
3205 static struct pci_driver hme_pci_driver = {
3206         .name           = "hme",
3207         .id_table       = happymeal_pci_ids,
3208         .probe          = happy_meal_pci_probe,
3209         .remove         = happy_meal_pci_remove,
3210 };
3211
3212 static int __init happy_meal_pci_init(void)
3213 {
3214         return pci_register_driver(&hme_pci_driver);
3215 }
3216
3217 static void happy_meal_pci_exit(void)
3218 {
3219         pci_unregister_driver(&hme_pci_driver);
3220
3221         while (qfe_pci_list) {
3222                 struct quattro *qfe = qfe_pci_list;
3223                 struct quattro *next = qfe->next;
3224
3225                 kfree(qfe);
3226
3227                 qfe_pci_list = next;
3228         }
3229 }
3230
3231 #endif
3232
3233 #ifdef CONFIG_SBUS
3234 static const struct of_device_id hme_sbus_match[];
3235 static int hme_sbus_probe(struct platform_device *op)
3236 {
3237         const struct of_device_id *match;
3238         struct device_node *dp = op->dev.of_node;
3239         const char *model = of_get_property(dp, "model", NULL);
3240         int is_qfe;
3241
3242         match = of_match_device(hme_sbus_match, &op->dev);
3243         if (!match)
3244                 return -EINVAL;
3245         is_qfe = (match->data != NULL);
3246
3247         if (!is_qfe && model && !strcmp(model, "SUNW,sbus-qfe"))
3248                 is_qfe = 1;
3249
3250         return happy_meal_sbus_probe_one(op, is_qfe);
3251 }
3252
3253 static int hme_sbus_remove(struct platform_device *op)
3254 {
3255         struct happy_meal *hp = platform_get_drvdata(op);
3256         struct net_device *net_dev = hp->dev;
3257
3258         unregister_netdev(net_dev);
3259
3260         /* XXX qfe parent interrupt... */
3261
3262         of_iounmap(&op->resource[0], hp->gregs, GREG_REG_SIZE);
3263         of_iounmap(&op->resource[1], hp->etxregs, ETX_REG_SIZE);
3264         of_iounmap(&op->resource[2], hp->erxregs, ERX_REG_SIZE);
3265         of_iounmap(&op->resource[3], hp->bigmacregs, BMAC_REG_SIZE);
3266         of_iounmap(&op->resource[4], hp->tcvregs, TCVR_REG_SIZE);
3267         dma_free_coherent(hp->dma_dev,
3268                           PAGE_SIZE,
3269                           hp->happy_block,
3270                           hp->hblock_dvma);
3271
3272         free_netdev(net_dev);
3273
3274         return 0;
3275 }
3276
3277 static const struct of_device_id hme_sbus_match[] = {
3278         {
3279                 .name = "SUNW,hme",
3280         },
3281         {
3282                 .name = "SUNW,qfe",
3283                 .data = (void *) 1,
3284         },
3285         {
3286                 .name = "qfe",
3287                 .data = (void *) 1,
3288         },
3289         {},
3290 };
3291
3292 MODULE_DEVICE_TABLE(of, hme_sbus_match);
3293
3294 static struct platform_driver hme_sbus_driver = {
3295         .driver = {
3296                 .name = "hme",
3297                 .of_match_table = hme_sbus_match,
3298         },
3299         .probe          = hme_sbus_probe,
3300         .remove         = hme_sbus_remove,
3301 };
3302
3303 static int __init happy_meal_sbus_init(void)
3304 {
3305         int err;
3306
3307         err = platform_driver_register(&hme_sbus_driver);
3308         if (!err)
3309                 err = quattro_sbus_register_irqs();
3310
3311         return err;
3312 }
3313
3314 static void happy_meal_sbus_exit(void)
3315 {
3316         platform_driver_unregister(&hme_sbus_driver);
3317         quattro_sbus_free_irqs();
3318
3319         while (qfe_sbus_list) {
3320                 struct quattro *qfe = qfe_sbus_list;
3321                 struct quattro *next = qfe->next;
3322
3323                 kfree(qfe);
3324
3325                 qfe_sbus_list = next;
3326         }
3327 }
3328 #endif
3329
3330 static int __init happy_meal_probe(void)
3331 {
3332         int err = 0;
3333
3334 #ifdef CONFIG_SBUS
3335         err = happy_meal_sbus_init();
3336 #endif
3337 #ifdef CONFIG_PCI
3338         if (!err) {
3339                 err = happy_meal_pci_init();
3340 #ifdef CONFIG_SBUS
3341                 if (err)
3342                         happy_meal_sbus_exit();
3343 #endif
3344         }
3345 #endif
3346
3347         return err;
3348 }
3349
3350
3351 static void __exit happy_meal_exit(void)
3352 {
3353 #ifdef CONFIG_SBUS
3354         happy_meal_sbus_exit();
3355 #endif
3356 #ifdef CONFIG_PCI
3357         happy_meal_pci_exit();
3358 #endif
3359 }
3360
3361 module_init(happy_meal_probe);
3362 module_exit(happy_meal_exit);