clk: renesas: r8a779g0: Fix PCIe clock name

clk: renesas: r8a779g0: Fix PCIe clock name

[ Upstream commit 096311157d2a6bb8f06e28e1143e2a5de6a0183b ]

Fix a typo in the name of the module clock for the second PCIe channel.

Fixes: 5ab16198b431ca48 ("clk: renesas: r8a779g0: Add PCIe clocks")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/f582067564f357e2183d3db67b217084ecb51888.1706608032.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>