]> git.itanic.dy.fi Git - linux-stable/commitdiff
serial: ar933x_uart: set UART_CS_{RX,TX}_READY_ORIDE
authorDaniel Golle <daniel@makrotopia.org>
Fri, 7 Feb 2020 09:53:35 +0000 (11:53 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 11 Mar 2020 06:51:16 +0000 (07:51 +0100)
[ Upstream commit 87c5cbf71ecbb9e289d60a2df22eb686c70bf196 ]

On AR934x this UART is usually not initialized by the bootloader
as it is only used as a secondary serial port while the primary
UART is a newly introduced NS16550-compatible.
In order to make use of the ar933x-uart on AR934x without RTS/CTS
hardware flow control, one needs to set the
UART_CS_{RX,TX}_READY_ORIDE bits as other than on AR933x where this
UART is used as primary/console, the bootloader on AR934x typically
doesn't set those bits.
Setting them explicitely on AR933x should not do any harm, so just
set them unconditionally.

Tested-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://lore.kernel.org/r/20200207095335.GA179836@makrotopia.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/tty/serial/ar933x_uart.c

index 1519d2ca7705f23eb785b083ed8364b0d46e1de3..40194791cde0bc7a7cc76b587b9145f531028fab 100644 (file)
@@ -294,6 +294,10 @@ static void ar933x_uart_set_termios(struct uart_port *port,
        ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
                            AR933X_UART_CS_HOST_INT_EN);
 
+       /* enable RX and TX ready overide */
+       ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
+               AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
+
        /* reenable the UART */
        ar933x_uart_rmw(up, AR933X_UART_CS_REG,
                        AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
@@ -426,6 +430,10 @@ static int ar933x_uart_startup(struct uart_port *port)
        ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
                            AR933X_UART_CS_HOST_INT_EN);
 
+       /* enable RX and TX ready overide */
+       ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
+               AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
+
        /* Enable RX interrupts */
        up->ier = AR933X_UART_INT_RX_VALID;
        ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);