]> git.itanic.dy.fi Git - linux-stable/commitdiff
net/mlx5: DR, Add function that tells if STE miss addr has been initialized
authorYevgeny Kliteynik <kliteyn@nvidia.com>
Tue, 29 Nov 2022 09:01:23 +0000 (11:01 +0200)
committerSaeed Mahameed <saeedm@nvidia.com>
Fri, 9 Dec 2022 00:10:54 +0000 (16:10 -0800)
Up until now miss address in all the STEs was used to connect miss lists
and to link the last STE in the list to end anchor.
Match range STE will require special handling because its miss address is
part of the 'action'. That is, range action has hit and miss addresses.
Since the range action is always the last action, need to make sure that
its miss address isn't overwritten by the end anchor.

Adding new function mlx5dr_ste_is_miss_addr_set() to answer the question
whether the STE's miss address has already been set as part of STE
initialization. Use a callback that always returns false right now. Once
match range is added, a different callback will be used for that STE type.

Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Erez Shitrit <erezsh@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_rule.c
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.c
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.h
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.h
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v2.c
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_types.h

index 3351b2a1ba18b658d0b8f3ad5089067648f85dca..74cbe53ee9dbb1e042b1c5bb30f3acfd884f802c 100644 (file)
@@ -42,6 +42,9 @@ static void dr_rule_set_last_ste_miss_addr(struct mlx5dr_matcher *matcher,
        struct mlx5dr_ste_ctx *ste_ctx = matcher->tbl->dmn->ste_ctx;
        u64 icm_addr;
 
+       if (mlx5dr_ste_is_miss_addr_set(ste_ctx, hw_ste))
+               return;
+
        icm_addr = mlx5dr_icm_pool_get_chunk_icm_addr(nic_matcher->e_anchor->chunk);
        mlx5dr_ste_set_miss_addr(ste_ctx, hw_ste, icm_addr);
 }
index 9e19a8dc9022525d817302bcfe94543000fbab92..1e15f605df6efa96eb6996935a50b55380cc8f20 100644 (file)
@@ -90,6 +90,16 @@ static void dr_ste_set_always_miss(struct dr_hw_ste_format *hw_ste)
        hw_ste->mask[0] = 0;
 }
 
+bool mlx5dr_ste_is_miss_addr_set(struct mlx5dr_ste_ctx *ste_ctx,
+                                u8 *hw_ste_p)
+{
+       if (!ste_ctx->is_miss_addr_set)
+               return false;
+
+       /* check if miss address is already set for this type of STE */
+       return ste_ctx->is_miss_addr_set(hw_ste_p);
+}
+
 void mlx5dr_ste_set_miss_addr(struct mlx5dr_ste_ctx *ste_ctx,
                              u8 *hw_ste_p, u64 miss_addr)
 {
index 17513baff9b0c92943d9c59bc23b8c0e52da8a67..7075142bcfb6d636b48bfc7baf0140f73ecc144d 100644 (file)
@@ -151,6 +151,7 @@ struct mlx5dr_ste_ctx {
                         bool is_rx, u16 gvmi);
        void (*set_next_lu_type)(u8 *hw_ste_p, u16 lu_type);
        u16  (*get_next_lu_type)(u8 *hw_ste_p);
+       bool (*is_miss_addr_set)(u8 *hw_ste_p);
        void (*set_miss_addr)(u8 *hw_ste_p, u64 miss_addr);
        u64  (*get_miss_addr)(u8 *hw_ste_p);
        void (*set_hit_addr)(u8 *hw_ste_p, u64 icm_addr, u32 ht_size);
index ee677a5c76bed1374a0bbd9801ec5e857307251a..87c29118c51b6a2eac93838a79d3471830fbb789 100644 (file)
@@ -267,6 +267,11 @@ static void dr_ste_v1_set_entry_type(u8 *hw_ste_p, u8 entry_type)
        MLX5_SET(ste_match_bwc_v1, hw_ste_p, entry_format, entry_type);
 }
 
+bool dr_ste_v1_is_miss_addr_set(u8 *hw_ste_p)
+{
+       return false;
+}
+
 void dr_ste_v1_set_miss_addr(u8 *hw_ste_p, u64 miss_addr)
 {
        u64 index = miss_addr >> 6;
@@ -2144,6 +2149,7 @@ static struct mlx5dr_ste_ctx ste_ctx_v1 = {
        .ste_init                       = &dr_ste_v1_init,
        .set_next_lu_type               = &dr_ste_v1_set_next_lu_type,
        .get_next_lu_type               = &dr_ste_v1_get_next_lu_type,
+       .is_miss_addr_set               = &dr_ste_v1_is_miss_addr_set,
        .set_miss_addr                  = &dr_ste_v1_set_miss_addr,
        .get_miss_addr                  = &dr_ste_v1_get_miss_addr,
        .set_hit_addr                   = &dr_ste_v1_set_hit_addr,
index 8a1d49790c6e3918781c4619f31cf19cf17e34b5..b5c0f0f8392fbb53bde7e7cd6026108ab231993b 100644 (file)
@@ -7,6 +7,7 @@
 #include "dr_types.h"
 #include "dr_ste.h"
 
+bool dr_ste_v1_is_miss_addr_set(u8 *hw_ste_p);
 void dr_ste_v1_set_miss_addr(u8 *hw_ste_p, u64 miss_addr);
 u64 dr_ste_v1_get_miss_addr(u8 *hw_ste_p);
 void dr_ste_v1_set_byte_mask(u8 *hw_ste_p, u16 byte_mask);
index c60fddd125d2d4662811a194eafae12626eb5cd8..cf1a3c9a1cf40966d31a7108643bd85a40968aed 100644 (file)
@@ -202,6 +202,7 @@ static struct mlx5dr_ste_ctx ste_ctx_v2 = {
        .ste_init                       = &dr_ste_v1_init,
        .set_next_lu_type               = &dr_ste_v1_set_next_lu_type,
        .get_next_lu_type               = &dr_ste_v1_get_next_lu_type,
+       .is_miss_addr_set               = &dr_ste_v1_is_miss_addr_set,
        .set_miss_addr                  = &dr_ste_v1_set_miss_addr,
        .get_miss_addr                  = &dr_ste_v1_get_miss_addr,
        .set_hit_addr                   = &dr_ste_v1_set_hit_addr,
index 94093c3b55a5737bb8e8d889825a2ae93b4b77ec..a3e8ce41556394293a9cb6ec2b5af47c97c415b3 100644 (file)
@@ -238,6 +238,7 @@ static inline void mlx5dr_htbl_get(struct mlx5dr_ste_htbl *htbl)
 
 /* STE utils */
 u32 mlx5dr_ste_calc_hash_index(u8 *hw_ste_p, struct mlx5dr_ste_htbl *htbl);
+bool mlx5dr_ste_is_miss_addr_set(struct mlx5dr_ste_ctx *ste_ctx, u8 *hw_ste_p);
 void mlx5dr_ste_set_miss_addr(struct mlx5dr_ste_ctx *ste_ctx,
                              u8 *hw_ste, u64 miss_addr);
 void mlx5dr_ste_set_hit_addr(struct mlx5dr_ste_ctx *ste_ctx,