]> git.itanic.dy.fi Git - linux-stable/commitdiff
ARM: dts: qcom: sdx65: add IPA information
authorAlex Elder <elder@linaro.org>
Mon, 27 Mar 2023 19:56:04 +0000 (14:56 -0500)
committerBjorn Andersson <andersson@kernel.org>
Thu, 6 Apr 2023 16:58:15 +0000 (09:58 -0700)
Add IPA-related nodes and definitions to "sdx65.dtsi".  The SMP2P
nodes (ipa_smp2p_out and ipa_smp2p_in) are already present.

Enable IPA in "sdx65-mtp.dts"; this GSI firmware is loaded by Trust
Zone on this platform.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Tested-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230327195605.2854123-2-elder@linaro.org
arch/arm/boot/dts/qcom-sdx65-mtp.dts
arch/arm/boot/dts/qcom-sdx65.dtsi

index ed98c83c141fcaf980392aafdaee1315ff2831b9..72e25de0db5fc84944c53532accd65358523a7e9 100644 (file)
@@ -245,6 +245,11 @@ &blsp1_uart3 {
        status = "okay";
 };
 
+&ipa {
+       qcom,gsi-loader = "skip";
+       status = "okay";
+};
+
 &qpic_bam {
        status = "okay";
 };
index 192f9f94bc8b4cedacf145a80d3e38f9f6ba62ec..74671cc12c8843261f84e638574caab1eba46dcf 100644 (file)
@@ -11,6 +11,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
+#include <dt-bindings/interconnect/qcom,sdx65.h>
 
 / {
        #address-cells = <1>;
@@ -299,6 +300,44 @@ tcsr_mutex: hwlock@1f40000 {
                        #hwlock-cells = <1>;
                };
 
+               ipa: ipa@3f40000 {
+                       compatible = "qcom,sdx65-ipa";
+
+                       reg = <0x03f40000 0x10000>,
+                             <0x03f50000 0x5000>,
+                             <0x03e04000 0xfc000>;
+                       reg-names = "ipa-reg",
+                                   "ipa-shared",
+                                   "gsi";
+
+                       interrupts-extended = <&intc GIC_SPI 241 IRQ_TYPE_EDGE_RISING>,
+                                             <&intc GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+                                             <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "ipa",
+                                         "gsi",
+                                         "ipa-clock-query",
+                                         "ipa-setup-ready";
+
+                       iommus = <&apps_smmu 0x5e0 0x0>,
+                                <&apps_smmu 0x5e2 0x0>;
+
+                       clocks = <&rpmhcc RPMH_IPA_CLK>;
+                       clock-names = "core";
+
+                       interconnects = <&system_noc MASTER_IPA &mc_virt SLAVE_EBI1>,
+                                       <&mem_noc MASTER_APPSS_PROC &system_noc SLAVE_IPA_CFG>;
+                       interconnect-names = "memory",
+                                            "config";
+
+                       qcom,smem-states = <&ipa_smp2p_out 0>,
+                                          <&ipa_smp2p_out 1>;
+                       qcom,smem-state-names = "ipa-clock-enabled-valid",
+                                               "ipa-clock-enabled";
+
+                       status = "disabled";
+               };
+
                remoteproc_mpss: remoteproc@4080000 {
                        compatible = "qcom,sdx55-mpss-pas";
                        reg = <0x04080000 0x4040>;