net/mlx5: E-switch, enlarge peer miss group table

There is an implicit assumption that peer miss group table
require to handle only a single peer.
Also, there is an assumption that total_vports of the master
is greater or equal to the total_vports of each peer.
Change the code to support peer miss group for more than one peer.

Signed-off-by: Shay Drory <shayd@nvidia.com>
Reviewed-by: Mark Bloch <mbloch@nvidia.com>
Reviewed-by: Roi Dayan <roid@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
index a767f3d52c769f65be84cc81ee0470ff8ba94db3..ca69ed48741328c099f05ffa1853fa23657600a8 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
@@ -1573,6 +1573,7 @@ esw_create_peer_esw_miss_group(struct mlx5_eswitch *esw,
                               u32 *flow_group_in,
                               int *ix)
 {
+       int max_peer_ports = (esw->total_vports - 1) * (MLX5_MAX_PORTS - 1);
        int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
        struct mlx5_flow_group *g;
        void *match_criteria;
@@ -1599,8 +1600,8 @@ esw_create_peer_esw_miss_group(struct mlx5_eswitch *esw,
 
        MLX5_SET(create_flow_group_in, flow_group_in, start_flow_index, *ix);
        MLX5_SET(create_flow_group_in, flow_group_in, end_flow_index,
-                *ix + esw->total_vports - 1);
-       *ix += esw->total_vports;
+                *ix + max_peer_ports);
+       *ix += max_peer_ports + 1;
 
        g = mlx5_create_flow_group(fdb, flow_group_in);
        if (IS_ERR(g)) {
@@ -1702,7 +1703,7 @@ static int esw_create_offloads_fdb_tables(struct mlx5_eswitch *esw)
         * total vports of the peer (currently is also uses esw->total_vports).
         */
        table_size = MLX5_MAX_PORTS * (esw->total_vports * MAX_SQ_NVPORTS + MAX_PF_SQ) +
-                    esw->total_vports * 2 + MLX5_ESW_MISS_FLOWS;
+                    esw->total_vports * MLX5_MAX_PORTS + MLX5_ESW_MISS_FLOWS;
 
        /* create the slow path fdb with encap set, so further table instances
         * can be created at run time while VFs are probed if the FW allows that.