drm/i915/display/fbc: Do not apply WA 22014263786 to DG2

This workaround brings some regressions to DG2 and if really necessary
for DG2 an alternative workaround will be implemented.

BSpec: 54077
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220602201730.199418-1-jose.souza@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index bbdc34a23d5487518c958d1fa2655f6ab887c8cf..8b807284cde1f76a43f4a77f2811e3545825e636 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -813,8 +813,8 @@ static void intel_fbc_program_cfb(struct intel_fbc *fbc)
 
 static void intel_fbc_program_workarounds(struct intel_fbc *fbc)
 {
-       /* Wa_22014263786:icl,jsl,tgl,dg1,rkl,adls,dg2,adlp */
-       if (DISPLAY_VER(fbc->i915) >= 11)
+       /* Wa_22014263786:icl,jsl,tgl,dg1,rkl,adls,adlp */
+       if (DISPLAY_VER(fbc->i915) >= 11 && !IS_DG2(fbc->i915))
                intel_de_rmw(fbc->i915, ILK_DPFC_CHICKEN(fbc->id), 0,
                             DPFC_CHICKEN_FORCE_SLB_INVALIDATION);
 }