]> git.itanic.dy.fi Git - linux-stable/commitdiff
mtd: spi-nor: gigadevice: sort flash_info database
authorMichael Walle <mwalle@kernel.org>
Fri, 8 Sep 2023 10:16:51 +0000 (12:16 +0200)
committerTudor Ambarus <tudor.ambarus@linaro.org>
Tue, 19 Sep 2023 15:59:21 +0000 (18:59 +0300)
The flash ID is the new primary key into our database. Sort the entry by
it. Keep the most specific ones first, because there might be ID
collisions between shorter and longer ones.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-33-e60548861b10@kernel.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
drivers/mtd/spi-nor/gigadevice.c

index 0d22cd99715bdc424bcd257b28338a736da1cb46..ef1edd0add70e6ca501620798a779d621d6bb00d 100644 (file)
@@ -46,30 +46,12 @@ static const struct flash_info gigadevice_nor_parts[] = {
                .size = SZ_4M,
                .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
                .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
-       }, {
-               .id = SNOR_ID(0xc8, 0x60, 0x16),
-               .name = "gd25lq32",
-               .size = SZ_4M,
-               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
-               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
        }, {
                .id = SNOR_ID(0xc8, 0x40, 0x17),
                .name = "gd25q64",
                .size = SZ_8M,
                .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
                .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
-       }, {
-               .id = SNOR_ID(0xc8, 0x60, 0x17),
-               .name = "gd25lq64c",
-               .size = SZ_8M,
-               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
-               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
-       }, {
-               .id = SNOR_ID(0xc8, 0x60, 0x18),
-               .name = "gd25lq128d",
-               .size = SZ_16M,
-               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
-               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
        }, {
                .id = SNOR_ID(0xc8, 0x40, 0x18),
                .name = "gd25q128",
@@ -82,6 +64,24 @@ static const struct flash_info gigadevice_nor_parts[] = {
                .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6,
                .fixups = &gd25q256_fixups,
                .fixup_flags = SPI_NOR_4B_OPCODES,
+       }, {
+               .id = SNOR_ID(0xc8, 0x60, 0x16),
+               .name = "gd25lq32",
+               .size = SZ_4M,
+               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+       }, {
+               .id = SNOR_ID(0xc8, 0x60, 0x17),
+               .name = "gd25lq64c",
+               .size = SZ_8M,
+               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+       }, {
+               .id = SNOR_ID(0xc8, 0x60, 0x18),
+               .name = "gd25lq128d",
+               .size = SZ_16M,
+               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
        },
 };