]> git.itanic.dy.fi Git - linux-stable/commitdiff
ARM: dts: kirkwood: Add definitions for PCIe legacy INTx interrupts
authorPali Rohár <pali@kernel.org>
Tue, 12 Jul 2022 16:40:59 +0000 (18:40 +0200)
committerGregory CLEMENT <gregory.clement@bootlin.com>
Fri, 2 Sep 2022 14:50:24 +0000 (16:50 +0200)
Add definitions for PCIe legacy INTx interrupts.

This is required for example in a scenario where a driver requests only
one of the legacy interrupts (INTA). Without this, the driver would be
notified on events on all 4 (INTA, INTB, INTC, INTD), even if it
requested only one of them.

Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
arch/arm/boot/dts/kirkwood-6192.dtsi
arch/arm/boot/dts/kirkwood-6281.dtsi
arch/arm/boot/dts/kirkwood-6282.dtsi
arch/arm/boot/dts/kirkwood-98dx4122.dtsi

index 396bcba08adba427a4b44f322d371c9201a9dbe0..07f4f7f98c0c88d2922098e0acc3df8232c18df7 100644 (file)
@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
                                bus-range = <0x00 0xff>;
-                               interrupt-map-mask = <0 0 0 0>;
-                               interrupt-map = <0 0 0 0 &intc 9>;
+                               interrupt-names = "intx";
+                               interrupts = <9>;
+                               interrupt-map-mask = <0 0 0 7>;
+                               interrupt-map = <0 0 0 1 &pcie_intc 0>,
+                                               <0 0 0 2 &pcie_intc 1>,
+                                               <0 0 0 3 &pcie_intc 2>,
+                                               <0 0 0 4 &pcie_intc 3>;
                                marvell,pcie-port = <0>;
                                marvell,pcie-lane = <0>;
                                clocks = <&gate_clk 2>;
                                status = "disabled";
+
+                               pcie_intc: interrupt-controller {
+                                       interrupt-controller;
+                                       #interrupt-cells = <1>;
+                               };
                        };
                };
        };
index faa05849a40d49409d68b3275127ba7789050114..d08a9a5ecc2619fd0685f1bee687f002273b4d4a 100644 (file)
@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
                                bus-range = <0x00 0xff>;
-                               interrupt-map-mask = <0 0 0 0>;
-                               interrupt-map = <0 0 0 0 &intc 9>;
+                               interrupt-names = "intx";
+                               interrupts = <9>;
+                               interrupt-map-mask = <0 0 0 7>;
+                               interrupt-map = <0 0 0 1 &pcie_intc 0>,
+                                               <0 0 0 2 &pcie_intc 1>,
+                                               <0 0 0 3 &pcie_intc 2>,
+                                               <0 0 0 4 &pcie_intc 3>;
                                marvell,pcie-port = <0>;
                                marvell,pcie-lane = <0>;
                                clocks = <&gate_clk 2>;
                                status = "disabled";
+
+                               pcie_intc: interrupt-controller {
+                                       interrupt-controller;
+                                       #interrupt-cells = <1>;
+                               };
                        };
                };
        };
index e84c54b77dead570c6e25324f838f91ddb3ae771..2eea5b304f471d3c43344ac358df22ba8e591254 100644 (file)
@@ -30,12 +30,22 @@ pcie0: pcie@1,0 {
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
                                bus-range = <0x00 0xff>;
-                               interrupt-map-mask = <0 0 0 0>;
-                               interrupt-map = <0 0 0 0 &intc 9>;
+                               interrupt-names = "intx";
+                               interrupts = <9>;
+                               interrupt-map-mask = <0 0 0 7>;
+                               interrupt-map = <0 0 0 1 &pcie0_intc 0>,
+                                               <0 0 0 2 &pcie0_intc 1>,
+                                               <0 0 0 3 &pcie0_intc 2>,
+                                               <0 0 0 4 &pcie0_intc 3>;
                                marvell,pcie-port = <0>;
                                marvell,pcie-lane = <0>;
                                clocks = <&gate_clk 2>;
                                status = "disabled";
+
+                               pcie0_intc: interrupt-controller {
+                                       interrupt-controller;
+                                       #interrupt-cells = <1>;
+                               };
                        };
 
                        pcie1: pcie@2,0 {
@@ -48,12 +58,22 @@ pcie1: pcie@2,0 {
                                ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
                                          0x81000000 0 0 0x81000000 0x2 0 1 0>;
                                bus-range = <0x00 0xff>;
-                               interrupt-map-mask = <0 0 0 0>;
-                               interrupt-map = <0 0 0 0 &intc 10>;
+                               interrupt-names = "intx";
+                               interrupts = <10>;
+                               interrupt-map-mask = <0 0 0 7>;
+                               interrupt-map = <0 0 0 1 &pcie1_intc 0>,
+                                               <0 0 0 2 &pcie1_intc 1>,
+                                               <0 0 0 3 &pcie1_intc 2>,
+                                               <0 0 0 4 &pcie1_intc 3>;
                                marvell,pcie-port = <1>;
                                marvell,pcie-lane = <0>;
                                clocks = <&gate_clk 18>;
                                status = "disabled";
+
+                               pcie1_intc: interrupt-controller {
+                                       interrupt-controller;
+                                       #interrupt-cells = <1>;
+                               };
                        };
                };
        };
index 299c147298c35120f9b122ef780e61ef8f18c31b..070bc13242b8ef1b4bf8293aecd741477d399ae1 100644 (file)
@@ -26,12 +26,22 @@ pcie0: pcie@1,0 {
                                ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
                                          0x81000000 0 0 0x81000000 0x1 0 1 0>;
                                bus-range = <0x00 0xff>;
-                               interrupt-map-mask = <0 0 0 0>;
-                               interrupt-map = <0 0 0 0 &intc 9>;
+                               interrupt-names = "intx";
+                               interrupts = <9>;
+                               interrupt-map-mask = <0 0 0 7>;
+                               interrupt-map = <0 0 0 1 &pcie_intc 0>,
+                                               <0 0 0 2 &pcie_intc 1>,
+                                               <0 0 0 3 &pcie_intc 2>,
+                                               <0 0 0 4 &pcie_intc 3>;
                                marvell,pcie-port = <0>;
                                marvell,pcie-lane = <0>;
                                clocks = <&gate_clk 2>;
                                status = "disabled";
+
+                               pcie_intc: interrupt-controller {
+                                       interrupt-controller;
+                                       #interrupt-cells = <1>;
+                               };
                        };
                };
        };