]> git.itanic.dy.fi Git - linux-stable/commitdiff
drm/amdgpu/gmc6-8: properly disable the AGP aperture
authorAlex Deucher <alexander.deucher@amd.com>
Wed, 20 Sep 2023 17:07:00 +0000 (13:07 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2023 21:00:22 +0000 (17:00 -0400)
The BOT register needs to be larger than the TOP register
for this to be properly disabled.  The lower 22 bits
of the BOT address are always 0 and the lower 22 bits of
the TOP register are always 1 so you need to make
the upper bits of BOT larger than the upper bits of BOT.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c

index 5b837a65fad20cabba7a2a7b99b8843878d8da3d..07579fa26fa3ebcce6f60df8657cb98617f4c884 100644 (file)
@@ -253,7 +253,7 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev)
        WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
               adev->mem_scratch.gpu_addr >> 12);
        WREG32(mmMC_VM_AGP_BASE, 0);
-       WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
+       WREG32(mmMC_VM_AGP_TOP, 0);
        WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
 
        if (gmc_v6_0_wait_for_idle((void *)adev))
index 998f6ee60b78a848b6b36c6132295b0adc101f1e..89c4257cdc2e8b3d0788bcfd144f468ee82efc0f 100644 (file)
@@ -288,7 +288,7 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev)
        WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
               adev->mem_scratch.gpu_addr >> 12);
        WREG32(mmMC_VM_AGP_BASE, 0);
-       WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
+       WREG32(mmMC_VM_AGP_TOP, 0);
        WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
        if (gmc_v7_0_wait_for_idle((void *)adev))
                dev_warn(adev->dev, "Wait for MC idle timedout !\n");
index 8dcd9b13673c337126661877a0aeeca12e58eebd..84a4d0c6e135e0f0f963486a1722bdaa35539cff 100644 (file)
@@ -473,7 +473,7 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev)
        }
 
        WREG32(mmMC_VM_AGP_BASE, 0);
-       WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF);
+       WREG32(mmMC_VM_AGP_TOP, 0);
        WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
        if (gmc_v8_0_wait_for_idle((void *)adev))
                dev_warn(adev->dev, "Wait for MC idle timedout !\n");