]> git.itanic.dy.fi Git - linux-stable/commitdiff
mtd: spi-nor: gigadevice: convert flash_info to new format
authorMichael Walle <mwalle@kernel.org>
Fri, 8 Sep 2023 10:16:39 +0000 (12:16 +0200)
committerTudor Ambarus <tudor.ambarus@linaro.org>
Tue, 19 Sep 2023 15:59:19 +0000 (18:59 +0300)
The INFOx() macros are going away. Convert the flash_info database to
the new format.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Link: https://lore.kernel.org/r/20230807-mtd-flash-info-db-rework-v3-21-e60548861b10@kernel.org
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>
drivers/mtd/spi-nor/gigadevice.c

index 7cf142c7552930722507b2ab95918bba3b427392..0d22cd99715bdc424bcd257b28338a736da1cb46 100644 (file)
@@ -34,38 +34,55 @@ static const struct spi_nor_fixups gd25q256_fixups = {
 };
 
 static const struct flash_info gigadevice_nor_parts[] = {
-       { "gd25q16", INFO(0xc84015, 0, 64 * 1024,  32)
-               FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-               NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
-                             SPI_NOR_QUAD_READ) },
-       { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64)
-               FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-               NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
-                             SPI_NOR_QUAD_READ) },
-       { "gd25lq32", INFO(0xc86016, 0, 64 * 1024, 64)
-               FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-               NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
-                             SPI_NOR_QUAD_READ) },
-       { "gd25q64", INFO(0xc84017, 0, 64 * 1024, 128)
-               FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-               NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
-                             SPI_NOR_QUAD_READ) },
-       { "gd25lq64c", INFO(0xc86017, 0, 64 * 1024, 128)
-               FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-               NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
-                             SPI_NOR_QUAD_READ) },
-       { "gd25lq128d", INFO(0xc86018, 0, 64 * 1024, 256)
-               FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-               NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
-                             SPI_NOR_QUAD_READ) },
-       { "gd25q128", INFO(0xc84018, 0, 64 * 1024, 256)
-               FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB)
-               NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
-                             SPI_NOR_QUAD_READ) },
-       { "gd25q256", INFO(0xc84019, 0, 64 * 1024, 0)
-               FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6)
-               FIXUP_FLAGS(SPI_NOR_4B_OPCODES)
-               .fixups = &gd25q256_fixups },
+       {
+               .id = SNOR_ID(0xc8, 0x40, 0x15),
+               .name = "gd25q16",
+               .size = SZ_2M,
+               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+       }, {
+               .id = SNOR_ID(0xc8, 0x40, 0x16),
+               .name = "gd25q32",
+               .size = SZ_4M,
+               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+       }, {
+               .id = SNOR_ID(0xc8, 0x60, 0x16),
+               .name = "gd25lq32",
+               .size = SZ_4M,
+               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+       }, {
+               .id = SNOR_ID(0xc8, 0x40, 0x17),
+               .name = "gd25q64",
+               .size = SZ_8M,
+               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+       }, {
+               .id = SNOR_ID(0xc8, 0x60, 0x17),
+               .name = "gd25lq64c",
+               .size = SZ_8M,
+               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+       }, {
+               .id = SNOR_ID(0xc8, 0x60, 0x18),
+               .name = "gd25lq128d",
+               .size = SZ_16M,
+               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+       }, {
+               .id = SNOR_ID(0xc8, 0x40, 0x18),
+               .name = "gd25q128",
+               .size = SZ_16M,
+               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB,
+               .no_sfdp_flags = SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ,
+       }, {
+               .id = SNOR_ID(0xc8, 0x40, 0x19),
+               .name = "gd25q256",
+               .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6,
+               .fixups = &gd25q256_fixups,
+               .fixup_flags = SPI_NOR_4B_OPCODES,
+       },
 };
 
 const struct spi_nor_manufacturer spi_nor_gigadevice = {