]> git.itanic.dy.fi Git - linux-stable/commitdiff
drm/amdgpu: add cached GPU fault structure to vm struct
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 6 Oct 2020 14:54:38 +0000 (10:54 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 4 Oct 2023 22:36:57 +0000 (18:36 -0400)
When we get a GPU page fault, cache the fault for later
analysis.

Cc: samuel.pitoiset@gmail.com
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.h

index 8ce91f69bbebfb52391b9c9c692fc1e38ca0b33e..91e36b0ad0629c6b00df551e72023017ab633e3b 100644 (file)
@@ -2730,3 +2730,34 @@ void amdgpu_debugfs_vm_bo_info(struct amdgpu_vm *vm, struct seq_file *m)
                   total_done_objs);
 }
 #endif
+
+/**
+ * amdgpu_vm_update_fault_cache - update cached fault into.
+ * @adev: amdgpu device pointer
+ * @pasid: PASID of the VM
+ * @addr: Address of the fault
+ * @status: GPUVM fault status register
+ * @vmhub: which vmhub got the fault
+ *
+ * Cache the fault info for later use by userspace in debugging.
+ */
+void amdgpu_vm_update_fault_cache(struct amdgpu_device *adev,
+                                 unsigned int pasid,
+                                 uint64_t addr,
+                                 uint32_t status,
+                                 unsigned int vmhub)
+{
+       struct amdgpu_vm *vm;
+       unsigned long flags;
+
+       xa_lock_irqsave(&adev->vm_manager.pasids, flags);
+
+       vm = xa_load(&adev->vm_manager.pasids, pasid);
+       if (vm) {
+               vm->fault_info.addr = addr;
+               vm->fault_info.status = status;
+               vm->fault_info.vmhub = vmhub;
+       }
+       xa_unlock_irqrestore(&adev->vm_manager.pasids, flags);
+}
+
index 204ab13184ed1ce1b040e36b67e5a038060505d6..2bf328d9e04bac27c58c7e94fcd053138ea57748 100644 (file)
@@ -252,6 +252,15 @@ struct amdgpu_vm_update_funcs {
                      struct dma_fence **fence);
 };
 
+struct amdgpu_vm_fault_info {
+       /* fault address */
+       uint64_t        addr;
+       /* fault status register */
+       uint32_t        status;
+       /* which vmhub? gfxhub, mmhub, etc. */
+       unsigned int    vmhub;
+};
+
 struct amdgpu_vm {
        /* tree of virtual addresses mapped */
        struct rb_root_cached   va;
@@ -343,6 +352,9 @@ struct amdgpu_vm {
 
        /* Memory partition number, -1 means any partition */
        int8_t                  mem_id;
+
+       /* cached fault info */
+       struct amdgpu_vm_fault_info fault_info;
 };
 
 struct amdgpu_vm_manager {
@@ -554,4 +566,10 @@ static inline void amdgpu_vm_eviction_unlock(struct amdgpu_vm *vm)
        mutex_unlock(&vm->eviction_lock);
 }
 
+void amdgpu_vm_update_fault_cache(struct amdgpu_device *adev,
+                                 unsigned int pasid,
+                                 uint64_t addr,
+                                 uint32_t status,
+                                 unsigned int vmhub);
+
 #endif