arm64: dts: qcom: sm8550: add IPA information

Add IPA-related nodes and definitions to "sm8550.dtsi", which uses
IPA v5.5.

Signed-off-by: Alex Elder <elder@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Link: https://lore.kernel.org/r/20231124181718.915208-2-elder@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 05cfb50207f987de3bd40d8107b55b650f1c2606..eaad6c5831c7626eb43c289413ecb96213e3cc0f 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -1996,6 +1996,45 @@ gpucc: clock-controller@3d90000 {
                        #power-domain-cells = <1>;
                };
 
+               ipa: ipa@3f40000 {
+                       compatible = "qcom,sm8550-ipa";
+
+                       iommus = <&apps_smmu 0x4a0 0x0>,
+                                <&apps_smmu 0x4a2 0x0>;
+                       reg = <0 0x3f40000 0 0x10000>,
+                             <0 0x3f50000 0 0x5000>,
+                             <0 0x3e04000 0 0xfc000>;
+                       reg-names = "ipa-reg",
+                                   "ipa-shared",
+                                   "gsi";
+
+                       interrupts-extended = <&intc GIC_SPI 654 IRQ_TYPE_EDGE_RISING>,
+                                             <&intc GIC_SPI 432 IRQ_TYPE_LEVEL_HIGH>,
+                                             <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
+                                             <&ipa_smp2p_in 1 IRQ_TYPE_EDGE_RISING>;
+                       interrupt-names = "ipa",
+                                         "gsi",
+                                         "ipa-clock-query",
+                                         "ipa-setup-ready";
+
+                       clocks = <&rpmhcc RPMH_IPA_CLK>;
+                       clock-names = "core";
+
+                       interconnects = <&aggre2_noc MASTER_IPA 0 &mc_virt SLAVE_EBI1 0>,
+                                       <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_IPA_CFG 0>;
+                       interconnect-names = "memory",
+                                            "config";
+
+                       qcom,qmp = <&aoss_qmp>;
+
+                       qcom,smem-states = <&ipa_smp2p_out 0>,
+                                          <&ipa_smp2p_out 1>;
+                       qcom,smem-state-names = "ipa-clock-enabled-valid",
+                                               "ipa-clock-enabled";
+
+                       status = "disabled";
+               };
+
                remoteproc_mpss: remoteproc@4080000 {
                        compatible = "qcom,sm8550-mpss-pas";
                        reg = <0x0 0x04080000 0x0 0x4040>;