]> git.itanic.dy.fi Git - linux-stable/commitdiff
ARM: dts: lan966x: kontron-d10: add PHY interrupts
authorMichael Walle <mwalle@kernel.org>
Fri, 16 Jun 2023 13:18:41 +0000 (15:18 +0200)
committerClaudiu Beznea <claudiu.beznea@microchip.com>
Wed, 21 Jun 2023 07:22:40 +0000 (10:22 +0300)
With interrupt handling fixed in the MaxLinear PHY driver, see commit
97a89ed101bb ("net: phy: mxl-gpy: disable interrupts on GPY215 by
default"), we can finally add the correct interrupt description to the
device tree.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Link: https://lore.kernel.org/r/20230616-feature-d10-dt-cleanups-v1-3-50dd0452b8fe@kernel.org
arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt-8g.dts
arch/arm/boot/dts/lan966x-kontron-kswitch-d10-mmt.dtsi

index 5feef9a59a7905d39429e656b474af869d74ea77..ad5d8b56e6fa96a9f9923dbc6b392dcb02e31dac 100644 (file)
@@ -15,10 +15,12 @@ / {
 &mdio0 {
        phy2: ethernet-phy@3 {
                reg = <3>;
+               interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
        };
 
        phy3: ethernet-phy@4 {
                reg = <4>;
+               interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
        };
 };
 
index f4df4cc1dfa5e6b15d6189c9f8fcc84abb78a61e..426893750d51f9f988f9ae7d4cc8c91aaff7a90b 100644 (file)
@@ -49,6 +49,9 @@ spi3: spi@400 {
 };
 
 &gpio {
+       pinctrl-0 = <&phy_int_pins>;
+       pinctrl-names = "default";
+
        fc3_b_pins: fc3-b-pins {
                /* SCK, MISO, MOSI */
                pins = "GPIO_51", "GPIO_52", "GPIO_53";
@@ -61,6 +64,12 @@ miim_c_pins: miim-c-pins {
                function = "miim_c";
        };
 
+       phy_int_pins: phy-int-pins {
+               /* PHY_INT# */
+               pins = "GPIO_24";
+               function = "gpio";
+       };
+
        reset_pins: reset-pins {
                /* SYS_RST# */
                pins = "GPIO_56";
@@ -107,21 +116,25 @@ &mdio0 {
 
        phy4: ethernet-phy@5 {
                reg = <5>;
+               interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
                coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
        };
 
        phy5: ethernet-phy@6 {
                reg = <6>;
+               interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
                coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
        };
 
        phy6: ethernet-phy@7 {
                reg = <7>;
+               interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
                coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
        };
 
        phy7: ethernet-phy@8 {
                reg = <8>;
+               interrupts-extended = <&gpio 24 IRQ_TYPE_LEVEL_LOW>;
                coma-mode-gpios = <&gpio 37 GPIO_OPEN_DRAIN>;
        };
 };