perf annotate: Add more x86 mov instruction cases

Instructions with sign- and zero- extention like movsbl and movzwq were
not handled properly.  As it can check different size suffix (-b, -w, -l
or -q) we can omit that and add the common parts even though some
combinations are not possible.

Reviewed-by: Ian Rogers <irogers@google.com>
Link: https://lore.kernel.org/r/20230908052216.566148-1-namhyung@kernel.org
Signed-off-by: Namhyung Kim <namhyung@kernel.org>

diff --git a/tools/perf/arch/x86/annotate/instructions.c b/tools/perf/arch/x86/annotate/instructions.c
index 5f4ac4fc7fcf788d07ac84b3484396d0424542dc..5cdf457f5cbeecb1d5664c45cf334ff2569a4eac 100644 (file)
--- a/tools/perf/arch/x86/annotate/instructions.c
+++ b/tools/perf/arch/x86/annotate/instructions.c
@@ -74,12 +74,15 @@ static struct ins x86__instructions[] = {
        { .name = "movdqa",     .ops = &mov_ops,  },
        { .name = "movdqu",     .ops = &mov_ops,  },
        { .name = "movsd",      .ops = &mov_ops,  },
-       { .name = "movslq",     .ops = &mov_ops,  },
        { .name = "movss",      .ops = &mov_ops,  },
+       { .name = "movsb",      .ops = &mov_ops,  },
+       { .name = "movsw",      .ops = &mov_ops,  },
+       { .name = "movsl",      .ops = &mov_ops,  },
        { .name = "movupd",     .ops = &mov_ops,  },
        { .name = "movups",     .ops = &mov_ops,  },
-       { .name = "movzbl",     .ops = &mov_ops,  },
-       { .name = "movzwl",     .ops = &mov_ops,  },
+       { .name = "movzb",      .ops = &mov_ops,  },
+       { .name = "movzw",      .ops = &mov_ops,  },
+       { .name = "movzl",      .ops = &mov_ops,  },
        { .name = "mulsd",      .ops = &mov_ops,  },
        { .name = "mulss",      .ops = &mov_ops,  },
        { .name = "nop",        .ops = &nop_ops,  },