ARM: dts: imx6sl: use tabs for code indent

[ Upstream commit 218db824a7519856d0eaaeb5c41ca504ed550210 ]

This fixes the following error:

arch/arm/boot/dts/imx6sl.dtsi:714: error: code indent should use tabs
where possible

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index cfd6b4972ae7fd879cfed820ad27162fca356bf7..01122ddfdc0d337b47ffaef3366d0142d1e392dd 100644 (file)
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -61,10 +61,10 @@ cpu0: cpu@0 {
                                <792000  1175000>,
                                <396000  975000>;
                        fsl,soc-operating-points =
-                               /* ARM kHz      SOC-PU uV */
-                               <996000         1225000>,
-                               <792000         1175000>,
-                               <396000         1175000>;
+                               /* ARM kHz      SOC-PU uV */
+                               <996000         1225000>,
+                               <792000         1175000>,
+                               <396000         1175000>;
                        clock-latency = <61036>; /* two CLK32 periods */
                        #cooling-cells = <2>;
                        clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>,
@@ -225,7 +225,7 @@ ecspi4: spi@2014000 {
 
                                uart5: serial@2018000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02018000 0x4000>;
                                        interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
@@ -238,7 +238,7 @@ uart5: serial@2018000 {
 
                                uart1: serial@2020000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02020000 0x4000>;
                                        interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
@@ -251,7 +251,7 @@ uart1: serial@2020000 {
 
                                uart2: serial@2024000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02024000 0x4000>;
                                        interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
@@ -312,7 +312,7 @@ ssi3: ssi@2030000 {
 
                                uart3: serial@2034000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02034000 0x4000>;
                                        interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
@@ -325,7 +325,7 @@ uart3: serial@2034000 {
 
                                uart4: serial@2038000 {
                                        compatible = "fsl,imx6sl-uart",
-                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
+                                                    "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02038000 0x4000>;
                                        interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
@@ -714,7 +714,7 @@ pd_pu: power-domain@1 {
                                                #power-domain-cells = <0>;
                                                power-supply = <&reg_pu>;
                                                clocks = <&clks IMX6SL_CLK_GPU2D_OVG>,
-                                                        <&clks IMX6SL_CLK_GPU2D_PODF>;
+                                                        <&clks IMX6SL_CLK_GPU2D_PODF>;
                                        };
 
                                        pd_disp: power-domain@2 {