]> git.itanic.dy.fi Git - linux-stable/commitdiff
drm/xe: Replace PVC check by engine type check
authorJosé Roberto de Souza <jose.souza@intel.com>
Tue, 23 May 2023 20:14:45 +0000 (13:14 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Tue, 19 Dec 2023 23:34:10 +0000 (18:34 -0500)
__emit_job_gen12_render_compute() masks some PIPE_CONTROL bits that
do not exist in platforms without render engine.
So here replacing the PVC check by something more generic that will
support any future platforms without render engine.

Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
drivers/gpu/drm/xe/xe_ring_ops.c

index a09ee8c736b5398e030c457de03da17d8e9a44c0..a70fa6d9ae60637cfe26dbee1349334efda729fe 100644 (file)
@@ -249,11 +249,11 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
        u32 ppgtt_flag = get_ppgtt_flag(job);
        struct xe_gt *gt = job->engine->gt;
        struct xe_device *xe = gt_to_xe(gt);
-       bool pvc = xe->info.platform == XE_PVC;
+       bool lacks_render = !(xe->gt[0].info.engine_mask & XE_HW_ENGINE_RCS_MASK);
        u32 mask_flags = 0;
 
        dw[i++] = preparser_disable(true);
-       if (pvc)
+       if (lacks_render)
                mask_flags = PIPE_CONTROL_3D_ARCH_FLAGS;
        else if (job->engine->class == XE_ENGINE_CLASS_COMPUTE)
                mask_flags = PIPE_CONTROL_3D_ENGINE_FLAGS;
@@ -275,7 +275,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
                                                job->user_fence.value,
                                                dw, i);
 
-       i = emit_pipe_imm_ggtt(xe_lrc_seqno_ggtt_addr(lrc), seqno, pvc, dw, i);
+       i = emit_pipe_imm_ggtt(xe_lrc_seqno_ggtt_addr(lrc), seqno, lacks_render, dw, i);
 
        i = emit_user_interrupt(dw, i);