]> git.itanic.dy.fi Git - linux-stable/commitdiff
drm/amdgpu: enable mcbp by default on gfx9
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 16 Jun 2023 21:07:53 +0000 (17:07 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 30 Jun 2023 17:12:15 +0000 (13:12 -0400)
It's required for high priority queues.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2535
Reviewed-and-tested-by: Jiadong Zhu <Jiadong.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c

index a700fe09b9da4a53858bf6a190cf9d4b8cb9888f..a92c6189b4b60ce7c7651a034e2a728a58c1c17c 100644 (file)
@@ -3678,6 +3678,11 @@ static void amdgpu_device_set_mcbp(struct amdgpu_device *adev)
        if (amdgpu_mcbp == 1)
                adev->gfx.mcbp = true;
 
+       if ((adev->ip_versions[GC_HWIP][0] >= IP_VERSION(9, 0, 0)) &&
+           (adev->ip_versions[GC_HWIP][0] < IP_VERSION(10, 0, 0)) &&
+           adev->gfx.num_gfx_rings)
+               adev->gfx.mcbp = true;
+
        if (amdgpu_sriov_vf(adev))
                adev->gfx.mcbp = true;
 
index 2483950d06ea18109f5093fcd49be03766a98846..0593ef8fe0a63e270cf1117eb0264f06ed6b658c 100644 (file)
@@ -180,7 +180,7 @@ uint amdgpu_dc_feature_mask = 2;
 uint amdgpu_dc_debug_mask;
 uint amdgpu_dc_visual_confirm;
 int amdgpu_async_gfx_ring = 1;
-int amdgpu_mcbp;
+int amdgpu_mcbp = -1;
 int amdgpu_discovery = -1;
 int amdgpu_mes;
 int amdgpu_mes_kiq;
@@ -634,10 +634,10 @@ module_param_named(async_gfx_ring, amdgpu_async_gfx_ring, int, 0444);
 
 /**
  * DOC: mcbp (int)
- * It is used to enable mid command buffer preemption. (0 = disabled (default), 1 = enabled)
+ * It is used to enable mid command buffer preemption. (0 = disabled, 1 = enabled, -1 auto (default))
  */
 MODULE_PARM_DESC(mcbp,
-       "Enable Mid-command buffer preemption (0 = disabled (default), 1 = enabled)");
+       "Enable Mid-command buffer preemption (0 = disabled, 1 = enabled), -1 = auto (default)");
 module_param_named(mcbp, amdgpu_mcbp, int, 0444);
 
 /**