]> git.itanic.dy.fi Git - linux-stable/commitdiff
arm64: dts: meson-axg: add PWRC node
authorNeil Armstrong <narmstrong@baylibre.com>
Fri, 20 Nov 2020 15:21:30 +0000 (16:21 +0100)
committerKevin Hilman <khilman@baylibre.com>
Mon, 30 Nov 2020 23:54:24 +0000 (15:54 -0800)
This adds the power controller PWRC node and the corresponding ethernet power domain.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20201120152131.3918814-2-narmstrong@baylibre.com
arch/arm64/boot/dts/amlogic/meson-axg.dtsi

index 724ee179b316e23d9540736a8eac7adabc4c807f..fed9e6edbfa960d04b6dedd8cf57663fdfe7eee4 100644 (file)
@@ -12,6 +12,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
 #include <dt-bindings/reset/amlogic,meson-axg-reset.h>
+#include <dt-bindings/power/meson-axg-power.h>
 
 / {
        compatible = "amlogic,meson-axg";
@@ -229,6 +230,7 @@ ethmac: ethernet@ff3f0000 {
                        tx-fifo-depth = <2048>;
                        resets = <&reset RESET_ETHERNET>;
                        reset-names = "stmmaceth";
+                       power-domains = <&pwrc PWRC_AXG_ETHERNET_MEM_ID>;
                        status = "disabled";
                };
 
@@ -1159,6 +1161,46 @@ clkc: clock-controller {
                                        clocks = <&xtal>;
                                        clock-names = "xtal";
                                };
+
+                               pwrc: power-controller {
+                                       compatible = "amlogic,meson-axg-pwrc";
+                                       #power-domain-cells = <1>;
+                                       amlogic,ao-sysctrl = <&sysctrl_AO>;
+                                       resets = <&reset RESET_VIU>,
+                                                <&reset RESET_VENC>,
+                                                <&reset RESET_VCBUS>,
+                                                <&reset RESET_VENCL>,
+                                                <&reset RESET_VID_LOCK>;
+                                       reset-names = "viu", "venc", "vcbus",
+                                                     "vencl", "vid_lock";
+                                       clocks = <&clkc CLKID_VPU>,
+                                                <&clkc CLKID_VAPB>;
+                                       clock-names = "vpu", "vapb";
+                                       /*
+                                        * VPU clocking is provided by two identical clock paths
+                                        * VPU_0 and VPU_1 muxed to a single clock by a glitch
+                                        * free mux to safely change frequency while running.
+                                        * Same for VAPB but with a final gate after the glitch free mux.
+                                        */
+                                       assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
+                                                         <&clkc CLKID_VPU_0>,
+                                                         <&clkc CLKID_VPU>, /* Glitch free mux */
+                                                         <&clkc CLKID_VAPB_0_SEL>,
+                                                         <&clkc CLKID_VAPB_0>,
+                                                         <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
+                                       assigned-clock-parents = <&clkc CLKID_FCLK_DIV4>,
+                                                                <0>, /* Do Nothing */
+                                                                <&clkc CLKID_VPU_0>,
+                                                                <&clkc CLKID_FCLK_DIV4>,
+                                                                <0>, /* Do Nothing */
+                                                                <&clkc CLKID_VAPB_0>;
+                                       assigned-clock-rates = <0>, /* Do Nothing */
+                                                              <250000000>,
+                                                              <0>, /* Do Nothing */
+                                                              <0>, /* Do Nothing */
+                                                              <250000000>,
+                                                              <0>; /* Do Nothing */
+                               };
                        };
                };