]> git.itanic.dy.fi Git - linux-stable/commitdiff
PCI: Use PCI_HEADER_TYPE_* instead of literals
authorIlpo Järvinen <ilpo.jarvinen@linux.intel.com>
Tue, 3 Oct 2023 12:53:00 +0000 (15:53 +0300)
committerBjorn Helgaas <bhelgaas@google.com>
Tue, 3 Oct 2023 16:55:59 +0000 (11:55 -0500)
Replace literals under drivers/pci/ with PCI_HEADER_TYPE_MASK,
PCI_HEADER_TYPE_NORMAL, and PCI_HEADER_TYPE_MFD.

Also replace !! boolean conversions with FIELD_GET().

Link: https://lore.kernel.org/r/20231003125300.5541-4-ilpo.jarvinen@linux.intel.com
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> # for Renesas R-Car
12 files changed:
drivers/pci/controller/dwc/pci-layerscape.c
drivers/pci/controller/mobiveil/pcie-mobiveil-host.c
drivers/pci/controller/pcie-iproc.c
drivers/pci/controller/pcie-rcar-ep.c
drivers/pci/controller/pcie-rcar-host.c
drivers/pci/controller/vmd.c
drivers/pci/hotplug/cpqphp_ctrl.c
drivers/pci/hotplug/cpqphp_pci.c
drivers/pci/hotplug/ibmphp.h
drivers/pci/hotplug/ibmphp_pci.c
drivers/pci/pci.c
drivers/pci/quirks.c

index b931d597656f618dd9c8771cd265ed0e4da79ddb..37956e09c65bd51c95937e25b982f6e00a0491d4 100644 (file)
@@ -58,7 +58,7 @@ static bool ls_pcie_is_bridge(struct ls_pcie *pcie)
        u32 header_type;
 
        header_type = ioread8(pci->dbi_base + PCI_HEADER_TYPE);
-       header_type &= 0x7f;
+       header_type &= PCI_HEADER_TYPE_MASK;
 
        return header_type == PCI_HEADER_TYPE_BRIDGE;
 }
index 45b97a4b14dbd007eb511baab1923c8f77cb7a8a..32951f7d6d6d6a01399839f33dd513191b8f3ab6 100644 (file)
@@ -539,7 +539,7 @@ static bool mobiveil_pcie_is_bridge(struct mobiveil_pcie *pcie)
        u32 header_type;
 
        header_type = mobiveil_csr_readb(pcie, PCI_HEADER_TYPE);
-       header_type &= 0x7f;
+       header_type &= PCI_HEADER_TYPE_MASK;
 
        return header_type == PCI_HEADER_TYPE_BRIDGE;
 }
index bd1c98b688516cc9b96a5dc43e4723c4b7de410d..97f739a2c9f8f85cd675c9e3f99dd58edb1f63b5 100644 (file)
@@ -783,7 +783,7 @@ static int iproc_pcie_check_link(struct iproc_pcie *pcie)
 
        /* make sure we are not in EP mode */
        iproc_pci_raw_config_read32(pcie, 0, PCI_HEADER_TYPE, 1, &hdr_type);
-       if ((hdr_type & 0x7f) != PCI_HEADER_TYPE_BRIDGE) {
+       if ((hdr_type & PCI_HEADER_TYPE_MASK) != PCI_HEADER_TYPE_BRIDGE) {
                dev_err(dev, "in EP mode, hdr=%#02x\n", hdr_type);
                return -EFAULT;
        }
index f9682df1da61929b5be3b04716979830976214b1..7034c0ff23d0d917b600fb8e058a06c7bb01104e 100644 (file)
@@ -43,7 +43,7 @@ static void rcar_pcie_ep_hw_init(struct rcar_pcie *pcie)
        rcar_rmw32(pcie, REXPCAP(0), 0xff, PCI_CAP_ID_EXP);
        rcar_rmw32(pcie, REXPCAP(PCI_EXP_FLAGS),
                   PCI_EXP_FLAGS_TYPE, PCI_EXP_TYPE_ENDPOINT << 4);
-       rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), 0x7f,
+       rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), PCI_HEADER_TYPE_MASK,
                   PCI_HEADER_TYPE_NORMAL);
 
        /* Write out the physical slot number = 0 */
index 88975e40ee2fbf6099a1739d3bb95e6a30325a84..bf7cc0b6a695736f8b9a27af05fe23c3778369e3 100644 (file)
@@ -460,7 +460,7 @@ static int rcar_pcie_hw_init(struct rcar_pcie *pcie)
        rcar_rmw32(pcie, REXPCAP(0), 0xff, PCI_CAP_ID_EXP);
        rcar_rmw32(pcie, REXPCAP(PCI_EXP_FLAGS),
                PCI_EXP_FLAGS_TYPE, PCI_EXP_TYPE_ROOT_PORT << 4);
-       rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), 0x7f,
+       rcar_rmw32(pcie, RCONF(PCI_HEADER_TYPE), PCI_HEADER_TYPE_MASK,
                PCI_HEADER_TYPE_BRIDGE);
 
        /* Enable data link layer active state reporting */
index 1c1c1aa940a513201acd205fa10555ed6aefbc61..566721c41f3eaa0d0c8c42df927072f11aa566b7 100644 (file)
@@ -527,7 +527,7 @@ static void vmd_domain_reset(struct vmd_dev *vmd)
 
                        hdr_type = readb(base + PCI_HEADER_TYPE);
 
-                       functions = (hdr_type & 0x80) ? 8 : 1;
+                       functions = (hdr_type & PCI_HEADER_TYPE_MFD) ? 8 : 1;
                        for (fn = 0; fn < functions; fn++) {
                                base = vmd->cfgbar + PCIE_ECAM_OFFSET(bus,
                                                PCI_DEVFN(dev, fn), 0);
index e429ecddc8feb4af7252e3cf325d6d436a068634..c01968ef0bd7b0d427e7d0420636b17dfc70f0d5 100644 (file)
@@ -2059,7 +2059,7 @@ int cpqhp_process_SS(struct controller *ctrl, struct pci_func *func)
                                return rc;
 
                        /* If it's a bridge, check the VGA Enable bit */
-                       if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
+                       if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
                                rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR);
                                if (rc)
                                        return rc;
@@ -2342,7 +2342,7 @@ static int configure_new_function(struct controller *ctrl, struct pci_func *func
        if (rc)
                return rc;
 
-       if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
+       if ((temp_byte & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
                /* set Primary bus */
                dbg("set Primary bus = %d\n", func->bus);
                rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus);
@@ -2739,7 +2739,7 @@ static int configure_new_function(struct controller *ctrl, struct pci_func *func
                                         *   PCI_BRIDGE_CTL_SERR |
                                         *   PCI_BRIDGE_CTL_NO_ISA */
                rc = pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
-       } else if ((temp_byte & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
+       } else if ((temp_byte & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_NORMAL) {
                /* Standard device */
                rc = pci_bus_read_config_byte(pci_bus, devfn, 0x0B, &class_code);
 
index 3b248426a9f4245d95761456434f45b9c15d34b6..e9f1fb333a718ec541dd147a29ffe876f744f614 100644 (file)
@@ -363,7 +363,7 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
                        return rc;
 
                /* If multi-function device, set max_functions to 8 */
-               if (header_type & 0x80)
+               if (header_type & PCI_HEADER_TYPE_MFD)
                        max_functions = 8;
                else
                        max_functions = 1;
@@ -372,7 +372,7 @@ int cpqhp_save_config(struct controller *ctrl, int busnumber, int is_hot_plug)
 
                do {
                        DevError = 0;
-                       if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
+                       if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
                                /* Recurse the subordinate bus
                                 * get the subordinate bus number
                                 */
@@ -487,13 +487,13 @@ int cpqhp_save_slot_config(struct controller *ctrl, struct pci_func *new_slot)
        pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), 0x0B, &class_code);
        pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, 0), PCI_HEADER_TYPE, &header_type);
 
-       if (header_type & 0x80) /* Multi-function device */
+       if (header_type & PCI_HEADER_TYPE_MFD)
                max_functions = 8;
        else
                max_functions = 1;
 
        while (function < max_functions) {
-               if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
+               if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
                        /*  Recurse the subordinate bus */
                        pci_bus_read_config_byte(ctrl->pci_bus, PCI_DEVFN(new_slot->device, function), PCI_SECONDARY_BUS, &secondary_bus);
 
@@ -571,7 +571,7 @@ int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func *func)
                /* Check for Bridge */
                pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 
-               if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
+               if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
                        pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 
                        sub_bus = (int) secondary_bus;
@@ -625,7 +625,7 @@ int cpqhp_save_base_addr_length(struct controller *ctrl, struct pci_func *func)
 
                        }       /* End of base register loop */
 
-               } else if ((header_type & 0x7F) == 0x00) {
+               } else if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_NORMAL) {
                        /* Figure out IO and memory base lengths */
                        for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
                                temp_register = 0xFFFFFFFF;
@@ -723,7 +723,7 @@ int cpqhp_save_used_resources(struct controller *ctrl, struct pci_func *func)
                /* Check for Bridge */
                pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 
-               if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
+               if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
                        /* Clear Bridge Control Register */
                        command = 0x00;
                        pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command);
@@ -858,7 +858,7 @@ int cpqhp_save_used_resources(struct controller *ctrl, struct pci_func *func)
                                }
                        }       /* End of base register loop */
                /* Standard header */
-               } else if ((header_type & 0x7F) == 0x00) {
+               } else if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_NORMAL) {
                        /* Figure out IO and memory base lengths */
                        for (cloop = 0x10; cloop <= 0x24; cloop += 4) {
                                pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base);
@@ -975,7 +975,7 @@ int cpqhp_configure_board(struct controller *ctrl, struct pci_func *func)
                pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 
                /* If this is a bridge device, restore subordinate devices */
-               if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
+               if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
                        pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus);
 
                        sub_bus = (int) secondary_bus;
@@ -1067,7 +1067,7 @@ int cpqhp_valid_replace(struct controller *ctrl, struct pci_func *func)
                /* Check for Bridge */
                pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type);
 
-               if ((header_type & 0x7F) == PCI_HEADER_TYPE_BRIDGE) {
+               if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
                        /* In order to continue checking, we must program the
                         * bus registers in the bridge to respond to accesses
                         * for its subordinate bus(es)
@@ -1090,7 +1090,7 @@ int cpqhp_valid_replace(struct controller *ctrl, struct pci_func *func)
 
                }
                /* Check to see if it is a standard config header */
-               else if ((header_type & 0x7F) == PCI_HEADER_TYPE_NORMAL) {
+               else if ((header_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_NORMAL) {
                        /* Check subsystem vendor and ID */
                        pci_bus_read_config_dword(pci_bus, devfn, PCI_SUBSYSTEM_VENDOR_ID, &temp_register);
 
index 41eafe511210fa6a866d133ce243b08a8bbf46ed..c248a09be7b5d6cced8cd0b53aefbe84d514117b 100644 (file)
@@ -17,6 +17,7 @@
  */
 
 #include <linux/pci_hotplug.h>
+#include <linux/pci_regs.h>
 
 extern int ibmphp_debug;
 
@@ -286,8 +287,8 @@ int ibmphp_register_pci(void);
 
 /* pci specific defines */
 #define PCI_VENDOR_ID_NOTVALID         0xFFFF
-#define PCI_HEADER_TYPE_MULTIDEVICE    0x80
-#define PCI_HEADER_TYPE_MULTIBRIDGE    0x81
+#define PCI_HEADER_TYPE_MULTIDEVICE    (PCI_HEADER_TYPE_MFD|PCI_HEADER_TYPE_NORMAL)
+#define PCI_HEADER_TYPE_MULTIBRIDGE    (PCI_HEADER_TYPE_MFD|PCI_HEADER_TYPE_BRIDGE)
 
 #define LATENCY                0x64
 #define CACHE          64
index 50038e5f9ca4045c91cea42a9c08124ba7039550..eeb412cbd9fe3cf38b9ba98ccc073ac28bbd1077 100644 (file)
@@ -1087,7 +1087,7 @@ static struct res_needed *scan_behind_bridge(struct pci_func *func, u8 busno)
                                pci_bus_read_config_dword(ibmphp_pci_bus, devfn, PCI_CLASS_REVISION, &class);
 
                                debug("hdr_type behind the bridge is %x\n", hdr_type);
-                               if ((hdr_type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) {
+                               if ((hdr_type & PCI_HEADER_TYPE_MASK) == PCI_HEADER_TYPE_BRIDGE) {
                                        err("embedded bridges not supported for hot-plugging.\n");
                                        amount->not_correct = 1;
                                        return amount;
index 59c01d68c6d5ed16ed07622694f321ca8092e40f..33946ff5c6bdc6ed699835e9e55931bda1b85683 100644 (file)
@@ -534,7 +534,7 @@ u8 pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap)
 
        pci_bus_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type);
 
-       pos = __pci_bus_find_cap_start(bus, devfn, hdr_type & 0x7f);
+       pos = __pci_bus_find_cap_start(bus, devfn, hdr_type & PCI_HEADER_TYPE_MASK);
        if (pos)
                pos = __pci_find_next_cap(bus, devfn, pos, cap);
 
index eeec1d6f90238ed981d1161cf563862050fbc934..b16e6168e89b53cb98687de932fc280ff2c1a0cf 100644 (file)
@@ -1844,8 +1844,8 @@ static void quirk_jmicron_ata(struct pci_dev *pdev)
 
        /* Update pdev accordingly */
        pci_read_config_byte(pdev, PCI_HEADER_TYPE, &hdr);
-       pdev->hdr_type = hdr & 0x7f;
-       pdev->multifunction = !!(hdr & 0x80);
+       pdev->hdr_type = hdr & PCI_HEADER_TYPE_MASK;
+       pdev->multifunction = FIELD_GET(PCI_HEADER_TYPE_MFD, hdr);
 
        pci_read_config_dword(pdev, PCI_CLASS_REVISION, &class);
        pdev->class = class >> 8;
@@ -5666,7 +5666,7 @@ static void quirk_nvidia_hda(struct pci_dev *gpu)
 
        /* The GPU becomes a multi-function device when the HDA is enabled */
        pci_read_config_byte(gpu, PCI_HEADER_TYPE, &hdr_type);
-       gpu->multifunction = !!(hdr_type & 0x80);
+       gpu->multifunction = FIELD_GET(PCI_HEADER_TYPE_MFD, hdr_type);
 }
 DECLARE_PCI_FIXUP_CLASS_HEADER(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
                               PCI_BASE_CLASS_DISPLAY, 16, quirk_nvidia_hda);