]> git.itanic.dy.fi Git - linux-stable/commitdiff
Merge branch 'for-6.5/cxl-fwupd' into for-6.5/cxl
authorDan Williams <dan.j.williams@intel.com>
Sun, 25 Jun 2023 23:12:26 +0000 (16:12 -0700)
committerDan Williams <dan.j.williams@intel.com>
Sun, 25 Jun 2023 23:12:26 +0000 (16:12 -0700)
Add the first typical (non-sanitization) consumer of the new background
command infrastructure, firmware update. Given both firmware-update and
sanitization were developed in parallel from the common
background-command baseline, resolve some minor context conflicts.

1  2 
Documentation/ABI/testing/sysfs-bus-cxl
drivers/cxl/core/memdev.c
drivers/cxl/cxlmem.h
drivers/cxl/pci.c
tools/testing/cxl/test/mem.c

index c619493e413ec1483bae94ba1eb21a43cac6f43c,06a7718d3fc3f692276b88277dbd933703e78646..6350dd82b9a9ceb028eaa7a5145a9dcce3413a12
@@@ -58,43 -58,17 +58,54 @@@ Description
                affinity for this device.
  
  
 +What:         /sys/bus/cxl/devices/memX/security/state
 +Date:         June, 2023
 +KernelVersion:        v6.5
 +Contact:      linux-cxl@vger.kernel.org
 +Description:
 +              (RO) Reading this file will display the CXL security state for
 +              that device. Such states can be: 'disabled', 'sanitize', when
 +              a sanitization is currently underway; or those available only
 +              for persistent memory: 'locked', 'unlocked' or 'frozen'. This
 +              sysfs entry is select/poll capable from userspace to notify
 +              upon completion of a sanitize operation.
 +
 +
 +What:           /sys/bus/cxl/devices/memX/security/sanitize
 +Date:           June, 2023
 +KernelVersion:  v6.5
 +Contact:        linux-cxl@vger.kernel.org
 +Description:
 +              (WO) Write a boolean 'true' string value to this attribute to
 +              sanitize the device to securely re-purpose or decommission it.
 +              This is done by ensuring that all user data and meta-data,
 +              whether it resides in persistent capacity, volatile capacity,
 +              or the LSA, is made permanently unavailable by whatever means
 +              is appropriate for the media type. This functionality requires
 +              the device to be not be actively decoding any HPA ranges.
 +
 +
 +What            /sys/bus/cxl/devices/memX/security/erase
 +Date:           June, 2023
 +KernelVersion:  v6.5
 +Contact:        linux-cxl@vger.kernel.org
 +Description:
 +              (WO) Write a boolean 'true' string value to this attribute to
 +              secure erase user data by changing the media encryption keys for
 +              all user data areas of the device.
 +
 +
+ What:         /sys/bus/cxl/devices/memX/firmware/
+ Date:         April, 2023
+ KernelVersion:        v6.5
+ Contact:      linux-cxl@vger.kernel.org
+ Description:
+               (RW) Firmware uploader mechanism. The different files under
+               this directory can be used to upload and activate new
+               firmware for CXL devices. The interfaces under this are
+               documented in sysfs-class-firmware.
  What:         /sys/bus/cxl/devices/*/devtype
  Date:         June, 2021
  KernelVersion:        v5.14
index ed8de7efddef87508bca032b5fd8abb315ffb4e8,a614be3ffa494b1caa76f30fa9891e1738002a1d..fd2e6b0f79c038daf927e87862845d73dafa5295
@@@ -1,7 -1,7 +1,8 @@@
  // SPDX-License-Identifier: GPL-2.0-only
  /* Copyright(c) 2020 Intel Corporation. */
  
 +#include <linux/io-64-nonatomic-lo-hi.h>
+ #include <linux/firmware.h>
  #include <linux/device.h>
  #include <linux/slab.h>
  #include <linux/idr.h>
index 78ff518012bff033715679a868264208583a3027,ffc3c31ac5bdd031450951cdc8b28ba13a812186..ce6f085e5ba87ae589900fab09565a0b957a4509
@@@ -260,23 -261,84 +261,101 @@@ struct cxl_poison_state 
        struct mutex lock;  /* Protect reads of poison list */
  };
  
+ /*
+  * Get FW Info
+  * CXL rev 3.0 section 8.2.9.3.1; Table 8-56
+  */
+ struct cxl_mbox_get_fw_info {
+       u8 num_slots;
+       u8 slot_info;
+       u8 activation_cap;
+       u8 reserved[13];
+       char slot_1_revision[16];
+       char slot_2_revision[16];
+       char slot_3_revision[16];
+       char slot_4_revision[16];
+ } __packed;
+ #define CXL_FW_INFO_SLOT_INFO_CUR_MASK                        GENMASK(2, 0)
+ #define CXL_FW_INFO_SLOT_INFO_NEXT_MASK                       GENMASK(5, 3)
+ #define CXL_FW_INFO_SLOT_INFO_NEXT_SHIFT              3
+ #define CXL_FW_INFO_ACTIVATION_CAP_HAS_LIVE_ACTIVATE  BIT(0)
+ /*
+  * Transfer FW Input Payload
+  * CXL rev 3.0 section 8.2.9.3.2; Table 8-57
+  */
+ struct cxl_mbox_transfer_fw {
+       u8 action;
+       u8 slot;
+       u8 reserved[2];
+       __le32 offset;
+       u8 reserved2[0x78];
+       u8 data[];
+ } __packed;
+ #define CXL_FW_TRANSFER_ACTION_FULL   0x0
+ #define CXL_FW_TRANSFER_ACTION_INITIATE       0x1
+ #define CXL_FW_TRANSFER_ACTION_CONTINUE       0x2
+ #define CXL_FW_TRANSFER_ACTION_END    0x3
+ #define CXL_FW_TRANSFER_ACTION_ABORT  0x4
+ /*
+  * CXL rev 3.0 section 8.2.9.3.2 mandates 128-byte alignment for FW packages
+  * and for each part transferred in a Transfer FW command.
+  */
+ #define CXL_FW_TRANSFER_ALIGNMENT     128
+ /*
+  * Activate FW Input Payload
+  * CXL rev 3.0 section 8.2.9.3.3; Table 8-58
+  */
+ struct cxl_mbox_activate_fw {
+       u8 action;
+       u8 slot;
+ } __packed;
+ #define CXL_FW_ACTIVATE_ONLINE                0x0
+ #define CXL_FW_ACTIVATE_OFFLINE               0x1
+ /* FW state bits */
+ #define CXL_FW_STATE_BITS             32
+ #define CXL_FW_CANCEL         BIT(0)
+ /**
+  * struct cxl_fw_state - Firmware upload / activation state
+  *
+  * @state: fw_uploader state bitmask
+  * @oneshot: whether the fw upload fits in a single transfer
+  * @num_slots: Number of FW slots available
+  * @cur_slot: Slot number currently active
+  * @next_slot: Slot number for the new firmware
+  */
+ struct cxl_fw_state {
+       DECLARE_BITMAP(state, CXL_FW_STATE_BITS);
+       bool oneshot;
+       int num_slots;
+       int cur_slot;
+       int next_slot;
+ };
 +/**
 + * struct cxl_security_state - Device security state
 + *
 + * @state: state of last security operation
 + * @poll: polling for sanitization is enabled, device has no mbox irq support
 + * @poll_tmo_secs: polling timeout
 + * @poll_dwork: polling work item
 + * @sanitize_node: sanitation sysfs file to notify
 + */
 +struct cxl_security_state {
 +      unsigned long state;
 +      bool poll;
 +      int poll_tmo_secs;
 +      struct delayed_work poll_dwork;
 +      struct kernfs_node *sanitize_node;
 +};
 +
  /**
   * struct cxl_dev_state - The driver device state
   *
@@@ -353,7 -416,7 +433,8 @@@ struct cxl_dev_state 
  
        struct cxl_event_state event;
        struct cxl_poison_state poison;
 +      struct cxl_security_state security;
+       struct cxl_fw_state fw;
  
        struct rcuwait mbox_wait;
        int (*mbox_send)(struct cxl_dev_state *cxlds, struct cxl_mbox_cmd *cmd);
Simple merge
Simple merge