]> git.itanic.dy.fi Git - linux-stable/commitdiff
dt-bindings: pinctrl: mediatek: fix naming inconsistency
authorArınç ÜNAL <arinc.unal@arinc9.com>
Fri, 17 Mar 2023 21:30:04 +0000 (00:30 +0300)
committerLinus Walleij <linus.walleij@linaro.org>
Sun, 19 Mar 2023 20:47:25 +0000 (21:47 +0100)
Some schemas include "MediaTek", some "Mediatek". Rename all to "MediaTek"
to address the naming inconsistency.

Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230317213011.13656-15-arinc.unal@arinc9.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Documentation/devicetree/bindings/pinctrl/mediatek,mt65xx-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/mediatek,mt6779-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/mediatek,mt6795-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/mediatek,mt7622-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/mediatek,mt7981-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/mediatek,mt7986-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/mediatek,mt8183-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/mediatek,mt8186-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/mediatek,mt8195-pinctrl.yaml
Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml

index a55c8e4ff26efcd609ca1b9f1d7de602be5fde55..77b1b52f5799d3030347d26de2d9b0c192b8f7e5 100644 (file)
@@ -4,13 +4,13 @@
 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt65xx-pinctrl.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Mediatek MT65xx Pin Controller
+title: MediaTek MT65xx Pin Controller
 
 maintainers:
   - Sean Wang <sean.wang@kernel.org>
 
 description: |+
-  The Mediatek's Pin controller is used to control SoC pins.
+  The MediaTek's MT65xx Pin controller is used to control SoC pins.
 
 properties:
   compatible:
index a2141eb0854e670a1036af582017162fe5ef79f8..c2fea29fa02fc9e8bb22dd6cf03a504d10563410 100644 (file)
@@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6779-pinctrl.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Mediatek MT6779 Pin Controller
+title: MediaTek MT6779 Pin Controller
 
 maintainers:
   - Andy Teng <andy.teng@mediatek.com>
index c5131f053b61b31a85025f6b99b22a6b70f515cd..a78df32e6c39290616fb4b7f6820921b950f8d72 100644 (file)
@@ -4,14 +4,14 @@
 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6795-pinctrl.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Mediatek MT6795 Pin Controller
+title: MediaTek MT6795 Pin Controller
 
 maintainers:
   - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
   - Sean Wang <sean.wang@kernel.org>
 
 description: |
-  The Mediatek's Pin controller is used to control SoC pins.
+  The MediaTek's MT6795 Pin controller is used to control SoC pins.
 
 properties:
   compatible:
index ac93eb8f01a6e79d7e86d6c71d6f47385fcf3a86..3531b63ca4bfe10bd0377fd577df70c6597a878d 100644 (file)
@@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7622-pinctrl.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Mediatek MT7622 Pin Controller
+title: MediaTek MT7622 Pin Controller
 
 maintainers:
   - Sean Wang <sean.wang@kernel.org>
index 74c66fbcb2ae6c659275185ac6eec718c3939cb6..c3373290a8a1592d6a1986b94371f99f5a467b32 100644 (file)
@@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7981-pinctrl.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Mediatek MT7981 Pin Controller
+title: MediaTek MT7981 Pin Controller
 
 maintainers:
   - Daniel Golle <daniel@makrotopia.org>
index 216b356cd5192660aa8923409fb0f68eea9dd456..71033831d03d5ae8d27122dc318d5c0aafae58c3 100644 (file)
@@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctrl.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Mediatek MT7986 Pin Controller
+title: MediaTek MT7986 Pin Controller
 
 maintainers:
   - Sean Wang <sean.wang@kernel.org>
index c30cd0d010ddbf3080930ca26110b3fe725b0ba1..3e34b03e11fc679017d63aa813dde780fd80cdeb 100644 (file)
@@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8183-pinctrl.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Mediatek MT8183 Pin Controller
+title: MediaTek MT8183 Pin Controller
 
 maintainers:
   - Sean Wang <sean.wang@kernel.org>
index 32d64416eb16a4b7afceebb008150b08b8a06ff3..a0519acc92febee8736d75c9aa40143fbc1edc59 100644 (file)
@@ -4,13 +4,13 @@
 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8186-pinctrl.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Mediatek MT8186 Pin Controller
+title: MediaTek MT8186 Pin Controller
 
 maintainers:
   - Sean Wang <sean.wang@mediatek.com>
 
 description: |
-  The Mediatek's Pin controller is used to control SoC pins.
+  The MediaTek's MT8186 Pin controller is used to control SoC pins.
 
 properties:
   compatible:
index e764cb0f8c1a31b9b8572dfc351c4f4cb75139ed..3c3dd142a9894a8868d8b8584c6a185eda966f25 100644 (file)
@@ -4,13 +4,13 @@
 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Mediatek MT8192 Pin Controller
+title: MediaTek MT8192 Pin Controller
 
 maintainers:
   - Sean Wang <sean.wang@mediatek.com>
 
 description: |
-  The Mediatek's Pin controller is used to control SoC pins.
+  The MediaTek's MT8192 Pin controller is used to control SoC pins.
 
 properties:
   compatible:
index 7b3dfc14eedcfbeab94cb39d412df99840bc3627..d4d5357cdd1d60b04ad1e1768f8f8a3dd17b82f9 100644 (file)
@@ -4,13 +4,13 @@
 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8195-pinctrl.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Mediatek MT8195 Pin Controller
+title: MediaTek MT8195 Pin Controller
 
 maintainers:
   - Sean Wang <sean.wang@mediatek.com>
 
 description: |
-  The Mediatek's Pin controller is used to control SoC pins.
+  The MediaTek's MT8195 Pin controller is used to control SoC pins.
 
 properties:
   compatible:
index 4b96884a1afc7d0fc08e0c52bd77de1e715ce1ac..42964dfa9fdbec63005e11047a9cd85d874db9b8 100644 (file)
@@ -4,7 +4,7 @@
 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt8365-pinctrl.yaml#
 $schema: http://devicetree.org/meta-schemas/core.yaml#
 
-title: Mediatek MT8365 Pin Controller
+title: MediaTek MT8365 Pin Controller
 
 maintainers:
   - Zhiyong Tao <zhiyong.tao@mediatek.com>