arm64/sysreg: Generate definitions for CPACR_ELx

Convert the CPACR system register definitions to be automatically generated
using the definitions in DDI0487H.a. The kernel does have some additional
definitions for subfields of SMEN, FPEN and ZEN which are not identified as
distinct subfields in the architecture so the definitions are not updated
as part of this patch.

No functional change.

Signed-off-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Link: https://lore.kernel.org/r/20220520161639.324236-4-broonie@kernel.org
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 4fd64e6ec40726af261205bdb4c69f8c3fb876d3..7603c3344697c5a73c648e1fedbb770e98fbe9da 100644 (file)
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -209,7 +209,6 @@
 #define SYS_ID_AA64MMFR2_EL1           sys_reg(3, 0, 0, 7, 2)
 
 #define SYS_ACTLR_EL1                  sys_reg(3, 0, 1, 0, 1)
-#define SYS_CPACR_EL1                  sys_reg(3, 0, 1, 0, 2)
 #define SYS_RGSR_EL1                   sys_reg(3, 0, 1, 0, 5)
 #define SYS_GCR_EL1                    sys_reg(3, 0, 1, 0, 6)
 
@@ -614,7 +613,6 @@
 
 /* VHE encodings for architectural EL0/1 system registers */
 #define SYS_SCTLR_EL12                 sys_reg(3, 5, 1, 0, 0)
-#define SYS_CPACR_EL12                 sys_reg(3, 5, 1, 0, 2)
 #define SYS_TTBR0_EL12                 sys_reg(3, 5, 2, 0, 0)
 #define SYS_TTBR1_EL12                 sys_reg(3, 5, 2, 0, 1)
 #define SYS_TCR_EL12                   sys_reg(3, 5, 2, 0, 2)

diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index b2e01e108b8efa27021e7a493af14aa9add758a2..4bf413770b65ccec451d32fa574abd4531492958 100644 (file)
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -185,6 +185,22 @@ Field      1       A
 Field  0       M
 EndSysreg
 
+SysregFields   CPACR_ELx
+Res0   63:29
+Field  28      TTA
+Res0   27:26
+Field  25:24   SMEN
+Res0   23:22
+Field  21:20   FPEN
+Res0   19:18
+Field  17:16   ZEN
+Res0   15:0
+EndSysregFields
+
+Sysreg CPACR_EL1       3       0       1       0       2
+Fields CPACR_ELx
+EndSysreg
+
 Sysreg SMPRI_EL1       3       0       1       2       4
 Res0   63:4
 Field  3:0     PRIORITY
@@ -283,6 +299,10 @@ Sysreg     CONTEXTIDR_EL2  3       4       13      0       1
 Fields CONTEXTIDR_ELx
 EndSysreg
 
+Sysreg CPACR_EL12      3       5       1       0       2
+Fields CPACR_ELx
+EndSysreg
+
 Sysreg ZCR_EL12        3       5       1       2       0
 Fields ZCR_ELx
 EndSysreg