dmaengine: dw-edma: Use non-atomic io-64 methods

Instead of splitting 64-bits IOs up into two 32-bits ones, use the existing
non-atomic readq()/writeq() functions. By doing so we can discard
CONFIG_64BIT #ifdefs from the code.

Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Vinod Koul <vkoul@kernel.org>

diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/dw-edma-v0-core.c
index 13f40560571b66b73bb472eef0004e3155446f79..6bcc575122586f5194688e5d7013cab7ef7f5f41 100644 (file)
--- a/drivers/dma/dw-edma/dw-edma-v0-core.c
+++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
@@ -8,6 +8,8 @@
 
 #include <linux/bitfield.h>
 
+#include <linux/io-64-nonatomic-lo-hi.h>
+
 #include "dw-edma-core.h"
 #include "dw-edma-v0-core.h"
 #include "dw-edma-v0-regs.h"
@@ -53,8 +55,6 @@ static inline struct dw_edma_v0_regs __iomem *__dw_regs(struct dw_edma *dw)
                SET_32(dw, rd_##name, value);           \
        } while (0)
 
-#ifdef CONFIG_64BIT
-
 #define SET_64(dw, name, value)                                \
        writeq(value, &(__dw_regs(dw)->name))
 
@@ -80,8 +80,6 @@ static inline struct dw_edma_v0_regs __iomem *__dw_regs(struct dw_edma *dw)
                SET_64(dw, rd_##name, value);           \
        } while (0)
 
-#endif /* CONFIG_64BIT */
-
 #define SET_COMPAT(dw, name, value)                    \
        writel(value, &(__dw_regs(dw)->type.unroll.name))
 
@@ -164,8 +162,6 @@ static inline u32 readl_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,
 #define SET_LL_32(ll, value) \
        writel(value, ll)
 
-#ifdef CONFIG_64BIT
-
 static inline void writeq_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,
                             u64 value, void __iomem *addr)
 {
@@ -225,8 +221,6 @@ static inline u64 readq_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,
 #define SET_LL_64(ll, value) \
        writeq(value, ll)
 
-#endif /* CONFIG_64BIT */
-
 /* eDMA management callbacks */
 void dw_edma_v0_core_off(struct dw_edma *dw)
 {
@@ -325,19 +319,10 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk)
                /* Transfer size */
                SET_LL_32(&lli[i].transfer_size, child->sz);
                /* SAR */
-               #ifdef CONFIG_64BIT
-                       SET_LL_64(&lli[i].sar.reg, child->sar);
-               #else /* CONFIG_64BIT */
-                       SET_LL_32(&lli[i].sar.lsb, lower_32_bits(child->sar));
-                       SET_LL_32(&lli[i].sar.msb, upper_32_bits(child->sar));
-               #endif /* CONFIG_64BIT */
+               SET_LL_64(&lli[i].sar.reg, child->sar);
                /* DAR */
-               #ifdef CONFIG_64BIT
-                       SET_LL_64(&lli[i].dar.reg, child->dar);
-               #else /* CONFIG_64BIT */
-                       SET_LL_32(&lli[i].dar.lsb, lower_32_bits(child->dar));
-                       SET_LL_32(&lli[i].dar.msb, upper_32_bits(child->dar));
-               #endif /* CONFIG_64BIT */
+               SET_LL_64(&lli[i].dar.reg, child->dar);
+
                i++;
        }
 
@@ -349,12 +334,7 @@ static void dw_edma_v0_core_write_chunk(struct dw_edma_chunk *chunk)
        /* Channel control */
        SET_LL_32(&llp->control, control);
        /* Linked list */
-       #ifdef CONFIG_64BIT
-               SET_LL_64(&llp->llp.reg, chunk->ll_region.paddr);
-       #else /* CONFIG_64BIT */
-               SET_LL_32(&llp->llp.lsb, lower_32_bits(chunk->ll_region.paddr));
-               SET_LL_32(&llp->llp.msb, upper_32_bits(chunk->ll_region.paddr));
-       #endif /* CONFIG_64BIT */
+       SET_LL_64(&llp->llp.reg, chunk->ll_region.paddr);
 }
 
 void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first)