drm/i915: Drop has_dp_mst from device info

No need to have this parameter in intel_device_info struct
as the requirement to support it is the DDI support.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220505193524.276400-6-jose.souza@intel.com

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index eddfbf5d3dee61e7da9eba30556d53b5b4d39386..cbe0b19af0a8acdfd4b8b94fbd70cb51476ff197 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1289,13 +1289,13 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_IPS(dev_priv)      (IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv))
 
-#define HAS_DP_MST(dev_priv)   (INTEL_INFO(dev_priv)->display.has_dp_mst)
 #define HAS_DP20(dev_priv)     (IS_DG2(dev_priv))
 
 #define HAS_CDCLK_CRAWL(dev_priv)       (INTEL_INFO(dev_priv)->display.has_cdclk_crawl)
 #define HAS_DDI(dev_priv)               (DISPLAY_VER(dev_priv) >= 9 || \
                                          IS_BROADWELL(dev_priv) || \
                                          IS_HASWELL(dev_priv))
+#define HAS_DP_MST(dev_priv)            (HAS_DDI(dev_priv))
 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
 #define HAS_PSR(dev_priv)               (INTEL_INFO(dev_priv)->display.has_psr)
 #define HAS_PSR_HW_TRACKING(dev_priv) \

diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 44a4723ff7f707bab6452e887dd62d68084273c3..ca6461ecb7deb777deac2f0bbfc3dff2c77cf23d 100644 (file)
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -536,7 +536,6 @@ static const struct intel_device_info vlv_info = {
        .display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
                BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
        .display.has_fpga_dbg = 1, \
-       .display.has_dp_mst = 1, \
        .has_rc6p = 0 /* RC6p removed-by HSW */, \
        HSW_PIPE_OFFSETS, \
        .has_runtime_pm = 1
@@ -690,7 +689,6 @@ static const struct intel_device_info skl_gt4_info = {
        .has_runtime_pm = 1, \
        .display.has_dmc = 1, \
        .has_rps = true, \
-       .display.has_dp_mst = 1, \
        .has_logical_ring_contexts = 1, \
        .dma_mask_size = 39, \
        .ppgtt_type = INTEL_PPGTT_FULL, \
@@ -931,7 +929,6 @@ static const struct intel_device_info adl_s_info = {
        .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) |         \
                BIT(DBUF_S4),                                                   \
        .display.has_dmc = 1,                                                   \
-       .display.has_dp_mst = 1,                                                \
        .display.has_dsb = 1,                                                   \
        .display.has_dsc = 1,                                                   \
        .display.fbc_mask = BIT(INTEL_FBC_A),                                   \

diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index cc317a511fb5441fd2b8ae725b1662c3a77a0539..ffea8bff4b76da53681d3a52873ac5c0bc729b75 100644 (file)
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -162,7 +162,6 @@ enum intel_ppgtt_type {
        func(cursor_needs_physical); \
        func(has_cdclk_crawl); \
        func(has_dmc); \
-       func(has_dp_mst); \
        func(has_dsb); \
        func(has_dsc); \
        func(has_fpga_dbg); \