]> git.itanic.dy.fi Git - linux-stable/commitdiff
dt-bindings: interrupt-controller: add Ralink SoCs interrupt controller
authorSergio Paracuellos <sergio.paracuellos@gmail.com>
Fri, 23 Jun 2023 03:59:01 +0000 (05:59 +0200)
committerRob Herring <robh@kernel.org>
Tue, 27 Jun 2023 14:14:38 +0000 (08:14 -0600)
Add YAML doc for the interrupt controller which is present on Ralink SoCs.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20230623035901.1514341-1-sergio.paracuellos@gmail.com
Signed-off-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/interrupt-controller/ralink,rt2880-intc.yaml [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/interrupt-controller/ralink,rt2880-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/ralink,rt2880-intc.yaml
new file mode 100644 (file)
index 0000000..0fa952a
--- /dev/null
@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/interrupt-controller/ralink,rt2880-intc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Ralink SoCs Interrupt Controller
+
+maintainers:
+  - Sergio Paracuellos <sergio.paracuellos@gmail.com>
+
+allOf:
+  - $ref: /schemas/interrupt-controller.yaml#
+
+description:
+  This interrupt controller support a central point for interrupt aggregation
+  for platform related blocks.
+
+properties:
+  compatible:
+    const: ralink,rt2880-intc
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  interrupt-controller: true
+
+  '#interrupt-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - interrupt-controller
+  - '#interrupt-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    interrupt-controller@200 {
+      compatible = "ralink,rt2880-intc";
+      reg = <0x200 0x100>;
+      interrupt-controller;
+      #interrupt-cells = <1>;
+
+      interrupt-parent = <&cpuintc>;
+      interrupts = <2>;
+    };
+...