drm/i915/display/ehl: Update voltage swing table

EHL table was recently updated with some minor fixes.

BSpec: 21257
Cc: stable@vger.kernel.org
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220113160437.49059-1-jose.souza@intel.com
(cherry picked from commit 5ec7baef52c367cdbda964aa662f7135c25bab1f)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 1e689d573512f9f72e8569444a788511a8e1d4ee..e2dfb93a82bd9a6bb1818ecf8903c4416b0cb173 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -477,14 +477,14 @@ static const struct intel_ddi_buf_trans icl_combo_phy_trans_hdmi = {
 static const union intel_ddi_buf_trans_entry _ehl_combo_phy_trans_dp[] = {
                                                        /* NT mV Trans mV db    */
        { .icl = { 0xA, 0x33, 0x3F, 0x00, 0x00 } },     /* 350   350      0.0   */
-       { .icl = { 0xA, 0x47, 0x36, 0x00, 0x09 } },     /* 350   500      3.1   */
-       { .icl = { 0xC, 0x64, 0x34, 0x00, 0x0B } },     /* 350   700      6.0   */
-       { .icl = { 0x6, 0x7F, 0x30, 0x00, 0x0F } },     /* 350   900      8.2   */
+       { .icl = { 0xA, 0x47, 0x38, 0x00, 0x07 } },     /* 350   500      3.1   */
+       { .icl = { 0xC, 0x64, 0x33, 0x00, 0x0C } },     /* 350   700      6.0   */
+       { .icl = { 0x6, 0x7F, 0x2F, 0x00, 0x10 } },     /* 350   900      8.2   */
        { .icl = { 0xA, 0x46, 0x3F, 0x00, 0x00 } },     /* 500   500      0.0   */
-       { .icl = { 0xC, 0x64, 0x38, 0x00, 0x07 } },     /* 500   700      2.9   */
+       { .icl = { 0xC, 0x64, 0x37, 0x00, 0x08 } },     /* 500   700      2.9   */
        { .icl = { 0x6, 0x7F, 0x32, 0x00, 0x0D } },     /* 500   900      5.1   */
        { .icl = { 0xC, 0x61, 0x3F, 0x00, 0x00 } },     /* 650   700      0.6   */
-       { .icl = { 0x6, 0x7F, 0x38, 0x00, 0x07 } },     /* 600   900      3.5   */
+       { .icl = { 0x6, 0x7F, 0x37, 0x00, 0x08 } },     /* 600   900      3.5   */
        { .icl = { 0x6, 0x7F, 0x3F, 0x00, 0x00 } },     /* 900   900      0.0   */
 };