]> git.itanic.dy.fi Git - linux-stable/commitdiff
arm64: dts: renesas: r8a779a0: Correct avb[01] reg sizes
authorGeert Uytterhoeven <geert+renesas@glider.be>
Sun, 11 Feb 2024 14:21:30 +0000 (15:21 +0100)
committerSasha Levin <sashal@kernel.org>
Tue, 26 Mar 2024 22:16:49 +0000 (18:16 -0400)
[ Upstream commit 0c51912331f8ba5ce5fb52f46e340945160672a3 ]

All Ethernet AVB instances on R-Car V3U have registers related to UDP/IP
support, but the declared register blocks for the first two instances
are too small to cover them.

Fix this by extending the register block sizes.

Fixes: 5a633320f08b8c9b ("arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ce6ce3c4b1495e02e7c1803fca810a7178a84500.1707660323.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/boot/dts/renesas/r8a779a0.dtsi

index 4e67a03564971b89a5b2fb7564b2eb93aa549819..504ac8c93faf53e39a3f7b99bb84ecc7fadf7eda 100644 (file)
@@ -658,7 +658,7 @@ channel7 {
                avb0: ethernet@e6800000 {
                        compatible = "renesas,etheravb-r8a779a0",
                                     "renesas,etheravb-rcar-gen4";
-                       reg = <0 0xe6800000 0 0x800>;
+                       reg = <0 0xe6800000 0 0x1000>;
                        interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
@@ -706,7 +706,7 @@ avb0: ethernet@e6800000 {
                avb1: ethernet@e6810000 {
                        compatible = "renesas,etheravb-r8a779a0",
                                     "renesas,etheravb-rcar-gen4";
-                       reg = <0 0xe6810000 0 0x800>;
+                       reg = <0 0xe6810000 0 0x1000>;
                        interrupts = <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,