]> git.itanic.dy.fi Git - linux-stable/commitdiff
cxl/hdm: Remove broken error path
authorDan Williams <dan.j.williams@intel.com>
Tue, 31 Oct 2023 21:09:19 +0000 (14:09 -0700)
committerDan Williams <dan.j.williams@intel.com>
Tue, 31 Oct 2023 21:10:04 +0000 (14:10 -0700)
Dan reports that cxl_decoder_commit() potentially leaks a hold of
cxl_dpa_rwsem. The potential error case is a "should not" happen
scenario, turn it into a "can not" happen scenario by adding the error
check to cxl_port_setup_targets() where other setting validation occurs.

Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: http://lore.kernel.org/r/63295673-5d63-4919-b851-3b06d48734c0@moroto.mountain
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Fixes: 176baefb2eb5 ("cxl/hdm: Commit decoder state to hardware")
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
drivers/cxl/core/hdm.c
drivers/cxl/core/region.c

index af17da8230d56e15cdd01e51efb5069fdf8a2bee..1cc9be85ba4cd1679838714b91953938b3aeddfc 100644 (file)
@@ -565,17 +565,11 @@ static void cxld_set_type(struct cxl_decoder *cxld, u32 *ctrl)
                          CXL_HDM_DECODER0_CTRL_HOSTONLY);
 }
 
-static int cxlsd_set_targets(struct cxl_switch_decoder *cxlsd, u64 *tgt)
+static void cxlsd_set_targets(struct cxl_switch_decoder *cxlsd, u64 *tgt)
 {
        struct cxl_dport **t = &cxlsd->target[0];
        int ways = cxlsd->cxld.interleave_ways;
 
-       if (dev_WARN_ONCE(&cxlsd->cxld.dev,
-                         ways > 8 || ways > cxlsd->nr_targets,
-                         "ways: %d overflows targets: %d\n", ways,
-                         cxlsd->nr_targets))
-               return -ENXIO;
-
        *tgt = FIELD_PREP(GENMASK(7, 0), t[0]->port_id);
        if (ways > 1)
                *tgt |= FIELD_PREP(GENMASK(15, 8), t[1]->port_id);
@@ -591,8 +585,6 @@ static int cxlsd_set_targets(struct cxl_switch_decoder *cxlsd, u64 *tgt)
                *tgt |= FIELD_PREP(GENMASK_ULL(55, 48), t[6]->port_id);
        if (ways > 7)
                *tgt |= FIELD_PREP(GENMASK_ULL(63, 56), t[7]->port_id);
-
-       return 0;
 }
 
 /*
@@ -680,13 +672,7 @@ static int cxl_decoder_commit(struct cxl_decoder *cxld)
                void __iomem *tl_lo = hdm + CXL_HDM_DECODER0_TL_LOW(id);
                u64 targets;
 
-               rc = cxlsd_set_targets(cxlsd, &targets);
-               if (rc) {
-                       dev_dbg(&port->dev, "%s: target configuration error\n",
-                               dev_name(&cxld->dev));
-                       goto err;
-               }
-
+               cxlsd_set_targets(cxlsd, &targets);
                writel(upper_32_bits(targets), tl_hi);
                writel(lower_32_bits(targets), tl_lo);
        } else {
@@ -704,7 +690,6 @@ static int cxl_decoder_commit(struct cxl_decoder *cxld)
 
        port->commit_end++;
        rc = cxld_await_commit(hdm, cxld->id);
-err:
        if (rc) {
                dev_dbg(&port->dev, "%s: error %d committing decoder\n",
                        dev_name(&cxld->dev), rc);
index 8d3580a0db5393943f2dbfb23843a30aea4a3d56..56e575c79bb49187f909aa87d4f6c5d9894c3b75 100644 (file)
@@ -1196,6 +1196,14 @@ static int cxl_port_setup_targets(struct cxl_port *port,
                return rc;
        }
 
+       if (iw > 8 || iw > cxlsd->nr_targets) {
+               dev_dbg(&cxlr->dev,
+                       "%s:%s:%s: ways: %d overflows targets: %d\n",
+                       dev_name(port->uport_dev), dev_name(&port->dev),
+                       dev_name(&cxld->dev), iw, cxlsd->nr_targets);
+               return -ENXIO;
+       }
+
        if (test_bit(CXL_REGION_F_AUTO, &cxlr->flags)) {
                if (cxld->interleave_ways != iw ||
                    cxld->interleave_granularity != ig ||