On MT7621AT, MT7621DAT, and MT7621ST SoCs, port 5 of the MT7530 switch is
connected to the second MAC of the SoC as a CPU port. Add the port and set
up the second MAC on the bindings. Revert PHY muxing on GB-PC1.
There's an external PHY connected to the second MAC of the SoC on GB-PC2,
therefore, disable port@5 for this device.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
status = "okay";
};
-&gmac1 {
- status = "okay";
- phy-handle = <ðphy4>;
-};
-
-&mdio {
- ethphy4: ethernet-phy@4 {
- reg = <4>;
- };
-};
-
&switch0 {
ports {
port@0 {
status = "okay";
label = "ethblack";
};
+
+ port@4 {
+ status = "okay";
+ label = "ethblue";
+ };
};
};
};
&gmac1 {
- status = "okay";
phy-mode = "rgmii-rxid";
phy-handle = <ðphy5>;
+
+ fixed-link {
+ status = "disabled";
+ };
};
&mdio {
status = "okay";
label = "ethblue";
};
+
+ port@5 {
+ status = "disabled";
+ };
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
- status = "disabled";
phy-mode = "rgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ };
};
mdio: mdio-bus {
label = "swp4";
};
+ port@5 {
+ reg = <5>;
+ ethernet = <&gmac1>;
+ phy-mode = "rgmii";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ };
+ };
+
port@6 {
reg = <6>;
ethernet = <&gmac0>;