]> git.itanic.dy.fi Git - linux-stable/commitdiff
net/mlx5: DR, Set counter ID on the last STE for STEv1 TX
authorYevgeny Kliteynik <kliteyn@nvidia.com>
Tue, 28 Feb 2023 22:16:34 +0000 (00:16 +0200)
committerSaeed Mahameed <saeedm@nvidia.com>
Wed, 12 Apr 2023 03:57:37 +0000 (20:57 -0700)
In STEv1 counter action can be set either by filling counter ID on STE, in
which case it is executed before other actions on this STE, or as a single
action, in which case it is executed in accordance with the actions order.
FW steering on STEv1 devices implements counter as counter ID on STE, and
this counter is set on the last STE.
Fix SMFS to be consistent with this behaviour - move TX counter to the
last STE, this way the counter will include all actions of the previous STEs
that might have changed packet headers length, e.g. encap, vlan push, etc.

Signed-off-by: Yevgeny Kliteynik <kliteyn@nvidia.com>
Reviewed-by: Alex Vesker <valex@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste_v1.c

index 084145f18084a998e01db75225aa350ec4896857..27cc6931bbde047ab18ca367a6daab461113da7e 100644 (file)
@@ -604,9 +604,6 @@ void dr_ste_v1_set_actions_tx(struct mlx5dr_domain *dmn,
                        allow_modify_hdr = false;
        }
 
-       if (action_type_set[DR_ACTION_TYP_CTR])
-               dr_ste_v1_set_counter_id(last_ste, attr->ctr_id);
-
        if (action_type_set[DR_ACTION_TYP_MODIFY_HDR]) {
                if (!allow_modify_hdr || action_sz < DR_STE_ACTION_DOUBLE_SZ) {
                        dr_ste_v1_arr_init_next_match(&last_ste, added_stes,
@@ -724,6 +721,10 @@ void dr_ste_v1_set_actions_tx(struct mlx5dr_domain *dmn,
                                                  attr->range.max);
        }
 
+       /* set counter ID on the last STE to adhere to DMFS behavior */
+       if (action_type_set[DR_ACTION_TYP_CTR])
+               dr_ste_v1_set_counter_id(last_ste, attr->ctr_id);
+
        dr_ste_v1_set_hit_gvmi(last_ste, attr->hit_gvmi);
        dr_ste_v1_set_hit_addr(last_ste, attr->final_icm_addr, 1);
 }