drm/amdgpu/gmc: set a default disable value for AGP

To disable AGP, the start needs to be set to a higher
value than the end.  Set a default disable value for
the AGP aperture and allow the IP specific GMC code
to enable it selectively be calling amdgpu_gmc_agp_location().

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index f74a51a93ebb12fe125e70bbbcdbe200193872b6..2bfeaacd050cf1792fa312fd3ef713db1a2e0fe9 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -316,14 +316,6 @@ void amdgpu_gmc_agp_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
        const uint64_t sixteen_gb_mask = ~(sixteen_gb - 1);
        u64 size_af, size_bf;
 
-       if (amdgpu_sriov_vf(adev)) {
-               mc->agp_start = 0xffffffffffff;
-               mc->agp_end = 0x0;
-               mc->agp_size = 0;
-
-               return;
-       }
-
        if (mc->fb_start > mc->gart_start) {
                size_bf = (mc->fb_start & sixteen_gb_mask) -
                        ALIGN(mc->gart_end + 1, sixteen_gb);
@@ -347,6 +339,25 @@ void amdgpu_gmc_agp_location(struct amdgpu_device *adev, struct amdgpu_gmc *mc)
                        mc->agp_size >> 20, mc->agp_start, mc->agp_end);
 }
 
+/**
+ * amdgpu_gmc_set_agp_default - Set the default AGP aperture value.
+ * @adev: amdgpu device structure holding all necessary information
+ * @mc: memory controller structure holding memory information
+ *
+ * To disable the AGP aperture, you need to set the start to a larger
+ * value than the end.  This function sets the default value which
+ * can then be overridden using amdgpu_gmc_agp_location() if you want
+ * to enable the AGP aperture on a specific chip.
+ *
+ */
+void amdgpu_gmc_set_agp_default(struct amdgpu_device *adev,
+                               struct amdgpu_gmc *mc)
+{
+       mc->agp_start = 0xffffffffffff;
+       mc->agp_end = 0;
+       mc->agp_size = 0;
+}
+
 /**
  * amdgpu_gmc_fault_key - get hask key from vm fault address and pasid
  *

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index dd0ede75e5d7639cdff91d847f13e5ca548027fb..f593259a66c3b217e3ae3cb4c71a03263ec144e4 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -394,6 +394,8 @@ void amdgpu_gmc_gart_location(struct amdgpu_device *adev,
                              struct amdgpu_gmc *mc);
 void amdgpu_gmc_agp_location(struct amdgpu_device *adev,
                             struct amdgpu_gmc *mc);
+void amdgpu_gmc_set_agp_default(struct amdgpu_device *adev,
+                               struct amdgpu_gmc *mc);
 bool amdgpu_gmc_filter_faults(struct amdgpu_device *adev,
                              struct amdgpu_ih_ring *ih, uint64_t addr,
                              uint16_t pasid, uint64_t timestamp);

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index cef920a93924b60140f40fb5020871a3e0c883eb..0dcb6c36b02c0baa29c0c98347724ed0970f2c3a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -1062,6 +1062,9 @@ static const char * const amdgpu_vram_names[] = {
  */
 int amdgpu_bo_init(struct amdgpu_device *adev)
 {
+       /* set the default AGP aperture state */
+       amdgpu_gmc_set_agp_default(adev, &adev->gmc);
+
        /* On A+A platform, VRAM can be mapped as WB */
        if (!adev->gmc.xgmi.connected_to_cpu && !adev->gmc.is_app_apu) {
                /* reserve PAT memory space to WC for VRAM */

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index a467b3ac7f0f565d8af0cc2bc9cf450272ace131..70370b412d2474703c612ab4cdf672fb62b976fe 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -671,7 +671,8 @@ static void gmc_v10_0_vram_gtt_location(struct amdgpu_device *adev,
 
        amdgpu_gmc_vram_location(adev, &adev->gmc, base);
        amdgpu_gmc_gart_location(adev, mc);
-       amdgpu_gmc_agp_location(adev, mc);
+       if (!amdgpu_sriov_vf(adev))
+               amdgpu_gmc_agp_location(adev, mc);
 
        /* base offset of vram pages */
        adev->vm_manager.vram_base_offset = adev->gfxhub.funcs->get_mc_fb_offset(adev);

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
index d0e3583a3cac8be731c2cf891c086882e56d0c6a..e9cbe81221548d44240ec3537632d06e8b1494a8 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -635,7 +635,8 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev,
 
        amdgpu_gmc_vram_location(adev, &adev->gmc, base);
        amdgpu_gmc_gart_location(adev, mc);
-       amdgpu_gmc_agp_location(adev, mc);
+       if (!amdgpu_sriov_vf(adev))
+               amdgpu_gmc_agp_location(adev, mc);
 
        /* base offset of vram pages */
        if (amdgpu_sriov_vf(adev))

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
index 07579fa26fa3ebcce6f60df8657cb98617f4c884..3f31f268e0eb21efbf4febf4ae533288470160a6 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -253,8 +253,8 @@ static void gmc_v6_0_mc_program(struct amdgpu_device *adev)
        WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
               adev->mem_scratch.gpu_addr >> 12);
        WREG32(mmMC_VM_AGP_BASE, 0);
-       WREG32(mmMC_VM_AGP_TOP, 0);
-       WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
+       WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);
+       WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);
 
        if (gmc_v6_0_wait_for_idle((void *)adev))
                dev_warn(adev->dev, "Wait for MC idle timedout !\n");

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 89c4257cdc2e8b3d0788bcfd144f468ee82efc0f..a72dc21cf6fc0f5426ac2f16d49ddd671490ddbc 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -288,8 +288,8 @@ static void gmc_v7_0_mc_program(struct amdgpu_device *adev)
        WREG32(mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR,
               adev->mem_scratch.gpu_addr >> 12);
        WREG32(mmMC_VM_AGP_BASE, 0);
-       WREG32(mmMC_VM_AGP_TOP, 0);
-       WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
+       WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);
+       WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);
        if (gmc_v7_0_wait_for_idle((void *)adev))
                dev_warn(adev->dev, "Wait for MC idle timedout !\n");
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
index 84a4d0c6e135e0f0f963486a1722bdaa35539cff..8ce77d074d17666368f8391df73d2bc417aa3529 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -473,8 +473,8 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev)
        }
 
        WREG32(mmMC_VM_AGP_BASE, 0);
-       WREG32(mmMC_VM_AGP_TOP, 0);
-       WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF);
+       WREG32(mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 22);
+       WREG32(mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 22);
        if (gmc_v8_0_wait_for_idle((void *)adev))
                dev_warn(adev->dev, "Wait for MC idle timedout !\n");
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 3630b53c3f122131134ae1e07da86de81fa8c512..6b15677c03149d5051f275d792011dbb45cc5774 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1612,7 +1612,8 @@ static void gmc_v9_0_vram_gtt_location(struct amdgpu_device *adev,
        } else {
                amdgpu_gmc_vram_location(adev, mc, base);
                amdgpu_gmc_gart_location(adev, mc);
-               amdgpu_gmc_agp_location(adev, mc);
+               if (!amdgpu_sriov_vf(adev))
+                       amdgpu_gmc_agp_location(adev, mc);
        }
        /* base offset of vram pages */
        adev->vm_manager.vram_base_offset = adev->gfxhub.funcs->get_mc_fb_offset(adev);

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index ab234bf0b2d40429f6057842871fbcd5f04a3526..a0023d157ffbe3ff6ef14addb78f68a7c6a23684 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1256,7 +1256,7 @@ static void mmhub_read_system_context(struct amdgpu_device *adev, struct dc_phy_
        agp_top = adev->gmc.agp_end >> 24;
 
        /* AGP aperture is disabled */
-       if (agp_bot == agp_top) {
+       if (agp_bot > agp_top) {
                logical_addr_low = adev->gmc.fb_start >> 18;
                if (adev->apu_flags & AMD_APU_IS_RAVEN2)
                        /*