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drm/i915/display: Fix handling of enable_psr parameter
2022-09-28 José Roberto de... drm/i915/display: Fix handling of enable_psr parameter
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220608203344.513082-1-jose.souza@intel.com
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2022-04-20 José Roberto de... drm/i915/dg2: Add workaround 18019627453
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220419182753.364237-2-jose.souza@intel.com
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2022-04-20 José Roberto de... drm/i915/display: Add workaround 22014263786
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220419182753.364237-1-jose.souza@intel.com
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2022-04-20 José Roberto de... drm/i915/display/psr: Unset enable_psr2_sel_fetch if...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220414151118.21980-1-jose.souza@intel.com
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2022-04-19 José Roberto de... drm/i915/display/psr: Clear more PSR state during disable
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220414151118.21980-2-jose.souza@intel.com
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2022-04-19 José Roberto de... drm/i915/display/psr: Unset enable_psr2_sel_fetch if...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220414151118.21980-1-jose.souza@intel.com
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2022-04-08 José Roberto de... drm/i915/display: Fix warnings about PSR lock not held
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220406210540.493610-1-jose.souza@intel.com
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2022-04-06 José Roberto de... drm/i915/display/psr: Use continuos full frame to handle...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220405155344.47219-3-jose.souza@intel.com
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2022-04-06 José Roberto de... drm/i915/display/psr: Lock and unlock PSR around pipe...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220405155344.47219-2-jose.souza@intel.com
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2022-04-06 José Roberto de... drm/i915/display/psr: Set partial frame enable when...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220405155344.47219-1-jose.souza@intel.com
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2022-04-01 José Roberto de... drm/i915/display: Add HAS_MBUS_JOINING
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220331184152.1086943-1-jose.souza@intel.com
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2022-03-30 José Roberto de... drm/i915/display/adlp: Fix programing of PIPE_MBUS_DBOX_CTL
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220330155724.255226-3-jose.souza@intel.com
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2022-03-30 José Roberto de... drm/i915/display/tgl+: Set default values for all registers...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220330155724.255226-1-jose.souza@intel.com
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2022-03-30 José Roberto de... drm/i915/dg2: Add Wa_22014226127
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220325142249.81443-1-jose.souza@intel.com
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2022-03-29 José Roberto de... docs: gpu: i915.rst: Fix DRRS documentation
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220325183832.146472-1-jose.souza@intel.com
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2022-03-21 José Roberto de... drm/i915/display/adlp: More voltage swing table updates
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220315205122.202701-1-jose.souza@intel.com
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2022-03-16 José Roberto de... drm/i915/display: Do not re-enable PSR after it was...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220311185149.110527-2-jose.souza@intel.com
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2022-03-16 José Roberto de... drm/i915/display: Fix HPD short pulse handling for eDP
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220311185149.110527-1-jose.souza@intel.com
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2022-03-15 José Roberto de... drm/i915/display: Do not re-enable PSR after it was...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220311185149.110527-2-jose.souza@intel.com
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2022-03-15 José Roberto de... drm/i915/display: Fix HPD short pulse handling for eDP
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220311185149.110527-1-jose.souza@intel.com
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2022-03-14 José Roberto de... drm/i915/display/adlp: Update eDP voltage swing table
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220314152753.85081-1-jose.souza@intel.com
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2022-03-03 José Roberto de... drm/i915/display: Allow users to disable PSR2
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220224202523.993560-1-jose.souza@intel.com
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2022-02-25 José Roberto de... drm/i915: Check stolen memory size before calling drm_mm_init
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20220223194946.725328-1-jose.souza@intel.com
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2022-02-23 José Roberto de... drm/i915/rps/tgl+: Remove RPS interrupt support
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220218210330.48653-1-jose.souza@intel.com
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2022-02-23 José Roberto de... drm/i915/tgl: Simply subplatform detection
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220222141424.35165-1-jose.souza@intel.com
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2022-02-18 José Roberto de... drm/i915/display: Implement Wa_16013835468
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...patch/msgid/20220210185223.95399-2-jose.souza@intel.com
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2022-02-18 José Roberto de... drm/i915/display: Group PSR2 prog sequences and workarounds
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220210185223.95399-1-jose.souza@intel.com
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2022-02-18 José Roberto de... drm/i915/display/tgl+: Implement new PLL programming...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220216134059.25348-1-jose.souza@intel.com
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2022-01-17 José Roberto de... drm/i915/display/adlp: Implement new step in the TC...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220113174826.50272-1-jose.souza@intel.com
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2022-01-17 José Roberto de... drm/i915/display/ehl: Update voltage swing table
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220113160437.49059-1-jose.souza@intel.com
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2022-01-13 José Roberto de... drm/i915/display/adlp: Implement new step in the TC...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220113174826.50272-1-jose.souza@intel.com
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2022-01-13 José Roberto de... drm/i915/display/ehl: Update voltage swing table
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20220113160437.49059-1-jose.souza@intel.com
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2021-12-02 José Roberto de... Revert "drm/i915: Implement Wa_1508744258"
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20211119140931.32791-1-jose.souza@intel.com
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2021-12-01 José Roberto de... drm/i915: Add workaround numbers to GEN7_COMMON_SLICE_CHICKE...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20211119140931.32791-2-jose.souza@intel.com
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2021-12-01 José Roberto de... Revert "drm/i915: Implement Wa_1508744258"
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20211119140931.32791-1-jose.souza@intel.com
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2021-11-11 José Roberto de... drm/i915/psr: Fix PSR2 handling of multiplanar format
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20211108213807.39865-1-jose.souza@intel.com
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2021-11-05 José Roberto de... drm/i915/display/adlp: Disable underrun recovery
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20211104010858.43559-1-jose.souza@intel.com
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2021-11-02 José Roberto de... drm/i915: Rename GT_STEP to GRAPHICS_STEP
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20211020002353.193893-3-jose.souza@intel.com
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2021-11-02 José Roberto de... drm/i915: Track media IP stepping separated from GT
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20211020002353.193893-2-jose.souza@intel.com
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2021-11-02 José Roberto de... drm/i915: Add struct to hold IP version
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...msgid/20211020002353.193893-1-jose.souza@intel.com
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2021-11-01 José Roberto de... drm/i915/display: Check async flip state of every crtc...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20211029202432.140745-1-jose.souza@intel.com
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2021-10-29 José Roberto de... drm/i915/adlp: Implement workaround 16013190616
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20211028230449.115832-1-jose.souza@intel.com
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2021-10-28 José Roberto de... drm/i915/adlp: Extend PSR2 support in transcoder B
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20211027180545.55660-1-jose.souza@intel.com
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2021-10-26 José Roberto de... drm/i915/display: Wait PSR2 get out of deep sleep to...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20211005231851.67698-1-jose.souza@intel.com
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2021-10-20 José Roberto de... drm/i915/display: Add warn_on in intel_psr_pause()
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20211020003558.222198-2-jose.souza@intel.com
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2021-10-20 José Roberto de... drm/i915/display: Rename POWER_DOMAIN_DPLL_DC_OFF to...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20211020003558.222198-1-jose.souza@intel.com
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2021-10-19 José Roberto de... drm/i915: Remove memory frequency calculation
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20211013010046.91858-1-jose.souza@intel.com
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2021-10-14 José Roberto de... drm/i915: Remove memory frequency calculation
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20211013010046.91858-1-jose.souza@intel.com
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2021-09-30 José Roberto de... drm/i915/display: Enable PSR2 selective fetch by default
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210930001409.254817-8-jose.souza@intel.com
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2021-09-30 José Roberto de... drm/i915/display/adlp: Allow PSR2 to be enabled
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210930001409.254817-7-jose.souza@intel.com
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2021-09-30 José Roberto de... drm/i915/display/adlp: Optimize PSR2 power-savings...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210930001409.254817-6-jose.souza@intel.com
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2021-09-30 José Roberto de... drm/i915/display: Fix glitches when moving cursor with...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210930001409.254817-5-jose.souza@intel.com
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2021-09-30 José Roberto de... drm/i915/display: Handle frontbuffer rendering when...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210930001409.254817-4-jose.souza@intel.com
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2021-09-30 José Roberto de... drm/i915/display: Drop unnecessary frontbuffer flushes
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210930001409.254817-3-jose.souza@intel.com
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2021-09-30 José Roberto de... drm/i915/display/psr: Handle plane and pipe restrictions...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210930001409.254817-1-jose.souza@intel.com
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2021-09-23 José Roberto de... drm/i915/display: Only keep PSR enabled if there is...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20210922215242.66683-3-jose.souza@intel.com
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2021-09-23 José Roberto de... drm/i915/display: Match PSR2 selective fetch sequences...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20210922215242.66683-2-jose.souza@intel.com
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2021-09-23 José Roberto de... drm/i915/display/dmc: Set DC_STATE_DEBUG_MASK_CORES...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20210922215242.66683-1-jose.souza@intel.com
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2021-09-17 José Roberto de... drm/i915/display/adlp: Add new PSR2 workarounds
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210914212507.177511-5-jose.souza@intel.com
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2021-09-17 José Roberto de... drm/i915/display/psr: Use drm damage helpers to calculate...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210914212507.177511-4-jose.souza@intel.com
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2021-09-17 José Roberto de... drm/i915/display: Workaround cursor left overs with...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210914212507.177511-3-jose.souza@intel.com
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2021-09-17 José Roberto de... drm/i915/display: Wait at least 2 frames before selective...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210914212507.177511-2-jose.souza@intel.com
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2021-09-17 José Roberto de... drm/i915/display/adlp: Fix PSR2_MAN_TRK_CTL_SU_REGION_END_AD...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210914212507.177511-1-jose.souza@intel.com
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2021-09-14 José Roberto de... drm/i915/dg1: Add new PCI id
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20210913181909.35237-1-jose.souza@intel.com
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2021-09-07 José Roberto de... drm/i915/display: Prepare DRRS for frontbuffer rendering...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20210903221036.34770-3-jose.souza@intel.com
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2021-09-07 José Roberto de... drm/i915/display: Share code between intel_drrs_flush...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20210903221036.34770-2-jose.souza@intel.com
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2021-09-07 José Roberto de... drm/i915/display: Some code improvements and code style...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20210903221036.34770-1-jose.souza@intel.com
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2021-08-30 José Roberto de... drm/i915/display: Renaming DRRS functions to intel_drrs_*()
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20210827174253.51122-3-jose.souza@intel.com
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2021-08-30 José Roberto de... drm/i915/display: Move DRRS code its own file
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20210827174253.51122-2-jose.souza@intel.com
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2021-08-30 José Roberto de... drm/i915/display: Drop PSR support from HSW and BDW
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...patch/msgid/20210827174253.51122-1-jose.souza@intel.com
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2021-08-16 José Roberto de... drm/i915: Nuke ORIGIN_GTT
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...msgid/20210815014346.373945-2-jose.souza@intel.com
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2021-08-16 José Roberto de... drm/i915/display: Fix sel fetch plane offset calculation
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210815014346.373945-1-jose.souza@intel.com
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2021-08-03 José Roberto de... drm/i915/display/adl_p: Correctly program MBUS DBOX...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210708211827.288601-6-jose.souza@intel.com
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2021-07-27 José Roberto de... drm/i915/display: Disable audio, DRRS and PSR before...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20210726181559.80855-1-jose.souza@intel.com
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2021-07-26 José Roberto de... drm/i915/display/psr2: Fix cursor updates using legacy...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210717011227.204494-3-jose.souza@intel.com
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2021-07-26 José Roberto de... drm/i915/display/psr2: Mark as updated all planes that...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210717011227.204494-2-jose.souza@intel.com
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2021-07-23 José Roberto de... drm/i915/dg2: Add DG2 to the PSR2 defeature list
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
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2021-07-23 José Roberto de... drm/i915: Extend Wa_1406941453 to adl-p
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...patch/msgid/20210722192041.92346-1-jose.souza@intel.com
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2021-07-20 José Roberto de... drm/i915/display: Disable FBC when PSR2 is enabled...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210625235600.765677-2-jose.souza@intel.com
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2021-07-20 José Roberto de... drm/i915/display/adl_p: Implement PSR changes
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...msgid/20210625235600.765677-1-jose.souza@intel.com
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2021-07-13 José Roberto de... drm/i915/display/xelpd: Extend Wa_14011508470
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...msgid/20210713003854.143197-6-jose.souza@intel.com
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2021-07-13 José Roberto de... drm/i915: Limit Wa_22010178259 to affected platforms
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...msgid/20210713003854.143197-5-jose.souza@intel.com
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2021-07-13 José Roberto de... drm/i915/display: Settle on "adl-x" in WA comments
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...msgid/20210713003854.143197-1-jose.souza@intel.com
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2021-07-13 José Roberto de... drm/i915/adl_s: Extend Wa_1406941453
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...msgid/20210713003854.143197-4-jose.souza@intel.com
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2021-07-13 José Roberto de... drm/i915: Implement Wa_1508744258
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...msgid/20210713003854.143197-3-jose.souza@intel.com
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2021-07-13 José Roberto de... drm/i915: Settle on "adl-x" in WA comments
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...msgid/20210713003854.143197-2-jose.souza@intel.com
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2021-07-06 José Roberto de... drm/i915/display/dg1: Correctly map DPLLs during state...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210630210522.162674-1-jose.souza@intel.com
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2021-07-01 José Roberto de... drm/i915/display/dg1: Correctly map DPLLs during state...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210630210522.162674-1-jose.souza@intel.com
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2021-06-24 José Roberto de... drm/i915/display/adl_p: Implement Wa_16011303918
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...msgid/20210616203158.118111-5-jose.souza@intel.com
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2021-06-24 José Roberto de... drm/i915/xelpd: Handle PSR2 SDP indication in the prior...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210616203158.118111-4-jose.souza@intel.com
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2021-06-24 José Roberto de... drm/i915/display/adl_p: Implement Wa_16011168373
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...msgid/20210616203158.118111-3-jose.souza@intel.com
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2021-06-24 José Roberto de... drm/i915/display/adl_p: Implement Wa_22012278275
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...msgid/20210616203158.118111-2-jose.souza@intel.com
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2021-06-24 José Roberto de... drm/i915/display/psr: Handle SU Y granularity
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210616203158.118111-1-jose.souza@intel.com
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2021-06-16 José Roberto de... drm/dp_mst: Add missing drm parameters to recently...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20210616194415.36926-1-jose.souza@intel.com
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2021-06-11 José Roberto de... Revert "drm/i915/display: Drop FIXME about turn off...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...patch/msgid/20210610194527.84997-1-jose.souza@intel.com
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2021-06-07 José Roberto de... drm/i915/display: Drop FIXME about turn off infoframes
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210514232247.144542-4-jose.souza@intel.com
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2021-06-07 José Roberto de... drm/i915/display: Allow fastsets when DP_SDP_VSC infoframe...
...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210514232247.144542-2-jose.souza@intel.com
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2021-06-07 José Roberto de... drm/i915/display: Fix fastsets involving PSR
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210514232247.144542-1-jose.souza@intel.com
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2021-05-25 José Roberto de... drm/i915/display/adl_p: Disable PSR2
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210524214805.259692-5-jose.souza@intel.com
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2021-05-25 José Roberto de... drm/i915/display/adl_p: Allow DC3CO in pipe and port B
 ...off-by: José Roberto de Souza <jose.souza@intel.com>
...msgid/20210524214805.259692-4-jose.souza@intel.com
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